JP2012088979A - Electronic apparatus and clock correction method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic apparatus and a clock correction method which are capable of retaining a frequency of a clock signal within a specified range by correcting the frequency of the clock signal without changing considerably in a system in which the clock signal is generated by a RC oscillator.SOLUTION: An electronic apparatus and a clock correction method thereof are provided. The electronic apparatus includes: frequency change means which is capable of changing a frequency of a clock signal over a plurality of stages by switching a set value of resistance or capacitance of a RC oscillator; storage means which stores a trimming table listing change amounts over the plurality of stages; and clock correction control means which corrects the frequency of the clock signal by switching the set value of the frequency change means. On the basis of data in the trimming table, the clock correction control means then switches the set value of the frequency change means in such a manner that the frequency of the clock signal becomes gradually closer to a specified frequency from a frequency prior to correction (S7, S8), thereby correcting the frequency of the clock signal.

Description

  The present invention relates to an electronic device that generates a clock signal using an RC oscillator and a clock correction method that corrects the frequency of the clock signal.

  The RC oscillator has advantages in that it consumes less power to generate a clock signal and can reduce the component cost compared to a crystal oscillator, a ceramic oscillator, or the like. On the other hand, there are drawbacks that the accuracy of the oscillation frequency is relatively low and the oscillation frequency changes relatively greatly due to temperature and the like.

  Therefore, in a system in which a clock signal is generated by an RC oscillator, it is common to periodically perform a clock frequency correction process so that the clock signal frequency does not greatly deviate. By such correction processing, for example, when an accurate timer is required, or when signal processing synchronized with a clock signal is performed in data communication with a peripheral device, a timer error is increased due to a shift in clock frequency. Or occurrence of a communication error can be avoided.

  As a method for correcting the frequency of the clock signal by the RC oscillator, for example, the following method is generally used. First, the RC oscillator is provided with a trimming circuit capable of switching its resistance and capacitance. Then, during the periodic correction processing, the setting of the trimming circuit is switched from the first stage to all stages while measuring the frequency of the clock signal with reference to the accurate frequency signal. When the frequency is measured in all setting states, the trimming circuit is finally switched to a setting in which the frequency of the clock signal is closest to the specified value. Thereby, the frequency of the clock signal is corrected.

  Further, as a prior art related to the present invention, Patent Document 1 divides the output of the RC oscillator to generate a clock signal, and measures the period of the oscillation signal of the RC oscillator based on the output of the crystal oscillator. A technique for correcting the frequency of the clock signal by performing the above-described frequency division at a frequency division ratio corresponding to the measured value is disclosed.

  Patent Document 2 discloses a technique for measuring the frequency of the clock signal of the RC oscillator based on the clock of the crystal oscillator and correcting the accuracy of the timer based on the clock signal of the RC oscillator by software.

JP 2006-229607 A Japanese Patent Laid-Open No. 10-049251

  However, in the above-described conventional method for correcting the frequency of the clock signal, the setting of the trimming circuit is switched from the first stage to all stages during the correction process, so that the frequency of the clock signal varies greatly. In addition, a period in which the frequency of the clock signal deviates significantly from the specified value occurs. Furthermore, there arises a problem that the frequency of the clock signal changes abruptly at the start and end of the correction process.

  If the frequency of the clock signal changes as described above, for example, a communication error may occur with a peripheral device, or display data output may be temporarily interrupted, causing a display screen to flicker. .

  An object of the present invention is to provide an electronic device and a clock correction method capable of correcting and maintaining a clock signal frequency within a specified range in a system in which a clock signal is generated by an RC oscillator. .

In order to achieve the above object, the invention according to claim 1
An RC oscillator that generates a clock signal using the time constant of the RC circuit;
A frequency changing means capable of changing the frequency of the clock signal in a plurality of stages by switching the setting of at least the resistance value or the capacitance value of the RC circuit;
Storage means for storing frequency change amount data each representing a value related to a change amount of the frequency in a plurality of stages by the frequency change means;
Clock correction control means for correcting the frequency of the clock signal by switching the setting of the frequency changing means;
With
The clock correction control means includes
Based on the frequency change amount data, the setting of the frequency changing unit is switched to correct the frequency of the clock signal so that the frequency of the clock signal gradually approaches the specified frequency from the frequency before correction. It is said.

The invention according to claim 2 is the electronic device according to claim 1,
Timing signal generating means for generating a timing signal having a constant frequency with higher accuracy than the clock signal;
A deviation amount measuring means for measuring a deviation amount of the frequency of the clock signal based on the timing signal;
Frequency change amount data creation means for creating the frequency change amount data by measuring the deviation amount by the deviation amount measurement means in each switching state while switching the setting of the frequency change means in a plurality of ways at the same time,
With
In the storage means,
The frequency change amount data created by the frequency change amount data creating means is stored.

The invention according to claim 3 is the electronic device according to claim 2,
The frequency change amount data creating means includes:
The frequency change amount data is created when the electronic device is activated.

The invention according to claim 4 is the electronic device according to claim 2 or 3,
The clock correction control means includes
When it is determined that the frequency of the clock signal has shifted by a predetermined amount or more based on the measurement result of the deviation amount measuring means, the correction processing of the frequency of the clock signal is started.
It is characterized in that it is determined that the frequency of the clock signal has approached a specified value based on the measurement result of the deviation amount measuring means.

The invention according to claim 5 is the electronic device according to claim 1,
The clock correction control means includes
The frequency of the clock signal is corrected by sequentially switching the setting of the frequency changing means from the immediately previous setting state to the next setting state in which the frequency is shifted in the direction of reducing the shift with the smallest shift amount. It is characterized by.

The invention described in claim 6
An RC oscillator that generates a clock signal using a time constant of the RC circuit, and a frequency changing unit that can change the setting of the resistance value or the capacitance value of the RC circuit and change the frequency of the clock signal in a plurality of stages. Storage means for storing frequency change amount data respectively representing values related to a plurality of steps of change in the frequency by the frequency change means, and a clock correction method for correcting the frequency of the clock signal in an electronic device. ,
Including a clock correction control step of correcting the frequency of the clock signal by switching the setting of the frequency changing means,
The clock correction control step includes
Based on the frequency change amount data, the setting of the frequency changing unit is switched to correct the frequency of the clock signal so that the frequency of the clock signal gradually approaches the specified frequency from the frequency before correction. It is said.

The invention according to claim 7 is the clock correction method according to claim 6,
The electronic device is provided with timing signal generation means for generating a timing signal having a constant frequency with higher accuracy than the clock signal,
A deviation amount measuring step of measuring a deviation amount of the frequency of the clock signal based on the timing signal;
A frequency change amount data creating step for creating the frequency change amount data by measuring the shift amount by the shift amount measuring step in each switching state while switching the setting of the frequency changing means in a plurality of ways at the same time;
A data storage step of storing the frequency change amount data created in the frequency change amount data creation step in the storage means;
It is characterized by including.

  According to the present invention, when the frequency of the clock signal generated by the RC oscillator is corrected, the frequency of the clock signal is changed and corrected so as to gradually approach a specified frequency from the frequency before correction. Therefore, there is an effect that the frequency does not fluctuate greatly or fluctuates, and problems caused by such fluctuations can be avoided.

It is a block diagram which shows the whole structure of the electronic device of embodiment of this invention. It is a circuit block diagram which shows an example of RC oscillation block. It is a timing chart explaining the measuring method of the frequency of a clock signal. It is a data chart which shows an example of a trimming table. It is a graph which shows the relationship between the frequency of the clock signal of a some setting state, and temperature. It is a flowchart which shows the control procedure of the clock frequency control process performed by CPU.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing an overall configuration of an electronic apparatus 1 according to an embodiment of the present invention.

  The electronic device 1 of this embodiment is a digital camera having a positioning function by GPS (Global Positioning System), although not particularly limited. As shown in FIG. 1, the electronic apparatus 1 includes an image sensor 2 that captures a subject image obtained through a lens, an input device 3 that has a plurality of operation buttons and inputs an operation command from the outside, An LSI (Large Scale Integrated Circuit) incorporating a display device 4 for displaying images and other various images, a GPS module 5 for receiving and demodulating a GPS satellite transmission signal, and a CPU (Central Processing Unit) 11 A controller 10, a program ROM (Read Only Memory) 6 storing a control program and control data executed by the CPU 11, a RAM (Random Access Memory) 7 that provides a working memory space to the CPU 11, and a captured image And an external storage device 8 such as a flash memory for storing the data.

  Further, the controller 10 includes a CPU 11 that performs overall control of the device, an imaging controller 12 that performs control of the image sensor 2, signal processing of the imaging signal, and the like, and input of signals from the input device 3 and the display device 4. An input / output controller 13 for outputting display data, a serial controller 14 for data communication with the GPS module 5, an RTC (Real Time Clock) block 15 as a timing signal generating means for measuring real time, An RC oscillation block 16 that generates a clock signal to be a system clock of the controller 10, a frequency measurement counter 17 as a deviation amount measuring unit that measures the frequency of the clock signal, and a storage unit that stores control data of the controller 10 EEPROM (electrically erasable programmable ROM) 18 and program A memory controller 19 for reading and writing data to the ROM6 and RAM 7, the external storage controller 20 and the like are provided for reading and writing data to the external storage device 8. In addition, the controller 10 is externally attached with a crystal resonator 9 for supplying a signal with a constant period to the RTC block 15 with high accuracy.

  As shown by a dotted line in FIG. 1, the RC oscillation block 16 supplies an operation clock to each part of the controller 10 (CPU 11, imaging controller 12, input / output controller 13, serial controller 14, EEPROM 18, memory controller 19, external storage controller 20). A clock signal is supplied. Further, each part of the controller 10 (the imaging controller 12, the input / output controller 13, the serial controller 14, the RTC block 15, the RC oscillation block 16, the frequency measurement counter 17, the EEPROM 18, the memory controller 19, and the external storage controller 20) is illustrated as the CPU 11. They are connected via an abbreviated bus.

  The serial controller 14 performs data communication using, for example, a UART (Universal Asynchronous Receiver Transmitter), and performs parallel signal / serial signal conversion and various error checks in synchronization with the clock signal. If the value fluctuates greatly, a communication error may occur.

  The program ROM 6 stores a program for a clock frequency control process for adjusting the frequency of the clock signal of the RC oscillation block 16 in addition to a main control process program for realizing a camera function and a positioning function.

  The RTC block 15 divides the oscillation signal of the crystal unit 9 with high accuracy and little fluctuation with respect to temperature change to generate, for example, an accurate 1/512 second timing signal. Then, the timing signal of 1/512 seconds is counted to measure the current time. The timing signal of the RTC block 15 is also supplied to the frequency measurement counter 17 for measuring the frequency of the clock signal.

  FIG. 2 is a circuit configuration diagram illustrating an example of the RC oscillation block 16.

  The RC oscillation block 16 includes an RC oscillator that generates a clock signal and frequency changing means that can change the frequency of the clock signal in a plurality of stages. As shown in FIG. 2, a resistor for providing a delay time for signal oscillation is provided. Any one of R0 to R29, electric capacitances C0 to C29, 0th to 29th RC oscillation circuits 161 for oscillating signals using each set of resistors and capacitors (RC circuits), and any of these 0th to 29th RC oscillation circuits 161 It includes a selector 162 that selectively outputs one output as a clock signal.

  The resistors R0 to R29 and the electric capacitances C0 to C29 are formed so that the time constants of the respective sets are slightly different, whereby the frequencies of the oscillation signals of the 0th to 29th RC oscillation circuits 161 are slightly different. ing. For example, the upper limit value and the lower limit value of the oscillation frequency of the 0th to 29th RC oscillation circuits 161 are designed to be different by about 10%.

  The selector 162 outputs a trimming value setting signal from the CPU 11 and outputs one of outputs of the 0th to 29th RC oscillation circuits 161 as a clock signal in accordance with the trimming value setting signal.

  Note that the RC oscillation block 16 is not limited to the above configuration. For example, a resistor and an electric capacitor for providing a delay time, one RC oscillation circuit connected to the resistor and the electric capacitor to oscillate a signal, and a trimming circuit that switches the resistance value of the resistor in a plurality of stages are included. You can also. Further, the trimming circuit may be configured to switch the capacitance value of the capacitance in a plurality of stages instead of the resistor.

  FIG. 3 shows a timing chart for explaining a clock signal frequency measuring method.

  When receiving a measurement command from the CPU 11, the frequency measurement counter 17, as shown in FIG. 3, from the input timing of the timing signal of the RTC block 15 (for example, the falling timing of the timing signal) to the input timing of the next timing signal. The clock signal of the RC oscillation block 16 is counted and this count value is supplied to the CPU 11.

  FIG. 4 shows a data chart representing the trimming table 18 a stored in the EEPROM 18.

  The EEPROM 18 stores a trimming table 18a in which trimming values of the RC oscillation block 16 are associated with data relating to the frequency of the clock signal. Here, the trimming value is a value indicating the selection state of the selector 162. For example, the trimming value “0” indicates a state in which the output of the 0th RC oscillation circuit 161 is selected, and the trimming value “N” indicates the NRC oscillation. The state in which the output of the circuit 161 is selected is shown.

  In the trimming table 18a, for example, the clock signal output in the setting state of the corresponding trimming value corresponding to each trimming value, the count value of the clock signal measured by the frequency measurement counter 17 (in 1/512 second). The number of output clock signals) and a value representing the deviation amount of the count value with respect to the clock signal of the specified frequency as a percentage are registered. The frequency change amount data is composed of the count value and the deviation amount data.

  FIG. 5 is a graph showing the relationship between the frequency and temperature of a plurality of set state clock signals output from the RC oscillation block 16.

  As shown in FIG. 5, the frequency of the clock signal output from the RC oscillation block 16 changes in a plurality of stages by switching the trimming value under a constant temperature condition. If the temperature changes with the trimming value kept constant, the frequency also changes with the temperature change. Further, the ratio of the frequency change to the temperature change is substantially constant regardless of the trimming value. Therefore, when a plurality of trimming values are arranged in the order in which the frequency of the clock signal changes from higher to lower, the order of the trimming values hardly changes between when the temperature is low and when the temperature is high. ing. With such characteristics, for example, if this order is measured at a certain temperature, the order of trimming values for sequentially changing the frequency of the clock signal can be determined even if the temperature subsequently changes.

  Next, a control process for adjusting the frequency of the clock signal in the electronic apparatus 1 having the above configuration will be described.

  FIG. 6 shows a flowchart of the clock frequency control process executed by the CPU 11.

  This clock frequency control process is started when the system is started, and is then executed in parallel with the main control process for realizing the camera function and the positioning function until the system is terminated.

  When the system is started and this clock frequency control process is started, first, the CPU 11 measures the frequency of the clock signal in the setting state of all trimming values, and the count value and deviation data of the trimming table 18a. Is generated and stored (step S1).

  More specifically, all the trimming values are obtained by outputting a measurement command to the frequency measurement counter 17 to perform the clock signal counting process and switching the setting of the trimming value of the RC oscillation block 16 every time the count value is obtained. Get the count value corresponding to. Then, this count value is stored in the trimming table 18a. Further, how much the count value of each trimming value deviates from the count value corresponding to the specified frequency is calculated as a percentage, and the calculated value is stored as data of the deviation amount of the trimming table 18a. By such processing in step S1, the trimming table 18a as shown in FIG. 4 is generated and stored.

  Subsequently, the CPU 11 refers to the trimming table 18a to search for the trimming value having the smallest absolute value of the deviation amount, and switches the setting of the RC oscillation block 16 (setting of the selector 162) to the setting state of this trimming value ( Step S2). By this switching, the clock signal is switched to the one closest to the specified frequency.

  Thereafter, the CPU 11 sets a specified time for confirming the deviation of the clock frequency in the timer, and keeps this program processing in a standby state until the specified time elapses (step S3).

  When the specified time has elapsed, the CPU 11 outputs a measurement command to the frequency measurement counter 17 to cause the clock signal to be counted with the currently set trimming value, and the count value of the count result and the specified count value And the amount of deviation is calculated (step S4). Then, it is determined whether the amount of deviation is less than a predetermined threshold value (step S5). If the amount of deviation is less than the threshold value, it is determined that switching of the trimming value is not necessary, and the process returns to step S3. Then, the standby state is again set for the specified time.

  On the other hand, if it is determined in step S5 that the amount of deviation is greater than or equal to the predetermined threshold value, the process proceeds to “NO”, and first, it is confirmed whether the trimming value has been changed N times (for example, 30 times). (Step S6). If not, the trimming value that shifts the clock frequency in the direction of correcting the deviation calculated in step S4 and shifts the clock frequency to the smallest is searched from the trimming table 18a ( Step S7).

  For example, it is assumed that the trimming value set at the time of measurement in step S4 is “14”, and the count value of the clock signal is “15430” as a result of the measurement process, and is smaller than the specified value “15625”. In this case, a trimming value is searched for in the direction of correcting this deviation (in the direction of increasing the count value) and having the smallest change amount. In the case of the trimming table 18a of FIG. 4, the trimming value “12” is shifted in the direction of increasing the count value, and the difference in deviation amount is “−0.70% − (− 1.00%) = 0. .30% "is extracted as a setting state for shifting the count value to the smallest.

  When the search is performed as described above, the setting of the RC oscillation block 16 is changed to the trimming value setting state of the search result (step S8). And it returns to step S4 and repeats the process from step S4 again. If “NO” is determined in the determination processing in steps S5 and S6 for the clock signal after the setting change, the processing in steps S4 to S8 is repeatedly executed, and the steps S4 to S8 are repeated. By the processing, the frequency of the clock signal is shifted so as to gradually approach the specified frequency.

  Then, when the frequency of the clock signal is shifted to a value close to the specified frequency by repeating the above steps S4 to S8, the discrepancy in the frequency of the clock signal is determined to be less than the threshold value in the determination processing of step S5. That is, the correction of the clock frequency is completed according to the setting state at this time. Therefore, after that, the process returns to step S3 and again enters a standby state for a specified time.

  On the other hand, in some of the plurality of setting states of the RC oscillation block 16, there is a portion where the clock frequency change interval becomes slightly wide, and when there is a prescribed frequency around the middle of the wide change interval, Even when the frequency is closest to the specified frequency, there may be a case where the discrepancy amount of the count value is not determined to be less than the threshold value in the determination process in step S5. In addition, there may be a case where the frequency of the clock signal does not approach the specified frequency due to a drastic change in the environment such as temperature during the repeated processing of steps S4 to S8.

  In this case, the loop process of steps S4 to S8 is repeated N times, so that “YES” is determined in the determination process of step S6, and the loop process is exited. In this case, the trimming value having the smallest deviation from the specified count value is extracted while the trimming value is changed N times, and the setting of the RC oscillation block 16 is switched to the setting state of the trimming value (step S9). If the environment such as temperature does not change drastically, the clock frequency is set closest to the specified value according to the setting state at this time, and the correction of the clock frequency is completed. Therefore, after that, the process returns to step S3 and again enters a standby state for a specified time.

  Among the above clock frequency control processes, the clock correction control means is configured by the processes of steps S4 to S9, and the frequency change amount data generating means is configured by the process of step S1.

  As described above, according to the electronic apparatus 1 of this embodiment, when the clock frequency is corrected, the trimming value of the RC oscillation block 16 is switched so as to gradually approach the specified frequency from the frequency before correction. Go. Therefore, compared with a method of finding the optimum setting by switching the trimming value from the first stage to all stages, the total amount of fluctuation of the clock frequency can be reduced, and a sudden change of the clock frequency does not occur. Therefore, even if communication processing is performed via the serial controller 14 during clock frequency correction processing, it is possible to avoid the occurrence of communication errors due to large fluctuations in the clock frequency, and it is not necessary to stop this communication processing. In addition, problems caused by sudden changes in the clock frequency, such as display screen flickering, can be avoided.

  Further, according to the electronic device 1 of the above embodiment, when correcting the clock frequency, the frequency is minimized in the direction of correcting the frequency deviation from the setting state before switching based on the data of the trimming table 18a. The next setting state to be shifted is sequentially switched. Therefore, in the correction process, the clock frequency can be reliably changed so as to gradually approach the specified frequency.

  Further, according to the electronic apparatus 1 of this embodiment, the RC oscillation block 16 is switched to a plurality of setting states at the same time, and the clock signal is counted in each setting state to create the trimming table 18a. It has become. Therefore, even if there is a manufacturing variation or an error from the design value in the resistance values of the plurality of resistors R0 to R29 switched by the RC oscillation block 16 and the capacitance values of the plurality of electric capacitors C0 to C29, the RC oscillation block 16 is actually used. The trimming table 18a reflecting the amount of frequency change can be created. By using this trimming table 18a, the above clock frequency correction processing can be normally realized.

  Further, according to the electronic device 1 of this embodiment, since the trimming table 18a is created when the device is activated, there is no need to interrupt the communication process and the display screen flickers. However, the trimming table 18a can be created in a period in which this flicker is not noticeable.

  Further, according to the electronic apparatus 1 of this embodiment, the amount of clock frequency deviation is measured based on the timing signal of the RTC block 15, and the clock frequency when the amount of deviation exceeds a predetermined threshold value. Shift to the correction process. In the clock frequency correction processing, the clock frequency deviation amount is measured after the trimming value of the RC oscillation block 16 is switched, and it is confirmed whether the clock frequency deviation has been eliminated based on the measurement result. It has become. Therefore, it is possible to avoid the correction process of the clock frequency when it is unnecessary, and to reliably correct the clock frequency to a value close to the specified value.

  The present invention is not limited to the above-described embodiment, and various modifications can be made. For example, in the above embodiment, the count value data and the shift amount data of the trimming table 18a are used as the frequency change amount data. However, the frequency of the clock signal in each setting state and the change amount are as described above. Is not limited to data directly or indirectly representing, for example, may be data representing the order of the magnitude of frequency change. By knowing the order of the magnitudes of the change amounts, it is possible to search for a setting state in which the shift is corrected from the current setting state in the direction of correcting the deviation and the clock frequency is minimized.

  In the above embodiment, the trimming table 18a is created every time the electronic device 1 is started. However, the trimming table 18a is created and stored when the electronic device 1 is reset, or created in a setting process before factory shipment. -You may make it memorize.

  In the above embodiment, when the trimming value is switched to correct the clock frequency, the clock frequency is shifted to the setting state in which the clock frequency is shifted to the lowest level. A large number of trimming value switching stages may be provided, and if the clock frequency does not change suddenly even when switching every two or three stages, switching may be performed every two or three stages. In such a configuration, for example, it is possible to adopt switching control such that when the clock frequency is largely deviated, switching is performed in multiple stages, and when the clock frequency approaches the specified value, the switching is performed one stage at a time to approach the specified value.

  Further, in the above embodiment, every time the specified time elapses, the amount of clock frequency deviation is measured to determine whether or not correction processing is performed. For example, a temperature sensor is provided, and the temperature is constant. If there is a change, measure whether or not the correction process is performed by measuring the amount of deviation of the clock frequency, or omit this determination and execute the correction process of the clock frequency when the temperature changes by a certain amount. May be.

  In the above embodiment, every time the trimming value is switched in the clock frequency correction process, the amount of deviation of the clock frequency is measured to check whether the amount of deviation is less than the threshold value. If it can be determined from the deviation amount and the deviation amount data in the trimming table 18a that the clock frequency has not yet approached the specified value, the measurement of the deviation amount of the clock frequency may be omitted.

  In the above embodiment, the correction is completed when the amount of deviation of the clock frequency is less than the threshold value, or when the amount of deviation is not less than the threshold value by switching the trimming value N times. The correction is completed with the trimming value setting state with the smallest deviation amount, but for example, the trimming value was sequentially switched and the direction of the clock frequency deviation amount was switched from positive to negative or from negative to positive. Sometimes, correction may be completed in this setting state.

  In the above-described embodiment, an example in which an oscillation signal by a crystal oscillator is applied as a highly accurate timing signal has been described.For example, if an appropriate timing signal such as an oscillation signal by a ceramic oscillator is obtained, Any means may be used. Further, for example, frequency change amount data such as the trimming table 18 a may be stored in the RAM 7 or the external storage device 8 instead of being stored in the controller 10. In addition, the detailed configuration and the detailed method shown in the embodiments can be appropriately changed without departing from the spirit of the invention.

1 Electronic device 4 Display device 5 GPS module 6 Program ROM
7 RAM
8 External storage device 9 Crystal resonator 10 Controller 11 CPU
12 Imaging Controller 13 Input / Output Controller 14 Serial Controller 15 RTC Block 16 RC Oscillation Block 17 Frequency Measurement Counter 18 EEPROM
18a Trimming table 19 Memory controller 20 External storage controller R0 to R29 Resistor C0 to C29 Electric capacity 161 0th to 29th RC oscillation circuit 162 Selector

Claims (7)

An RC oscillator that generates a clock signal using the time constant of the RC circuit;
A frequency changing means capable of changing the frequency of the clock signal in a plurality of stages by switching the setting of at least the resistance value or the capacitance value of the RC circuit;
Storage means for storing frequency change amount data each representing a value related to a change amount of the frequency in a plurality of stages by the frequency change means;
Clock correction control means for correcting the frequency of the clock signal by switching the setting of the frequency changing means;
With
The clock correction control means includes
Based on the frequency change amount data, the setting of the frequency changing unit is switched to correct the frequency of the clock signal so that the frequency of the clock signal gradually approaches the specified frequency from the frequency before correction. Electronic equipment. Timing signal generating means for generating a timing signal having a constant frequency with higher accuracy than the clock signal;
A deviation amount measuring means for measuring a deviation amount of the frequency of the clock signal based on the timing signal;
Frequency change amount data creation means for creating the frequency change amount data by measuring the deviation amount by the deviation amount measurement means in each switching state while switching the setting of the frequency change means in a plurality of ways at the same time,
With
In the storage means,
2. The electronic apparatus according to claim 1, wherein the frequency change amount data created by the frequency change amount data creating means is stored. The frequency change amount data creating means includes:
3. The electronic device according to claim 2, wherein the frequency change amount data is created when the electronic device is activated. The clock correction control means includes
When it is determined that the frequency of the clock signal has shifted by a predetermined amount or more based on the measurement result of the deviation amount measuring means, the correction processing of the frequency of the clock signal is started.
The electronic apparatus according to claim 2, wherein it is determined that the frequency of the clock signal approaches a specified value based on a measurement result of the deviation amount measuring unit. The clock correction control means includes
The frequency of the clock signal is corrected by sequentially switching the setting of the frequency changing means from the immediately previous setting state to the next setting state in which the frequency is shifted in the direction of reducing the shift with the smallest shift amount. The electronic device according to claim 1. An RC oscillator that generates a clock signal using a time constant of the RC circuit, and a frequency changing unit that can change the setting of the resistance value or the capacitance value of the RC circuit and change the frequency of the clock signal in a plurality of stages. Storage means for storing frequency change amount data each representing a change amount in a plurality of stages of the frequency by the frequency change means, and a clock correction method for correcting the frequency of the clock signal in an electronic device comprising:
Including a clock correction control step of correcting the frequency of the clock signal by switching the setting of the frequency changing means,
The clock correction control step includes
Based on the frequency change amount data, the setting of the frequency changing unit is switched to correct the frequency of the clock signal so that the frequency of the clock signal gradually approaches the specified frequency from the frequency before correction. Clock correction method. The electronic device is provided with timing signal generation means for generating a timing signal having a constant frequency with higher accuracy than the clock signal,
A deviation amount measuring step of measuring a deviation amount of the frequency of the clock signal based on the timing signal;
A frequency change amount data creating step for creating the frequency change amount data by measuring the shift amount by the shift amount measuring step in each switching state while switching the setting of the frequency changing means in a plurality of ways at the same time;
A data storage step of storing the frequency change amount data created in the frequency change amount data creation step in the storage means;
The clock correction method according to claim 6, further comprising:

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