JP2011254014A - Luminous element control circuit - Google Patents

Abstract

A dimming circuit for an incandescent light bulb is diverted to appropriately dim an LED.
A switching element is provided for switching a current flowing in a light emitting element, and the switching element is energized intermittently when a comparison voltage becomes equal to or higher than a first reference voltage in a comparison by a first comparator. The energization control period is set, and when the comparison voltage becomes equal to or higher than the third reference voltage in the comparison by the second comparator 48, the energization of the switching element 38 is temporarily stopped. After the transition to the stop period, the second comparator When the comparison voltage becomes lower than the second reference voltage in the comparison at 48, the energization of the switching element 38 is returned from the pause period to the energization control period.
[Selection] Figure 1

Description

  The present invention relates to a control circuit that controls a light emitting element.

  An illumination system using a light emitting diode (LED) as a light emitting element for illumination has been developed.

  FIG. 5 shows a control circuit 100 of a conventional lighting system. The control circuit 100 includes a rectifying unit 10, a choke coil 14, a regenerative diode 16, a switching element 18, a comparator 20, a clock generating unit 22, a latch unit 24, and a buffer element 26. FIG. 6 is a timing chart showing how the lighting system is controlled by the control circuit 100.

  When AC power is supplied to the rectifier 10, the AC power is full-wave rectified. The full-wave rectified voltage is supplied to the anode terminal of the LED 102 as a drive voltage. The cathode of the LED 102 is grounded via a series connection of the choke coil 14, the switching element 18, and the resistance element R1. By performing switching control of the switching element 18 by the control unit, current is supplied to the LED 102 via the choke coil 14, the switching element 18, and the resistance element R1, and the LED 102 is caused to emit light. Further, when the switching element 18 is turned off, a regenerative diode 16 that regenerates energy stored in the choke coil 14 to the LED 102 is provided in parallel with the LED 102 and the choke coil 14.

  The clock generation unit 22 generates and outputs a clock signal CLK that rises in a pulse shape at a constant period. The latch unit 24 includes an SR latch circuit. The latch unit 24 receives the clock signal CLK at the set terminal S, and sets the output signal Q to a high level (H) when the clock signal CLK rises. The output signal Q is applied to the gate terminal of the switching element 18 via the buffer element 26, the switching element 18 is turned on at the timing when the pulse of the clock signal CLK rises, and a current flows to the LED 102.

  On the other hand, the comparator 20 receives a comparison voltage CS generated at both ends of the resistance element R1 by a current flowing through the LED 102 and a constant reference voltage REF. The output of the comparator 20 is input to the reset terminal R of the latch unit 24. The comparator 20 outputs a low level (L) when the comparison voltage CS is smaller than the reference voltage REF. At this time, the latch unit 24 maintains the current state, and the current flowing to the LED 102 increases. The comparator 20 sets the output to the high level (H) at the timing when the comparison voltage CS becomes higher than the reference voltage REF. Thereby, the latch unit 24 is reset, the switching element 18 is turned off, and the current to the LED 102 is interrupted.

  In this manner, the current flowing through the LED 102 can be controlled, and the average light emission intensity of the LED 102 can be controlled.

  By the way, when the switching period of the switching element 18 is adjusted in order to adjust the brightness of the light emitting element, the luminance adjustment of the light emitting element cannot be performed to the limit if the switching period of the switching element 18 becomes too short. In addition, when an abnormal increase in voltage occurs, it is necessary to protect the entire circuit including the light emitting element.

  One aspect of the present invention includes a rectifier that full-wave rectifies an AC power supply, a switching element that switches a current flowing in a light emitting element that receives light rectified in the rectifier, and a current that flows in the light emitting element. A first comparator that compares the comparison voltage according to the first reference voltage, the second reference voltage higher than the first reference voltage, or the first reference voltage and the second reference voltage. A second comparator for comparing with a higher third reference voltage, and when the comparison voltage becomes equal to or higher than the first reference voltage in the comparison by the first comparator, the switching element is energized. An intermittent energization control period is set, and when the comparison voltage is equal to or higher than the third reference voltage in the comparison by the second comparator, the switching element is temporarily deenergized, and the After the transition to the period, when the comparison voltage becomes lower than the second reference voltage in the comparison by the second comparator, energization of the switching element is returned from the pause period to the energization control period. .

  Here, the fourth comparator further includes a third comparator that compares the comparison voltage with the first reference voltage, the second reference voltage, and a fourth reference voltage higher than the third reference voltage. In the comparison, it is preferable that when the comparison voltage becomes equal to or higher than the fourth reference voltage, the switching element is cut off so that the energization of the switching element is completely stopped.

  Further, when the comparison voltage is equal to or higher than the third reference voltage in the comparison by the second comparator, the comparison voltage is maintained equal to or higher than the second reference voltage until a predetermined mask period elapses. It is preferable that the energization of the switching element is a pause period in which the current is temporarily paused.

  In addition, when the comparison voltage is equal to or higher than the fourth reference voltage in the comparison by the fourth comparator, the comparison voltage is maintained equal to or higher than the fourth reference voltage until a predetermined delay period elapses. It is preferable to set a cut-off state that completely stops energization of the switching element.

  ADVANTAGE OF THE INVENTION According to this invention, while being able to perform light control of light emitting elements, such as LED, appropriately at the time of a low light, a circuit can be protected at the time of generation | occurrence | production of abnormal voltage.

It is a figure which shows the structure of the control circuit of the light emitting element in embodiment of this invention. It is a timing chart which shows the effect | action of the control circuit of the light emitting element in embodiment of this invention. It is a figure which shows the structure of the control circuit of the light emitting element of the modification 1 in embodiment of this invention. It is a figure which shows the structure of the control circuit of the light emitting element of the modification 2 in embodiment of this invention. It is a figure which shows the structure of the control circuit of the conventional light emitting element (LED). It is a timing chart which shows the effect | action of the control circuit of the conventional light emitting element (LED).

  As shown in FIG. 1, the light emitting element control circuit 200 according to the embodiment of the present invention includes a rectifier 30, a choke coil 34, a regeneration diode 36, a switching element 38, a first comparator 40, a clock generator 42, The first latch section 44, the buffer element 46, the second comparator 48, the knot element 50, the third comparator 52, the second latch section 54, and the AND element 56 are configured. In addition, FIG. 2 shows voltages and currents of respective portions in the control circuit 200 in the present embodiment.

  The control circuit 200 controls light emission of the light emitting element. For example, it is connected to a light emitting diode (LED) 102 for illumination, and controls the current to the LED 102.

  The control circuit 200 is used by being connected to a dimming circuit 206 that controls the conduction angle of the AC voltage Sin used in the dimming system of the incandescent bulb. The dimming circuit 206 is connected to the rectifying unit 30 of the control circuit 200. That is, the dimming circuit 206 receives the AC voltage Sin, adjusts the conduction angle of the AC voltage Sin according to an adjustment signal such as a dimming volume, and outputs the adjusted AC voltage Smod.

  The rectifying unit 30 includes a rectifying bridge circuit 30a. The rectifier 30 receives the adjusted AC voltage Smod, performs full-wave rectification on the adjusted AC voltage Smod, and outputs it as a full-wave rectified voltage Srec. As shown in FIG. 1, the rectifying unit 30 may be provided with a protective fuse 30b and a filter 30c for removing noise.

  The LED 102 can be dimmed by the dimming circuit 206 at the subsequent stage of the rectifying unit 30 by causing the LED 102 to emit light by the full-wave rectified voltage Srec.

  A full-wave rectified voltage Srec is supplied to the anode terminal of the LED 102. The cathode terminal of the LED 102 is grounded via the choke coil 34, the switching element 38, and the voltage detection resistor R1.

  The choke coil 34 is provided to make the current flowing through the LED 102 and the switching element 38 intermittent. The choke coil 34 may be provided with a forward winding so that a power supply voltage can be supplied to each part.

  The switching element 38 is provided to supply / cut off the current to the LED 102. The switching element 38 is an element having a capacity corresponding to the power consumption of the LED 102, and for example, a high power power field effect transistor (MOSFET) or the like is used.

  The regenerative diode 36 is a flywheel diode, and is connected to the LED 102 and the choke coil 34 in parallel. The regenerative diode 36 regenerates the energy stored in the choke coil 34 to the LED 102 when the switching element 38 is cut off.

  The clock generation unit 42 generates and outputs a clock signal CLK that rises in a pulse shape at a constant period. The first latch unit 44 includes an SR latch circuit. The first latch unit 44 receives the clock signal CLK at the set terminal S, and sets the output signal Q to a high level (H) when the clock signal CLK rises. On the other hand, the first comparator 40 receives a comparison voltage CS generated at both ends of the resistance element R1 by a current flowing through the LED 102, and a constant first reference voltage REF1. The first reference voltage REF1 is a voltage serving as a threshold for limiting the switching operation of the switching element 38. The comparison voltage CS is input to the non-inverting input terminal, and the first reference voltage REF1 is input to the inverting input terminal. The output of the first comparator 40 is input to the reset terminal R of the first latch unit 44.

  The first comparator 40 outputs a low level (L) when the comparison voltage CS is smaller than the first reference voltage REF1. At this time, the first latch unit 44 maintains the current state. The first comparator 40 sets the output to the high level (H) at the timing when the comparison voltage CS becomes higher than the first reference voltage REF1. As a result, the first latch unit 44 is reset, and the output signal Q becomes low level (L). The output of the first latch unit 44 is input to the AND element 56 via the buffer element 46.

  The second comparator 48 receives the comparison voltage CS generated at both ends of the resistance element R1 by the current flowing through the LED 102, and one of the second reference voltage REF2 and the third reference voltage REF3. The comparison voltage CS is input to the inverting input terminal, and the second reference voltage REF2 or the third reference voltage REF3 is input to the non-inverting input terminal. The third reference voltage REF3 is a voltage that becomes a threshold value for suspending the switching operation of the switching element 38, and the second reference voltage REF2 is a voltage that becomes a threshold value for returning the switching element 38 from the quiescent state. The output of the second comparator 48 is input to the AND element 56.

  When the output of the second comparator 48 is at a high level (H), the transistor Tr1 is turned off, the transistor Tr2 is turned on, and the third reference voltage REF3 is exclusively input to the non-inverting input terminal of the second comparator 48. The Therefore, the output of the second comparator 48 becomes high level (H) when the comparison voltage CS is smaller than the third reference voltage REF3, and becomes low level (L) when the comparison voltage CS becomes equal to or higher than the third reference voltage REF3. Switch. When the output of the second comparator 48 is switched to a low level (L), the transistor Tr1 is turned on, the transistor Tr2 is turned off, and the third reference voltage REF3 is exclusively input to the non-inverting input terminal of the second comparator 48. Is done. Therefore, the output of the second comparator 48 is maintained at a low level (L) when the comparison voltage CS is maintained at the second reference voltage REF2 or higher, and when the comparison voltage CS is smaller than the second reference voltage REF2. Switch to high level (H).

  The third comparator 52 receives the comparison voltage CS generated at both ends of the resistance element R1 by the current flowing through the LED 102 and the fourth reference voltage REF4. The comparison voltage CS is input to the non-inverting input terminal, and the fourth reference voltage REF4 is input to the inverting input terminal. The fourth reference voltage REF4 is a voltage serving as a threshold value for completely stopping (cutting off) the switching operation of the switching element 38. The output of the third comparator 52 is input to the reset terminal R of the second latch unit 54. A power-on reset signal PoR (Power_ON_Reset) that becomes a high-level (H) pulse at the timing when the power supply of the control circuit 200 is turned on is input to the set terminal S of the second latch unit 54. As a result, the second latch unit 54 sets the output Q to the high level (H) at the timing when the power supply of the control circuit 200 is turned on. The output of the second latch unit 54 is input to the AND element 56.

  The third comparator 52 outputs a low level (L) when the comparison voltage CS is smaller than the fourth reference voltage REF4. At this time, the second latch unit 54 maintains the current state. The third comparator 52 sets the output to the high level (H) at the timing when the comparison voltage CS becomes higher than the fourth reference voltage REF4. As a result, the second latch unit 54 is reset, and the output signal Q becomes low level (L).

  The AND element 56 receives the output Q of the first latch unit 44, the output of the second comparator 48, and the output Q of the second latch unit 54, and applies the logical product of these signals to the gate of the switching element 38.

  In the present embodiment, the first reference voltage REF1 is set to a value smaller than the second reference voltage REF2, the third reference voltage REF3, and the fourth reference voltage REF4. For example, the first reference voltage REF1 is 0.6V. The second reference voltage REF2 is set to a value smaller than the third reference voltage REF3 and the fourth reference voltage REF4. For example, the second reference voltage REF2 is set to 0.9V. The third reference voltage REF3 is set to a value smaller than the fourth reference voltage REF4. For example, the third reference voltage REF3 is 1.2V, and the fourth reference voltage REF4 is 2.0V.

  However, the values of the first reference voltage REF1, the second reference voltage REF2, the third reference voltage REF3, and the fourth reference voltage REF4 are not limited to this, and may be changed.

  Hereinafter, the operation of the control circuit 200 will be described with reference to FIG. When the power supply of the control circuit 200 is turned on, the power-on-reset signal PoR at the set terminal of the second latch unit 54 becomes high level (H), and the output of the second latch unit 54 is set at high level (H). . Also, the output of the clock pulse from the clock generator 42 is started, and the output of the first latch unit 44 is also set to a high level (H). Furthermore, since the comparison voltage CS is smaller than the third reference voltage REF3, the output of the second comparator 48 is at a high level (H). At this time, the output of the AND element 56 becomes a high level (H), the switching element 38 is turned on, and a current flows through the LED 102. When the comparison voltage CS exceeds the first reference voltage REF1, the output of the first comparator 40 becomes high level (H), and the output Q of the first latch unit 44 is reset to low level. Thereby, the output of the AND element 56 becomes low level (L), the switching element 18 is turned off, and the current to the LED 102 is interrupted. Such a state is an energization control period.

  When the ON time of the switching element 38 is shortened and becomes less than the ON time that can be controlled around one period, the comparison voltage CS, which is the terminal voltage of the resistor R1, gradually increases. When the comparison voltage CS becomes equal to or higher than the third reference voltage REF3, the output of the second comparator 48 is switched to a low level (L). Thereby, the output of the AND element 56 becomes low level (L), the switching element 18 is turned off, and the current to the LED 102 is interrupted. Further, when the output of the second comparator 48 becomes low level (L), the voltage input to the non-inverting input terminal of the second comparator 48 is switched from the third reference voltage REF3 to the second reference voltage REF2. As a result, unless the comparison voltage CS drops to the second reference voltage REF2, the output of the second comparator 48 maintains a low level (L), and the current to the LED 102 remains cut off. Such a state becomes a rest period.

  When the switching of the switching element 38 is stopped and the comparison voltage CS decreases and the comparison voltage CS becomes lower than the second reference voltage REF2, the output of the second comparator 48 returns to the high level (H) again. As a result, the output of the AND element 56 becomes a high level (H), the switching element 18 is turned on, and a current is supplied to the LED 102.

  In this way, when the ON time of the switching element 38 is shortened and the control time per one period of the switching element 38 reaches the limit, the switching of the switching element 38 is temporarily stopped and the switching is stopped. This state is maintained until the comparison voltage CS decreases to the second reference voltage REF2 lower than the third reference voltage REF3. Thereby, it is possible to appropriately emit light from the light emitting element such as the LED 102 and to suppress the abnormal operation of the control circuit 200. Note that when the switching cycle of the switching element 38 is short, the energization control period and the rest period may be repeated.

  Further, when the comparison voltage CS becomes equal to or higher than the fourth reference voltage REF4 for some reason, the output of the third comparator 52 becomes a high level (H). As a result, the output Q of the second latch unit 54 is reset to a low level (L), and the output of the AND element 56 is also set to a low level (L). Therefore, the switching element 38 is turned off and the current to the LED 102 is interrupted.

  The second latch unit 54 maintains the output Q at the low level (L) until the set terminal S becomes the high level (H), that is, until the power supply of the control circuit 200 is turned on next time. Therefore, the current to the LED 102 is cut off until the power supply of the control circuit 200 is turned on next time. Thus, when the comparison voltage CS becomes equal to or higher than the fourth reference voltage REF4, the control circuit 200 is completely stopped.

  In this way, when the comparison voltage CS rises abnormally, the switching of the switching element 38 by the control circuit 200 is completely stopped when the comparison voltage CS becomes equal to or higher than the fourth reference voltage REF4. Since the control circuit 200 is stopped until the power is turned on next time, the light emitting element such as the LED 102 and the control circuit 200 can be safely protected when an abnormality occurs.

<Modification 1>
FIG. 3 shows a configuration of a control circuit 202 which is a modification of the light emitting element control circuit 200 in the present embodiment. As illustrated in FIG. 3, the control circuit 202 includes a mask unit 60 and an OR element 62 in addition to the configuration of the control circuit 200.

  The mask unit 60 normally outputs a high level (H) signal to the OR element 62. However, when the output of the second comparator 48 is switched to the low level (L), the low level (L Switch the output to).

  The OR element 62 receives the outputs of the mask unit 60 and the second comparator 48, calculates the logical sum of these signals, and outputs the result. That is, the OR element 62 maintains the high level (H) during the period when the output of the second comparator 48 is at the high level (H), or during the period when the output of the mask unit 60 is at the high level (H). When the outputs of the second comparator 48 and the mask unit 60 both become low level (L), a low level (L) is output to the AND element 56.

  By providing the mask unit 60 and the OR element 62 in combination, the comparison voltage CS becomes equal to or higher than the third reference voltage REF3, and the output of the second comparator 48 is switched from the high level (H) to the low level (L). Even if the preset mask period does not elapse, the output of the mask unit 60 is not switched from the high level (H) to the low level (L) until the switching control of the switching element 38 enters the idle period. You can have a grace period. If the comparison voltage CS becomes smaller than the second reference voltage REF2 during the mask period, the output from the second comparator 48 returns from the low level (L) to the high level (H). In this case, the switching control of the switching element 38 is performed. Returns to the energization control period without shifting to the suspension period.

  As described above, a grace period corresponding to the mask period can be provided in the transition from the energization control period to the suspension period. As a result, it is possible to prevent the transition to the idle period unnecessarily when the comparison voltage CS becomes higher than the third reference voltage REF3 for a short period due to noise components such as spikes.

  In the present embodiment, the mask unit 60 and the OR element 62 are combined. However, a low-pass filter (LPF) for the output of the second comparator 48 may be provided instead. That is, a low-pass filter may be arranged between the second comparator 48 and the AND element 56. In this case, even if the output of the second comparator 48 is switched from the high level (H) to the low level (L), the output of the low-pass filter does not immediately become the low level (L), and the output of the second comparator 48 is low. If the level (L) is continuously maintained, the filter may be configured so that the output of the low-pass filter becomes a low level (L) after a predetermined mask period.

<Modification 2>
FIG. 4 shows a configuration of a control circuit 204 which is a modification of the control circuit 200 for the light emitting element in this embodiment. As shown in FIG. 4, the control circuit 204 includes a timer unit 64 in addition to the configuration of the control circuit 200.

  The timer unit 64 normally outputs a high level (H) signal. The timer unit 64 receives the output of the third comparator 52, starts the timer at a timing when the output of the third comparator 52 changes from the high level (H) to the low level (L), and in a predetermined delay period. When the output of the third comparator 52 maintains the low level (L), the output is switched from the high level (H) to the low level (L). When the output of the third comparator 52 returns to the high level (H) within the delay time, the timer unit 64 resets the timer and maintains the output at the high level (H).

  In this manner, a grace period corresponding to the delay period can be provided for the transition from the suspension period to the complete cutoff state of the control circuit 204. As a result, it is possible to prevent an unnecessarily blocked state in the case where the comparison voltage CS becomes higher than the fourth reference voltage REF4 for a short period due to noise components such as spikes.

  Note that the same function can be exhibited even if a configuration in which the mask unit 60 and the OR element 62 shown in the first modification are combined or a low-pass filter is provided instead of the timer unit 64. Further, in the control circuit 202 of the first modification, a configuration equivalent to the timer unit 64 may be provided instead of the configuration in which the mask unit 60 and the OR element 62 are combined.

  DESCRIPTION OF SYMBOLS 10 Rectification part, 14 Choke coil, 16 Regenerative diode, 18 Switching element, 20 Comparator, 22 Clock generation part, 24 Latch part, 26 Buffer element, 30 Rectification part, 30a Rectification bridge circuit, 30b Fuse, 30c Filter, 34 Choke coil, 36 regenerative diode, 38 switching element, 40 first comparator, 42 clock generator, 44 first latch part, 46 buffer element, 48 second comparator, 50 knot element, 52 third comparator, 54 Second latch section, 56 AND element, 60 mask section, 62 OR element, 64 timer section, 100, 200, 202, 204 control circuit, 206 dimming circuit.

Claims (4)

A rectifying unit for full-wave rectification of the AC power supply;
A switching element that switches a current flowing in a light emitting element that emits light by receiving a voltage rectified in the rectifying unit;
A first comparator for comparing a comparison voltage according to a current flowing through the light emitting element and a first reference voltage;
A second comparator for comparing the comparison voltage with a second reference voltage higher than the first reference voltage or a third reference voltage higher than the first reference voltage and the second reference voltage;
With
An energization control period in which energization of the switching element is intermittently performed when the comparison voltage is equal to or higher than the first reference voltage in the comparison by the first comparator;
In the comparison by the second comparator, when the comparison voltage becomes equal to or higher than the third reference voltage, the energization of the switching element is temporarily stopped,
After the transition to the pause period, when the comparison voltage is lower than the second reference voltage in the comparison by the second comparator, the switching element is returned to the conduction control period from the pause period. A control circuit of the light emitting element. A control circuit for a light emitting device according to claim 1,
A third comparator for comparing the comparison voltage with the first reference voltage, the second reference voltage, and a fourth reference voltage higher than the third reference voltage;
A control circuit for a light-emitting element, wherein when the comparison voltage becomes equal to or higher than the fourth reference voltage in the comparison by the fourth comparator, an energization state of the switching element is completely stopped. A control circuit for a light-emitting element according to claim 1 or 2,
When the comparison voltage is equal to or higher than the third reference voltage in the comparison by the second comparator, the switching is performed when the comparison voltage is maintained at the second reference voltage or higher until a predetermined mask period elapses. A control circuit for a light-emitting element, characterized in that an energization of the element is temporarily stopped. A control circuit for the light emitting device according to claim 2,
When the comparison voltage becomes equal to or higher than the fourth reference voltage in the comparison by the fourth comparator, the switching is performed when the comparison voltage maintains the fourth reference voltage or higher until a predetermined delay period elapses. A control circuit for a light-emitting element, wherein the device is in a cut-off state in which energization of the element is completely stopped.

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