JP2011211533A - Amplifier circuit and radio communication apparatus - Google Patents

Abstract

In an amplifier circuit that performs distortion compensation processing of an amplifier used in a power supply modulation method such as an ET (Envelope Tracking) method or an EER (Envelope Elimination and Restoration) method, the frequency characteristic of the gain of the amplifier is improved and distortion is improved. Make compensation easy.
An amplifier, a power supply modulation circuit that applies a power supply voltage modulated based on an input signal to the amplifier, and an inverse distortion characteristic that is placed in front of the amplifier and cancels the distortion characteristic of the amplifier. The amplifier circuit 1 includes a distortion compensation circuit 11 that is generated and added to an input signal. The gain adjustment circuit 12 is provided between the distortion compensation circuit 11 and the amplifier 10, and the frequency of the amplifier 10 is set regardless of the power supply voltage. The inverse characteristic that aligns the shape of the characteristic is the frequency characteristic of the gain adjustment circuit 12.
[Selection] Figure 1

Description

  The present invention relates to an amplifier circuit used for amplifying signal power mainly in a wireless communication apparatus.

  For example, a high-power amplifier (HPA) is used in a wireless communication apparatus installed in a base station of a mobile phone. FIG. 9 is a block diagram showing an example (however, simplified) of an amplifier circuit including such an amplifier 100. For such an amplifier 100, an ET (Envelope Tracking) method (also referred to as a power supply modulation method or a bias modulation method) that modulates the drain voltage Vd by the power supply modulation circuit 200 based on the input signal Pin (RF signal) is adopted. Therefore, the power efficiency can be improved (for example, refer nonpatent literatures 1 and 2). In this case, since the drain voltage Vd of the amplifier 100 changes dynamically according to the envelope of the RF signal, the operating power of the amplifier 100 is suppressed even when the amplitude of the input signal Pin is small, and as a result, the power efficiency is improved. .

  On the other hand, when power is amplified using such an amplifier 100, the distortion of the input / output characteristics of the amplifier 100 itself cannot satisfy a specified level, and a desired output may not be obtained. Therefore, as a distortion compensation method for compensating for such distortion, a distortion characteristic of the amplifier 100 is detected by a distortion compensation circuit 300 provided in front of the amplifier 100, and a distortion characteristic (equal amplitude) opposite to this characteristic is detected. A DPD (Digital Pre-Distortion) process is performed in which an anti-phase distortion characteristic) is generated by digital signal processing and added to the input of the amplifier 100. As a result, the distortion characteristics of the amplifier 100 can be canceled (see, for example, Non-Patent Documents 3 and 4).

Donald F. Kimball, et al., "High-Efficiency Envelope-Tracking W-CDMA Base-Station Amplifier Using GaN HFETs", IEEE Transactions on Microwave Theory and Techniques, Vol. 54, No. 11, November 2006. Feipeng Wang, et. Al., “Design of Wide-Band Envelope-Tracking Power Amplifiers for OFDM Applications”, IEEE Transactions on Microwave Theory and Techniques, Vol. 53, No. 4, April 2005. Lei Ding, "Digital predistortion of power amplifiers for wireless application", Thesis, Georgia institute of Technology, 2004 "Open-Loop Digital Predistorter for RF Power Amplifiers Using Dynamic Deviation Reduction-Based Volterra Series", IEEE TRNSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, No. 7, July 2008

  However, in the ET amplifier 100 as described above, the output impedance Zout changes according to the drain voltage. For this reason, a situation occurs in which the operating condition of the amplifier 100 changes according to the amplitude level of the input signal Pin. Thus, when the gain of the amplifier 100 is changed from the various viewpoints by examining how the gain of the amplifier 100 changes depending on the input signal Pin, it has been found that the frequency characteristic of the gain changes depending on the drain voltage.

  FIG. 10A is a graph showing the drain voltage Vd and the output signal Pout as an example. The drain voltage Vd changes from the minimum value Vdmin to the maximum value Vdmax. FIG. 10B is a graph showing, as an example, that the frequency characteristic of the gain of the amplifier 100 changes depending on the drain voltage Vd. As described above, when the frequency characteristic of the gain changes depending on the signal level, it is difficult to remove a distortion component caused by the gain characteristic by the distortion compensation circuit 300.

  In view of such a conventional problem, the present invention provides an amplifier circuit that performs distortion compensation processing of an amplifier used in a power supply modulation method such as an ET method or an EER (Envelope Elimination and Restoration) method. The purpose is to improve and make distortion compensation easy.

(1) An amplifier circuit of the present invention is provided in front of an amplifier that amplifies the power of an input signal, a power supply modulation circuit that applies a power supply voltage modulated based on the input signal to the amplifier, and the amplifier. A distortion compensation circuit that generates an inverse distortion characteristic that cancels the distortion characteristic of the amplifier and adds it to the input signal, and is provided between the distortion compensation circuit and the amplifier, and the frequency of the amplifier regardless of the power supply voltage. And a gain adjustment circuit having a self-frequency characteristic as a reverse characteristic that aligns the shape of the characteristic.
In the so-called power supply modulation type amplifier circuit configured as described above, the gain adjustment circuit improves the frequency characteristic of the amplifier by having an inverse characteristic that aligns the shape of the frequency characteristic of the amplifier regardless of the power supply voltage.

(2) In the amplifier circuit of (1), the gain adjustment circuit may include an equalizer configured by a varicap that changes capacitance in accordance with the power supply voltage.
In this case, a continuous change in capacitance is possible. In addition, since only the varicap is configured, the circuit is simple and inexpensive.

(3) In the amplifier circuit of (1) above, the gain adjustment circuit selects a specific equalizer element corresponding to the power supply voltage from a plurality of equalizer elements whose frequency ranges where the gain decreases are mutually shifted. There may be.
In this case, the adjustment is discrete, but it is easy to obtain a desired gain. Therefore, it is possible to easily cope with complicated frequency characteristics of the amplifier.

(4) In the amplifier circuit of (3), the equalizer element can be configured by a high-pass filter and a low-pass filter whose pass characteristics intersect in the attenuation region.
In this case, it is possible to easily create a characteristic that the gain decreases at a specific frequency and in the vicinity thereof.

(5) In the amplifier circuit of (3), the equalizer element may be configured by two bandpass filters whose passbands are shifted from each other.
Also in this case, it is possible to easily create a characteristic in which the gain decreases at a specific frequency and in the vicinity thereof.

(6) On the other hand, the wireless communication device of the present invention is equipped with an amplifier circuit, and the amplifier circuit receives an amplifier that amplifies the power of the input signal, and a power supply voltage modulated based on the input signal. A power supply modulation circuit to be applied to the amplifier; a distortion compensation circuit that is placed in front of the amplifier and generates an inverse distortion characteristic that cancels the distortion characteristic of the amplifier; and is added to the input signal; the distortion compensation circuit; And a gain adjustment circuit provided between the amplifier and having a self-frequency characteristic as an inverse characteristic that aligns the shape of the frequency characteristic of the amplifier regardless of the power supply voltage.
In the so-called power modulation type amplifier circuit in the wireless communication apparatus configured as described above, the gain adjustment circuit has an inverse characteristic that aligns the shape of the frequency characteristic of the amplifier regardless of the power supply voltage, so that the frequency characteristic of the amplifier To improve.

  According to the amplifier circuit of the present invention or the radio communication apparatus using the same, the frequency characteristics of the gain of the amplifier can be improved, and the distortion compensation by the distortion compensation circuit can be made easy.

1 is a block circuit diagram showing an ET system amplifier circuit according to each embodiment of the present invention. FIG. It is a figure which shows the internal circuit of the gain adjustment circuit in FIG. It is a graph which shows the relationship between the gain of an equalizer comprised by a varicap, and a frequency using the drain voltage Vd as a parameter. It is a graph which shows a mode that the frequency characteristic of the gain of an amplifier is improved by an equalizer. It is a block circuit diagram showing an ET system amplifier circuit according to a second embodiment of the present invention. It is the block circuit diagram which shows the structural example of an equalizer element, and a passage characteristic. 6 is a graph showing how the gain frequency characteristics of an amplifier are improved by an equalizer in an amplifier circuit according to a second embodiment. It is an example of the block diagram of the radio | wireless communications system which has the radio | wireless communication apparatus of a radio base station, and the radio | wireless communication apparatus as a terminal device. It is a block diagram which shows an example (however, it is simplifying) of the amplifier circuit containing an amplifier. (A) is a graph which shows the drain voltage Vd and the output signal Pout as an example. (B) is a graph which shows that the frequency characteristic of the gain of an amplifier changes with drain voltage Vd as an example.

《Wireless communication device》
Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 8 is an example of a configuration diagram of a wireless communication system having a wireless communication device ST of a wireless base station and wireless communication devices T1, T2, and T3 as terminal devices. The wireless communication device ST includes a transmitter S for transmitting a wireless signal, a receiver R for receiving a wireless signal, and a processing unit P for processing a transmission / reception signal. The wireless communication devices T1 to T3 basically have the same internal configuration.

  The transmitter S transmits a linear modulation signal and includes an amplifier circuit 1 that amplifies the linear modulation signal. The receiver R receives a linear modulation signal and has an amplifier circuit 1 for receiving and amplifying the linear modulation signal. Since the basic configuration of the amplifier circuit 1 is the same for both the transmitter S and the receiver R, the amplifier circuit 1 of the transmitter S will be described below as a representative example.

<< Amplifier Circuit: First Embodiment >>
FIG. 1 is a block circuit diagram showing an ET-type amplifier circuit 1 according to a first embodiment (the same applies to a second embodiment described later) of the present invention. In the figure, an amplifier (HPA) 10 which is the core of the amplifier circuit 1 amplifies the power of an input signal Pin to produce an output signal Pout.

  On the input side of the amplifier 10, a distortion compensation circuit (DPD: Digital Pre-Distorter) 11, a gain adjustment circuit 12, and an input matching circuit 13 are provided in order from the previous stage side. Yes. An output matching circuit 14 is provided on the output side of the amplifier 10. Further, there are directional couplers 15 and 16 that detect the input signal Pin and the output signal Pout, respectively, and a power supply modulation circuit 17 that applies a power supply voltage (hereinafter referred to as a drain voltage) Vd to the amplifier 10 and the gain adjustment circuit 12. Is provided.

The distortion compensation circuit 11 detects a distortion characteristic of the amplifier 10 from the output signal Pout, estimates and generates a reverse distortion characteristic (inverse model) that cancels the distortion characteristic, and generates the generated reverse distortion characteristic as an input signal Pin. And a function to be added.
The input matching circuit 13 and the output matching circuit 14 are provided for impedance matching with respect to the input terminal and the output terminal of the amplifier 10, respectively.
The power supply modulation circuit 17 is connected to the directional coupler 15 and applies the drain voltage Vd modulated based on the input signal Pin to the amplifier 10 and the gain adjustment circuit 12.

  FIG. 2 is a diagram showing an internal circuit of the gain adjustment circuit 12 in FIG. In FIG. 2, the gain adjustment circuit 12 shows a converter 12T formed by connecting three resistors 121 to 123 as shown in the figure, two capacitors 124 and 125 for blocking DC component passage, and a varicap 126. It is comprised by the equalizer 12E formed by connecting like this. A drain voltage Vd is applied from the power supply modulation circuit 17 to the converter 12T, and a voltage obtained by dividing the drain voltage Vd by the resistors 121 and 122 is applied to the varicap 126 through the resistor 123. Note that the circuit of the converter 12T is merely an example, and it is sufficient that a desired voltage corresponding to the drain voltage Vd can be supplied to the varicap 126.

The varicap 126 is a variable capacitance diode whose capacitance changes according to the applied voltage, and the capacitance becomes smaller (larger) as the applied voltage is higher (lower). In general, even a capacitance element has a resistance component and an inductance L component in addition to the capacitance C, and thus causes self-resonance. Assuming that the self-resonant frequency is fs, the impedance characteristic becomes a valley bottom (minimum value) at this frequency fs. The self-resonant frequency fs is expressed by fs = 1 / {2π (LC) ^1/2 }.

  That is, as the voltage applied to the varicap 126 increases, the capacitance C decreases and the self-resonance frequency fs increases. Conversely, when the voltage applied to the varicap 126 is lowered, the capacitance C is increased and the self-resonant frequency fs is decreased. Since the impedance is low at the self-resonant frequency fs and frequencies in the vicinity thereof, the gain is lowered as the pass characteristic.

Due to the characteristics of the varicap 126 as described above, it is possible to create an arbitrary frequency characteristic in which the self-resonant frequency fs changes corresponding to the drain voltage Vd.
FIG. 3 is a graph showing the relationship between the gain and the frequency of the equalizer 12E constituted by the varicap 126, using the drain voltage Vd (actually a voltage corresponding thereto) as a parameter.

  When the drain voltage is Vdmax, the self-resonant frequency fs is relatively high, and the frequency characteristic as shown in FIG. Further, when the drain voltage is Vdmin, the self-resonant frequency fs is relatively low, and the frequency characteristic as shown in FIG. In addition, a frequency characteristic (a two-dot chain line) in which the position at which the gain reaches the bottom continuously changes corresponding to the drain voltage Vd is obtained. Selection of the varicap 126 or the like is performed so that such frequency characteristics are inverse characteristics complementary to the frequency characteristics of the gain in the amplifier 10 (see FIG. 9B). Note that a plurality of varicaps 126 may be used in parallel if necessary. In addition, when the frequency characteristic of the phase near the self-resonant frequency fs is large and causes a problem, it is possible to insert a resistor in series with the varicap 126 to reduce the Q value (resonance sharpness). .

  FIG. 4 is a graph showing how the frequency characteristics of the gain of the amplifier 10 are improved by the equalizer 12E. (A) shows the frequency characteristic of the gain of the equalizer 12E shown in FIG. 3, and (b) shows the frequency characteristic of the gain of the amplifier 10, respectively. By placing the equalizer 12E in front of the amplifier 10, the gain of the amplifier 10 is complementarily influenced by the gain of the equalizer 12E, and the overall frequency characteristic of the gain is related to the drain voltage Vd as shown in FIG. The shape is aligned.

As described above, the equalizer 12E constituting the gain adjusting circuit 12 improves the frequency characteristic of the gain of the amplifier 10, so that the distortion compensation by the distortion compensating circuit 11 can be easily performed.
Further, the capacitance can be continuously changed by the varicap 126 as the equalizer 12E. Moreover, the equalizer 12E using the varicap 126 has a simple circuit and is inexpensive.

<< Amplifier Circuit: Second Embodiment >>
FIG. 5 is a block circuit diagram showing an ET amplifier circuit 1 according to the second embodiment of the present invention. The difference from FIG. 2 is the internal configuration of the gain adjustment circuit 12, and the other configurations are the same. In the figure, the gain adjustment circuit 12 includes a converter 12T and an equalizer 12E. The converter 12T supplies an appropriate voltage to the switches 127 and 128 based on the drain voltage Vd.

  The equalizer 12E includes n equalizer elements EQZ_1 to EQZ_n inserted between the two switches 127 and 128 in addition to the two switches 127 and 128. The switch 127 corresponds to an input voltage range Vdmin to Vdmax (which is actually a voltage corresponding thereto, but will be described in this range for simplification). For example, the voltage is Vdmin or more and (Vdmin + ΔV) If less, the distortion compensation circuit 11 and the equalizer element EQZ_1 are connected, and the other equalizer elements are not connected to the distortion compensation circuit 11. Similarly, at this time, the switch 128 connects the equalizer element EQZ_1 and the input matching circuit 13, and the other equalizer elements are not connected to the input matching circuit 13.

  Similarly, the equalizer 12E divides the range of the voltages Vdmin to Vdmax for each minute voltage ΔV, and selects the equalizer elements (EQZ_1 to EQZ_n) in the corresponding voltage range. Each equalizer element (EQZ_1 to EQZ_n) has a different frequency characteristic. Therefore, a corresponding frequency characteristic can be selected from a finite number of equalizer elements by the drain voltage Vd.

FIG. 6 is a block circuit diagram and a pass characteristic showing a configuration example of the equalizer element.
For example, if a low-pass filter (LPF) and a high-pass filter (HPF) are connected in parallel as shown in (a) and their pass characteristics intersect at, for example, the cut-off frequency fc in the attenuation region, then shown in (b). Thus, a pass characteristic in which the gain reaches the bottom near the cutoff frequency fc is obtained. Therefore, it is possible to easily prepare n equalizer elements (EQZ_1 to EQZ_n) in which the bottom position, that is, the cutoff frequency is sequentially shifted from each other.

  Further, for example, as shown in (c), if two band pass filters (BPF) whose pass bands are shifted from each other are connected in parallel, and their pass characteristics intersect at, for example, the cut-off frequency fc in the attenuation region, ( As shown in d), a pass characteristic in which the gain reaches the bottom near the cutoff frequency fc is obtained. Therefore, it is possible to easily prepare n equalizer elements (EQZ_1 to EQZ_n) in which the bottom position, that is, the cutoff frequency is sequentially shifted from each other. If the frequency characteristic of the phase near the cutoff frequency fc is large and causes a problem, the Q value of LPF, HPF, or BPF can be lowered and used.

  FIG. 7 is a graph showing how the gain frequency characteristic of the amplifier 10 is improved by the equalizer 12E in the amplifier circuit 1 according to the second embodiment. (A) shows the frequency characteristics of the gain of the equalizer 12E shown in (b) of FIG. 6, and (b) shows the frequency characteristics of the gain of the amplifier 10, respectively. By placing the equalizer 12E in front of the amplifier 10, the gain of the amplifier 10 is complementarily influenced by the gain of the equalizer 12E, and the overall frequency characteristic of the gain is related to the drain voltage Vd as shown in FIG. The shape is aligned.

As described above, the equalizer 12E constituting the gain adjustment circuit 12 can improve the frequency characteristic of the gain of the amplifier 10 so that the distortion compensation by the distortion compensation circuit 11 can be easily performed.
Since the above equalizer elements are finite, the adjustment is discrete, but it is easy to obtain a desired gain as long as an equalizer element having a necessary frequency characteristic is prepared. Therefore, there is an advantage that the complicated frequency characteristics of the amplifier 10 can be easily handled.
Further, since the equalizer element can be configured by a combination of a low-pass filter and a high-pass filter or a combination of two band-pass filters, it is possible to easily create a characteristic in which gain decreases at a specific frequency and in the vicinity thereof.

<Others>
In each of the above embodiments, the function of the converter 12T (creating a desired voltage corresponding to Vd) may be incorporated in the equalizer 12E or in the power supply modulation circuit 17.
Moreover, although the said embodiment demonstrated by ET system, it is the same also about EER system and other power supply modulation systems.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

DESCRIPTION OF SYMBOLS 1 Amplifier circuit 10 Amplifier 11 Distortion compensation circuit 12 Gain adjustment circuit 12E Equalizer 17 Power supply modulation circuit 126 Varicap EQZ_1-n Equalizer element

Claims (6)

An amplifier that amplifies the power of the input signal;
A power supply modulation circuit for applying a power supply voltage modulated based on the input signal to the amplifier;
A distortion compensation circuit that is pre-positioned with respect to the amplifier and generates a reverse distortion characteristic that cancels the distortion characteristic of the amplifier to add to the input signal;
A gain adjustment circuit provided between the distortion compensation circuit and the amplifier and having a self-frequency characteristic of an inverse characteristic that aligns the frequency characteristic of the amplifier regardless of the power supply voltage. Amplification circuit.   The amplifier circuit according to claim 1, wherein the gain adjustment circuit includes an equalizer configured by a varicap that changes a capacitance corresponding to the power supply voltage.   2. The amplifier circuit according to claim 1, wherein the gain adjustment circuit is configured to select a specific equalizer element corresponding to the power supply voltage from a plurality of equalizer elements whose frequency ranges in which the gain decreases are shifted from each other.   4. The amplifier circuit according to claim 3, wherein the equalizer element includes a high-pass filter and a low-pass filter whose pass characteristics intersect in an attenuation region.   The amplifier circuit according to claim 3, wherein the equalizer element includes two bandpass filters whose passbands are shifted from each other. A wireless communication device equipped with an amplifier circuit, the amplifier circuit is
An amplifier that amplifies the power of the input signal;
A power supply modulation circuit for applying a power supply voltage modulated based on the input signal to the amplifier;
A distortion compensation circuit that is pre-positioned with respect to the amplifier and generates a reverse distortion characteristic that cancels the distortion characteristic of the amplifier to add to the input signal;
A gain adjustment circuit provided between the distortion compensation circuit and the amplifier and having a self-frequency characteristic of an inverse characteristic that aligns the frequency characteristic of the amplifier regardless of the power supply voltage. Wireless communication device.

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