JP2011209369A - Display device and photodetection method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform appropriate photodetection while achieving arrangement of a pixel circuit and a photodetection circuit in an area saving state.SOLUTION: A plurality of photodetectors SL are arranged corresponding to a plurality of pixel circuits (a group of pixel circuits constituting a dummy pixel block) that is a part of the pixel circuits in a pixel array. The plurality of photodetectors SL are connected to one detection signal output circuit 31 in common, and the detection signal output circuit 31 generates and outputs a photodetection signal from output in accordance with received light quantity obtained in the plurality of photodetectors SL.

Description

  The present invention relates to a display device having a pixel array in which pixel circuits are arranged in a matrix, and a display driving method thereof, for example, a display device using an organic electroluminescence element (organic EL element) as a light emitting element, The present invention relates to a light detection method.

Special table 2007-501953 gazette Special table 2008-518263 gazette

In an active matrix type display device using an organic electroluminescence (EL) light-emitting element for a pixel, an active element (generally a thin film transistor: TFT) provided in the pixel circuit with a current flowing through the light-emitting element in each pixel circuit. Control by. Since the organic EL is a current light emitting element, a color gradation is obtained by controlling the amount of current flowing through the EL element.
That is, in a pixel circuit having an organic EL element, a current corresponding to a given signal value voltage is caused to flow through the organic EL element so that light emission with a gradation corresponding to the signal value is performed.

In a display device using a self-luminous element, such as a display device using such an organic EL element, it is important to eliminate unevenness in light emission luminance between pixels and eliminate unevenness on the screen.
In the organic EL element, the light emission efficiency decreases with the passage of time and temperature, and the luminance deteriorates. That is, even if the same signal value is applied and the same current is supplied, the light emission luminance decreases with time. For example, FIG. 13 shows the deterioration rate of light emission luminance over time of an organic EL element that emits light with a luminance of 200 nits.

Also, the luminance deterioration amount varies depending on the luminance to be emitted. Then, since the luminance deterioration amount depends on the display image, the deterioration amount is different for each pixel. For this reason, for example, there is a problem that relatively bright pixels and long-displayed pixels are burned.
FIG. 14A shows a state in which a fixed pattern having a high luminance of “BS” is displayed in part on a black screen as an example. When such a display is performed for a long time, the luminance of the pixels in the “BS” display portion deteriorates more than the pixels in the other black display portions.

Thereafter, for example, as shown in FIG. 14B, it is assumed that the same high gradation signal value is given to all the pixels on the screen, and the entire screen is displayed in white. Since all the signal values given to each pixel are, for example, white level gradation values, it should be a white image.
However, if the luminance degradation is progressing only in the pixels in the “BS” portion, the luminance is reduced only in the pixels in the “BS” portion as shown in FIG. 14C, and image sticking occurs on the screen. It will be in a state.

  In order to deal with such a situation, in Patent Documents 1 and 2 described above, a method of arranging a photosensor in each pixel circuit and feeding back a detection value of the photosensor in the panel to correct emission luminance, A method of correcting by feedback from the optical sensor to the system is disclosed.

There are a sensor external type as shown in FIG. 15A and a sensor built-in type as shown in FIG.
In the case of FIG. 15A, the pixel circuit 101 and the organic EL element 103 are formed in the resin layer 100 on the glass base 101. A luminance sensor 104 is disposed on the upper surface of the resin layer 103 to receive light from the organic EL element 103. The luminance sensor 104 is formed of an a-Si (amorphous silicon) sensor or the like. In this case, the pixel circuit 101 is a dummy pixel outside the display effective area.

  In the case of FIG. 15B, the pixel circuit 101 and the organic EL element 103 are formed in the resin layer 100 on the glass base 101. A luminance sensor 104 is disposed in the same layer as the pixel circuit 101 (below the organic EL element 103), and receives light from the organic EL element 103. The luminance sensor 104 is formed by a PIN diode or the like.

However, in the case of FIG. 15A, there is a problem of alignment accuracy with the dummy pixel, and the manufacturing efficiency is poor.
On the other hand, in the sensor built-in type in FIG. 15B, for example, the pixel circuit 101 and the luminance sensor 104 can be formed by the same process, and the alignment accuracy does not matter.
However, since the luminance sensor 104 and the detection signal output circuit for outputting the received light information need to be laid out on the same plane as the pixel circuit, the area required for one pixel circuit region increases. In addition, since the elements of the PIN diode and the detection signal output circuit are formed in one pixel circuit region, there is a problem that the number of elements increases.

  The present invention adopts the sensor built-in configuration of FIG. 15B in which a luminance sensor is built in the pixel circuit region. In addition, an object of the present invention is to reduce the number of elements in the pixel circuit region and to thereby reduce the area of the pixel circuit region.

  In the display device of the present invention, a pixel circuit having light emitting elements driven to emit light according to an input signal value is arranged in a matrix, and a signal value is given to each pixel circuit in the pixel array. And a plurality of light receiving units arranged corresponding to a plurality of pixel circuits which are a part of the pixel circuits in the pixel array. A light detection unit including an element and a detection signal output circuit connected to the plurality of light receiving elements and generating and outputting a light detection signal from an output corresponding to the amount of received light obtained in the plurality of light receiving elements. .

Further, the plurality of pixel circuits outside the effective display area in the pixel array are dummy pixel circuits, and the plurality of light receiving elements in the light detection unit correspond to the plurality of dummy pixel circuits that emit light with the same signal value. Is arranged.
A plurality of dummy pixel blocks each including a group of dummy pixel circuits that emit light with the same signal value are formed, and the light detection unit is provided corresponding to each dummy pixel block.
In addition, each light receiving element in the light detection unit is disposed in the vicinity of each dummy pixel circuit, and the detection signal output circuit is disposed outside the pixel array.
Further, the light detection unit is provided corresponding to each dummy pixel block including a dummy pixel circuit that emits light of each color as an R pixel, a G pixel, and a B pixel.
Alternatively, the light detection unit is provided corresponding to each of the dummy pixel blocks including only a dummy pixel circuit that emits light of one color among the R pixel, the G pixel, and the B pixel.

In addition, the detection signal output circuit in the light detection unit is configured to output a light detection signal whose voltage varies according to a current variation due to the amount of light received by a plurality of light receiving elements.
Alternatively, the detection signal output circuit in the light detection unit is configured to output a light detection signal obtained by converting a voltage value that fluctuates according to a current fluctuation due to the amount of light received by a plurality of light receiving elements into a digital signal.
The light emission drive unit further includes a correction processing unit that corrects a signal value given to each pixel circuit in the pixel array based on a detection signal from the light detection unit.

  The light detection method of the present invention corresponds to a plurality of pixel circuits that are a part of the pixel circuits in the pixel array as a light detection method for a display device including the pixel array and the light emission driving unit. A plurality of light receiving elements are arranged, and the plurality of light receiving elements are commonly connected to one detection signal output circuit, and the detection signal output circuit detects light from an output corresponding to the amount of received light obtained by the plurality of light receiving elements. This is a light detection method for generating and outputting a signal.

In the present invention, for example, in a TFT active matrix organic EL display device, it is assumed that a light receiving element such as a PIN diode on the TFT built-in side is used.
For example, in such a case, a plurality of light receiving elements are arranged for a plurality of pixel circuits (for example, a plurality of dummy pixel circuits). However, the plurality of light receiving elements are commonly connected to one detection signal output circuit. That is, one light detection unit is not constituted by one detection signal output circuit for one light receiving element, but one light detection unit is constituted by a plurality of light receiving elements and one detection signal output circuit.

According to the present invention, a plurality of light receiving elements are arranged for a plurality of pixel circuits (for example, a plurality of dummy pixel circuits), and the plurality of light receiving elements are commonly connected to one detection signal output circuit. The detection signal output circuit generates and outputs a light detection signal from an output corresponding to the amount of received light obtained by the plurality of light receiving elements.
Accordingly, when the light receiving elements are arranged in the layout space of the pixel circuit, it is possible to adopt a configuration in which the detection signal output circuit is not arranged in each pixel circuit region. Therefore, it is possible to reduce the number of elements in the layout space of the pixel circuit region and thereby reduce the area of the pixel circuit region.

It is a block diagram of the structure of the display apparatus of embodiment of this invention. It is a block diagram of the structure of the display panel part of embodiment. It is a circuit diagram of a pixel circuit of an embodiment. It is explanatory drawing of the pixel array containing the dummy pixel circuit of embodiment. It is explanatory drawing of the light emission operation | movement of the pixel circuit of embodiment. It is explanatory drawing of the detection operation of the photon detection part of embodiment. It is explanatory drawing of the luminance degradation curve used for the correction process of embodiment. It is explanatory drawing of the signal value correction process of embodiment. It is a circuit diagram of the photon detection unit of Configuration Example I of the embodiment. It is explanatory drawing of area saving of embodiment. It is a circuit diagram of the photodetection part of Configuration Example II of the embodiment. FIG. 3 is a circuit diagram of a configuration example III photodetection unit of the embodiment. It is explanatory drawing of the luminance deterioration of the organic EL element by progress of time. It is explanatory drawing of the burn-in by luminance degradation. It is explanatory drawing of a sensor structure.

Hereinafter, embodiments of the present invention will be described in the following order.
<1. Configuration of display device>
<2. Operation of Pixel Circuit>
<3. Operation of light detection unit and correction processing>
<4. Configuration of Photodetector of Embodiment>
[4-1: Configuration example I]
[4-2: Configuration example II]
[4-3: Configuration example III]
<5. Modification>

<1. Configuration of display device>

FIG. 1 shows a configuration of an organic EL display device according to an embodiment.
This organic EL display device uses an organic EL element as a light emitting element and performs light emission driving by an active matrix method.

FIG. 1 shows a pixel array 20, a horizontal selector 11, a drive scanner 12, and a write scanner 13 as the configuration of the display panel portion.
In the pixel array 20, pixel circuits 10 are arranged in a matrix as will be described later with reference to FIG. The horizontal selector 11, the drive scanner 12, and the write scanner 13 serve as a light emission drive unit that gives a signal value to each pixel circuit 10 in the pixel array 20 to emit light.

The pixel array 20 is provided with a light detection unit 30 that detects the light emission luminance of a required pixel circuit, for example, a pixel circuit in the dummy pixel region DMA outside the effective display region.
Each light detection unit 30 outputs a light detection signal to the light detection line DETL by the operation control of the detection operation control unit 21. Specifically, the potential of the light detection line DETL is changed according to the amount of received light.
The voltage detection unit 22 detects the potential fluctuation of the light detection line DETL due to the light detection signal of the light detection unit 30, and generates a light emission luminance information value from the potential fluctuation. Then, the light emission luminance information value is given to the correction processing unit 40.

The correction processing unit 40 performs correction processing on the video data DV input to the horizontal selector 11. For example, correction for burn-in described with reference to FIG.
The correction processing unit 40 includes a correction calculation unit 41, a correction amount calculation unit 42, a flash memory 43, and a DRAM (Dynamic Random Access Memory) 44.
The correction amount calculation unit 42 obtains a luminance degradation characteristic (luminance degradation curve) for each gradation value based on the light emission luminance information obtained by the detection operation of the light detection unit 30, and generates a correction pattern from the luminance degradation curve.
The flash memory 43 stores information on luminance degradation curves and correction patterns.
The correction calculation unit 41 corrects each signal value of the video data DV using the correction pattern information. The DRAM 44 is used as a storage area for calculation processing of the correction calculation unit 41.
The correction operation by the correction processing unit 40 will be described later.

  The video data DV corrected by the correction processing unit 40 is input to the horizontal selector 11. The horizontal selector 11 gives a signal value (video signal voltage Vsig) based on the video data DV to each pixel circuit in the pixel array 20.

The configuration of the display panel portion (pixel array 20, horizontal selector 11, drive scanner 12, write scanner 13) will be described with reference to FIG.
As illustrated, in the pixel array 20, a large number of pixel circuits 10 are arranged in a matrix in the column direction and the row direction (m rows × n columns).
Each of the pixel circuits 10 is a light emitting pixel of any one of R (red), G (green), and B (blue), and a color display device is configured by arranging the pixel circuits 10 of each color according to a predetermined rule. .

As described above, the horizontal selector 11, the drive scanner 12, and the write scanner 13 are provided as a configuration for driving each pixel circuit 10 to emit light.
Also, signal lines DTL1, DTL2,... DTL (n) that are selected by the horizontal selector 11 and supply a voltage corresponding to the signal value (gradation value) of the luminance signal as video data to the pixel circuit 10 are on the pixel array. It is arranged in the column direction. The signal lines DTL1, DTL2,... DTL (n) are arranged by the number of columns (n columns) of the pixel circuits 10 arranged in a matrix in the pixel array 20.

  On the pixel array 20, write control lines WSL1, WSL2,... WSL (m) and power supply control lines DSL1, DSL2,. These write control lines WSL and power supply control lines DSL are arranged by the number of rows (m rows) of the pixel circuits 10 arranged in a matrix in the pixel array 20, respectively.

Write control lines WSL (WSL1 to WSL (m)) are driven by the write scanner 13.
The write scanner 13 sequentially supplies scanning pulses WS (WS1, WS2,... WS (m)) to each of the write control lines WSL1 to WSL (m) arranged in rows at a predetermined timing set. Then, the pixel circuit 10 is line-sequentially scanned in units of rows.

The power supply control lines DSL (DSL1 to DSL (m)) are driven by the drive scanner 12. The drive scanner 12 supplies power pulses DS (DS1, DS2,... DS (m)) to the power supply control lines DSL1 to DSL (m) arranged in a row in accordance with the line sequential scanning by the write scanner 13. To do. The power supply pulse DS (DS1, DS2,... DS (m)) is a pulse voltage that switches between two values of the drive voltage Vcc and the initial voltage Vini.
The drive scanner 12 and the write scanner 13 set the timing of the scanning pulse WS and the power supply pulse DS based on the clock ck and the start pulse sp.

The horizontal selector 11 supplies a signal line voltage to be input to the pixel circuit 10 to the signal lines DTL1, DTL2,... Arranged in the column direction in accordance with the line sequential scanning by the write scanner 13.
In the present embodiment, the horizontal selector 11 supplies a threshold correction reference voltage Vofs and a video signal voltage Vsig as signal line voltages to each signal line DTL.
The video signal voltage Vsig is a voltage value as a signal value of video data input to the horizontal selector 11. That is, it is a voltage value corresponding to the gradation value to be emitted. The threshold correction reference voltage Vofs is a voltage used for a threshold correction operation described later.

FIG. 3 shows a configuration example of the pixel circuit 10. The pixel circuits 10 are arranged in a matrix like the pixel circuits 10 in FIG.
In FIG. 3, only one pixel circuit 10 arranged at a portion where the signal line DTL intersects with the write control line WSL and the power supply control line DSL is shown for simplification.

  The pixel circuit 10 includes an organic EL element 1 which is a light emitting element, a storage capacitor Cs, a sampling transistor Ts, an n-channel thin film transistor (TFT) as a drive transistor Td, and an auxiliary capacitor Csub. Note that the capacitance Coled is a parasitic capacitance of the organic EL element 1.

The storage capacitor Cs has one terminal connected to the source (node ND2) of the drive transistor Td and the other terminal connected to the gate (node ND1) of the drive transistor Td.
The light emitting element of the pixel circuit 10 is, for example, the organic EL element 1 having a diode structure, and includes an anode and a cathode. The anode of the organic EL element 1 is connected to the source of the drive transistor Td, and the cathode is connected to a predetermined wiring (cathode potential Vcat).
Further, an auxiliary capacitor Csub is connected in parallel with the organic EL element 1.

The sampling transistor Ts has one end of its drain and source connected to the signal line DTL and the other end connected to the gate of the driving transistor Td.
The gate of the sampling transistor Ts is connected to the write control line WSL.
The drain of the drive transistor Td is connected to the power supply control line DSL.

The light emission driving of the organic EL element 1 is basically as follows.
At the timing when the video signal voltage Vsig is applied to the signal line DTL, the sampling transistor Ts is turned on by the scanning pulse WS supplied from the write scanner 13 by the write control line WSL. As a result, the video signal voltage Vsig from the signal line DTL is written to the storage capacitor Cs.

The drive transistor Td causes the current Ids to flow through the organic EL element 1 by supplying current from the power supply control line DSL to which the drive potential Vcc is applied by the drive scanner 12, and causes the organic EL element 1 to emit light.
At this time, the current Ids becomes a value corresponding to the gate-source voltage Vgs of the driving transistor Td (a value corresponding to the voltage held in the holding capacitor Cs), and the organic EL element 1 emits light with luminance corresponding to the current value. To do.
That is, in the case of this pixel circuit 10, by writing the video signal voltage Vsig from the signal line DTL to the storage capacitor Cs, the gate applied voltage of the drive transistor Td is changed, thereby controlling the value of the current flowing through the organic EL element 1. To obtain the gradation of light emission.

Since the drive transistor Td is designed to always operate in the saturation region, the drive transistor Td becomes a constant current source having a value represented by the following expression 1.
Ids = (1/2) · μ · (W / L) · Cox · (Vgs−Vth) ² (Equation 1)
Where Ids is the current flowing between the drain and source of a transistor operating in the saturation region, μ is the mobility, W is the channel width, L is the channel length, Cox is the gate capacitance, and Vth is the threshold voltage of the driving transistor Td. Yes.
As apparent from Equation 1, the drain current Ids is controlled by the gate-source voltage Vgs in the saturation region. Since the gate-source voltage Vgs is kept constant, the drive transistor Td operates as a constant current source, and can emit the organic EL element 1 with constant luminance.

In this way, basically, in each frame period, an operation is performed in which the video signal value (gradation value) Vsig is written in the storage capacitor Cs in the pixel circuit 10, and thereby the driving transistor is selected according to the gradation to be displayed. The gate-source voltage Vgs of Td is determined.
The drive transistor Td functions as a constant current source for the organic EL element 1 by operating in the saturation region, and a current corresponding to the gate-source voltage Vgs is supplied to the organic EL element 1 so that each frame period is The organic EL element 1 emits light with a luminance corresponding to the gradation value of the video signal.

In the present embodiment, some of the pixel circuits 10 in the pixel array 20 are dummy pixel circuits.
FIG. 4 shows the pixel circuit 10 in the pixel array 20, and it is assumed that a portion surrounded by a broken line is an effective display area AA.
Outside the effective display area AA is a dummy pixel area DMA in which the dummy pixel circuit 10d is arranged. Similar to the pixel circuit 10 in the effective display area AA, the dummy pixel circuit 10d has the circuit configuration of FIG. 3 and emits light based on the video signal voltage Vsig supplied from the horizontal selector 11 via the signal line DTL.

In the case of this example, a group of the plurality of dummy pixel circuits 10d is a dummy pixel block BL. In FIG. 4, dummy pixel blocks BL1, BL2,... BL (x) are formed.
The dummy pixel block BL is a dummy pixel circuit group corresponding to one light detection unit 30.
For example, FIG. 1 and FIG. 2 show a plurality of light detection units 30, but one light detection unit 30 is provided for each dummy pixel block.
Each dummy pixel circuit 10d in one dummy pixel block BL is caused to emit light with the same signal value.
For example, the video signal voltage Vsig corresponding to 100 nit is always supplied to each dummy pixel circuit 10d in the dummy pixel block BL1 to drive light emission. In addition, for example, the video signal voltage Vsig corresponding to 200 nit is always supplied to each dummy pixel circuit 10d in the dummy pixel block BL2 to drive light emission.

In this way, a group of dummy pixel circuits 10d, which is one dummy pixel block BL, emits light with the same luminance, and the corresponding one light detection unit 30 detects the light emission luminance of each dummy pixel circuit 10d. It becomes.
As will be described later, the light detection unit 30 includes a light receiving element and a detection signal output circuit, and the light receiving element is provided corresponding to each dummy pixel circuit 10d, for example. A plurality of light receiving elements are connected to one detection signal output circuit.

<2. Operation of Pixel Circuit>

Next, the operation of the pixel circuit 10 will be described with reference to FIG. The dummy pixel circuit 10d performs the same operation.
The pixel circuit operation described here is an operation including a threshold value correction operation and a mobility correction operation for compensating for uniformity degradation due to variations in the threshold and mobility of the driving transistor Td of each pixel circuit 10.

In the pixel circuit operation, the threshold value correction operation and the mobility correction operation itself have been performed conventionally. This necessity will be briefly described.
For example, in a pixel circuit using a polysilicon TFT or the like, the threshold voltage Vth of the drive transistor Td and the mobility μ of the semiconductor thin film constituting the channel of the drive transistor Td may change over time. Further, the transistor characteristics of the threshold voltage Vth and the mobility μ are different for each pixel due to variations in the manufacturing process.
If the threshold voltage and mobility of the drive transistor Td differ from pixel to pixel, the current value flowing through the drive transistor Td varies from pixel to pixel. For this reason, even if the same video signal value (video signal voltage Vsig) is given to all the pixel circuits 10, the light emission luminance of the organic EL element 1 varies from pixel to pixel. As a result, the screen uniformity (uniformity) ) Is damaged.
For this reason, the pixel circuit operation is provided with a correction function for fluctuations in the threshold voltage Vth and the mobility μ.

FIG. 5 shows a timing chart of the operation of the light emission cycle (each frame period) of the pixel circuit 10.
FIG. 5 shows the signal line voltage that the horizontal selector 11 gives to the signal line DTL. In the case of this operation example, the horizontal selector 11 uses the threshold correction reference voltage Vofs as a single predetermined voltage value and the pulse voltage as the video signal voltage Vsig as a signal line voltage in one horizontal period (1H) as a signal line. Give to DTL.
FIG. 5 shows a scan pulse WS applied to the gate of the sampling transistor Ts by the write scanner 13 via the write control line WSL. The n-channel sampling transistor Ts is turned on when the scanning pulse WS is set to the H level, and is turned off when the scanning pulse WS is set to the L level.
FIG. 5 shows a power pulse DS supplied from the drive scanner 12 via the power control line DSL. The drive voltage Vcc or the initial voltage Vini is given as the power supply pulse DS.
FIG. 5 shows changes in the gate voltage Vg and the source voltage Vs of the drive transistor Td as the voltages of the nodes ND1 and ND2 shown in FIG.

The time ts in the timing chart of FIG. 5 is the start timing of one cycle in which the organic EL element 1 as a light emitting element is driven to emit light, for example, one frame period of image display.
Before reaching this time point ts, light emission of the previous frame is performed.
That is, the light emission state of the organic EL element 1 is a state where the power supply pulse DS is the drive voltage Vcc and the sampling transistor Ts is turned off. At this time, since the drive transistor Td is set to operate in the saturation region, the current Ids flowing through the organic EL element 1 is expressed by the above-described equation 1 according to the gate-source voltage Vgs of the drive transistor Td. Value.

The operation for light emission of the current frame is started at time ts.
In the period LT1, preparation for extinction and threshold correction is performed.
First, the power supply pulse DS is set to the initial potential Vini.
At this time, when the initial potential Vini is smaller than the sum of the threshold voltage Vthel and the cathode voltage Vcat of the organic EL element 1, that is, Vini ≦ Vthel + Vcat, the organic EL element 1 is extinguished and a non-light emitting period is started. At this time, the power supply control line DSL becomes the source of the drive transistor Td. The anode (node ND2) of the organic EL element 1 is charged to the initial potential Vini.
Further, the gate potential (node ND1) of the drive transistor Td decreases to a certain potential Vg ′ in accordance with the decrease in the source potential.

After a certain period, preparation for threshold correction is performed. That is, when the potential of the signal line DTL is the threshold correction reference voltage Vofs, the scanning pulse WS is set to H level and the sampling transistor Ts is turned on. Therefore, the gate (node ND1) of the drive transistor Td becomes the threshold correction reference voltage Vofs.
The gate-source voltage Vgs of the drive transistor Td is Vgs = Vofs−Vini.
Since the threshold value correction operation cannot be performed unless this Vofs−Vini is larger than the threshold voltage Vth of the drive transistor Td, the initial potential Vini and the reference voltage Vofs are set so that Vofs−Vini> Vth. .
That is, as a preparation for threshold correction, the gate-source voltage of the drive transistor is sufficiently widened than the threshold voltage Vth.

Subsequently, threshold correction (Vth correction) is performed in the period LT2.
That is, while the signal line voltage is the threshold correction reference voltage Vofs, the write scanner 13 maintains the H level of the scanning pulse WS. The drive scanner 12 sets the power supply pulse DS to the drive voltage Vcc.
In this case, the anode (node ND2) of the organic EL element 1 serves as the source of the drive transistor Td, and a current flows. Therefore, the source node (node ND2) rises while the gate (node ND1) of the drive transistor Td is fixed to the threshold correction reference voltage Vofs.
As long as the anode potential of the organic EL element 1 (potential of the node ND2) is equal to or lower than Vcat + Vthel (threshold voltage of the organic EL element 1), the current of the drive transistor Td charges the holding capacitor Cs, the parasitic capacitor Coled, and the auxiliary capacitor Csub. Used for. “As long as the anode potential of the organic EL element 1 is equal to or lower than Vcat + Vthel” means that the leakage current of the organic EL element 1 is considerably smaller than the current flowing through the drive transistor Td.
For this reason, the potential of the node ND2 (the source potential of the driving transistor Td) increases with time.

This threshold correction is an operation in which the gate-source voltage of the drive transistor Td is set to the threshold voltage Vth. Therefore, the source potential of the drive transistor Td is raised until the gate-source voltage of the drive transistor Td reaches the threshold voltage Vth.
After a certain period of time, the gate-source voltage of the drive transistor Td becomes the threshold voltage Vth.
In this example, the threshold correction operation is performed once. However, the threshold correction operation is divided and performed a plurality of times in order to secure time for the gate-source voltage of the drive transistor Td to be the threshold voltage Vth. There is also.

When the gate-source voltage of the drive transistor Td becomes the threshold voltage Vth at the end of the period LT2, the source potential (node ND2: anode potential of the organic EL element 1) = Vofs−Vth ≦ Vcat + Vthel. (Vcat is the cathode potential, Vthel is the threshold voltage of the organic EL element 1)
At this time, the write scanner 13 sets the scanning pulse WS to L level, the sampling transistor Ts is turned off, and the threshold correction operation is completed.

  Thereafter, during a period LT3 in which the signal line voltage is the video signal voltage Vsig, the write scanner 13 sets the scanning pulse WS to the H level, and writing of the video signal voltage Vsig and mobility correction are performed. That is, the video signal voltage Vsig is input to the gate of the drive transistor Td.

The gate potential of the drive transistor Td becomes the potential of the video signal voltage Vsig, but current flows because the power supply control line DSL is at the drive voltage Vcc, and the source potential rises with time.
At this time, if the source voltage of the drive transistor Td does not exceed the sum of the threshold voltage Vthel and the cathode voltage Vcat of the organic EL element 1, the current of the drive transistor Td charges the holding capacitor Cs, the parasitic capacitor Coled, and the auxiliary capacitor Csub. Used for. That is, the condition is that the leakage current of the organic EL element 1 should be much smaller than the current flowing through the drive transistor Td.
At this time, since the threshold value correcting operation of the drive transistor Td is completed, the current flowing through the drive transistor Td reflects the mobility μ.
Specifically, those with high mobility have a large current amount at this time, and the source rises quickly. On the other hand, when the mobility is low, the amount of current is small and the source rises slowly.
As a result, during the period LT4 when the scanning pulse WS is at the H level, the source voltage Vs of the drive transistor Td rises after the sampling transistor Ts is turned on, and when the sampling transistor Ts is turned off, the source voltage Vs becomes the mobility μ The voltage reflects. The gate-source voltage Vgs of the driving transistor Td is reduced to reflect the mobility, and becomes a voltage that completely corrects the mobility after a predetermined time has elapsed.

After writing the video signal voltage Vsig and correcting the mobility in this way, the gate-source voltage Vgs is determined, and the bootstrap and light emission states are entered.
That is, the scanning pulse WS is set to L level, the sampling transistor Ts is turned off, writing is completed, and the organic EL element 1 is caused to emit light.
In this case, a current Ids corresponding to the gate-source voltage Vgs of the drive transistor Td flows, the potential of the node ND2 rises to a voltage at which the current flows in the organic EL element 1, and the organic EL element 1 emits light. At this time, the sampling transistor Ts is off, and the gate of the drive transistor Td (node ND1) rises at the same time as the potential of the node ND2 rises, so the gate-source voltage Vgs remains constant. (Bootstrap operation)

As described above, the pixel circuit 10 performs the operation for light emission of the organic EL element 1 including the threshold value correction operation and the mobility correction operation as the light emission drive operation of one cycle in one frame period.
A current corresponding to the signal potential Vsig can be supplied to the organic EL element 1 regardless of variations in the threshold voltage Vth of the drive transistor Td in each pixel circuit 10 and fluctuations in the threshold voltage Vth due to temporal fluctuations by the threshold correction operation. . That is, variations in the threshold voltage Vth due to manufacturing or changes over time can be canceled, and high image quality can be maintained without causing uneven brightness on the screen.
In addition, since the drain current varies depending on the mobility of the driving transistor Td, the image quality deteriorates due to variations in the mobility of the driving transistor Td for each pixel circuit 10, but the mobility correction increases or decreases the mobility of the driving transistor Td. In response to this, the source potential Vs is obtained. As a result, the gate-source voltage Vgs is adjusted so as to absorb the variation in mobility of the drive transistor Td of each pixel circuit 10, so that the deterioration in image quality due to the variation in mobility is also eliminated.

<3. Operation of light detection unit and correction processing>

Next, the configuration and operation of the light detection unit 30 will be described.
FIG. 6 shows one dummy pixel circuit 10d and the corresponding light detection unit 30.
Note that one light detection unit 30 corresponds to a group of a plurality of dummy pixel circuits 10d that are the dummy pixel blocks BL as described above, but here, for the sake of explanation of operation, it corresponds to one dummy pixel circuit 10d. It is shown as a configuration to do.
The configuration of the dummy pixel circuit 10d is the same as that of the normal pixel circuit 10.

As shown in FIG. 6, the light detection unit 30 includes a light receiving element SL (actually, a plurality of light receiving elements SL as will be described later) and a detection signal output circuit 31.
For example, a PIN diode is used as the light receiving element SL.
The detection signal output circuit 31 includes a capacitor C1, a detection signal output transistor T5 using n-channel TFTs, and switching transistors T3 and T4.

The light receiving element SL is connected between the power supply voltage Vcc and the gate of the detection signal output transistor T5.
The photosensor S1 is arranged to detect light emitted from the organic EL element 1 of the dummy pixel circuit 10d. The leak current increases or decreases according to the detected light amount. Specifically, if the amount of light emitted from the organic EL element 1 is large, the current increase amount is large, and if it is small, the current increase amount is small.

The capacitor C1 is connected between the power supply voltage Vcc and the gate of the detection signal output transistor T5.
The drain of the detection signal output transistor T5 is connected to the power supply voltage Vcc. The source is connected to the switching transistor T3.
The switching transistor T3 is connected between the source of the detection signal output transistor T5 and the light detection line DETL.
The gate of the switching transistor T3 is turned on / off by a control pulse pT3 given from the detection operation control unit 21 shown in FIG. When the switching transistor T3 is turned on, the source potential of the detection signal output transistor T5 is output to the photodetection line DETL.

The drain and source of the switching transistor T4 are connected between the gate of the detection signal output transistor T5 and the detection reference potential Vr. The gate of the switching transistor T4 is turned on / off by a control pulse pT4 given from the detection operation control unit 21 shown in FIG.
When the switching transistor T4 is turned on, the detection reference potential Vr is input to the gate of the detection signal output transistor T5.

The detection operation of the light detection unit 30 is as follows.
In the light detection unit 30, first, the switching transistors T3 and T4 are turned on by the control pulses pT4 and pT3 in preparation for detection.
When the switching transistor T4 is turned on, the detection reference voltage Vr is input to the gate of the detection signal output transistor T5.
Here, the detection reference voltage Vr is a voltage for turning on the detection signal output transistor T5. For this reason, a current flows through the detection signal output transistor T5 and the switching transistor T3 is also turned on, so that a certain potential Vx is output to the photodetection line DETL.
Thus, as preparation for detection, the gate potential of the detection signal output transistor T5 is set to Vr, and the potential of the light detection line DETL is set to Vx.

  The pixel circuit 10d performs the operation described with reference to FIG. 5 for each frame period, and the organic EL element 1 emits light according to the input video signal voltage Vsig. Then, the light receiving element SL receives light from the organic EL element 1, and the leakage current changes.

After starting the light emission of such an organic EL element, the control pulse pT4 is set to the L level, and the switching transistor T4 is turned off.
When the switching transistor T4 is turned off, the fixation of the gate potential of the detection signal output transistor T5 to the detection reference potential Vr is released.
Then, the light receiving element SL receives the light of the organic EL element 1, and causes a leakage current from the power supply voltage Vcc to flow to the gate of the detection signal output transistor T5.
By this operation, the gate voltage of the detection signal output transistor T5 increases from the detection reference voltage Vr, and the potential of the photodetection line DETL also increases from the potential Vx. The voltage detector 22 detects the potential change of the light detection line DETL.

  This detection potential corresponds to the amount of light emitted from the organic EL element 1. In other words, if a specific gradation display (for example, display by the video signal voltage Vsig of 100 nit) is executed by the dummy pixel circuit 10d, the detection potential becomes a value corresponding to 100 nit luminance. The fluctuation of the detected potential represents the degree of deterioration of the organic EL element 1.

After a certain period of time, the control pulse pT3 is set to L level, the switching transistor T3 is turned off, and the detection operation is finished.
For example, the light detection operation as described above is performed every frame period.
According to the detection signal output circuit 31 of the light detection unit 30, if the gate voltage of the detection signal output transistor T5 varies, the variation is output to the source. That is, the change in the gate voltage of the detection signal output transistor T5 due to the change in the leakage current of the light receiving element SL is output from the source to the light detection line DETL.
The gate-source voltage Vgs of the detection signal output transistor T5 is set to be larger than the threshold voltage Vth. For this reason, even if the leak current value of the light receiving element SL is small, the current value output to the light detection line DETL via the detection signal output transistor T5 is relatively large. It is possible to output to the detection unit 22.

Thus, the light detection output by the light detection unit 30 appears as a potential fluctuation of the light detection line DETL.
The voltage detector 22 detects light emission luminance information of the dummy pixel circuit 10d by detecting a potential fluctuation amount of the light detection line DETL.
As shown in FIG. 1, the voltage detection unit 22 supplies luminance information to the correction processing unit 40.

As described above, the light emission efficiency of the organic EL element decreases with time. In other words, even if the same current is supplied, the emission luminance is lowered with time. As a result, image sticking occurs as shown in FIG.
Therefore, the display device of this example detects the light emission amount of the dummy pixel circuit 10d, and thereby determines the deterioration of the light emission luminance. Then, the video data DV is corrected according to the degree of deterioration. That is, the video signal voltage Vsig applied to each pixel circuit 10 is corrected.

This correction operation will be described.
As described above, the dummy pixel circuit 10d emits light with a predetermined luminance for each dummy pixel block BL.
For example, each dummy pixel circuit 10d of the dummy pixel block BL1 in FIG. 4 is supplied with a video signal voltage Vsig equivalent to 100 nit and performs a light emitting operation.
Each dummy pixel circuit 10d of the dummy pixel block BL2 is supplied with a video signal voltage Vsig equivalent to 200 nit and performs a light emitting operation.
Further, each dummy pixel circuit 10d of the dummy pixel block BL3 is supplied with a video signal voltage Vsig corresponding to 400 nit and performs a light emitting operation.

In this manner, each light detection unit 30 detects the light emission luminance in each dummy pixel block BL in a state where each dummy pixel circuit 10d is driven to emit light.
Then, the detected luminance information value is supplied to the correction amount calculation unit 42 in the correction processing unit 40 shown in FIG.
The correction amount calculation unit 42 obtains a luminance deterioration curve as shown in FIG. For example, each luminance information value at 100 nit, 200 nit, 400 nit,... Is accumulated for a certain period. Then, the luminance degradation amount by actual measurement is obtained, and the degradation rate is estimated according to further time passage, and a luminance degradation curve corresponding to each luminance as shown in FIG. 7 is generated.
Information on the luminance deterioration curve is stored in the flash memory 43, for example.
In addition, the correction amount calculation unit 42 creates a correction pattern, which is information on the correction amount for each pixel circuit, based on the luminance deterioration curve and the video data DV.
Information on the luminance deterioration curve and the correction pattern is stored in the flash memory 43, for example.

Video data DV as display data is supplied to the correction calculation unit 41.
The correction calculation unit 41 corrects each signal value of the video data DV, that is, the gradation value to be given to each pixel circuit 10 based on the correction pattern information, and outputs the corrected video data DV to the horizontal selector 11. That is, the correction value for the luminance deterioration for each pixel circuit 10 is given to the signal value for each pixel circuit 10.

The correction operation corresponding to the burn-in described with reference to FIG. 14 will be described with reference to FIG.
FIG. 8A shows a state in which a fixed pattern “BS” is displayed in the black display, as in FIG. 14A.
After such a fixed pattern display is performed for a long time, when the video data DV of the whole white display as shown in FIG. 14B is supplied, if it is not corrected, the burn-in as shown in FIG. 14C occurs. To do. Here, it is assumed that the burn-in correction is performed when the video data DV of the entire white display as shown in FIG. 14B is supplied.

In order for the correction amount calculation unit 42 to generate a correction pattern for burn-in correction, a luminance deterioration curve is referred to as shown in FIG.
If the “BS” portion is displayed at 200 nit, for example, the luminance degradation curve at 200 nit is referred to for the pixel circuit 10 of the “BS” portion.
Then, the deterioration rate of each pixel circuit 10 is estimated from the luminance deterioration curve, and a correction pattern as shown in FIG. 8C corresponding to the estimated deterioration rate is created.
In other words, in this case, in response to the luminance deterioration of the pixel circuit 10 in the “BS” portion, only the pixel circuit in the “BS” portion generates a correction pattern having a higher luminance gradation than the other pixel circuits. To do.

Then, as a correction process when the video data DV of the entire white display as shown in FIG. 14B is supplied, the correction calculation unit 41 receives the input video data DV (that is, a high gradation value common to all pixels). On the other hand, the correction pattern shown in FIG. This is the corrected video data DV.
The corrected video data DV is supplied to the horizontal selector 11, and the horizontal selector 11 supplies the video signal voltage Vsig based on the signal value of the video data DV to each pixel circuit 10. Then, the display image is as shown in FIG. That is, an image with burn-in corrected is obtained.

The above correction operation is an example. For example, by performing such correction, a display image without burn-in can be realized.
In order to perform such correction, it is necessary to provide the light detection unit 30 and detect the light emission luminance of the pixel circuit 10 (dummy pixel circuit 10d).
However, as shown in FIG. 6, provision of one photodetecting unit 30 corresponding to one dummy pixel circuit 10d causes an increase in the number of elements arranged in the pixel circuit region.
Therefore, in the present embodiment, as in the following configuration examples I, II, and III, a configuration is adopted in which one light detection unit 30 corresponds to a dummy pixel block BL including a plurality of dummy pixel circuits 10d.

<4. Configuration of Photodetector of Embodiment>
[4-1: Configuration example I]

FIG. 9 shows a light detection unit 30 as Configuration Example I of the present embodiment.
FIG. 9 shows one dummy pixel block BL formed by a large number of dummy pixel circuits 10d and one light detection unit 30 corresponding to the dummy pixel block BL.
Each dummy pixel circuit 10d in the dummy pixel block BL receives a fixed and common video signal voltage Vsig from the horizontal selector 11 so that light emission of a predetermined luminance such as 100 nit is performed.
In this example, the dummy pixel block BL includes a dummy pixel circuit 10d that emits light of each color as an R pixel, a G pixel, and a B pixel.

For each of the dummy pixel circuits 10d, a light receiving element SL is disposed so that the light from the organic EL element 1 can be received.
The plurality of light receiving elements SL (PIN diodes) are connected in parallel to the detection signal output circuit 31. That is, the cathode of each light receiving element SL is connected to the line of the power supply Vcc, and the anode of each light receiving element SL is connected to the gate of the detection signal output transistor T5.
The operation of the detection signal output circuit 31 is as described in FIG.

Therefore, in this case, the gate potential of the detection signal output transistor T5 varies depending on the sum of the leak currents generated by the light receiving elements SL.
The source potential of the detection signal output transistor T5 output to the photodetection line DETL via the switching transistor T3 varies according to the gate potential variation.
The voltage detection unit 22 detects the potential fluctuation of the light detection line DETL, and the light emission luminance information is supplied to the correction amount calculation unit 42.
For example, when each dummy pixel circuit 10d of the dummy pixel block BL shown in FIG. 9 emits light with the video signal voltage Vsig equivalent to 100 nit, the information on the emission luminance for generating the luminance deterioration curve in the 100 nit pixel is the correction amount. It is supplied to the calculation unit 42.

With the configuration of the light detection unit 30 as shown in FIG. 9, the following advantages are obtained.
First, only the light receiving element SL is arranged corresponding to each dummy pixel circuit 10d. For example, as shown in FIG. 10B, one light receiving element SL is arranged so that the light of the organic EL element 1 can be received with respect to one dummy pixel circuit 10d.
Therefore, only the light receiving element SL may be disposed in the formation region of each dummy pixel circuit 10d, as schematically shown in FIG. The detection signal output circuit 31 can be laid out outside the pixel circuit area.
As a result, the area of the pixel circuit formation region can be reduced.

Further, the light of the plurality of dummy pixel circuits 10d that emits light with the same luminance is received by the plurality of light receiving elements SL, and the gate potential of the detection signal output transistor T5 is changed by the sum of the leak currents of these light receiving elements SL. It is a configuration.
For this reason, the element size of the light receiving element SL can be reduced.
That is, in order to detect the emission luminance with high accuracy, it is necessary that the potential fluctuation of the light detection line DETL is large in accordance with the change in the emission luminance. If the potential variation of the light detection line DETL is caused based on the leakage current of one light receiving element SL, a relatively large amount of current is required as the leakage current amount of the light receiving element SL. For this reason, the size of the light receiving element SL must be increased to some extent.
However, in this example, the potential variation of the photodetection line DETL is generated based on the sum of the leak currents of a large number of light receiving elements SL. Then, the leakage current amount of each light receiving element SL may be small. Therefore, in this example, the element size of the light receiving element SL can be reduced.
For example, it is assumed that the dummy pixel block BL includes 10 × 10 100 dummy pixel circuits 10d. If the photodetection sensitivities are kept the same, the size of the light receiving element SL can be reduced to 1/100 compared to the case where one photodetection unit 30 is provided in one pixel circuit.

  From the above, in the present embodiment, it is possible to significantly reduce the layout space of the light detection unit 30 and to keep the detection sensitivity higher than before while realizing the area saving of the pixel circuit region.

Actually, as shown in FIG. 1, the light detection units 30 as shown in FIG. 9 are provided corresponding to the plurality of dummy pixel blocks BL, but each light detection unit 30 is connected to a common light detection line DETL. In this case, the detection operation of each light detection unit 30 may be performed in a time division manner.
Of course, the light detection line DETL and the voltage detection unit 22 may be provided for each of the light detection units 30.

[4-2: Configuration example II]

The light detection unit 30 as the configuration example II will be described with reference to FIG.
In the case of the above configuration example I, the dummy pixel block BL includes the dummy pixel circuits 10d of the R pixel, the G pixel, and the B pixel. On the other hand, in the configuration example II, the dummy pixel block BL is configured by the dummy pixel circuit 10d for each color.
That is, in the dummy pixel circuit 10d shown in FIG. 11, the dummy pixel block BL-R is formed with only R pixels. Further, a dummy pixel block BL-G is formed with only G pixels, and a dummy pixel block BL-B is formed with only B pixels.

The light detection unit 30 is provided corresponding to each dummy pixel block including only a dummy pixel circuit that emits light of one color among the R pixel, the G pixel, and the B pixel.
That is, the light detection unit 30R is provided for the dummy pixel block BL-R, the light detection unit 30G is provided for the dummy pixel block BL-G, and the light detection unit 30B is provided for the dummy pixel block BL-B. .

The light detection unit 30R is formed by a plurality of light receiving elements SL arranged corresponding to each of a large number of dummy pixel circuits 10d as R pixels and a detection signal output circuit 31R.
The light detection unit 30G is formed by a plurality of light receiving elements SL arranged corresponding to each of a large number of dummy pixel circuits 10d as G pixels, and a detection signal output circuit 31G.
The light detection unit 30B is formed by a plurality of light receiving elements SL arranged corresponding to each of a large number of dummy pixel circuits 10d as B pixels, and a detection signal output circuit 31B.
The configuration of the detection signal output circuits 31R, 31G, and 31B is the same as that of the detection signal output circuit 31 of FIG.

  By adopting such a configuration, it is possible to arrange the light receiving element SL optimal for the wavelength characteristics of each color in addition to the same effects as in the configuration example I, and it is possible to detect the emission luminance with high accuracy corresponding to each color. Become.

In the example of FIG. 11, the light detection units 30R, 30G, and 30B are connected to a common light detection line DETL. However, in this case, the light detection units 30R, 30G, and 30B The light detection operation may be performed in a divided manner, and the voltage detection unit 22 may detect the emission luminance information for the R light, the G light, and the B light in a time division manner.
Of course, when performing luminance detection for light emission of a predetermined luminance such as 100 nit without distinguishing between the R pixel, the G pixel, and the B pixel, time-division processing for the light detection units 30R, 30G, and 30B is not necessary. .
Alternatively, the light detection lines DETL may be arranged corresponding to the light detection units 30R, 30G, and 30B, respectively, and voltage detection may be performed by the voltage detection units 22 individually connected to the light detection lines DETL.

[4-3: Configuration example III]

The light detection unit 30 as the configuration example III will be described with reference to FIG.
This is an example in which the configuration of the A / D converter is adopted as the configuration of the light detection unit 30. In the example of FIG. 12, the dummy pixel block BL includes the dummy pixel circuits 10d of the R pixel, the G pixel, and the B pixel as in the example of FIG. 9, but the dummy pixel block BL as shown in FIG. However, it may be configured by a dummy pixel circuit 10d for each color.

In the light detection unit 30 as the configuration example III, the detection signal output circuit 31 includes capacitors C1 and C2, transistors T6, T7, T8, and T9 as n-channel FETs, and an inverter IN.
The transistors T6, T7, T8, and T9 are turned on / off by control pulses pT6, pT7, pT8, and pT9 from the detection operation control unit 21 shown in FIG.

Each light receiving element SL is connected in parallel between the power supply voltage Vcc line and the connection point of the transistors T6 and T9. The transistor T9 is turned off when a leak current is detected by each light receiving element SL.
One ends of the transistors T6 and T7 are connected (node A). The sweep pulse SPP is supplied from the detection operation control unit 21 to the other end of the transistor T7.
A connection point (node A) between the transistors T6 and T7 is connected to the inverter IN via the capacitor C2. The output of the inverter IN is supplied to the light detection line DETL.
The transistor T8 is connected between the input point and the output point of the inverter IN.

Such detection operation by the detection signal output circuit 31 is as follows.
When each dummy pixel circuit 10d emits light, the transistors T6 and T8 are turned on, and the transistors T7 and T9 are turned off.
In this state, a voltage (referred to as sensor output voltage) that fluctuates due to the leakage current of each light receiving element SL is held at the node A.
Next, the transistors T6 and T8 are turned off and the transistor T7 is turned on. Then, the sweep pulse SPP is input to the node A through the transistor T7.
At this time, when the voltage of the sweep pulse SPP is higher than the sensor output voltage, the output of the inverter IN becomes L, and conversely, when the voltage of the sweep pulse SPP is lower than the sensor output voltage, the output of the inverter IN becomes H. .
The L and H pulse outputs of the inverter IN are output to the light detection line DETL.

The voltage detector 22 detects the period of the output pulse of the inverter IN that appears on the light detection line DETL.
That is, the higher the sensor output voltage, the longer the H period of the output pulse. Therefore, the sensor output voltage can be measured by detecting the period of the output pulse, that is, the light emission luminance information in the dummy pixel block BL can be obtained.

In this embodiment, the light receiving element SL is arranged for each dummy pixel circuit 10d, while the detection signal output circuit 31 can be arranged outside the pixel region as described in the above configuration example I. Then, the configuration (number of elements) of the detection signal output circuit 31 does not need to consider the layout of the pixel region.
Therefore, as in the configuration of FIG. 12, the detection signal output circuit 31 is configured to output a light detection signal obtained by converting a voltage value that fluctuates according to a current variation due to the amount of received light in the plurality of light receiving elements SL into a digital signal. It is also possible. That is, an A / D converter built-in circuit configuration can be adopted.
With such a detection signal output circuit 31, a detection signal can be output as a digital output to the light detection line DETL, output variations and noise can be greatly reduced, and detection accuracy can be improved.

<5. Modification>

In the above embodiment, each example of the light detection unit 30 that performs light detection on the dummy pixel circuit 10d has been described. However, each of the above examples may be used as a light detection unit for the pixel circuit 10 in the effective display area AA. Needless to say, it can be applied as it is.
For example, during the display operation, it is possible to detect the luminance of each pixel circuit 10 and correct the video signal voltage Vsig.

In the above example, the example in which light detection for burn-in correction is performed is described. However, the present invention can also be applied to a light detection operation for correction processing for other image quality deterioration factors.
Furthermore, the present invention can be applied to light detection other than the purpose of correction processing. For example, it can be applied as a light detection unit in the case where light from a laser pointer or the like to the panel surface from the outside is detected, or when a user touches the panel surface is detected by reflected light such as a light emitting finger of the pixel circuit 10. . That is, the present invention can be applied as a configuration for realizing a user input operation.

  Further, in each of the examples of FIGS. 9, 11, and 12, one light receiving element SL is arranged for one dummy pixel circuit 10d. For example, it corresponds to a plurality of pixel circuits 10 (10d). One light receiving element SL may be arranged. For example, one light receiving element SL is arranged to receive light from two adjacent pixel circuits 10 (10d). Therefore, a configuration in which a smaller number of light receiving elements SL than the number of dummy pixel circuits 10d are arranged in the dummy pixel block BL shown in FIG.

  Although the configuration of the pixel circuit 10 (dummy pixel circuit 10d) in the embodiment is illustrated in FIG. 3, the configuration of the pixel circuit 10 is not limited thereto. For example, a pixel circuit having three or more transistors may be used.

  DESCRIPTION OF SYMBOLS 1 Organic EL element, 10 pixel circuit, 11 horizontal selector, 12 drive scanner, 13 light scanner, 20 pixel array, 21 detection operation control part, 22 voltage detection part, 22a voltage detection part, 30 light detection part, 31 detection signal output Circuit, 40 correction processing unit, 41 correction calculation unit, 42 correction amount calculation unit, SL light receiving element, T5 detection signal output transistor, DETL photodetection line

Claims (10)

A pixel array in which pixel circuits having light-emitting elements that are driven to emit light according to input signal values are arranged in a matrix;
A light emission driving unit that gives a signal value to each pixel circuit in the pixel array and causes each pixel circuit to emit light with a luminance according to the signal value;
A plurality of light receiving elements arranged corresponding to a plurality of pixel circuits which are a part of the pixel circuits in the pixel array, and the received light quantity obtained by the plurality of light receiving elements connected to each other. A detection signal output circuit that generates and outputs a light detection signal from an output according to the light detection unit, and
A display device comprising: A plurality of the pixel circuits outside the effective display area in the pixel array are dummy pixel circuits,
The display device according to claim 1, wherein the plurality of light receiving elements in the light detection unit are arranged corresponding to the plurality of dummy pixel circuits that emit light with the same signal value. A plurality of dummy pixel blocks composed of a group of dummy pixel circuits that emit light with the same signal value are formed,
The display device according to claim 2, wherein the light detection unit is provided corresponding to each of the dummy pixel blocks.   4. The display device according to claim 3, wherein each light receiving element in the light detection unit is disposed in the vicinity of each dummy pixel circuit, and the detection signal output circuit is disposed outside the pixel array.   The display device according to claim 4, wherein the light detection unit is provided corresponding to each dummy pixel block including a dummy pixel circuit that emits light of each color as an R pixel, a G pixel, and a B pixel.   5. The display according to claim 4, wherein the light detection unit is provided corresponding to each of the dummy pixel blocks including only a dummy pixel circuit that emits light of one color of R, G, and B pixels. apparatus.   The display device according to claim 1, wherein the detection signal output circuit in the light detection unit is configured to output a light detection signal in which a voltage varies according to a current variation due to a received light amount in a plurality of light receiving elements.   2. The detection signal output circuit in the light detection unit is configured to output a light detection signal obtained by converting a voltage value that fluctuates according to a current fluctuation due to a light reception amount in a plurality of light receiving elements into a digital signal. The display device described.   The display device according to claim 1, further comprising a correction processing unit that corrects a signal value that the light emission driving unit gives to each pixel circuit in the pixel array based on a detection signal from the light detection unit. A pixel array in which pixel circuits having light-emitting elements that are driven to emit light according to input signal values are arranged in a matrix;
A light emission driving unit that gives a signal value to each pixel circuit in the pixel array and causes each pixel circuit to emit light with a luminance according to the signal value;
As a light detection method for a display device comprising:
A plurality of light receiving elements are arranged corresponding to a plurality of pixel circuits which are a part of the pixel circuits in the pixel array, the plurality of light receiving elements are connected in common to one detection signal output circuit, and the detection is performed. A light detection method in which a signal output circuit generates and outputs a light detection signal from an output corresponding to the amount of light received by the plurality of light receiving elements.