JP2011163928A - Hall electromotive force signal detector - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a Hall electromotive force signal detector for effectively suppressing pattern noise occurring in a ΔΣ modulator applied to detection of a Hall electromotive force signal by a Hall element. <P>SOLUTION: When bias current is supplied to a Hall element 101 that receives bias current while the direction is changed with time, simultaneously allows detection of Hall electromotive force, and has a plurality of pairs of connection ends, and the Hall electromotive force is detected, a switch circuit 104 acquires a modulation Hall electromotive force signal where the Hall electromotive force of the Hall element is demodulated by performing change of the direction of the vias current and change of the polarity of the Hall electromotive force synchronized with this, and this signal is demodulated by a demodulator 104 to provide a demodulation Hall electromotive force signal. The ΔΣ modulation is applied by the ΔΣ modulator 110 to this demodulation Hall electromotive force signal. In a timing control circuit 150, the timing of changing operation in the switch circuit 104 and the timing of demodulation operation in the demodulator 104 are set as the timing randomized with time. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a Hall electromotive force signal detection apparatus that receives an output signal from a Hall element that can switch the direction of a bias current and obtains a detection output having a value corresponding to a rotational angular displacement from a reference position in a magnetic field.

  As a device for measuring the rotation angle of a rotating shaft of a motor or a rotating body in a servo mechanism, there is a system that detects the rotation angle in a non-contact manner using a magnet and a Hall element. This is because a change in Hall electromotive force generated in the Hall element is detected by applying a quantization process (AD conversion) using a ΔΣ modulator by a magnetic field generated by a magnet that is displaced in synchronization with the rotational displacement of the rotating body. Based on the detected value, the rotation angle of the magnet (and hence the rotating body) is obtained (for example, see Non-Patent Document 1).

As described above, the ΔΣ modulator is used for AD conversion because a high SNR can be expected when the frequency band is limited to a narrow band.
When detecting the Hall electromotive force generated in the Hall element, a method of using an alternating current as a Hall element bias for the Hall element having four terminals is employed in order to cancel a unique offset for each Hall element. (For example, refer nonpatent literature 2).

When the Hall electromotive force detected by canceling the offset by the method using the alternating current as described above is input to the ΔΣ modulator and is quantized (AD conversion), it is as low as possible as long as the required performance regarding SNR permits. There is a demand to simplify the circuit by using the following ΔΣ modulator and to reduce the cost when making an IC.
However, it is known that a low-order ΔΣ modulator such as a primary or secondary has a problem that periodic noise called pattern noise is likely to occur when a DC signal is input (for example, Non-Patent Document 3).

  On the other hand, the present applicant switches the driving direction of the Hall element between the vertical direction and the horizontal direction by a random binary signal, modulates the Hall electromotive force signal randomly, and spreads the spectrum in a wide band including the DC band. There has already been proposed a technique that spreads and demodulates the spread signal to cancel the offset of the Hall element and effectively remove various noises mixed in the signal (see Patent Document 1). .

JP 2008-286695 A

ADS1208 data sheet from Texas Instruments (2nd-Order Delta-Sigma Modulator with Excitation for Hall Elements) Published by R S Popovic, Hall Effect Devices (ISBN-10: 0750300965) Inst of Physics Pub Inc (1991/05) Northworthy, Shreier, Temes Delta-Sigma Data Converters (ISBN 0-7803-1045-4) published by Wiley-Interscience (1996)

  However, the technique proposed in Patent Document 1 proposes a technique for removing disturbance noise such as Hall element offset and switching noise in a Hall element motor, but a ΔΣ modulator is used for Hall electromotive force detection processing. It is not assumed to be used. Accordingly, no other viewpoint is directed to countermeasures against pattern noise as pointed out in Non-Patent Document 3, which is particularly problematic when a low-order ΔΣ modulator is used.

Non-Patent Document 1 discloses that a ΔΣ modulator is applied to a device that detects a rotation angle in a non-contact manner using a magnet and a Hall element. No mention is made of measures.
On the other hand, Non-Patent Document 2 discloses in detail the phenomenon related to the configuration of the Hall element and its behavior, but does not disclose the application of the ΔΣ modulator.
Non-Patent Document 3 describes the ΔΣ modulator in detail, but there is no particular discussion about an application example in which the ΔΣ modulator is applied to a means for detecting the Hall electromotive force.

Next, a description will be given of a conventional technique related to detection of the hall electromotive force with reference to the drawings.
FIG. 5 is a functional block diagram showing a configuration of a conventional Hall electromotive force signal detection apparatus to which a ΔΣ modulator is applied.
In the Hall element 501 having four pairs of four terminals that can be used for supplying a bias current (that is, driving current) and detecting the Hall electromotive force, the direction of the current is changed over time by the switch circuit 503 from the bias current source 502. The bias current is supplied so as to be switched.
A demodulator 504 is provided at the subsequent stage of the switch circuit 503, and a circuit unit constituting the ΔΣ modulator 510 is connected to the subsequent stage of the demodulator 504.

The ΔΣ modulator 510 includes an adder 511 at its input, an integrator 512 at the subsequent stage, a comparator 513 at the subsequent stage, and a 1-bit DA converter inserted in a feedback path from the comparator 513 to the adder 511. 514.
A low-pass filter 520 is connected to the output side of the comparator 513, and the detected Hall electromotive force is output through the low-pass filter 520.
On the other hand, the modulation clock from the modulation clock generator 530 is supplied to the switch circuit 503 and the demodulator 504, and the switch circuit 503 and the demodulator 504 operate in synchronization with the modulation clock.

FIG. 6 is a diagram for explaining a phenomenon related to the Hall element driving method and the generation of Hall electromotive force and offset as shown in FIG.
FIG. 6A is a diagram illustrating a state in which a Hall electromotive force is generated when a bias current is supplied to the Hall element in a certain reference direction (the angle between the current direction and the reference direction is 0 degree). FIG. 5B is a diagram illustrating a state in which a Hall electromotive force is generated when a bias current is supplied to the Hall element in a direction that forms an angle of 90 degrees with the reference direction.

In FIG. 6, the Hall element is modeled as a four-terminal element composed of four resistors. It is assumed that this Hall element is driven with a constant current by switching the direction of 0 degrees in FIG. 6A and the direction of 90 degrees in FIG.
When the voltage signal detected in the state of FIG. 6 (A) is V_Sig_0deg and the voltage signal detected in the state of FIG. 6 (B) is V_Sig_90deg, these voltage signals are expressed as It is expressed as the sum of Hall electromotive force signal V_Hall and offset V_Offset.

  Here, as shown in the following equation (2), the direction of the bias current of the Hall element is switched between the direction of 0 degrees in FIG. 6A and the direction of 90 degrees in FIG. The Hall electromotive force signal V_Hall can be modulated by the modulation clock.

  On the other hand, the offset V_Offset has a substantially constant value even if the direction of the bias current of the Hall element is switched between the 0 degree direction and the 90 degree direction as shown in the equation (3).

  With the above-described action, the operation of switching the direction of the bias current of the Hall element between the direction of 0 degrees in FIG. 6A and the direction of 90 degrees in FIG. 6B is performed with the period T_Mod (frequency f_Mod = 1 / T_Mod). When it is repeated, the signal output from the Hall element (that is, the modulated Hall electromotive force signal that is the output of the switch circuit) V_Sig_Mod becomes the Hall electromotive force signal (that is, the demodulated Hall electromotive force signal) V_Hall modulated by the modulation clock. The offset V_Offset is superimposed.

FIG. 7 is a signal waveform diagram of each part in the apparatus of FIG.
7 illustrates a period of two periods of the modulation clock period T_Mod, FIG. 7A is a signal waveform diagram of the modulation clock, FIG. 7B is a direction of a bias current, and FIG. 7C is a ΔΣ modulator. 7D is a signal waveform diagram of the sampling clock, FIG. 7D is a signal waveform diagram of the output signal of the Hall element (that is, the modulated Hall electromotive force signal that is the output of the switch circuit) V_Sig_Mod, and FIG. (Ie, demodulated demodulated Hall electromotive force signal) V_Sig_Dmod signal waveform diagram.

The modulated Hall electromotive force signal V_Sig_Mod described above exhibits a signal waveform that repeats with a time period T_Mod as shown in FIG.
In the apparatus of FIG. 1, the signal V_Sig_Mod is input to the demodulator 504, demodulated by the modulation clock of FIG. 7A that switches the direction of the bias current of the Hall element, and the signal V_Sig_Dmod shown in FIG. It becomes.
Demodulation processing in the demodulator 504 is an operation of changing the sign of the signal V_Sig_Mod in FIG. 7D according to the phase of the modulation clock in FIG. 7A, as shown in the following equation (4).

In this signal V_Sig_Dmod, the Hall electromotive force signal component V_Hall is demodulated to DC, while the offset component V_Offset is modulated by a modulation clock.
In FIG. 5, a preamplifier for amplifying the signal V_Sig_Mod is omitted, but a configuration in which a preamplifier is provided between the switch circuit 503 and the demodulator 504 in FIG.
In FIG. 6, the explanation has been made assuming that the direction of the bias current of the Hall element is switched between 0 degree and 90 degrees. However, the mode of switching is not limited to this, and the Hall electromotive force signal V_Sig_Mod of the Hall element may be modulated by the modulation clock. For example, the Hall element has an angular opening of 180 degrees or 270 degrees. The direction of the bias current can be switched to detect the Hall electromotive force.

FIG. 8 is a diagram illustrating frequency spectra of the modulated Hall electromotive force signal V_Sig_Mod and the demodulated Hall electromotive force signal V_Sig_Dmod in the apparatus of FIG.
FIG. 8A shows the frequency spectrum of the signal V_Sig_Mod, and FIG. 8B shows the frequency spectrum of the signal V_Sig_Dmod.
In the signal V_Sig_Mod in FIG. 8A, the Hall electromotive force signal is modulated to the modulation frequency f_Mod, and an offset V_Offset that is a DC signal is superimposed.
The signal V_Sig_Dmod in FIG. 8B is the output of the demodulator 504 in FIG. 5, and the Hall electromotive force signal V_Hall is demodulated to DC, while the offset V_Offset is modulated to the modulation frequency f_Mod.

  When the signal V_Sig_Dmod as described with reference to FIG. 8 is passed through a low-pass filter having a cutoff frequency f_LPF to remove the component of the frequency f_Mod that is an offset component included in the signal V_Sig_Dmod, the offset of the Hall element is Can be canceled. This is disclosed, for example, in the above-mentioned Non-Patent Document 2 as a “Connection commutation method”, and is widely implemented as a signal processing technique for Hall elements.

In the frequency spectrum diagram of FIG. 8, the sampling frequency f_SAMP of the sampling clock of the ΔΣ modulator is sufficiently higher than the modulation frequency f_Mod, so that noise aliasing does not occur.
When the signal V_Sig_Dmod having the frequency spectrum of FIG. 8 is input to the ΔΣ modulator, the signal input to the ΔΣ modulator includes an offset signal modulated at the modulation frequency f_Mod.

  For this reason, pattern noise is less generated than when a DC signal is input to a low-order ΔΣ modulator, but pattern noise at a frequency higher than the modulation frequency f_Mod may be generated. Most of the pattern noise at a frequency higher than the modulation frequency f_Mod is removed by the low-pass filter arranged after the ΔΣ modulator, so there is no problem in the output signal V_Det of the low-pass filter. The part is demodulated by the modulation frequency f_Mod in the ΔΣ modulator.

FIG. 9 is a frequency spectrum diagram showing a state of frequency shift that occurs for the output signal V_Sig_Dmod of the demodulator 504.
As shown in FIG. 9, in the ΔΣ modulator, a part of pattern noise demodulated by the modulation frequency f_Mod appears with a frequency shift in a low frequency region which is a pass band of the low pass filter. Due to this frequency shift, the pattern noise cannot be removed by the low-pass filter disposed at the subsequent stage of the ΔΣ modulator, which causes the SNR of the detected Hall electromotive force signal V_Det to be reduced.

As described above, the pattern noise generated in the high frequency region is shifted to the low frequency side due to being demodulated by the modulation frequency f_Mod, and enters the pass band of the low-pass filter, so that the Hall electromotive force signal V_Det is detected. The SNR at decreases. None of the above-mentioned documents is particularly directed to such a problem, and of course, no way to deal with this problem is disclosed or suggested.
The present invention has been made in view of the above situation, and a Hall electromotive force signal detection device capable of effectively suppressing pattern noise generated in a ΔΣ modulator applied to detection of a Hall electromotive force signal by a Hall element. The purpose is to provide.

In order to achieve the above object, the following technologies are proposed.
(1) A bias current is supplied by switching the direction over time, and a Hall current having a plurality of pairs of connection ends that enables detection of Hall electromotive force is simultaneously supplied to detect a Hall electromotive force from the Hall element. Hall electromotive force signal detecting device,
The bias current source that generates the bias current and the connection relationship between the bias current source and the plurality of pairs of connection ends of the Hall element are switched and supplied so that the direction of the bias current in the Hall element is switched over time. A switch circuit that outputs a modulated Hall electromotive force signal in which the Hall electromotive force of the Hall element is modulated by switching the polarity in synchronization with the switching of the connection relationship, and demodulates and demodulates the modulated Hall electromotive force signal The demodulator that obtains the Hall electromotive force signal, the ΔΣ modulator that applies ΔΣ modulation to the demodulated Hall electromotive force signal, the timing of the switching operation of the connection relationship in the switch circuit, and the timing of the demodulation operation in the demodulator over time A timing control signal having a randomized timing is generated and supplied to the switch circuit and the demodulator Hall electromotive force signal detecting apparatus characterized by comprising: a timing control circuit.

  In the Hall electromotive force signal detection device of the above (1), a bias current is supplied to a Hall element having a plurality of pairs of connection ends that are supplied by switching the direction with time and simultaneously enable detection of the Hall electromotive force. The Hall electromotive force from the Hall element is detected. Then, a bias current is generated by the bias current source. In addition, the switching circuit supplies the switching relationship between the bias current source and a plurality of pairs of connection ends of the Hall element so that the direction of the bias current in the Hall element is switched over time. The polarity is switched in synchronization with the switching, and a modulated Hall electromotive force signal in which the Hall electromotive force of the Hall element is modulated is output.

  Further, the demodulator demodulates the modulated Hall electromotive force signal to obtain a demodulated Hall electromotive force signal. The ΔΣ modulator applies ΔΣ modulation to the demodulated Hall electromotive force signal. Then, the timing control circuit generates a timing control signal having the timing of the switching operation of the connection relationship in the switch circuit and the timing of the demodulation operation in the demodulator randomized over time, and generates the timing control signal. Supply to the vessel.

(2) The Hall electromotive force signal detection device according to (1), wherein the timing control circuit generates the timing control signal whose frequency is randomly switched over time and supplies the timing control signal to the switch circuit and the demodulator. .
In the Hall electromotive force signal detection device according to (2), particularly in the Hall electromotive force signal detection device according to (1), the timing control circuit generates the timing control signal whose frequency is randomly switched over time to generate the timing control signal. Supply to switch circuit and demodulator.

(3) The Hall electromotive force signal detection device according to (1), wherein the timing control circuit generates the timing control signal whose phase is randomly switched over time and supplies the timing control signal to the switch circuit and the demodulator. .
In the Hall electromotive force signal detection device of (3) above, particularly in the Hall electromotive force signal detection device of (1), the timing control circuit generates the timing control signal whose phase is randomly switched over time, and Supply to switch circuit and demodulator.

  (4) The timing control circuit includes a PN code generator that generates a pseudo-random code, and a plurality of types of frequency signals that are randomly switched over time by a pseudo-random code output from the PN code generator. The Hall electromotive force signal detection device according to (1), further comprising a modulation clock frequency selection circuit that generates and outputs the timing control signal that is randomly switched over time.

  In the Hall electromotive force signal detection device of (4), particularly in the Hall electromotive force signal detection device of (1), the timing control circuit includes a PN code generator and a modulation clock frequency selection circuit. Then, the PN code generator generates a pseudo random code. In addition, the modulation clock frequency selection circuit is configured to switch the timing control signal in which a frequency is randomly switched over time by switching a plurality of types of frequency signals randomly over time using a pseudo-random code output from the PN code generator. Generate and output.

(5) The timing control circuit generates a clock signal having a constant frequency and phase, and performs pseudo-randomization on the output of the modulation clock generator so that the phase is randomly switched over time. The Hall electromotive force signal detection device according to (1), further comprising a PN code generator that generates and outputs the timing control signal.
In the Hall electromotive force signal detection device of (5) above, the Hall electromotive force signal detection device of (1) is particularly provided with a modulation clock generator and a PN code generator. The modulation clock generator generates a clock signal having a constant frequency and phase. The PN code generator performs pseudo-randomization on the output of the modulation clock generator to generate and output the timing control signal whose phase is randomly switched over time.

  It is possible to realize a Hall electromotive force signal detection device capable of effectively suppressing pattern noise generated in a ΔΣ modulator applied to detection of a Hall electromotive force signal by a Hall element.

It is a functional block diagram showing the Hall electromotive force signal detection apparatus which is one embodiment of this invention. It is a signal waveform diagram of each part in the Hall electromotive force signal detection apparatus of FIG. It is a figure showing the frequency spectrum of the signal output from the modulated Hall electromotive force signal in FIG. 1 (FIG. 4) and a demodulator. It is a timing chart of each signal relevant to the 3rd chopper switch in the Hall electromotive force signal detection apparatus of FIG. It is a functional block diagram showing the structure of the conventional Hall electromotive force signal detection apparatus to which a delta-sigma modulator is applied. It is a figure for demonstrating the phenomenon regarding the drive method of a Hall element in FIG. 5, and generation | occurrence | production of Hall electromotive force and an offset. It is a signal waveform diagram of each part in the apparatus of FIG. FIG. 6 is a frequency spectrum diagram of a modulated Hall electromotive force signal and a signal output from a demodulator in the apparatus of FIG. 5. It is a frequency spectrum figure which shows the mode of the frequency shift which generate | occur | produces about the output signal of the demodulator in the apparatus of FIG.

Hereinafter, the present invention will be clarified by describing embodiments of the present invention in detail with reference to the drawings.
FIG. 1 is a functional block diagram showing a Hall electromotive force signal detection apparatus according to an embodiment of the present invention.
The Hall element 101 which is a target for using the Hall electromotive force signal detection device has a plurality of pairs of connection ends that are supplied with a bias current being switched over time and simultaneously detect Hall electromotive force.
More specifically, the Hall element 101 has four pairs of four terminals that can be used for supplying a bias current and detecting Hall electromotive force. The Hall element 101 is configured to be supplied with a bias current from the bias current source 102 so that the direction of the current is switched over time by the switch circuit 103.

  That is, the switch circuit 103 has a plurality of pairs of connection ends of the bias current source 102 and the Hall element 101 so that the direction of the bias current in the Hall element 101 is changed over time (in this example, four terminals in the above-mentioned two pairs). The bias current is supplied in such a manner that the direction of the current is switched by switching the connection relationship with (). Further, the switch circuit 103 outputs a modulated Hall electromotive force signal in which the Hall electromotive force of the Hall element 101 is modulated by switching the polarity in synchronization with the switching of the connection relationship as well as the switching of the bias current direction. .

A demodulator 104 that demodulates the modulated Hall electromotive force signal to obtain a demodulated Hall electromotive force signal is provided at the subsequent stage of the switch circuit 103, and ΔΣ modulation is applied to the demodulated Hall electromotive force signal at the subsequent stage of the demodulator 104. The circuit part which comprises the container 110 is connected.
The ΔΣ modulator 110 includes an adder 111 at its input, an integrator 112 provided after the adder 111, a comparator 113 provided at the integrator 112, and feedback from the comparator 113 to the adder 111. A 1-bit DA converter 114 interposed in the path is included.
A low-pass filter 120 is connected to the output side of the comparator 113, and the detected Hall electromotive force is output through the low-pass filter 120.

On the other hand, the modulation clock from the modulation clock frequency selection circuit 130 is supplied to the switch circuit 103 and the demodulator 104. This modulation clock is a timing control signal that makes the timing of the switching operation (switching operation of the direction of the bias current) of the connection relationship in the switch circuit 103 and the timing of the demodulation operation in the demodulator 104 randomized with time. .
That is, the switch circuit 103 and the demodulator 104 operate in synchronization with the modulation clock that is the timing control signal.
In the embodiment of FIG. 1, the timing control signal (modulation clock) described above is generated by a timing control circuit 150 that includes a modulation clock frequency selection circuit 130 and a PN code generator 140.

The modulation clock frequency selection circuit 130 receives the PN code from the PN code generator 140 and switches the clock signal having a different frequency from the system clock MCLK supplied from the outside so as to output the clock signal with the passage of time. A modulation clock is generated as a timing control signal that is switched at random.
The PN code generator 140 includes a simple configuration including, for example, a signal transfer unit (shift register or the like) composed of four-stage cells (delay elements) for obtaining an M-sequence code of length 16 and one adder. Is applied to generate a binary PN code (pseudo-random code) that takes a value of 0 or 1 for each unit period of the modulation clock.

As described above, the PN code output from the PN code generator 140 is input to the modulation clock frequency selection circuit 130. The modulation clock frequency selection circuit 130 can be easily used as, for example, a counter circuit that performs a counter operation with a system clock MCLK having a frequency higher than the modulation clock frequency (a counter operation for generating a modulation clock by dividing the system clock MCLK). Can be realized.
The modulation clock frequency selection circuit 130 operates to select the modulation clock frequency from two different frequencies f_Mod_1 and f_Mod_2 according to the PN code output from the PN code generator 140.

この場合、f_Mod_1に対応するクロック周期をT_Mod_1 ＝ 1／f_Mod_1、f_Mod_2に対応するクロック周期をT_Mod_2 ＝ 1／f_Mod_2とすると、ＰＮ符号の値が０と１のときの変調クロックをはじめとした信号は、図２に示すような信号波形を呈する。
図２は、図１の装置における各部の信号波形図である。
図２では、変調クロック周期T_Modの２周期の期間について図示され、この２周期のうち、先行する第１周期はＰＮ符号の値が０である期間に対応し、後続する第２周期はＰＮ符号の値が１である期間に対応している。

In this case, assuming that the clock period corresponding to f_Mod_1 is T_Mod_1 = 1 / f_Mod_1 and the clock period corresponding to f_Mod_2 is T_Mod_2 = 1 / f_Mod_2, the signals including the modulation clock when the PN code value is 0 and 1 are The signal waveform as shown in FIG. 2 is exhibited.
FIG. 2 is a signal waveform diagram of each part in the apparatus of FIG.
In FIG. 2, two periods of the modulation clock period T_Mod are illustrated. Of these two periods, the preceding first period corresponds to a period in which the value of the PN code is 0, and the subsequent second period is the PN code. Corresponds to a period in which the value of 1 is 1.

2A is a signal waveform diagram of the modulation clock, FIG. 2B is the direction of the bias current, FIG. 2C is a signal waveform diagram of the sampling clock of the ΔΣ modulator, and FIG. FIG. 2E is a signal waveform diagram of an output signal (modulated Hall electromotive force signal that is an output of the switch circuit) V_Sig_Mod, and FIG. 2E is a signal waveform diagram of an output (demodulated Hall electromotive force signal) V_Sig_Dmod of the demodulator.
FIG. 2 which is a signal waveform diagram in the apparatus as an embodiment of the present invention in FIG. 1 is a first period and two periods in comparison with FIG. 7 which is a signal waveform diagram in the conventional apparatus in FIG. When attention is paid to the period of the modulation clock, the difference between the two is remarkable.

That is, since the modulation clock output from the modulation clock frequency selection circuit 130 randomly selects a frequency from the two frequencies f_Mod_1 and f_Mod_2, a so-called frequency hopping operation is performed between the two frequencies f_Mod_1 and f_Mod_2. Yes. As a result, the frequency spectrum of the signal V_Sig_Mod is the Hall electromotive force signal spread spectrum between the two frequencies f_Mod_1 and f_Mod_2.
Further, the signal V_Sig_Dmod is obtained by demodulating the spectrum-spread signal V_Sig_Dmod by the demodulator.

FIG. 3 is a diagram illustrating the frequency spectrum of the modulated Hall electromotive force signal V_Sig_Mod and the signal V_Sig_Dmod output from the demodulator in FIG.
As will be described later, the frequency spectrum of the modulated Hall electromotive force signal V_Sig_Mod and the signal V_Sig_Dmod output from the demodulator in FIG. 4 is the same as in FIG.
3A is a diagram illustrating the frequency spectrum of the modulated Hall electromotive force signal V_Sig_Mod, and FIG. 3B is a diagram illustrating the frequency spectrum of the demodulated Hall electromotive force signal V_Sig_Dmod.

As can be easily understood by comparing FIG. 3 showing the frequency spectrum of the signal in the apparatus of the present invention with FIG. 8 showing the frequency spectrum in the above-described conventional example, in the present invention, the signal input to the ΔΣ modulator. V_Sig_Dmod is randomized compared to the prior art.
In order to suppress the occurrence of pattern noise in the ΔΣ modulator and achieve a high SNR, it is desirable to randomize the input signal to the ΔΣ modulator (see, for example, Non-Patent Document 3).

As described above, in the embodiment of the present invention shown in FIG. 1, the offset of the Hall element is randomly modulated by randomly modulating the frequency of the modulation clock that is the timing control signal for switching the direction of the bias current of the Hall element. Therefore, when the Hall electromotive force signal is detected using the ΔΣ modulator, it is possible to suppress the generation of pattern noise in the ΔΣ modulator.
That is, in the embodiment of the present invention, the Hall electromotive force signal can be detected at a high SNR by using a low-order ΔΣ modulator circuit, in which pattern noise is likely to be a problem. A non-contact sensor can be manufactured at low cost.

FIG. 4 is a functional block diagram showing a Hall electromotive force signal detection apparatus according to another embodiment of the present invention.
A Hall element 101 having two pairs of four terminals that can be used for supply of bias current and detection of Hall electromotive force is biased so that the direction of current is switched over time by the switch circuit 103 from the bias current source 102. An electric current is supplied.
A demodulator 104 is provided at the subsequent stage of the switch circuit 103, and a circuit unit constituting the ΔΣ modulator 110 is connected at the subsequent stage of the demodulator 104.

The ΔΣ modulator 110 includes an adder 111 at its input, an integrator 112 provided after the adder 111, a comparator 113 provided at the integrator 112, and feedback from the comparator 113 to the adder 111. A 1-bit DA converter 114 interposed in the path is included.
A low-pass filter 120 is connected to the output side of the comparator 113, and the detected Hall electromotive force is output through the low-pass filter 120.

The above points are the same as those of the embodiment of FIG. 1, the same reference numerals are given to the corresponding parts with FIG. 1, and the description of FIG.
On the other hand, the switch circuit 103 and the demodulator 104 are supplied with a binary PN code (pseudorandom code) as a timing control signal that takes a value of 0 or 1 from the PN code generator 140. The switch circuit 103 and the demodulator 104 operate in synchronization with the PN code that is the timing control signal.

The PN code generator 140 performs pseudo-randomization on the output of the modulation clock generator 430 to generate and output a timing control signal whose phase is randomly switched over time.
The PN code generator 140 includes a simple configuration including, for example, a signal transfer unit (shift register or the like) composed of four-stage cells (delay elements) for obtaining an M-sequence code of length 16 and one adder. Can be applied. Then, a binary PN code (pseudo random code) having a value of 0 or 1 is generated for each unit period of the modulation clock having the frequency f_Mod supplied from the modulation clock frequency selection circuit 430.
This PN code has a form in which a sequence of 16 lengths of 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 0, 1, 0 is repeated.

The illustrated example uses a PN code generator 140 that can be realized by a simple circuit such as a 4-bit shift register and an adder for convenience of explanation, but a PN code sequence having a longer period is used as the PN code generator. If what is generated is used, higher randomness can be obtained in the PN code generated from the PN code generator.
In accordance with the value of the PN code output from the PN code generator 140, the switch circuit 103 controls the direction of the bias current of the Hall element 101, and the demodulator 104 inverts the modulated Hall electromotive force signal V_Sig_Mod. Is controlled. The operations of the switch circuit and the demodulator are summarized in Table 2 below.

  Therefore, the bias of the Hall element is applied to a PN code that repeats a sequence of 16 lengths of 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 0, 1, 0. The changes in the direction of current over time are summarized in Table 3 below.

That is, the temporal change in the direction of the bias current of the Hall element is random.
As described above, in the embodiment of FIG. 4, since the direction of the bias current for driving the Hall element is randomly switched by the PN code as the timing control signal, the Hall in the modulated Hall electromotive force signal V_Sig_Mod is changed. The electromotive force signal component undergoes spread spectrum.
As a result, the signal spectrum of the modulated Hall electromotive force signal V_Sig_Mod and the signal spectrum of the demodulated Hall electromotive force signal V_Sig_Dmod in the embodiment of FIG. 4 are different from those in the conventional example of FIG. .

The demodulated Hall electromotive force signal V_Sig_Dmod is obtained by demodulating the modulated Hall electromotive force signal V_Sig_Dmod thus spread in the spectrum. As shown in FIG. 3 and FIG. In the embodiment of FIG. 4, the demodulated Hall electromotive force signal V_Sig_Dmod input to the ΔΣ modulator is randomized as compared with the conventional technique.
As described above, in order to suppress the occurrence of pattern noise in the ΔΣ modulator and achieve a high SNR, it is desirable to randomize the input signal to the ΔΣ modulator.

In the embodiment of FIG. 4, the offset of the Hall element can be modulated at random by modulating the phase of the modulation clock as a timing control signal for switching the direction of the bias current of the Hall element. Therefore, when the Hall electromotive force signal is detected using the ΔΣ modulator, the generation of pattern noise in the ΔΣ modulator can be effectively suppressed.
In the embodiment of FIG. 4, the Hall electromotive force signal can be detected at a high SNR by using a low-order ΔΣ modulator circuit, in which pattern noise is generally problematic. A non-contact sensor can be manufactured at low cost.

101, 501, ... Hall elements 102, 502, ... Bias current sources 103, 503, ..., ... Switch circuits 104, 504, ..., demodulator 110 , 510..., .DELTA..SIGMA. Modulators 111 and 511..., Adders 112 and 512. 1-bit DA converters 120, 520 Low-pass filter 130 Modulation clock frequency selection circuit 140 ......... PN code generators 430, 530 ............... Modulation clock generator

Claims (5)

A bias current is supplied by switching the direction over time, and simultaneously, a Hall current having a plurality of pairs of connection ends that enables detection of the Hall electromotive force is supplied to the Hall element to detect the Hall electromotive force from the Hall element. A power signal detection device comprising:
The bias current source that generates the bias current and the connection relationship between the bias current source and the plurality of pairs of connection ends of the Hall element are switched and supplied so that the direction of the bias current in the Hall element is switched over time. A switch circuit that outputs a modulated Hall electromotive force signal in which the Hall electromotive force of the Hall element is modulated by switching the polarity in synchronization with the switching of the connection relationship, and demodulates and demodulates the modulated Hall electromotive force signal The demodulator that obtains the Hall electromotive force signal, the ΔΣ modulator that applies ΔΣ modulation to the demodulated Hall electromotive force signal, the timing of the switching operation of the connection relationship in the switch circuit, and the timing of the demodulation operation in the demodulator over time A timing control signal having a randomized timing is generated and supplied to the switch circuit and the demodulator Hall electromotive force signal detecting apparatus characterized by comprising: a timing control circuit.   2. The Hall electromotive force signal detection device according to claim 1, wherein the timing control circuit generates the timing control signal whose frequency is randomly switched over time and supplies the timing control signal to the switch circuit and the demodulator.   2. The Hall electromotive force signal detection device according to claim 1, wherein the timing control circuit generates the timing control signal whose phase is randomly switched over time and supplies the timing control signal to the switch circuit and the demodulator.   The timing control circuit includes a PN code generator that generates a pseudo-random code, and a pseudo-random code output from the PN code generator that randomly switches a plurality of types of frequency signals over time to change the frequency over time. The Hall electromotive force signal detection device according to claim 1, further comprising a modulation clock frequency selection circuit that generates and outputs the timing control signal that is randomly switched.   The timing control circuit includes: a modulation clock generator that generates a clock signal having a constant frequency and phase; and the timing control that performs pseudo-randomization on the output of the modulation clock generator to randomly switch the phase over time. The Hall electromotive force signal detection device according to claim 1, further comprising a PN code generator that generates and outputs a signal.

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