JP2011107086A - Capacitance detection circuit, pressure detector, acceleration detector and transducer for microphone - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a capacitance detection circuit which detects capacitance changes of a capacitance type sensor element, with the capacitance detection circuit being capable of accurately detecting even continuous and minimal changes and is also configured to be small-sized and inexpensive. <P>SOLUTION: The capacitance detection circuit is configured to apply a drive voltage to the capacitance type sensor element 10 by using a sensor drive circuit 120; to convert the capacitance change of the sensor element into a voltage signal using a continuous-time type C-V converting circuit 110; to detect a signal component from the voltage signal obtained through conversion by using a synchronous detection circuit 130; and further smoothes an output signal of the synchronous detection circuit 130 by a smoothing circuit 140. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a capacitance detection circuit suitable for a physical quantity detection device that detects a physical quantity based on a change in capacitance, and a pressure detection device, an acceleration detection device, and a microphone using the capacitance detection circuit. It relates to a converter.

Conventionally, a capacitance type sensor that detects a physical quantity such as acceleration or pressure by converting it into a corresponding capacitance value (or change in the capacitance value) has been used.
In one example of such a capacitance type sensor, a carrier wave is applied to two variable capacitance elements as a physical quantity detection unit (sensor element), and a change in capacitance of the variable capacitance element is detected by a switched capacitor circuit. A detection output is obtained by converting the voltage value into a voltage value by the constructed CV conversion circuit.

That is, the output voltage signal having a phase difference of 180 degrees of the CV conversion circuit (in this case, the switched capacitor circuit) is sampled by the first and second sample and hold circuits, and the difference between these sampling results is differentially amplified. The circuit is configured to be extracted as an electrical signal (see, for example, Patent Document 1).
The capacitance type sensor disclosed in Patent Document 1 is configured so as to be able to eliminate the influence of the offset voltage and temperature drift of the control switching transistor, so that it is extremely stable without being affected by the ambient temperature. Thus, the capacity difference in the detection unit can be detected. That is, a highly reliable capacitance detection circuit is realized.

The capacitance detection circuit disclosed in Patent Document 1 will be described with reference to the drawings.
FIG. 13 is a block diagram showing a conventional capacitance detection circuit disclosed in Patent Document 1, and FIG. 14 is a signal waveform diagram of each part during operation of the capacitance detection circuit of FIG. 13A is an overall view of the capacitance detection circuit, and FIG. 13B is a circuit diagram showing a switched capacitor circuit constituting the CV conversion circuit in the circuit of FIG. 13A.
As shown in FIG. 13A, the capacitance detection circuit 1300 includes a logic unit 1310, a sensor driving unit 1320, a switched capacitor circuit 1330, sample hold circuits 1340 and 1350, and a differential amplifier circuit 1360. It is comprised and detects the electrostatic capacitance (change of the electrostatic capacitance) of the sensor element 10.

A clock of the logic unit 1310 is supplied to the sensor driving unit 1320. The sensor element 10 has a three-terminal configuration including terminals 11 and 12 at both ends of a series connection body of two capacitors Cs and Cr, and a terminal 13 at the connection middle point. The sensor drive unit 1320 is connected to the terminals 11 and 12 at both ends. Are applied with sensor drive signals φS and φR, and a signal is taken out from the terminal 13 at the midpoint of connection. The extracted signal is converted into a voltage value by a CV conversion circuit constituted by a switched capacitor circuit 1330.
The output of the switched capacitor circuit 1330 is supplied to each input of the sample hold circuits 1340 and 1350, where the output of the switched capacitor circuit 1330 is held at a predetermined timing.

As shown in FIG. 13B, the switched capacitor circuit 1330 constituting the CV conversion circuit is connected in parallel to the operational amplifier 1331, the capacitor 1332 constituting the feedback circuit of the operational amplifier 1331, and the capacitor 1332. The switching transistor 1333 is included.
Each output of the sample hold circuits 1340 and 1350 is supplied to an input of a differential amplifier circuit 1360, and a detection signal corresponding to a change in the capacitance of the sensor element 10 is output from the output terminal of the differential amplifier circuit 1360.

Next, the operation of the capacitance detection circuit of FIG. 13 will be described with reference to the timing chart of FIG.
At time t0, the switching transistor 1333 of the switched capacitor circuit 1330 is turned on only when the reset signal φG of the logic unit 1310 is “high”, and the capacitor 1332 (capacitance Cf) connected to the − terminal and the output terminal of the operational amplifier 1331. Discharge the charge.
The + input terminal of the operational amplifier 1331 is a reference voltage Vr. Therefore, the output Vscout ₀ of the switched capacitor circuit 1330 is Vscout ₀ = Vr.
Next, the reset signal φG becomes “low”, and the switching transistor 1333 of the switched capacitor circuit 1330 is turned off.

At this time, since the sensor drive signal φR of the sensor drive unit 1320 is “low” and the sensor drive signal φS is “high” (amplitude Vp), Qd ₀ = −Cs × is input to the switched capacitor circuit 1330. A charge of Vp + (Cs + Cr) × Vr is accumulated.
Next, at time t1, when the sensor drive signal φS is “low” and the sensor drive signal φR is “high”, the input of the switched capacitor circuit 1330 is
Qd ₁ = −Cr × Vp + (Cs + Cr) × Vr
Because the amount of charge will be accumulated,
Charge difference from time t0 Qo = Qd ₁ −Qd ₀ = (Cs−Cr) × Vp
Is the voltage value Vscout ₁ = −Qo / Cf = − (Cs−Cr) / Cf × Vp + Vr at the output of the switched capacitor circuit 1330.
Is output as

In response to this output, the sample hold circuit 1340 holds the voltage of Vscout _{1 at} the falling edge of the clock φS ₁ of the logic unit 1310.
Next, at time t2, similarly to the time t0, the reset signal φG is “high”, so that the switching transistor 1333 of the switched capacitor circuit 1330 is turned on, and the capacitor 1332 connected to the − terminal and the output terminal of the operational amplifier 1331. The charge of (capacitance Cf) is discharged.
The + input terminal of the operational amplifier 1331 is a reference voltage Vr. Therefore, the output of the switched capacitor circuit 1330 is Vscout ₂ = Vr.

Next, at time t3, the sensor drive signal φS is “high”, the sensor drive signal φR is “low”, and the phase is opposite to that at time t1, so that the voltage value Vscout ₃ = −Qo / Cf = (Cs−Cr) / Cf × Vp + Vr
Is output as
The sample hold circuit 1350 in FIG. 13A holds the voltage of Vscout _{3 at} the falling edge of the clock φS2 of the logic unit 1310.
On the other hand, the differential amplifier circuit 1360 performs subtraction processing on the voltage values output from the sample hold circuits 1340 and 1350 and outputs Vout = Vscout ₁ −Vscout ₃ = −2 (Cs−Cr) / Cf × Vp.
Get.

JP-A-8-145717

However, in the above-described conventional capacitance detection circuit, a voltage output proportional to the difference in sensor capacitance is detected only at the falling timing of the clocks φS1 and φS2 of the logic unit 1310. Presents a discrete stepped waveform.
In addition, it is impossible to detect all changes in the sensor capacitance in the sensor element 10 occurring in φS1 or φS2 due to the execution of the subtraction process for subtracting Vscout ₃ from Vscout ₁ . That is, there is a problem in that a highly accurate detection output cannot be obtained with respect to a continuous change in capacitance of the sensor element 10.

Further, if the capacity of the sensor is increased in order to detect a minute change in capacity, the sensor will be increased in size. Further, when a circuit for improving accuracy is further added, the cost is increased.
The present invention has been made in view of the above situation, and relates to a capacitance detection circuit suitable for a physical quantity detection device that detects a physical quantity based on a change in capacitance. In addition, this type of capacitance detection circuit that is small and inexpensive, and a pressure detection device, an acceleration detection device, and a microphone transducer that are configured by this capacitance detection circuit The purpose is to provide.

In order to achieve the above object, the following technologies are proposed.
(1) A capacitance detection circuit for detecting a change in capacitance of a capacitance type sensor element,
A sensor driving circuit for applying a driving voltage to the sensor element;
A continuous-time CV conversion circuit that converts a change in capacitance of the sensor element into a voltage signal;
A synchronous detection circuit for detecting a signal component from an output signal of the continuous-time CV conversion circuit;
A smoothing circuit for smoothing the output signal of the synchronous detection circuit;
A capacitance detection circuit comprising:
In the capacitance detection circuit of (1), the CV conversion circuit and the synchronous detection circuit operate so that a signal conversion operation capable of detecting a signal with little noise is performed.

(2) The capacitance detection circuit according to (1), wherein the synchronous detection circuit is configured to operate using a drive voltage, which is an output of the sensor drive circuit, as a reference signal.
The capacitance detection circuit of (2) above can use a waveform that is completely synchronized with the capacitance change, which is a physical quantity to be detected, as a reference signal, particularly in the capacitance detection circuit of (1). It acts so that the synchronous detection with a small amount of accuracy can be performed.
(3) The synchronous detection circuit is configured to operate using a signal obtained by binarizing a voltage signal, which is an output of the continuous-time CV conversion circuit, at a predetermined level as a reference signal. (1) The capacitance detection circuit.
The capacitance detection circuit of (3) is a signal representing a change in capacitance even when the drive signal from the sensor drive circuit cannot be used as a reference signal for the synchronous detection circuit, particularly in the capacitance detection circuit of (1). The reference signal can be generated from

(4) The capacitance detection circuit according to (1), wherein the sensor drive circuit outputs a rectangular wave voltage as the drive voltage.
The capacitance detection circuit of (4) uses a rectangular wave for the signal of the sensor drive circuit unit, particularly in the capacitance detection circuit of (1), so that the signal is also used as a reference signal for the synchronous detection circuit. Further, since the sensor can be driven by the signal of the power supply voltage, the ratiometric characteristic can be realized without any other special circuit.
(5) The capacitance detection circuit according to (1), wherein the sensor drive circuit outputs a triangular wave as the drive voltage.
The capacitance detection circuit of (5) uses a triangular wave for the signal of the sensor drive circuit section, particularly in the capacitance detection circuit of (1), so that EMC (Electro-Magnetic Compatibility) etc. When it is required to suppress the emission of electromagnetic waves from the viewpoint of the above, characteristics with high suitability can be obtained. Further, since the sensor can be driven by the signal of the power supply voltage, the ratiometric characteristic can be realized without any other special circuit.

(6) The capacitance detection circuit according to (1), wherein the sensor drive circuit outputs a sine wave as the drive voltage.
The electrostatic capacitance detection circuit of (6) uses a sine wave as a signal of the sensor drive circuit section, particularly in the electrostatic capacitance detection circuit of (1), and therefore suppresses the emission of electromagnetic waves from the viewpoint of EMC or the like. Acts to be highly compatible when required.
(7) The capacitance detection circuit according to (1), wherein the continuous-time CV conversion circuit includes a charge amplifier circuit.
In the capacitance detection circuit of (7), a charge amplifier circuit is used for the CV conversion circuit, particularly in the capacitance detection circuit of (1), so that it is possible to detect a continuous capacitance change. Become. Furthermore, when the characteristics of the synchronous detection circuit are combined, it is possible to detect a minute capacitance change and to realize characteristics with less noise.

(8) A pressure detection device comprising: the capacitance detection circuit according to any one of (1) to (7) above; and a pressure sensor as the capacitance type sensor element.
In the pressure detection device of (8) above, it is possible to realize a pressure detection characteristic with high detection output stability, wide usable temperature range, suitable for high temperature environment, and low sensitivity temperature dependency. Act on.
(9) An acceleration detection apparatus comprising: the capacitance detection circuit according to any one of (1) to (7) above; and an acceleration sensor as the capacitance type sensor element.
In the acceleration detection device of (9) above, the detection output is highly stable, the usable temperature range is wide, and it is suitable for high temperature environments, the sensitivity is less temperature dependent, and the acceleration is continuously accurate. It works so that it can be detected well.
(10) A microphone transformer comprising: the capacitance detection circuit according to any one of (1) to (7) above; and a sound pressure sensor as the capacitance type sensor element. Diisa.
The microphone transducer described in (10) operates so that highly sensitive sound detection is possible.

(11) A capacitance detection circuit for detecting a change in capacitance of a capacitance type sensor element,
A sensor driving circuit for applying a driving voltage to the sensor element;
A plurality of continuous-time CV conversion circuits configured to convert a change in capacitance of the sensor element into a voltage signal and connected to each other detection terminal of the sensor element;
An arithmetic circuit for performing subtraction or addition on the outputs of the plurality of continuous-time CV conversion circuits;
A synchronous detection circuit for detecting a signal component from the output signal of the arithmetic circuit;
A smoothing circuit for smoothing the output signal of the synchronous detection circuit;
A capacitance detection circuit comprising:
In the capacitance detection circuit of (11), the CV conversion circuit, the synchronous detection circuit, and the smoothing circuit are strong against the influence of external noise and power supply noise, and act to reduce the influence of the initial charge at the time of startup. .

(12) The capacitance detection circuit according to (11), wherein the synchronous detection circuit is configured to operate using a drive voltage, which is an output of the sensor drive circuit, as a reference signal.
The capacitance detection circuit of (12) can detect a detection error because, in the capacitance detection circuit of (11), a waveform that is completely synchronized with a change in capacitance that is a physical quantity to be detected can be used as a reference signal. It acts so that the synchronous detection with a small amount of accuracy can be performed.
(13) The synchronous detection circuit is configured to operate using a signal obtained by binarizing a voltage signal, which is an output of the continuous-time CV conversion circuit, at a predetermined level as a reference signal. (11) The capacitance detection circuit.
The capacitance detection circuit of (13) is a signal representing a change in capacitance even when the drive signal from the sensor drive circuit cannot be used as a reference signal for the synchronous detection circuit, particularly in the capacitance detection circuit of (11). The reference signal can be generated from

(14) The capacitance detection circuit according to (11), wherein the sensor drive circuit outputs a rectangular wave voltage as the drive voltage.
The capacitance detection circuit of (14) uses a rectangular wave as a signal of the sensor drive circuit unit, particularly in the capacitance detection circuit of (11), so that the signal is also used as a reference signal for the synchronous detection circuit. Further, since the sensor can be driven by the signal of the power supply voltage, the ratiometric characteristic can be realized without any other special circuit.
(15) The capacitance detection circuit according to (11), wherein the sensor drive circuit outputs a triangular wave as the drive voltage.
Since the capacitance detection circuit of (15) uses a triangular wave as a signal of the sensor drive circuit section in the capacitance detection circuit of (11), EMC (Electro-Magnetic Compatibility) etc. When it is required to suppress the emission of electromagnetic waves from the viewpoint of the above, characteristics with high suitability can be obtained. Further, since the sensor can be driven by the signal of the power supply voltage, the ratiometric characteristic can be realized without any other special circuit.

(16) The capacitance detection circuit according to (11), wherein the sensor drive circuit outputs a sine wave as the drive voltage.
The capacitance detection circuit of (16) uses a sine wave as a signal of the sensor drive circuit section, particularly in the capacitance detection circuit of (11), and therefore suppresses the emission of electromagnetic waves from the viewpoint of EMC or the like. Acts to be highly compatible when required.
(17) The capacitance detection circuit according to (11), wherein the continuous-time CV conversion circuit includes a charge amplifier circuit.
The capacitance detection circuit of the above (17) uses a charge amplifier circuit for the CV conversion circuit, particularly in the capacitance detection circuit of (11), so that it is possible to detect a continuous capacitance change. Become. Furthermore, when the characteristics of the synchronous detection circuit are combined, it is possible to detect a minute capacitance change and to realize characteristics with less noise.

(18) A pressure detection device comprising: the capacitance detection circuit according to any one of (11) to (17) above; and a pressure sensor as the capacitance type sensor element.
In the pressure detection device of the above (18), it is possible to realize a pressure detection characteristic with high detection output stability, wide usable temperature range, suitable for high temperature environment, and low sensitivity temperature dependency. Act on.
(19) An acceleration detection apparatus comprising: the capacitance detection circuit according to any one of (11) to (17) above; and an acceleration sensor as the capacitance type sensor element.
In the acceleration detection device of (19) above, the detection output has high stability, the usable temperature range is wide, and it is suitable for high temperature environments, the sensitivity is less temperature dependent, and the acceleration is continuously accurate. It works so that it can be detected well.

(20) A microphone transformer comprising: the capacitance detection circuit according to any one of (11) to (17) above; and a sound pressure sensor as the capacitance type sensor element. Diisa.
The microphone transducer (20) operates so as to enable highly sensitive sound detection.

  According to the present invention, it is possible to obtain a detection output as an analog signal with high accuracy even for a continuous and minute change in capacitance with respect to a change in physical quantity. Further, it is not necessary to use a special circuit for canceling fluctuations in detection characteristics due to switching noise and fluctuations in characteristics of elements constituting the switch, which have been a problem in a conventional CV conversion circuit using a switched capacitor circuit. For this reason, a circuit (device) capable of detecting a minute capacitance change with high accuracy can be realized at low cost.

It is a block diagram showing the electrostatic capacitance detection circuit as the 1st Embodiment of this invention. It is each signal waveform diagram of each part at the time of operation | movement of the electrostatic capacitance detection circuit of FIG. It is a circuit diagram which shows an example of the sensor drive circuit in the electrostatic capacitance detection circuit of FIG. It is a circuit diagram which shows an example of the synchronous detection circuit in the electrostatic capacitance detection circuit of FIG. It is a circuit diagram which shows an example of the smoothing circuit in the electrostatic capacitance detection circuit of FIG. It is a block diagram which illustrates the electrostatic capacitance detection circuit of the aspect which used the output signal of the CV conversion circuit for the reference signal of a synchronous detection circuit. It is a circuit diagram showing the structure of the synchronous detection circuit in the electrostatic capacitance detection circuit of FIG. It is a block diagram which illustrates the electrostatic capacitance detection circuit of the aspect which does not drive the reference capacitor of a sensor element. It is a block diagram which illustrates the aspect at the time of applying the sensor comprised only by the capacitor for a detection as a sensor in the electrostatic capacitance detection circuit of FIG. It is a block diagram of the electrostatic capacitance detection circuit in the 2nd Embodiment of this invention. It is each signal waveform figure at the time of operation | movement of 2nd Embodiment. It is a figure showing the relationship between the capacitance change and output voltage value in 1st Embodiment. It is a block diagram showing the structure of the conventional electrostatic capacitance detection circuit. It is each signal waveform diagram of each part at the time of operation | movement of the electrostatic capacitance detection circuit of FIG.

Hereinafter, the present invention will be clarified by describing embodiments of the present invention in detail with reference to the drawings.
(First embodiment)
FIG. 1 is a block diagram showing a capacitance detection circuit as a first embodiment of the present invention. 2 is a signal waveform diagram of each part during operation of the capacitance detection circuit of FIG.
In FIG. 1, a capacitance detection circuit 100 detects a capacitance (change in capacitance) of a capacitance type sensor element 10.
The sensor element 10 has a three-terminal configuration including terminals 11 and 12 at both ends of a serial connection body of a detection capacitor 1a (capacitance Cs) and a reference capacitor 1b (capacitance Cr) and a terminal 13 at a connection midpoint thereof.

On the other hand, the capacitance detection circuit 100 includes a continuous-time CV conversion circuit 110, a sensor drive circuit 120, a synchronous detection circuit 130, a smoothing circuit 140, and an inverter 150. The capacitance detection circuit 100 is provided with terminals 101, 102, and 103 connected to the three terminals 11, 12, and 13, respectively, of the sensor element 10 as shown in the figure. Yes.
The sensor drive signal φS, which is the output of the sensor drive circuit 120, is applied to the terminal 11 of the sensor element 10, and the sensor drive inversion signal φR obtained by inverting the output of the sensor drive circuit 120 by the inverter 150 is applied to the terminal 12. .

As illustrated, the terminal 11 is one terminal of the detection capacitor 1a (capacitance Cs), and the terminal 12 is one terminal of the reference capacitor 1b (capacitance Cr).
The terminal 13 of the sensor element 10 is supplied to the input terminal of the CV conversion circuit 110 as an input signal DS1 of the CV conversion circuit. Then, the output signal DS 2 is supplied from the CV conversion circuit 110 to the input terminal of the synchronous detection circuit 130.
A sensor drive signal φS is input to the synchronous detection circuit 130 as a reference signal, and a synchronous detection operation is performed using this signal φS.
The output signal DS3 of the synchronous detection circuit 130 is input to the smoothing circuit 140. The smoothing circuit 140 removes unnecessary high frequency components generated by the synchronous detection operation in the preceding synchronous detection circuit 130. As a result, a signal obtained by removing unnecessary high-frequency components from the capacitance change detection signal is obtained as the output signal DS4 of the smoothing circuit.

The sensor element 10 is a capacitive sensor processed by MEMS (Micro Electro Mechanical System micro processing technology).
As described above, the illustrated sensor element 10 is connected to the terminals 11 and 12 at both ends of a series connection body of two capacitors, the detection capacitor 1a (capacitance Cs) and the reference capacitor 1b (capacitance Cr). This is a three-terminal configuration with the terminal at point 13.
The capacitance value Cs of the detection capacitor 1a changes according to the detected physical quantity. On the other hand, the reference capacitor 1b has a capacitance Cr that does not depend on the detected physical quantity, or has a different manner of dependence. The sensor drive signal φS output from the sensor drive circuit 120 and the sensor drive inversion signal φR obtained by inverting the signal φS by the inverter 150 are applied to the terminals 11 and 12 at both ends of the series connection body of both capacitors. In the state, a signal corresponding to the physical quantity is extracted from the connection midpoint 13 of the serial connection body.

FIG. 3 is a circuit diagram showing a configuration example of the sensor drive circuit 120 in the capacitance detection circuit 100 of FIG. The sensor drive circuit 120 includes a current reference circuit 121 and a current control oscillator 125.
In the current reference circuit 121, an output signal of a known band gap reference circuit (not shown) is supplied to the input terminal 122, and a current that is inversely proportional to the resistance value of the resistor 123 flows to the P-type MOS transistor 124 by the supplied signal.
Since the output voltage of the well-controlled bandgap reference circuit is almost independent of the power supply voltage and temperature change, the current flowing through the P-type MOS transistor 124 is almost dependent only on the manufacturing variation of the resistance value of the resistor 123 and the temperature characteristics. Become.

The current controlled oscillator 125 charges the capacitor 127a and the capacitor 127b with the current flowing in the P-type MOS transistor 126a and the P-type MOS transistor 126b, which mirrors the current flowing in the P-type MOS transistor 124 of the current reference circuit 121, and generates a rectangular wave. This circuit generates a certain sensor drive signal φS. The sensor drive signal φS is output from the terminal 102 and supplied to the terminal 11 of the sensor element 10 as understood with reference to FIG.
When a triangular wave is used as the driving waveform of the sensor element 10, the triangular wave TW is used as the sensor driving signal φS.
On the other hand, the CV conversion circuit 110 in FIG. 1 has an aspect of a charge amplifier circuit configured to include an operational amplifier 111, a CV conversion capacitor 112 (capacitance Cf), and a bias resistor 113 (resistance Rf).

The charge ΔQ stored in the capacitance change ΔC of the detection capacitor 1a of the sensor element 10 is taken out as the voltage Vcvout = −ΔQ / Cf by the CV conversion capacitor 112 (capacitance Cf).
As can be easily understood from this equation, the CV conversion capacitor 112 (capacitance Cf) defines the gain of voltage detection, and the capacitance change amount of the sensor element 10 which is the target capacitance sensor. The gain can be selected flexibly. Therefore, according to the present embodiment, a wide range of sensor characteristics can be handled.
As an example, when detecting a capacitance change of 0.1 pF in the detection capacitor 1a of the sensor element 10 described above, when the CV conversion capacitor 112 terminal opposite to the input of the CV conversion circuit 110 is 0V, ΔQ = ΔC × VREF.

When Vcvout = −ΔQ / Cf = −0.1 p × VREF / Cf, VREF = 2.5 V, and Cf = 1 pF, the voltage value is Vcvout = 0.25 V, and the capacitance change of 0.1 pF is 0. It can be seen that it can be extracted as a voltage change amount of 25V.
On the other hand, the bias resistor 113 (resistor Rf) is provided so that the operating point of the input signal DS1 of the CV conversion circuit 110 is not saturated to VDD or VSS.
However, if the charge detected by the CV conversion capacitor 112 (capacitance Cf) moves through the bias resistor 113 (resistor Rf), the detection gain is reduced. Therefore, it is desirable that the bias resistor 113 (resistor Rf) has a sufficiently large value of several tens MΩ or more.

The bias resistor 113 (resistor Rf) and the CV conversion capacitor 112 (capacitance Cf) have a high-pass filter characteristic of fc = 1 / (2 × π × Rf × Cf) when viewed from the sensor element 10 side.
This time constant is τ = Rf × Cf. Therefore, the output signal DS2 of the CV conversion circuit 110 is Vcvout ×? It approaches VREF which is the voltage value of the non-inverting input terminal 114 of the operational amplifier with the characteristic of ^{-t / Rf} × ^Cf.
A sensor drive signal φS, which is an output signal of the sensor drive circuit 120, is a rectangular wave having a power supply voltage VDD “high” and a GND voltage “low” as shown in FIG. Further, the sensor drive inversion signal φR described above is a signal obtained by inverting the polarity of the signal φS as shown in the figure.

On the other hand, the output from the terminal 13 which is the midpoint of connection of the serially connected bodies of the capacitors 1a (capacitance Cs) and 1b (capacitance Cr) of the sensor element 10 is input to the input terminal DS1 of the CV conversion circuit 110. It is supplied as
Now, as an initial state, a state is assumed in which no charge is accumulated in the detection capacitor 1a (capacitance Cs) and the reference capacitor 1b (capacitance Cr). In this state, the detection capacitor 1a (capacitance Cs) and the reference capacitor 1b when the sensor drive signal φS is “high” (VDD) and the sensor drive inversion signal φR is “low” (0). The charge on the input end side of the CV conversion circuit 110 of (capacitance Cr) is calculated.

The charge of the reference capacitor 1b (capacitance Cr) is Qr ₀ = Cr × VREF, and the charge of the detection capacitor 1a (capacitance Cs) is Qs ₀ = −Cs × (VDD−VREF).
The charge on the input end side of the CV conversion circuit 110 is the sum of both, and is as follows.
Qr ₀ + Qs ₀ = −Cs × VDD + (Cr + Cs) × VREF
At this time, the output end side of the CV conversion circuit 110 of the CV conversion capacitor 112 (capacitance Cf) of the CV conversion circuit 110 has a charge amount of − (Qr ₀ + Qs ₀ ). The value Vcvout of the output signal DS2 of the circuit 110 is
Vcvout = − (Qr ₀ + Qs ₀ ) / Cf
= Cs / Cf * VDD- (Cr + Cs) / Cf * VREF
It becomes. The output signal DS2 of the CV conversion circuit 110 output by the electric charge stored in the CV conversion capacitor 112 (capacitance Cf) is a bias resistor 113 (resistance Rf) and the CV conversion capacitor 112 (capacitance Cf). Thus, the charge moves to the inverting input terminal side of the operational amplifier 111, so that the voltage value becomes the same as VREF that is the voltage value of the non-inverting input terminal 114 after a long time.

Next, the sensor drive signal φS changes from “high” (VDD) to “low” (0), and the sensor drive inversion signal φR changes from “low” (0) to “high” (VDD). The charge on the connection midpoint 13 side of the series connection body of the detection capacitor 1a (capacitance Cs) and the reference capacitor 1b (capacitance Cr) is calculated.
The charge of the reference capacitor 1b (capacitance Cr) is Qr ₁ = −Cr × (VDD−VREF), and the charge of the detection capacitor 1a (capacitance Cs) is Qs ₁ = Cs × VREF.
The charge on the connection midpoint 13 side of the series connection body is the sum of both, and is as follows.
Qr ₁ + Qs ₁ = −Cr × VDD + (Cr + Cs) × VREF

At this time, the output end side of the CV conversion circuit 110 of the CV conversion capacitor 112 (capacitance Cf) of the CV conversion circuit 110 has a charge amount of − (Qr ₁ + Qs ₁ ). If the charge amount that changes when transitioning from time t0 to t1 is ΔQ,
ΔQ = (Qr ₀ + Qs ₀ ) − (Qr ₁ + Qs ₁ ) = (Cr−Cs) × VDD
It becomes. Therefore, since the voltage of the output signal DS2 of the CV conversion circuit 110 changes by the changed amount of charge, Vcvout = −ΔQ / Cf = − [(Cr−Cs) / Cf] × VDD
It becomes.
The remaining charge of the difference in charge amount between the initial state and the state where the sensor drive signal φS is inverted is a DC voltage as an initial voltage fluctuation, and the DC voltage is generated at the output terminal of the CV conversion circuit 110. Filtering is performed with a high-pass filter characteristic of the bias resistor 113 (resistor Rf) and the CV conversion capacitor 112 (capacitance Cf) of the CV conversion circuit 110.
Next, at time t0, the detection capacitor 1a (capacitance Cs) and the reference capacitor 1b when the sensor drive signal φS is “high” (VDD) and the sensor drive inversion signal φR is “low” (0). The charge on the output end side of the CV conversion circuit 110 of (capacitance Cr) is calculated.

The charge of the reference capacitor 1b (capacitance Cr) is Qr ₀ = Cr × VREF, and the charge of the detection capacitor 1a (capacitance Cs) is Qs ₀ = −Cs × (VDD−VREF).
The charge on the input end side of the CV conversion circuit 110 is the sum of both, and is as follows.
Qr ₀ + Qs ₀ = −Cs × VDD + (Cr + Cs) × VREF
At this time, the charge on the output end side of the CV conversion circuit 110 of the CV conversion capacitor 112 (capacitance Cf) of the CV conversion circuit 110 becomes a charge amount of − (Qr ₀ + Qs ₀ ). If the amount of charge that changes when transitioning to time t0 is ΔQ,
ΔQ = (Qr ₋₁ + Qs ₋₁ ) − (Qr ₀ + Qs ₀ ) = − (Cr−Cs) × VDD
It becomes. Therefore, the value Vcvout of the output signal DS2 of the CV conversion circuit changes in voltage by the changed charge amount.
Vcvout = −ΔQ / Cf = [(Cr−Cs) / Cf] × VDD
It becomes.

At time t1, the sensor drive signal φS changes from “high” (VDD) to “low” (0), and the sensor drive inversion signal φR changes from “low” (0) to “high” (VDD). The charge on the input end side of the CV conversion circuit 110 of the detection capacitor 1a (capacitance Cs) and the reference capacitor 1b (capacitance Cr) is calculated.
The charge of the reference capacitor 1b (capacitance Cr) is Qr ₁ = −Cr × (VDD−VREF), and the charge of the detection capacitor 1a (capacitance Cs) is Qs ₁ = Cs × VREF.

The charge on the input end side of the CV conversion circuit 110 is the sum of both, and is as follows.
Qr ₁ + Qs ₁ = −Cr × VDD + (Cr + Cs) × VREF
At this time, the charge on the output end side of the CV conversion circuit 110 of the CV conversion capacitor 112 (capacitance Cf) of the CV conversion circuit 110 becomes a charge amount of − (Qr ₁ + Qs ₁ ).
If the charge amount that changes when transitioning from time t0 to t1 is ΔQ,
ΔQ = (Qr ₀ + Qs ₀ ) − (Qr ₁ + Qs ₁ ) = (Cr−Cs) × VDD
It becomes. Therefore, the value Vcvout of the output signal DS2 of the CV conversion circuit changes in voltage by the changed charge amount.
Vcvout = −ΔQ / Cf = − [(Cr−Cs) / Cf] × VDD
It becomes.

At time t2, the sensor drive signal φS changes from “low” (0) to “high” (VDD), and the sensor drive inversion signal φR changes from “high” (VDD) to “low” (0). The charge on the input end side of the CV conversion circuit 110 of the detection capacitor 1a (capacitance Cs) and the reference capacitor 1b (capacitance Cr) is calculated.
The charge of the reference capacitor 1b (capacitance Cr) is Qr ₂ = Cr × VREF, and the charge of the detection capacitor 1a (capacitance Cs) is Qs ₂ = −Cs × (VDD−VREF). The charge on the output end side of the CV conversion circuit 110 is the sum of both, and is as follows.
Qr ₂ + Qs ₂ = −Cr × VDD + (Cr + Cs) × VREF
At this time, the output end side of the CV conversion circuit 110 of the CV conversion capacitor 112 (capacitance Cf) of the CV conversion circuit 110 has a charge amount of − (Qr ₂ + Qs ₂ ).

If the charge amount that changes when transitioning from time t1 to t2 is ΔQ,
ΔQ = (Qr ₁ + Qs ₁ ) − (Qr ₂ + Qs ₂ ) = − (Cr−Cs) × VDD
It becomes.
Therefore, since the voltage of the output signal DS2 of the CV conversion circuit 110 changes by the changed charge amount, Vcvout = −ΔQ / Cf = [(Cr−Cs) / Cf] × VDD
It becomes. The same operation is repeated after time t3.
The output signal DS2 of the CV conversion circuit 110 is a square wave of ± 1/2 × [(Cr−Cs) / Cf] × VDD with VREF as a reference voltage, as shown as the signal DS2 in FIG. In order to detect the change signal component, the signal is demodulated by the synchronous detection circuit 130 of FIG.

In FIG. 2, the output signal DS2 of the CV conversion circuit 110 has a slope due to the time constant of the CV conversion capacitor 112 (capacitance Cf) and the bias resistor 113 (resistance Rf). This phenomenon occurs due to the charge stored in Cf) moving to the inverting input terminal side of the operational amplifier.
This time constant is τ = Rf × Cf. Therefore, the value of the output signal DS of the CV conversion circuit 110 is Vcvout ×? ^{-t / Rf} × ^Cf
With this characteristic, it approaches VREF, which is the voltage value of the non-inverting input terminal 114.
Since this phenomenon results in an error in the detection signal, we want to make it as small as possible. As can be easily understood from the above formula, it is desirable that the bias resistor 113 (resistor Rf) and the CV conversion capacitor 112 (capacitance Cf) take large values.

As described above, the CV conversion capacitor 112 (capacitance Cf) has a signal gain, and the detection sensitivity of the sensor element 10 as a capacitive sensor depends on the amount of change in the detection capacitor 1a (capacitance Cs). Is determined.
After determining the CV conversion capacitor 112 (capacitance Cf), the bias resistor 113 (resistor Rf) is determined in consideration of the detection signal error.
In the first embodiment of the present invention, by setting Rf = 100 MΩ, Cf = 10 pF, and setting the frequency of the sensor drive signal φS to 30 kHz, the error amount is suppressed to 1.85% or less.

In order to suppress variations due to temperature characteristics, how to determine the bias resistor 113 (resistor Rf) is important.
The initial charge shown in the above equation is removed by the high-pass filter characteristic constituted by the bias resistor 113 (resistor Rf) and the CV conversion capacitor 112 (capacitance Cf) of the CV conversion circuit 110, but the bias resistor 113 is used. If the values of the (resistor Rf) and the CV conversion capacitor 112 (capacitance Cf) are too large, it takes time until the offset disappears, and it takes time until the capacitance change can be correctly detected. Therefore, it is necessary to select a circuit constant that best meets the required specifications in consideration of these characteristics.

FIG. 4 is a circuit diagram showing an example of the synchronous detection circuit in the capacitance detection circuit of FIG.
The synchronous detection circuit 130 receives the output signal DS2 from the CV conversion circuit 110 in the previous stage, and switches the signal DS2 and the signal DS2 inverted by the inverting amplifier circuit 131 with the switch SW1 and the switch SW2, and uses the buffer circuit. An output signal DS3 of the synchronous detection circuit is obtained through a certain inverting amplifier circuit 134.
More specifically, the switch SW1 is turned on / off by a signal obtained by inverting the sensor drive signal φS from the sensor drive circuit 120 by the inverter 132, and the signal obtained by further inverting the inverted signal of φS by the inverter 133 at the next stage. Switch on / off of the switch SW2. By the above switching, the output signal DS2 from the preceding CV conversion circuit 110 and its inverted signal are selectively switched and output as the output signal DS3 of the synchronous detection circuit. As a result, a signal DS3 (a signal whose polarity is further inverted by the inverting amplifier circuit 134 in the output stage) DS3 which is switched so as to rotate the output signal DS2 of the CV conversion circuit in the normal rotation / inversion in synchronization with the sensor drive signal φS is obtained. Is output.

That is, in the section where the sensor drive signal φS is “low”, the switch SW1 is turned on to enable the output signal DS2 of the CV conversion circuit 110, and as the output signal DS3, the output signal DS2 of the CV conversion circuit 110 is inverted. An inverted signal by the amplifier circuit 134 is output.
On the other hand, when the sensor drive signal φS is “high”, the switch SW2 is turned on and the output of the inverting amplifier circuit 131 becomes valid. The output signal DS2 of the CV conversion circuit 110 is output from the inverting amplifier circuit 131 as the output signal DS3. The inverted signal is inverted by the inverting amplifier circuit 134 and output.
When the output signal DS2 of the CV conversion circuit 110 and the sensor drive signal φS that is the output of the sensor drive circuit 120 are synchronized, the smoothing circuit 140 (FIG. 1) at the subsequent stage
A signal of 1/2 × [(Cr−Cs) / Cf] × VDD is detected.

As can be seen from this equation, as shown in FIG. 12, it can be detected as a voltage proportional to the difference between the reference capacitor 1b (capacitance Cr) and the detection capacitor 1a (capacitance Cs).
That is, when the capacitances of the reference capacitor 1b (capacitance Cr) and the detection capacitor 1a (capacitance Cs) are equal, the output is a VREF output, and when the capacitance of the reference capacitor 1b (capacitance Cr) is relatively large. When a positive voltage is output and the detection capacitor 1a (capacitance Cs) is relatively large, a negative voltage is output.
Further, since the equation is proportional to VDD, it can be seen that the above-described ratiometric characteristic can be realized without a special circuit in the first embodiment of the present invention.

  When it is desired to change the polarity of the detection voltage corresponding to the difference between the reference capacitor 1b (capacitance Cr) and the detection capacitor 1a (capacitance Cs), the detection capacitor 1a (capacitance Cs) of the sensor element 10 and the reference capacitor This can be realized by changing the mounting direction of 1b (capacitance Cr) or by using the sensor drive inversion signal φR instead of the sensor drive signal φS inputted as a reference signal to the synchronous detection circuit 130.

In the above description, the case where the output signal DS2 of the CV conversion circuit 110 and the sensor drive signal φS which is the output of the sensor drive circuit 120 are synchronized has been described. Even if the output signal DS2 of 110 is output, the output signal DS4 of the smoothing circuit 140 becomes VREF.
That is, the noise component generated asynchronously is removed by synchronous detection, and signal detection with a high S / N (signal-to-noise ratio) can be performed.
In the synchronous detection operation, in addition to the DC component which is a signal component to be detected, the harmonic detection component has second-order or higher-order harmonic components, but these harmonic components are unnecessary signal components. The harmonic component passes through the smoothing circuit 140 and can detect a change in electrostatic capacitance with little noise and high accuracy.

FIG. 5 is a circuit diagram showing an example of a smoothing circuit in the capacitance detection circuit of FIG.
The smoothing circuit 140 has a low-pass filter configuration including a resistor 141 and a capacitor 142. Even-order harmonics (second order, fourth order, sixth order,...) Components of the frequency of the sensor drive signal φS used as the reference signal of the synchronous detection circuit 130 are generated as noise. The cut-off frequency and filter order of the low-pass filter are determined so as to correspond to the detection voltage accuracy (specification) of the capacitance change of the capacitor 1a (capacitance Cs).

Next, FIG. 6 shows a circuit example when the sensor drive signal φS cannot be used as a reference signal for the synchronous detection circuit 130.
FIG. 6 is a block diagram illustrating a capacitance detection circuit 100 a that uses the output signal of the CV conversion circuit 110 as the reference signal of the synchronous detection circuit 130. In FIG. 6, corresponding parts to those in FIG. 1 are denoted by the same reference numerals, and the description of these corresponding parts is the same as that described above with reference to FIG. 1.
The capacitance detection circuit 100a shown in FIG. 6 does not use the above-described sensor drive signal φS and sensor drive inversion signal φR, which are output signals of the sensor drive circuit 120, and the CV conversion circuit of the CV conversion circuit 110. The output signal DS2 is used as a reference signal for the synchronous detection circuit 160.

FIG. 7 is a circuit diagram showing a configuration of the synchronous detection circuit 160 in the capacitance detection circuit 100a of FIG.
The synchronous detection circuit 160 receives the output signal DS2 from the CV conversion circuit 110 in the previous stage, and switches the signal DS2 and the signal DS2 inverted by the inverting amplifier circuit 161 by using the switch SW61 and the switch SW62, and the buffer circuit. The output signal DS3 of the synchronous detection circuit is obtained through the inverting amplification circuit 164 of the next stage.
More specifically, the switch SW61 is turned on / off by a signal obtained by binarizing the output signal DS2 of the CV conversion circuit 110 with the reference voltage VREF by the comparator 162, and the binarization is performed by the inverter 163 in the next stage. The switch SW62 is turned on / off by a signal obtained by inverting the signal. By the above switching, the output signal DS2 from the preceding CV conversion circuit 110 and its inverted signal are selectively switched and output as the output signal DS3 of the synchronous detection circuit.

As a result, the output signal DS2 is switched so that the output signal DS2 is normally rotated and inverted in synchronization with the output signal DS2 itself of the CV conversion circuit 110 (a signal whose polarity is further inverted by the inverting amplifier circuit 164 in the output stage). DS3 is output.
That is, in a section in which the output signal DS2 of the CV conversion circuit 110 is larger than VREF, the switch SW61 is turned on and the output signal DS2 of the CV conversion circuit 110 becomes valid, and as an output signal DS3 of the synchronous detection circuit 160, The output signal DS2 of the CV conversion circuit is further inverted in polarity by the inverting amplifier circuit 164.
On the other hand, in a section in which the output signal DS2 of the CV conversion circuit 110 is smaller than VREF, the switch SW62 is turned on, the output signal of the inverting amplifier circuit 161 becomes valid, and the CV conversion circuit is used as the output signal DS3 of the synchronous detection circuit 160. The signal obtained by inverting the output signal DS2 of the output signal DS2 by the inverting amplifier circuit 161 is further inverted by the inverting amplifier circuit 164.

Since the output signal DS2 of the CV conversion circuit 110 and the signal obtained by binarizing the signal DS2 with the reference voltage VREF by the comparator 162 are always synchronized, the smoothing circuit 140 at the subsequent stage outputs 1/2 × [(Cr− Cs) / Cf] × VDD is output.
In the circuit of the aspect of FIG. 7, the capacitance detection circuit can be realized without using the output signal of the sensor drive circuit 120 as described above.
In the example described with reference to FIGS. 1 to 6, the capacitance difference between the reference capacitor 1b (capacitance Cr) and the detection capacitor 1a (capacitance Cs) of the sensor element 10 which is a capacitive sensor is detected. However, if it is desired to detect a change in the capacitance of the detection capacitor 1a (capacitance Cs) alone, this can be realized with the configuration shown in FIG.

FIG. 8 is a block diagram illustrating a capacitance detection circuit 100b that does not drive the reference capacitor of the sensor element. In FIG. 8, the same reference numerals are assigned to the corresponding parts in FIG. 1, and the description of these corresponding parts is the same as that described above with reference to FIG.
In the capacitance detection circuit of FIG. 1 described above, the reference capacitor 1b (capacitance Cr) is driven by the sensor drive inversion signal φR obtained by inverting the sensor drive signal φS from the sensor drive circuit 120 by the inverter 150. This is realized by dropping one end 12 of the reference capacitor 1b to GND without being driven by the signal φR. In the illustrated example, the one end 12 is connected to GND via a terminal 101 connected to the one end 12.
The potential difference between both ends of the reference capacitor 1b (capacitance Cr) of the sensor element 10 which is a capacitive sensor is always the voltage value VREF of the non-inverting input terminal 114 of the operational amplifier 111 of the CV conversion circuit 110, There is no change.

Accordingly, the charge amount Qs of the detection capacitor 1a (capacitance Cs) corresponding to Qr = Cr × VREF is as follows when the sensor drive signal φS of the sensor drive circuit 120 is VDD.
Qsvdd = −Cs × VDD + Cs × VREF
Further, when the sensor drive signal φS is GND (0), the following occurs.
Qsgnd = Cs × VREF.
In the output signal DS2 of the CV conversion circuit 110, the charge fluctuation of the CV conversion capacitor 112 (capacitance Cf) is generated as an output.

Therefore, when the sensor drive signal φS is VDD,
Vcvout = − {(Qr + Qsvdd) − (Qr + Qsgnd)} / Cf
= Cs × VDD.
When the sensor drive signal is GND (0),
Vcvout = − {(Qr + Qsgnd) − (Qr + Qsvdd)} / Cf
= −Cs × VDD.

Therefore, the output signal DS3 of the synchronous detection circuit 130 becomes a square wave of ± 1/2 × Cs × VDD centering on the voltage value VREF of the non-inverting input terminal 114 of the operational amplifier 111 of the CV conversion circuit 110.
Then, the capacitance detection output signal Vout = 1/2 × Cs × VDD is obtained by the smoothing circuit 140 that smoothes the output signal of the synchronous detection circuit 130.
As described above, in the embodiment described with reference to FIGS. 1 to 8, as the sensor element 10 that is a capacitive sensor, the reference capacitor 1 b (capacitance Cr) and the detection capacitor 1 a (capacitance Cs) are all used. The aspect in the case of applying the sensor comprised by was demonstrated.
On the other hand, even when a sensor composed only of the detection capacitor 1a (capacitance Cs) is applied as the sensor element 10a, a change in capacitance is detected by applying a capacitance detection circuit having a configuration as shown in FIG. I can do it.

FIG. 9 is a block diagram illustrating a capacitance detection circuit 100c in the case where a sensor composed only of the detection capacitor 1a (capacitance Cs) is applied as the sensor element 10a. In FIG. 9, the same reference numerals are given to the corresponding parts to those in FIG. 1, and the description of these corresponding parts is the same as that described above with reference to FIG. 1.
In the capacitance detection circuit described above with reference to FIG. 1, the reference capacitor 1b (capacitance Cr) is driven by the sensor drive inversion signal φR obtained by inverting the sensor drive signal φS of the sensor drive circuit 120 by the inverter 150. However, the capacitance detection circuit 100c does not darely generate (and therefore does not use) the signal φR, and corresponds to the reference capacitor 1b (capacitance Cr) described above for the input signal DS1 of the CV conversion circuit 110. An alternative capacitor 190 (capacity Cri) is prepared inside the IC of the capacitance detection circuit 100c, and the opposite terminal is connected to GND.

The operation of the capacitance detection circuit 100c in FIG. 9 is exactly the same as that described for the capacitance detection circuit 100b in FIG.
In the capacitance detection circuit 100c of FIG. 9, in the applied sensor element 10a, the charge fluctuation with respect to the capacity Cr as in the sensor element 10 described above does not occur. Therefore, the above-described alternative capacitor 190 (capacity Cri) Even if not connected, it is possible to detect the capacitance (change in capacitance) in the sensor element 10a including only the detection capacitor 1a (capacitance Cs).
As described above, according to the first embodiment of the present invention described with reference to FIGS. 1 to 9, discrete capacitance detection, which is an essential problem in the CV conversion circuit configured by the switched capacitor circuit, is performed. Instead, it is possible to detect a continuous capacitance change, and it is possible to detect a small capacitance change with high accuracy in a small size and at a low cost without adding a circuit such as a sample hold circuit or a differential circuit.

(Second Embodiment)
FIG. 10 is a block diagram of a capacitance detection circuit according to the second embodiment of the present invention. FIG. 11 is a signal waveform diagram of each part during operation of the capacitance detection circuit of FIG.
The capacitance detection circuit 200 shown in FIG. 10 has a capacitance of a series connection body of a detection capacitor 1a (capacitance Cs) and a reference capacitor 1b (capacitance Cr) as the sensor element 10 which is a capacitance type sensor. Detect changes. The sensor element 10 has a three-terminal configuration including the terminals 11 and 12 at both ends of the above-described series connection body, and the terminal 13 at the connection midpoint of the capacitors 1a and 1b.

The capacitance detection circuit 200 includes a CV conversion circuit 210 that detects a change in capacitance of the detection capacitor 1a (capacitance Cs), and a CV conversion circuit 220 that detects a change in capacitance of the reference capacitor 1b (capacitance Cr). The subtraction circuit 230 for obtaining the subtraction signal output of the outputs of both the CV conversion circuit 210 and 220, the sensor driving circuit 240, the synchronous detection circuit 250, and the smoothing circuit 260 are configured.
Then, a sensor drive signal φS that is an output of the sensor drive circuit 240 is supplied to the above-described terminal 13 of the sensor element 10.
Further, the terminal 11 that is not connected to the capacitance of the detection capacitor 1 a (capacitance Cs) of the sensor element 10 is connected to the input terminal of the CV conversion circuit 210.

On the other hand, the terminal 12 not connected to the capacitance of the reference capacitor 1 b (capacitance Cr) of the sensor element 10 is connected to the input terminal of the CV conversion circuit 220.
A sensor capacitance conversion output DS11 that is an output of the CV conversion circuit 210 connected to the detection capacitor 1a (capacitance Cs) and an output of the CV conversion circuit 220 that is connected to the reference capacitor 1b (capacitance Cr). The reference capacitance conversion output DS12 is an input to the subtraction circuit 230.
Then, the subtraction circuit 230 executes a subtraction process between the sensor capacitance conversion output DS11 and the reference capacitance conversion output DS12. The output signal DS13 of the subtraction circuit 230 is supplied to the input terminal of the synchronous detection circuit 250. A sensor drive signal φS is supplied to the synchronous detection circuit 250 as a reference signal, and a synchronous detection operation is performed with this signal φS.

The output signal DS14 of the synchronous detection circuit 250 is input to the smoothing circuit 260. An output signal DS15 of the smoothing circuit, which is a voltage value obtained by detecting a change in capacitance from which unnecessary high frequency components generated by the synchronous detection operation in the smoothing circuit 260 are removed, is output.
The sensor element 10 is a sensor processed by MEMS (Micro Electro Mechanical System). In this example, as described above, two capacitors are connected in series and have three terminals. Is.
The capacitance value Cs of the detection capacitor 1a changes according to the detected physical quantity. On the other hand, the reference capacitor 1b has a capacitance Cr that does not depend on the detected physical quantity, or has a different manner of dependence. Then, a sensor drive signal φS, which is the output of the sensor drive circuit 240, is applied to the terminal 13 at the midpoint of connection of the series connection body, and further corresponds to the physical quantity from the terminals 11 and 12 at both ends of the series connection body of both capacitors. Retrieve the signal.

The configuration of the sensor drive circuit 240 is the same as that of the sensor drive circuit 120 described with reference to FIG.
That is, the sensor driving circuit 240 includes a current reference circuit 121 and a current control oscillator 125.
In the current reference circuit 121, an output signal of a band gap reference circuit (not shown) is supplied to the input terminal 21, and a current inversely proportional to the resistance value of the resistor 123 flows to the P-type MOS transistor 124 by the supplied signal.
Since the output voltage of the well-controlled bandgap reference circuit is almost independent of the power supply voltage and temperature change, the current flowing through the P-type MOS transistor 124 is almost dependent only on the manufacturing variation of the resistance value of the resistor 123 and the temperature characteristics. Become.

The current controlled oscillator 125 charges the capacitor 127a and the capacitor 127b with the current flowing in the P-type MOS transistor 126a and the P-type MOS transistor 126b, which mirrors the current flowing in the P-type MOS transistor 124 of the current reference circuit 121, and generates a rectangular wave. This circuit generates a certain sensor drive signal φS. The sensor drive signal φS is output from the terminal 102 and supplied to the terminal 13 of the sensor element 10 as understood with reference to FIGS. 3 and 10.
When a triangular wave is used as the driving waveform of the sensor element 10, the triangular wave TW is used as the sensor driving signal φS.
On the other hand, the CV conversion circuits 210 and 220 have the same circuit configuration as is apparent from FIG. That is, the CV conversion circuit 210 (220) is a charge composed of an operational amplifier 211 (221), a CV conversion capacitor 212 (222) having a capacitance Cf, and a bias resistor 213 (223) having a resistance Rf. This is a configuration of an amplifier circuit mode.

The charge ΔQ stored in the capacitance change ΔC of the detection capacitor 1a (1b) of the sensor element 10 is extracted as a voltage Vcvout = −ΔQ / Cf by a CV conversion capacitor 212 (222) having a capacitance Cf.
As can be easily understood from this equation, the capacitance Cf of the CV conversion capacitor 212 (222) described above defines the gain of voltage detection, and the static capacitance of the sensor element 10 which is the target capacitance type sensor. Gain can be selected flexibly for the amount of change in capacitance. Therefore, according to the present embodiment, a wide range of sensor characteristics can be handled.

As an example, when detecting a capacitance change of 0.1 pF in the detection capacitor 1a of the sensor element 10 described above, the CV conversion capacitor on the opposite side to the input of the CV conversion circuit 210 (220) in the operational amplifier 211 (221). When 212 (222) terminal is 0V,
ΔQ = ΔC × VREF.
When Vcvout = −ΔQ / Cf = −0.1 p × VREF / Cf, VREF = 2.5 V, and Cf = 1 pF, the voltage value is Vcvout = 0.25 V, and the capacitance change of 0.1 pF is 0. It can be seen that it can be extracted as a voltage change amount of 25V.

On the other hand, the bias resistor 213 (223) (resistor Rf) is provided so that the operating point of the input signal DSS (DSR) of the CV conversion circuit 210 (220) is not saturated with VDD or VSS.
However, if the charge detected by the CV conversion capacitor 212 (222) having the capacitance Cf moves through the bias resistor 213 (223) of the resistor Rf, the detection gain is reduced. Therefore, it is desirable that the resistance value Rf of the bias resistor 213 (223) is a sufficiently large value of several tens of MΩ or more.
The bias resistor 213 (223) (resistor Rf) and the CV conversion capacitor 212 (222) (capacitance Cf) are characteristics of a high-pass filter of fc = 1 / (2 × π × Rf × Cf) when viewed from the sensor element 10 side. have.

This time constant is τ = Rf × Cf. Therefore, the output signal DS11 (DS12) of the CV conversion circuit 210 (220) is Vcvout ×? It approaches VREF that is the voltage value of the non-inverting input terminal 214 (224) of the operational amplifier 211 (221) with the characteristic of ^{-t / Rf} × ^Cf.
On the other hand, the sensor drive signal φS, which is an output signal of the sensor drive circuit 240, is a rectangular wave in which the power supply voltage VDD is “high” and the GND voltage is “low” as shown by φS in FIG.
Become.
Assuming that no charge is accumulated in the detection capacitor 1a (capacitance Cs) and the reference capacitor 1b (capacitance Cr) as an initial state, the sensor drive signal φS is “high” (VDD). The charge on the input end side of the CV conversion circuit 210 on the detection capacitor 1a (capacitance Cs) side and the charge on the input end side of the CV conversion circuit 220 on the reference capacitor 1b (capacitance Cr) side are calculated.

The charge on the reference capacitor 1b (capacitance Cr) side is Qr _i = −Cr × (VDD−VREF), and the charge on the detection capacitor 1a (capacitance Cs) side is Qs _i = −Cs × (VDD−VREF).
Therefore, the value Vcvrout of the reference capacitance conversion output DS12 of the CV conversion circuit 220 of the reference capacitor 1b (capacitance Cr) is
Vcvrout = −Qr _i = (Cr / Cf) × (VDD−VREF)
It becomes.
On the other hand, the value Vcvsout of the sensor capacitance conversion output DS11 of the CV conversion circuit 210 (220) of the detection capacitor 1a (capacitance Cs) is:
Vcvsout = −Qs _i = (Cs / Cf) × (VDD−VREF)
It becomes.

The output signal of the CV conversion circuit 210 (220) output by the electric charge stored in the CV conversion capacitor 212 (222) having the capacitance Cf is the C− of the bias resistor 213 (223) capacitance Cf of the resistor Rf. Since electric charge moves to the inverting input terminal side of the operational amplifier 211 (221) by the V conversion capacitor 212 (222), the voltage value becomes the same as VREF that is the voltage value of the non-inverting input terminal 214 (224) after a long time.
This time constant is τ = Rf × Cf. Therefore, the output signal DS11 (DS12) of the CV conversion circuit 210 (220) is
Vcvout ×? ^{-t / Rf} x ^Cf.
Next, reference is made to the charge on the input end side of the CV conversion circuit 210 on the detection capacitor 1a (capacitance Cs) side in a state where the sensor drive signal φS transitions from “high” (VDD) to “low” (0). The charge on the input end side of the CV conversion circuit 220 on the capacitor 1b (capacitance Cr) side is calculated.

The charge of the reference capacitor 1b (capacitance Cr) is Qr ₋₁ = Cr × VREF, and the charge of the detection capacitor 1a (capacitance Cs) is Qs ₋₁ = Cs × VREF.
If the charge amount that changes in the sensor capacitance Cr when the sensor drive signal φS is inverted from the initial state is ΔQr,
ΔQr = Qr ₋₁ −Qr _i = Cr × VDD
Since the reference capacitance conversion output DS12 changes in voltage by the changed charge amount,
Vcvrout = −ΔQr / Cf = − (Cr / Cf) × VDD
It becomes.
When the charge amount that changes in the sensor capacitance Cs when the sensor drive signal φS is inverted from the initial state is ΔQs,
ΔQs = Qs ₋₁ −Qs ₀ = Cs × VDD
Since the voltage of the sensor capacitance conversion output DS11 changes by the changed charge amount,
Vcvsout = −ΔQs / Cf = − (Cs / Cf) × VDD
It becomes.

The remaining charge of the difference in charge between the initial state and the state where the sensor drive signal φS is inverted is generated as an output signal of the CV conversion circuit as a DC voltage as an initial voltage fluctuation, but the CV conversion circuit 210 (220). Is filtered with a high-pass filter characteristic by the bias resistor 213 (223) of the resistor Rf and the CV conversion capacitor 212 (222) of the capacitor Cf.
At time t0, the charge on the input end side of the CV conversion circuit 210 of the detection capacitor 1a (capacitance Cs) and the reference capacitor 1b (capacitance Cr) when the sensor drive signal φS is “high” (VDD). ) And the charge on the input end side of the CV conversion circuit 220 is calculated.
The charge of the reference capacitor 1b (capacitance Cr) is Qr ₀ = −Cr × (VDD−VREF), and the charge of the detection capacitor 1a (capacitance Cs) is Qs ₀ = −Cs × (VDD−VREF).

If the amount of charge that changes in the sensor capacitance Cr when transitioning to time t0 is ΔQr,
ΔQr = Qr ₀ −Qr ₋₁ = −Cr × VDD
Therefore, the voltage of the reference capacitance conversion output DS12 changes by the changed charge amount.
Vcvrout = −ΔQr / Cf = (Cr / Cf) × VDD
It becomes.
If the charge amount that changes in the sensor capacitance Cs at the time t0 is ΔQs,
ΔQs = Qs ₀ −Qs ₋₁ = −Cs × VDD
Therefore, the voltage of the sensor capacitance conversion output DS11 changes by the changed charge amount.
Vcvsout = −ΔQs / Cf = (Cs / Cf) × VDD
It becomes.

At time t1, the CV conversion circuit 210 input end side of the detection capacitor 1a (capacitance Cs) in a state where the sensor drive signal φS transitions from “high” (VDD) to “low” (0). The charge and the charge on the input end side of the CV conversion circuit 220 of the reference capacitor 1b (capacitance Cr) are calculated.
The charge of the reference capacitor 1b (capacitance Cr) is Qr ₁ = Cr × VREF, and the charge of the detection capacitor 1a (capacitance Cs) is Qs ₁ = Cs × VREF.
When the amount of charge that changes in the sensor capacitance Cr at the time of transition from t0 to t1 is ΔQr,
ΔQr = Qr ₁ −Qr ₀ = Cr × VDD
Since the reference capacitance conversion output DS12 changes in voltage by the changed charge amount,
Vcvrout = −ΔQr / Cf = − (Cr / Cf) × VDD
It becomes.

When the amount of charge that changes in the sensor capacitance Cs at the time of transition from t0 to t1 is ΔQs,
ΔQs = Qs ₁ −Qs ₀ = Cs × VDD
Since the voltage of the sensor capacitance conversion output DS11 changes by the changed charge amount,
Vcvsout = −ΔQs / Cf = − (Cs / Cf) × VDD
It becomes.
At time t2, the CV conversion circuit 210 input side of the detection capacitor 1a (capacitance Cs) in a state where the sensor drive signal φS has transitioned from “low” (0) to “high” (VDD). The charge and the charge on the input end side of the CV conversion circuit 220 of the reference capacitor 1b (capacitance Cr) are calculated.

The charge of the reference capacitor 1b (capacitance Cr) is Qr ₂ = −Cr × (VDD−VREF), and the charge of the detection capacitor 1a (capacitance Cs) is Qs ₂ = −Cs × (VDD−VREF).
When the amount of charge that changes in the sensor capacitance Cr at the time of transition from t1 to t2 is ΔQr,
ΔQr = Qr ₂ −Qr ₁ = −Cr × VDD
Therefore, the voltage of the reference capacitance conversion output DS12 changes by the changed charge amount.
Vcvrout = −ΔQr / Cf = (Cr / Cf) × VDD
It becomes.

When the amount of charge that changes in the sensor capacitance Cs at the time of transition from t1 to t2 is ΔQs,
ΔQs = Qs ₂ −Qs ₁ = −Cs × VDD
Therefore, the voltage of the sensor capacitance conversion output DS11 changes by the changed charge amount.
Vcvsout = −ΔQs / Cf = (Cs / Cf) × VDD
It becomes.
The same operation is repeated after time t3.
As shown in FIG. 11, the sensor capacitance conversion output DS11 is a square wave of ± 1/2 × (Cs / Cf) × VDD,
The reference capacitance conversion output DS12 is a square wave of ± 1/2 × (Cr / Cf) × VDD.

By detecting the voltage value of the sensor capacitance conversion output DS11 and the voltage value of the reference capacitance conversion output DS12 to the subtraction circuit 230, the voltage value of the output DS13 of the subtraction circuit 230 proportional to the difference between the reference capacitance and the sensor capacitance is detected. I can do it.
In the interval from t1 to t2,
Vdiffout = Vcvrout−Vcvsout
= 1/2 * [(Cr-Cs) / Cf] * VDD
In the interval from t2 to t3,
Vdiffout = Vcvrout−Vcvsout
= −1 / 2 × [(Cr−Cs) / Cf] × VDD

This signal is a square wave of ± 1/2 × [(Cr−Cs) / Cf] × VDD with reference to VREF as shown in the output signal DS13 of the subtracting circuit of FIG. 11, and detects the capacitance change signal component. Therefore, the signal is demodulated by the synchronous detection circuit 250.
The configuration of the synchronous detection circuit 250 is the same as that of the synchronous detection circuit 130 of FIG.
The synchronous detection circuit 250 receives the output signal DS13 of the subtraction circuit 230 in the previous stage, and switches the signal DS13 and the signal obtained by inverting the signal DS13 by the inverting amplification circuit 131 using the switch SW1 and the switch SW2. The output signal DS3 of the synchronous detection circuit is obtained through the inverting amplifier circuit 134.

  More specifically, the switch SW1 is turned on / off by a signal obtained by inverting the sensor drive signal φS from the sensor drive circuit 240 by the inverter 132, and the signal obtained by further inverting the inverted signal of φS by the inverter 133 at the next stage. Switch on / off of the switch SW2. By the above switching, the output signal DS13 of the previous subtracting circuit 230 and its inverted signal are selectively switched and output as the output signal DS14 of the synchronous detection circuit. As a result, a signal DS14 (a signal whose polarity is further inverted by the inverting amplifier circuit 134 in the output stage) DS14 is output in which the output signal DS13 of the subtractor circuit 230 is switched in a normal or inverted manner in synchronization with the sensor drive signal φS. The

That is, when the sensor drive signal φS is “low”, the switch SW1 is turned on to enable the output signal DS13 of the subtraction circuit 230, and the output DS14 of the subtraction circuit 230 as the output DS14 of the synchronous detection circuit. An inverted signal is output.
On the other hand, when the sensor drive signal φS is “high”, the switch SW2 is turned on and a signal obtained by inverting the output signal DS13 of the subtractor circuit 230 becomes valid, and the output signal DS13 of the subtractor circuit 230 is inverted to the synchronous detector circuit output DS3. The signal inverted by the amplifier circuit 131 is inverted by the inverting amplifier circuit 134 and output.
When the output signal DS13 of the subtraction circuit 230 and the sensor drive signal φS are synchronized, the signal component of 1/2 × [(Cr−Cs) / Cf] × VDD is detected by the subsequent smoothing circuit 260 (FIG. 10). Is done.

As can be seen from this equation, as shown in FIG. 12, it can be detected as a voltage proportional to the difference between the reference capacitor 1b (capacitance Cr) and the detection capacitor 1a (capacitance Cs).
That is, when the capacitances of the reference capacitor 1b (capacitance Cr) and the detection capacitor 1a (capacitance Cs) are equal, the output is a VREF output, and when the capacitance of the reference capacitor 1b (capacitance Cr) is relatively large. When a positive voltage is output and the detection capacitor 1a (capacitance Cs) is relatively large, a negative voltage is output.
Since the equation is proportional to VDD, it can be seen that the ratiometric characteristic can be realized without a special circuit in the second embodiment of the present invention.

When it is desired to change the polarity of the detection voltage corresponding to the difference between the reference capacitor 1b (capacitance Cr) and the detection capacitor 1a (capacitance Cs), the detection capacitor 1a (capacitance Cs) of the sensor element 10 and the reference capacitor This can be realized by changing the mounting direction of 1b (capacitance Cr) or using a signal inverted by an inverter of the sensor drive signal φS instead of the sensor drive signal φS inputted as a reference signal to the synchronous detection circuit 250.
Further, when the output signal DS13 of the subtraction circuit 230 and the sensor drive signal φS are not synchronized, the output signal DS15 of the smoothing circuit becomes the above-described VREF even if the output signal DS13 of the subtraction circuit is output. That is, it is shown that the noise component generated asynchronously is dropped by synchronous detection, and it can be seen that signal detection with a high S / N (signal to noise ratio) can be performed.

In the synchronous detection operation, in addition to the DC component which is a signal component to be detected, there are second-order or higher-order harmonic components, and these harmonic components are unnecessary signal components. Such harmonic components are removed by passing through the smoothing circuit 260, and it is possible to detect an accurate change in capacitance with little noise.
The configuration of the smoothing circuit 260 is the same as the smoothing circuit 140 of FIG.
That is, the smoothing circuit 260 has a low-pass filter configuration in which the resistor 141 and the capacitor 142 are connected. Since even-order harmonics (second order, fourth order, sixth order,...) Components of the frequency of the sensor drive signal used as the reference signal of the synchronous detection circuit 250 are generated as noise, the detection voltage of the capacitance change The cut-off frequency and filter order of the low-pass filter are determined according to accuracy (specification).

  In the example shown in the figure, the subtraction circuit 230 is provided on the subsequent stage side of the CV conversion circuits 210 and 220 to obtain the signal DS13 of the difference between the outputs of the CV conversion circuits 210 and 220. An addition circuit is applied instead of the subtraction circuit 230 to obtain a signal DS13a (not shown) of the sum of the outputs of the CV conversion circuits 210 and 220, and this signal DS13a is supplied to the synchronous detection circuit 250. A configuration may be adopted.

That is, the subtraction circuit 230 in FIG. 10 is more generally an arithmetic circuit that performs subtraction or addition.
In the above-described circuit, the CV conversion circuits 210 and 220 employ a configuration in which two CV conversion circuits 210 and 220 are provided corresponding to the different terminals (detection terminals) 11 and 12 that are both ends of the capacitor serial connection body in the sensor element 10. It was. The configuration at this point is not limited to the above, and a sensor element having a series connection body of more capacitors formed by commonly connecting the connection midpoint as the terminal 13 described above is applied. A number of CV conversion circuits, arithmetic circuits, and synchronous detection circuits corresponding to the respective detection terminals of the sensor element may be applied.

According to the second embodiment of the present invention described above, the continuous capacitance change is not detected instead of the discrete capacitance detection which is an essential problem in the CV conversion circuit constituted by the switched capacitor circuit. It can be seen that it is possible to detect a minute capacitance change with high accuracy in a small size and at low cost without adding a circuit such as a sample hold circuit and a differential circuit.
Further, according to the embodiment of FIG. 10, since the reference capacitor 1b (capacitance Cr) and the detection capacitor 1a (capacitance Cs) are differentially processed, the effect of suppressing the influence of the DC voltage generation by the initial charge is obtained. In addition, there is an effect that it is difficult to be affected by noise jumping from the outside or noise mixed in the power supply.

In the first and second embodiments, a circuit that generates a rectangular or triangular wave sensor drive signal is applied as the sensor drive circuit 120. Instead, a sine is used as the sensor drive signal. A circuit for generating a wave voltage signal may be applied. In this case, when it is required to suppress the emission of electromagnetic waves from the viewpoint of EMC (Electro-Magnetic Compatibility), characteristics with high compatibility can be obtained.
As described above, the capacitance detection circuits 100, 100a, 100b, 100c, and 200 described with reference to FIGS. 1 to 12 are connected to the corresponding capacitive sensor elements 10, 10a. A pressure detection device, an acceleration detection device, and a microphone transducer can be configured.

That is, a capacitive sensor element (capacitor) including a capacitor in which a plate electrode in a parallel plate type capacitor is deflected by a pressure to be measured, and a capacitance value is changed by changing an electrode interval. By connecting the capacitance type pressure sensor) to any one of the capacitance detection circuits 100, 100a, 100b, 100c, and 200 as described above, a pressure detection device can be configured.
Capacitive pressure sensors have characteristics that depend only on the mechanical relative position, which is the distance between the electrodes of a parallel plate type capacitor (capacitance change), so the detection output is highly stable and usable. It has a wide temperature range and is suitable for high temperature environments, and has various characteristics such as low sensitivity temperature dependence.

Therefore, if the pressure detection device is configured by connecting such a capacitance pressure sensor and any one of the capacitance detection circuits 100, 100a, 100b, 100c, and 200, the above-described capacitance pressure sensor. In addition to the above features, it is possible to accurately detect a continuous and minute pressure, and it is possible to realize a small and inexpensive pressure detection device.
A capacitive acceleration sensor configured to cause a change in capacitance in accordance with a change in a distance between a movable electrode having a weight so as to cause a displacement corresponding to the acceleration and a fixed electrode facing the movable electrode; By connecting to any one of the capacitance detection circuits 100, 100a, 100b, 100c, and 200, an acceleration detection device can be configured.

In the acceleration detection device as described above, the detection output has high stability, the usable temperature range is wide, it is suitable for high temperature environments, the sensitivity is less temperature dependent, and the acceleration is continuously accurate. Further, it is possible to detect an acceleration detection device that is small and inexpensive.
In addition, the vibrating membrane vibrates in response to the received sound wave, so that the relative position between the vibrating membrane and the back electrode changes, and the capacitance-type sound is configured such that the change causes a change in capacitance. A microphone transducer can be configured by connecting the pressure sensor and any of the capacitance detection circuits 100, 100a, 100b, 100c, and 200. As a result, a microphone transducer with high sensitivity, small size, and low cost can be realized.

1a …………………………………… Capacitor for detection (capacitance Cs)
1b: Reference capacitor (capacitance Cr)
10... ...... Sensor elements 11, 12, 13 ……………… Terminal 100 ……………………………… Capacitance detection circuits 100 a and 100 b , 100c ... Capacitance detection circuits 101, 102, 103 ..... Terminal 110 ..... CV conversion circuit 111 ..... 112 …………………………………… CV conversion capacitor (capacitance Cf)
113 ……………………………… bias resistance (resistance Rf)
114 ……………………………… Non-inverting input terminal 120 ……………………………… Sensor drive circuit 121 ……………………………… Current reference circuit 122 ……………………………… Terminal 123 ……………………………… Resistance 124 ……………………………… P-type MOS transistor 125 …………… Current control oscillators 126a and 126b P type MOS transistors 127a and 127b Capacitor 130 Synchronous detection circuit 131 ……………………………… Inverting amplifier circuit 132, 133 …………………… Inverter 134 ……………………………… Inverting amplifier circuit 140 ……………… ……………… Smoothing circuit 141 ……………………………… Resistance 142 ……………………………… Capacitance 50 ……………………………… Inverter 160 ……………………………… Synchronous detection circuit 161 ……………………………… Inverting amplification circuit 162 ………… ……………………… Comparator 163 ………………………… Inverter 164 ……………………………… Inverting amplifier circuit 200 ………………………… Capacitance detection circuits 210 and 220 CV conversion circuits 211 and 221 ... Operational amplifiers 212 and 222 CV Conversion capacitors 213, 223 ...... ……………… Bias resistor 230 ………………………… Subtraction circuit 240 ……………………………… Sensor drive circuit 250 ...... ……………………… Synchronous detection circuit 260 ……………………………… Smoothing circuit

Claims (20)

A capacitance detection circuit that detects a change in capacitance of a capacitance type sensor element,
A sensor driving circuit for applying a driving voltage to the sensor element;
A continuous-time CV conversion circuit that converts a change in capacitance of the sensor element into a voltage signal;
A synchronous detection circuit for detecting a signal component from an output signal of the continuous-time CV conversion circuit;
A smoothing circuit for smoothing the output signal of the synchronous detection circuit;
A capacitance detection circuit comprising:   The capacitance detection circuit according to claim 1, wherein the synchronous detection circuit is configured to operate using a drive voltage that is an output of the sensor drive circuit as a reference signal.   The synchronous detection circuit is configured to operate with a signal obtained by binarizing a voltage signal, which is an output of the continuous-time CV conversion circuit, at a predetermined level as a reference signal. 2. The capacitance detection circuit according to 1.   The capacitance detection circuit according to claim 1, wherein the sensor driving circuit outputs a rectangular wave voltage as the driving voltage.   The capacitance detection circuit according to claim 1, wherein the sensor driving circuit outputs a triangular wave as the driving voltage.   The capacitance detection circuit according to claim 1, wherein the sensor driving circuit outputs a sine wave as the driving voltage.   The capacitance detection circuit according to claim 1, wherein the continuous-time CV conversion circuit includes a charge amplifier circuit.   A pressure detection device comprising: the capacitance detection circuit according to claim 1; and a pressure sensor as the capacitance type sensor element.   An acceleration detection apparatus comprising: the capacitance detection circuit according to claim 1; and an acceleration sensor as the capacitance type sensor element.   A transducer for a microphone, comprising: the capacitance detection circuit according to claim 1; and a capacitance-type sound pressure sensor as the capacitance-type sensor element. A capacitance detection circuit that detects a change in capacitance of a capacitance type sensor element,
A sensor driving circuit for applying a driving voltage to the sensor element;
A plurality of continuous-time CV conversion circuits configured to convert a change in capacitance of the sensor element into a voltage signal and connected to each other detection terminal of the sensor element;
An arithmetic circuit for performing subtraction or addition on the outputs of the plurality of continuous-time CV conversion circuits;
A synchronous detection circuit for detecting a signal component from the output signal of the arithmetic circuit;
A smoothing circuit for smoothing the output signal of the synchronous detection circuit;
A capacitance detection circuit comprising:   The capacitance detection circuit according to claim 11, wherein the synchronous detection circuit is configured to operate using a drive voltage, which is an output of the sensor drive circuit, as a reference signal.   The synchronous detection circuit is configured to operate with a signal obtained by binarizing a voltage signal, which is an output of the continuous-time CV conversion circuit, at a predetermined level as a reference signal. 11. The capacitance detection circuit according to 11.   The capacitance detection circuit according to claim 11, wherein the sensor driving circuit outputs a rectangular wave voltage as the driving voltage.   The capacitance detection circuit according to claim 11, wherein the sensor driving circuit outputs a triangular wave as the driving voltage.   The capacitance detection circuit according to claim 11, wherein the sensor drive circuit outputs a sine wave as the drive voltage.   The capacitance detection circuit according to claim 11, wherein the continuous-time CV conversion circuit includes a charge amplifier circuit.   A pressure detection device comprising: the capacitance detection circuit according to any one of claims 11 to 17; and a pressure sensor as the capacitance type sensor element.   An acceleration detection apparatus comprising: the capacitance detection circuit according to claim 11; and an acceleration sensor as the capacitance type sensor element.   18. A microphone transducer comprising: the capacitance detection circuit according to claim 11; and a capacitance type sound pressure sensor as the capacitance type sensor element.

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