JP2011041387A - Dc-dc conversion circuit - Google Patents

Abstract

The present invention relates to a DC-DC conversion technique in a switching power supply or the like, and realizes a DC-DC conversion circuit with low switching loss and low noise during switching.
A transformer 6 has a leakage inductance A. The semiconductor switching elements 4 and 5 are always in a conductive state with respect to a reverse current by a parasitic diode or a diode connected in parallel. The semiconductor switching elements 4 and 5 have parasitic capacitances B and C in parallel. The semiconductor switching elements 4 and 5 function as an inverter. When the parasitic capacitances B and C are charged by the leakage inductance A of the transformer 6, the capacitance is set to a capacitance value that does not reach the voltage of the DC power supply.
[Selection] Figure 1

Description

  The present invention relates to a DC-DC conversion technique in a switching power supply or the like.

In a switching power supply or the like, a DC-DC conversion circuit is used.
FIG. 7 is a circuit configuration diagram of a conventional switching power supply circuit using a DC-DC conversion circuit. FIG. 8 is an operation timing chart of the above prior art.

  In FIG. 7, 1 is a DC power source, 2 and 3 are capacitors, 4 and 5 are semiconductor switching elements, 6 is a transformer, 7 to 10 are diodes, 11 is an inductor, 12 is a capacitor, and 13 is a load. The transformer 6 has a leakage inductance A. The semiconductor switching elements 4 and 5 are always in a conductive state with respect to a reverse current by a parasitic diode or a diode connected in parallel. The semiconductor switching elements 4 and 5 have parasitic capacitances B and C in parallel. The semiconductor switching elements 4 and 5 function as an inverter.

  FIG. 8 shows the operation. When the semiconductor switching element 4 is turned on, the voltage (E / 2) of the capacitor 2 is applied to the transformer 6 with positive polarity, and when the semiconductor switching element 5 is turned on, the voltage (E / 2) of the capacitor 3 is negative with polarity. 6 is applied. A high-frequency alternating current is input to the transformer 6 by alternately applying positive and negative voltages. This frequency is generally 10 kHz or more in order to reduce the size of the transformer and prevent noise. This is transformed and insulated by the transformer 6 and then rectified by a diode rectifier comprising diodes 7 to 10 and smoothed by an inductor 11 and a capacitor 12 to supply a DC voltage to the load 13.

  The voltage applied to the load 13 can be controlled by changing the time ratio of the period during which the voltage is applied to the transformer 6 by pulse width control. Between the period during which a positive voltage is applied to the transformer 6 and the period during which a negative voltage is applied, a period during which both the semiconductor switching elements 4 and 5 are turned off is provided. Also during this period, current continues to flow to the load side due to the action of the inductor 11. Hereinafter, this period is referred to as a reflux period. During the reflux period, all of the diodes 7 to 10 are turned on, and the applied voltage of the transformer 6 becomes 0V. The purpose of this circuit is to insulate the DC power supply 1 and the load 13 and stabilize the power supply applied to the load 13 regardless of voltage fluctuations of the DC power supply 1 by the pulse width control described above.

In this circuit, for example, when the semiconductor switching element 4 is turned on, on the primary side of the transformer 6, a current flows through the path of the capacitor 2 → the semiconductor switching element 4 → the leakage inductance A → the transformer 6 → the capacitor 2. Along with this, on the secondary side, the diodes 7 and 10 are turned on and current is supplied to the inductor 11. The state of the circuit immediately after the semiconductor switching element 4 is turned off is shown in FIG. When the semiconductor switching element 4 is turned off, the primary current of the transformer 6 decreases, but does not instantaneously become zero due to the action of the leakage inductance A. Therefore, a current flows through the path of capacitor 2 → parasitic capacitance B → leakage inductance A → transformer 6 → capacitor 2 and the parasitic capacitance B is charged, and capacitor 3 → parasitic capacitance C → leakage inductance A → transformer 6 → A current flows through the path of the capacitor 3 and the parasitic capacitance C is discharged. When the voltage of the parasitic capacitance C becomes 0V or less, the parallel diode of the semiconductor switching element 5 becomes conductive and current continues to flow. Although the secondary current also decreases in proportion to the decrease in the primary current, the inductor 11 tries to flow the same value as before due to the smoothing action. For this reason, in addition to the diodes 7 and 10, the diodes 8 and 9 are also conducted, and a reduced amount of current flows. Since all the diodes 7 to 10 are conductive, the secondary side is short-circuited, and Er becomes 0V. Therefore, if the voltage drop of the circuit element is ignored, E2 and E1 are also 0V. In a state where the parallel diode of the semiconductor switching element 5 is conductive, the voltage applied to both ends of the leakage inductance A becomes the voltage of the capacitor 3, that is, E / 2, and the current decreases due to this voltage. When the current decreases, the parallel diode of the semiconductor switching element 5 is turned off. The current of the leakage inductance A is attenuated to 0 A after resonating with the parasitic capacitances B and C of the semiconductor switching elements 4 and 5, and the primary voltage of the transformer 6 is 0 V.

  FIG. 10 shows the voltage across the semiconductor switching element 4. When the semiconductor switching element 4 is turned off, the voltage is temporarily increased to E along with the conduction of the semiconductor switching element 5 and then becomes E / 2 when the primary voltage of the transformer 6 becomes 0V after the above-described resonance. Next, when the semiconductor switching element 5 is turned on in the forward direction by being given an ON signal, the voltage of the semiconductor switching element 4 becomes E.

  The following prior art documents exist as examples of the technology to be disclosed.

JP-A-9-285126

  However, in the above-described prior art, the voltage applied to the transformer is E / 2, whereas the voltage applied when the semiconductor switching element is turned off becomes E due to the action of the leakage inductance as described above. For this reason, the above-described prior art has a problem of generating a large switching loss.

In addition, the above-described prior art also has a problem that noise is generated due to a large voltage change during switching.
In view of the above, an object of one aspect of the present invention is to realize a DC-DC conversion circuit with small switching loss. It is also desirable to reduce noise during switching.

  An example of an embodiment is that an inverter that converts a DC voltage of a DC power source into AC using semiconductor switching elements connected in series, a transformer, and a rectifier circuit are connected in cascade, and a smoothing inductor is connected to the output of the rectifier circuit. Connect a series circuit with a smoothing capacitor, connect a load to both ends of the smoothing capacitor, connect one end of the commutation capacitor to one end of the output of the rectifier circuit, and connect the other end of the commutation capacitor and one end of the first diode The other end of the first diode is connected to the other end of the output of the rectifier circuit, and the second diode is connected in parallel between the one end of the first diode and the connection point of the smoothing inductor and the smoothing capacitor. This is realized as a DC-DC conversion circuit configured as described above and has the following configuration.

  In other words, each capacitor is connected in parallel to the semiconductor switching element and includes a capacitor that is set to a capacitance value that does not reach the voltage of the DC power supply when charged by the leakage inductance of the transformer.

According to the present invention, the applied voltage of the semiconductor switching element at the time of turn-off is reduced from about E to about E / 2, and accordingly switching loss can be reduced.
Further, according to the present invention, the voltage change at the time of switching and the subsequent vibration are suppressed, and the generated noise can be reduced.

It is a circuit block diagram of 1st Embodiment. It is operation | movement explanatory drawing of 1st Embodiment. It is an operation | movement waveform diagram of 1st Embodiment. It is a circuit block diagram of 2nd Embodiment. It is operation | movement explanatory drawing of 2nd Embodiment. It is a circuit block diagram of 3rd Embodiment. It is a circuit block diagram of a prior art. It is an operation | movement timing chart of a prior art. It is operation | movement explanatory drawing of a prior art. It is an operation | movement waveform diagram of a prior art.

Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings.
FIG. 1 is a circuit configuration diagram of a first embodiment of the present invention. The same parts as those in FIG. 7 are denoted by the same reference numerals, and the description thereof is omitted. In FIG. 1, 14 is a capacitor, and 15 and 16 are diodes. A circuit composed of 14 to 16 is shown as a snubber for a rectifier diode in Patent Document 1. However, the action on the primary side circuit is not mentioned.

  In FIG. 1, when the semiconductor switching element 4 is turned on and a voltage is applied to the transformer 6, the rectified voltage Er is higher than the output voltage Eo in a steady state, so that the current flows through the path of the capacitor 14 → the diode 15 → the capacitor 12. The capacitor 14 is charged. The electromotive force for charging the capacitor 14 is Er-Eo, but it is charged up to about twice that due to the LC resonance between the leakage inductance A and the capacitor 14.

  When the semiconductor switching element 4 is turned off and enters the recirculation period, the capacitor 14 is discharged along the path of the diode 16 → the capacitor 14 → the inductor 11 as shown in the operation explanatory diagram of FIG. During this discharge, ignoring the forward voltage drop of the diode, Er becomes equal to the voltage of the capacitor 14, and does not immediately become 0V unlike the circuit shown in FIG. For this reason, E2 and E1 also maintain a certain value of voltage. The leakage inductance A flows in toward the counter voltage E1, and therefore decreases more quickly than in the case of FIG. If the leakage inductance A is sufficiently small and the current change rate is large, or if the parasitic capacitances B and C are sufficiently large and the voltage change rate is small, the current becomes 0 A before the semiconductor switching element 5 is turned on in the reverse direction. Therefore, when the semiconductor switching element 4 is turned off, the voltage applied to the semiconductor switching element 4 becomes smaller than E as shown in the operation waveform diagram of FIG.

  In order to obtain this effect clearly, it is desirable to first reduce the value of the leakage inductance A, but if this is not possible, the parasitic capacitances B and C are increased. In FIG. 1, parasitic capacitance is used, but if it is insufficient, a capacitor is added in parallel. However, if this capacitor is made too large, when the semiconductor switching element 5 is turned on, the parasitic capacitance B is charged from E / 2 → E, and the parasitic capacitance C is discharged from E / 2 → 0V. The charge / discharge current increases and the loss associated with this increases. For this reason, the value of the capacitor needs to be minimized.

  In FIG. 1, the primary circuit has a half-bridge configuration, but a full-bridge configuration may be used. In this case, parallel capacitors can be provided in parallel to all the semiconductor switching elements, or can be provided only above and below one of the series elements.

  FIG. 4 shows a circuit configuration of the second embodiment of the present invention. In FIG. 4, 101 and 102 are capacitors. The capacitance is sufficiently smaller than the capacitors 2 and 3 and larger than the parasitic capacitances B and C is applied. Reference numerals 103 and 104 denote semiconductor switching elements. The circuit of the second embodiment having the configuration of FIG. 4 can be applied when the leakage inductance A cannot be made sufficiently small.

  For example, when the semiconductor switching element 4 is turned off, the semiconductor switching element 104 is turned on. When the voltage across the semiconductor switching element 4 exceeds the voltage of the capacitor 101, the semiconductor switching element 103 conducts in the opposite direction, and as shown in the operation explanatory diagram of FIG. 5, the capacitor 101 → the semiconductor switching element 104 → the semiconductor switching element. 103 → leakage inductance A → transformer 6 → capacitor 2 → semiconductor switching element 4 and capacitor 102 → semiconductor switching element 104 → semiconductor switching element 103 → leakage inductance A → transformer 6 → capacitor 3 → capacitor 102 Current flows. As a result, the capacitor 101 is charged and the capacitor 102 is discharged.

  During this operation, the voltage across the semiconductor switching element 4 is approximately equal to the voltage of the capacitor 101. As a result, the voltage change of the semiconductor switching element 4 is suppressed, and the current of the leakage inductance A is attenuated during that time. For this reason, even if the value of the leakage inductance A is large to some extent, the voltage of the semiconductor switching element 4 is suppressed to around E / 2.

  When turning on the semiconductor switching element 5, the semiconductor switching element 104 is turned off in advance to prevent the capacitor 101 from being charged to E and the capacitor 102 from being discharged to 0 V through the semiconductor switching element 5. . When the semiconductor switching element 5 is turned off, the capacitor 101 is discharged and the capacitor 102 is charged by turning on the semiconductor switching element 103 in advance.

  Also in FIG. 4, the primary side circuit may have a full bridge configuration. In this case, the circuit composed of 101 to 104 can be provided in both semiconductor switching element series circuits, or can be provided in only one of them.

  FIG. 6 shows a circuit configuration of the third embodiment of the present invention. Reference numeral 105 denotes a voltage-dependent capacitor, which has a property that its capacitance decreases from a fraction to a few tens of times as the applied voltage increases from 0 V to the rated voltage. As those exhibiting such characteristics, semiconductor parasitic capacitance and some ceramic capacitors are known.

  When the semiconductor switching element 4 is turned off, the voltage dependent capacitor 105 is initially charged to E / 2, but is discharged by the leakage inductance A. When the voltage of the semiconductor switching element 4 is in the vicinity of E / 2, that is, the voltage of the voltage-dependent capacitor 105 is in the vicinity of 0 V, the capacitance of the voltage-dependent capacitor 105 increases rapidly to prevent voltage change. For this reason, the voltage of the semiconductor switching element 4 remains in the vicinity of E / 2.

  When the semiconductor switching element 5 is turned on, the voltage-dependent capacitor 105 is charged up to E / 2 in the reverse polarity, but the capacitance of the voltage-dependent capacitor 105 is rapidly reduced as the voltage increases, so that the charging current is suppressed. The For this reason, it is possible to exert a voltage suppressing effect near the element voltage E / 2 while suppressing a loss due to charging to a smaller value than when a normal capacitor is provided.

In FIG. 6, the capacitors 2 and 3 to which the voltage-dependent capacitor 105 is connected also serve as a series capacitor having a half-bridge configuration. However, a series capacitor may be provided separately from the capacitors 2 and 3. Furthermore, the primary side circuit can have a full bridge configuration, and each or one of the semiconductor switching element series circuits can be provided with a circuit composed of a capacitor corresponding to the voltage-dependent capacitor 105 and a series capacitor.

  According to each embodiment described above, the applied voltage of the semiconductor switching element at the time of turn-off is reduced from E to about E / 2, and accordingly, switching loss can be reduced.

  Moreover, according to each said embodiment, the voltage change at the time of switching and subsequent vibration are suppressed, and it becomes possible to reduce generated noise.

DESCRIPTION OF SYMBOLS 1 DC power supply 2, 3, 12, 14, 101, 102 Capacitor 4, 5, 103, 104 Semiconductor switching element 6 Transformer 7-10, 15, 16, Diode 11 Inductor 13 Load 105 Voltage dependence capacitor A Leakage inductance B , C Parasitic capacitance

Claims (3)

An inverter that converts the DC voltage of the DC power source into AC using a semiconductor switching element connected in series, a transformer, and a rectifier circuit are cascaded, and a series of a smoothing inductor and a smoothing capacitor is connected to the output of the rectifier circuit. Connecting a circuit, connecting a load across the smoothing capacitor, connecting one end of the commutation capacitor to one end of the output of the rectifier circuit, connecting the other end of the commutation capacitor and one end of the first diode; The other end of the first diode and the other end of the output of the rectifier circuit are connected, and a second diode is connected in parallel between one end of the first diode and a connection point between the smoothing inductor and the smoothing capacitor. In a DC-DC converter circuit configured to be connected to
A capacitor that is connected in parallel to each of the semiconductor switching elements and has a capacitance set to a capacitance value that does not reach a voltage of the DC power supply when charged by a leakage inductance of the transformer;
A DC-DC conversion circuit characterized by that. A series circuit of a switch element and a parallel capacitor is provided in parallel to each of the semiconductor switching elements, and the switch elements are made conductive when the semiconductor switching elements are turned off, and other semiconductor switching elements connected in series to the semiconductor switching elements The switch element is cut off at the time of turn-on so that the voltage at the time of turn-off of the semiconductor switching element and the maximum voltage of the parallel capacitor are approximately ½ of the voltage of the DC power supply.
The DC-DC converter circuit according to claim 1, wherein: Capacitor circuits connected in series with each of the DC power supplies in parallel are connected, and voltage dependency that capacitance decreases when a voltage is applied between a connection point between the capacitor circuits and a connection point between the semiconductor switching elements. Connect the capacitor,
The DC-DC converter circuit according to claim 1, wherein:

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