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JP2011015112A - Radio receiver - Google Patents

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JP2011015112A
JP2011015112A JP2009156544A JP2009156544A JP2011015112A JP 2011015112 A JP2011015112 A JP 2011015112A JP 2009156544 A JP2009156544 A JP 2009156544A JP 2009156544 A JP2009156544 A JP 2009156544A JP 2011015112 A JP2011015112 A JP 2011015112A
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reception
mixer
performance
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interference
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Shigetaka Ehata
成隆 江幡
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Kokusai Denki Electric Inc
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Hitachi Kokusai Electric Inc
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Abstract

【課題】FDD方式におけるダイレクトコンバージョン受信方式において、受信BPFなしで所要耐干渉性能を得ることの出来る無線技術を安価に提供する。
【解決手段】ダイレクトコンバージョン受信方式の無線装置100において、耐干渉性能の向上のために、2次歪み性能(IP2性能)の異なる2つ以上の受信ミキサ(第1及び第2の受信ミキサ50、60)と、2次歪み性能の高い(高IP2)受信ミキサ(第2の受信ミキサ60)を実現する為の高い電源電圧を作り出す昇圧回路40と、受信ミキサ(50、60)を切り替える受信ミキサ切り替え制御手段であるDSP37とを備える。DSP37は、自局送信出力に応じて受信ミキサを切り替える。
【選択図】図3
In a direct conversion reception system in an FDD system, a radio technology capable of obtaining a required interference-resistant performance without a reception BPF is provided at low cost.
In a radio apparatus 100 of a direct conversion reception system, two or more reception mixers (first and second reception mixers 50, 50) having different second-order distortion performance (IP2 performance) are provided in order to improve anti-interference performance. 60), a booster circuit 40 that generates a high power supply voltage for realizing a (high IP2) reception mixer (second reception mixer 60) with high second-order distortion performance, and a reception mixer that switches between the reception mixers (50, 60) And a DSP 37 as switching control means. The DSP 37 switches the reception mixer according to the local station transmission output.
[Selection] Figure 3

Description

本発明は、無線受信機に係り、例えばFDD(周波数分割複信)方式におけるダイレクトコンバージョン受信方式の無線受信機に関する。   The present invention relates to a radio receiver, and more particularly to a radio receiver using a direct conversion reception method in an FDD (frequency division duplex) method.

WCDMA(Wideband Code Division Multiple Access)に代表される広帯域無線システムにおいては、安価な回路構成が可能なダイレクトコンバージョン受信方式を採用した無線機器構成が一般化している。しかしながら、FDD(Frequency Division Duplex)方式による複信方式では、自局送信キャリアリークが受信性能(耐干渉性能)に影響を与える為、その回避策が課題となっている。   In a broadband wireless system represented by WCDMA (Wideband Code Division Multiple Access), a configuration of a wireless device adopting a direct conversion reception method capable of an inexpensive circuit configuration is generalized. However, in the duplex system based on the FDD (Frequency Division Duplex) system, the self-station transmission carrier leak affects the reception performance (interference immunity performance), and there is a problem of how to avoid it.

図1に、従来技術によるWCDMAダイレクトコンバージョン受信方式の一般的な構成を示す。また、図2(a)は、自局送信キャリアリークが存在する状態で、別の干渉波(ブロッカ)が受信機に入力された場合の2次歪みによる感度劣化のプロセスを示した図である。また、図2(b)は、ダイレクトコンバージョン受信方式で問題となる干渉妨害の一つ、1波干渉波(ブロッカ)による干渉妨害発生プロダクトを示した図である。   FIG. 1 shows a general configuration of a conventional WCDMA direct conversion reception system. FIG. 2 (a) is a diagram showing a process of deteriorating sensitivity due to second-order distortion when another interference wave (blocker) is input to the receiver in the state where the local station transmission carrier leak exists. . FIG. 2B is a diagram showing an interference generation product due to one-wave interference wave (blocker), which is one of the interference interferences that are problematic in the direct conversion reception system.

図2(a)に示すように自局送信状態において、干渉波(ブロッカ)が希望波と同時に受信機に入力された場合、広帯域変調された自局送信キャリアリークが受信ミキサでの包絡線検波によりベースバンド帯域に落ち込む歪みが発生し、感度劣化が生じる。また、図2(b)に示すように、希望波とともに高いレベルの干渉波(ブロッカ)が受信ミキサに入力された場合、受信ミキサの非線形性により歪みが発生し、特に干渉波(ブロッカ)が変調波の場合、包絡線検波によりベースバンド帯域(DC〜低周波帯)に歪み成分が発生し、感度劣化が生じてしまう。従来、干渉妨害の回避として、一般には受信ミキサの2次歪み性能(IP2)を高くすることで対処がなされている。   As shown in FIG. 2A, when an interference wave (blocker) is input to the receiver at the same time as the desired wave in the local station transmission state, the wideband modulated local station transmission carrier leak is detected by envelope detection at the reception mixer. As a result, distortion that falls into the baseband band occurs, resulting in deterioration of sensitivity. Further, as shown in FIG. 2B, when a high level interference wave (blocker) is input to the receiving mixer together with the desired wave, distortion occurs due to the non-linearity of the receiving mixer, and in particular, the interference wave (blocker) is generated. In the case of a modulated wave, a distortion component is generated in the baseband band (DC to low frequency band) by envelope detection, and sensitivity deterioration occurs. Conventionally, in order to avoid interference, a countermeasure is generally taken by increasing the secondary distortion performance (IP2) of the receiving mixer.

本来、受信ミキサを低歪み(高IP2)化し、歪み発生を抑える必要があるが、現実には消費電流等の制約により受信ミキサでの改善が難しい。従って、一般的には自局送信キャリアリークを十分減衰させる為のフィルタが挿入される。その必要減衰量は、DUP(デュプレクサ)での送信から受信へのアイソレーションにより行われ、DUPのアイソレーション不足分は受信BPF(帯域フィルタ)により補うことにより、受信ミキサでの歪み発生レベルが抑制されている。また、2次歪み特性の影響を低減する技術として、特許文献1に開示の技術がある。この特許文献1に開示の技術は、ダイレクトコンバージョンミキサの入力部に直流バイアスのキャリブレーション手段を設け、受信レベルと送信電力に設けた閾値に対応して、予め前記の直流バイアスのキャリブレーションを行う。   Originally, it is necessary to reduce the distortion of the reception mixer (high IP2) and suppress the occurrence of distortion, but in reality, it is difficult to improve the reception mixer due to restrictions such as current consumption. Therefore, in general, a filter for sufficiently attenuating the local transmission carrier leak is inserted. The required attenuation is performed by DUP (duplexer) transmission to reception isolation, and DUP isolation deficiency is compensated by reception BPF (bandpass filter) to suppress the level of distortion at the reception mixer. Has been. As a technique for reducing the influence of the secondary distortion characteristics, there is a technique disclosed in Patent Document 1. In the technique disclosed in Patent Document 1, DC bias calibration means is provided at the input section of the direct conversion mixer, and the DC bias is calibrated in advance in accordance with the threshold values provided for the reception level and transmission power. .

特開2002−335182号公報JP 2002-335182 A

ところで、図2(a)の対策にあっては、DUP以外に受信BPFが必要となり、コスト高となってしまう課題があった。また、図2(b)の対策にあっては、消費電流、電源電圧等の制約により、所要性能を得る事が難しいのが実情であった。その為、業務用無線機等の狭帯域無線システムの分野では、ダブルスーパヘテロダイン受信方式が主流となっており、それを構成する回路規模も大きく、コスト低減が難しい状況となっていた。また、特許文献1に開示の技術では、入力バイアスのアンバランスを調整することで2次歪みを改善できたが、自局送信キャリアリークに対処する技術では無いため、自局送信キャリアリークに対処するためには受信BPFが必要となってしまうという課題があった。   By the way, in the countermeasure of FIG. 2A, there is a problem that the reception BPF is required in addition to the DUP, resulting in high cost. Further, in the countermeasure of FIG. 2B, it is actually difficult to obtain the required performance due to restrictions such as current consumption and power supply voltage. Therefore, in the field of narrow-band radio systems such as commercial radios, the double superheterodyne reception system has become the mainstream, and the circuit scale constituting it is large, making it difficult to reduce costs. In the technique disclosed in Patent Document 1, the secondary distortion can be improved by adjusting the imbalance of the input bias. However, since the technique is not a technique for dealing with the local transmission carrier leak, the local transmission carrier leak is dealt with. In order to do so, there is a problem that a reception BPF is required.

本発明は、このような状況に鑑みなされたもので、FDD方式におけるダイレクトコンバージョン受信方式において、受信BPFなしで所要耐干渉性能を得ることの出来る無線技術を安価に提供することを目的とする。   The present invention has been made in view of such a situation, and an object of the present invention is to provide, at a low cost, a radio technology capable of obtaining a required interference resistance performance without a reception BPF in a direct conversion reception system in the FDD system.

本発明に係る装置は、ダイレクトコンバージョン方式の無線受信機であって、歪み性能の異なる複数の受信ミキサと、前記受信ミキサを切り替える制御手段とを備える。   An apparatus according to the present invention is a direct conversion radio receiver, and includes a plurality of reception mixers having different distortion performances and a control unit that switches the reception mixers.

本発明によると、FDD方式におけるダイレクトコンバージョン受信方式において、受信BPFなしで所要耐干渉性能を得ることの出来る無線技術を安価に提供することができる。   According to the present invention, it is possible to provide, at a low cost, a radio technology that can obtain the required interference resistance without receiving BPF in the direct conversion reception method in the FDD method.

従来技術に係る、ダイレクトコンバージョン受信方式の一般的な無線機の機能ブロック図である。It is a functional block diagram of the general radio | wireless machine of a direct conversion reception system based on a prior art. 従来技術に係る、干渉波(ブロッカ)が受信機に入力された場合の2次歪みによる感度劣化のプロセスを示した図である。It is the figure which showed the process of the sensitivity degradation by the secondary distortion when the interference wave (blocker) based on a prior art is input into the receiver. 実施形態に係る、ダイレクトコンバージョン受信方式の無線装置の機能ブロック図である。It is a functional block diagram of the radio device of a direct conversion reception system concerning an embodiment. 実施形態に係る、第1の受信ミキサが選択されている信号経路に着目して受信系を示した図である。It is the figure which showed the receiving system paying attention to the signal path | route which the 1st receiving mixer based on embodiment is selected. 実施形態に係る、第2の受信ミキサが選択されている信号経路に着目して受信系を示した図である。It is the figure which showed the receiving system paying attention to the signal path | route which the 2nd receiving mixer based on embodiment is selected.

次に、本発明を実施するための形態(以下、単に「実施形態」という)を、図面を参照して具体的に説明する。以下に説明する実施形態は、ダイレクトコンバージョン受信方式における耐干渉性能の向上のための技術に関し、その構成は、2次歪み性能(IP2性能)の異なる2つ以上の受信ミキサ(低IP2、高IP2等)と、2次歪み性能の高い(高IP2)受信ミキサを実現する為の高い電源電圧を作り出す昇圧回路と、受信ミキサを切り替える受信ミキサ切り替え制御部とを備え、所要耐干渉性能を実現させている。そして、第1の実施形態では、自局送信出力に応じて受信ミキサを切り替え、第2の実施形態では、干渉ブロックの検出に応じて受信ミキサを切り替える。   Next, modes for carrying out the present invention (hereinafter, simply referred to as “embodiments”) will be specifically described with reference to the drawings. The embodiment described below relates to a technique for improving interference resistance in a direct conversion reception system, and the configuration thereof includes two or more reception mixers (low IP2, high IP2) having different second-order distortion performance (IP2 performance). Etc.) and a booster circuit that generates a high power supply voltage for realizing a reception mixer with high second-order distortion performance (high IP2), and a reception mixer switching control unit that switches the reception mixer to achieve the required anti-interference performance. ing. In the first embodiment, the reception mixer is switched in accordance with the local station transmission output, and in the second embodiment, the reception mixer is switched in accordance with the detection of the interference block.

<第1の実施形態>
図3は、本実施形態に係る、ダイレクトコンバージョン受信方式により動作する無線装置100の概略構成を示す機能ブロック図である。この無線装置100は、送信系110と受信系120とDUP(デュプレクサ)10とを備え、アンテナから送信すべき送信信号とアンテナで受信された受信信号とはDUP10により分離される。
<First Embodiment>
FIG. 3 is a functional block diagram illustrating a schematic configuration of the wireless device 100 that operates according to the direct conversion reception method according to the present embodiment. The radio apparatus 100 includes a transmission system 110, a reception system 120, and a DUP (duplexer) 10, and a transmission signal to be transmitted from an antenna and a reception signal received by the antenna are separated by the DUP 10.

送信系110は、BPF(Band Pass Filter)22と、PA(Power Amplifier)24と、アイソレータ26とを備える。BPF22は、直交変換器から取得した信号に対して帯域制限処理を施しPA24へ出力する。PA24は、BPF22を通過した信号を増幅しアイソレータ26へ出力する。アイソレータ26は、PA24からの信号を出力し、一方、DUP10からの信号を遮断する。   The transmission system 110 includes a BPF (Band Pass Filter) 22, a PA (Power Amplifier) 24, and an isolator 26. The BPF 22 performs band limitation processing on the signal acquired from the orthogonal transformer and outputs the result to the PA 24. The PA 24 amplifies the signal that has passed through the BPF 22 and outputs the amplified signal to the isolator 26. The isolator 26 outputs the signal from the PA 24 while blocking the signal from the DUP 10.

受信系120は、上流側(DUP10側)からLNA(Low Noise Amplifier)31、前段スイッチ32、第1の受信ミキサ50、第2の受信ミキサ60、後段スイッチ33、LPF(Low Pass Filter;34a、34b)、VGA(Variable Gain Amplifier;35a、35b)、AD(アナログ/デジタル変換器;36a、36b)、DSP(Digital Signal Processor)37、昇圧回路40及び局部発振器55を備えている。なお、第1の受信ミキサ50と第2の受信ミキサ60は、それぞれ異なる歪み特性を有しており、いずれか一方が選択的に使用される。   The reception system 120 includes an LNA (Low Noise Amplifier) 31, a front switch 32, a first reception mixer 50, a second reception mixer 60, a rear switch 33, an LPF (Low Pass Filter; 34 a) from the upstream side (DUP 10 side). 34b), VGA (Variable Gain Amplifiers; 35a, 35b), AD (Analog / Digital Converters; 36a, 36b), DSP (Digital Signal Processor) 37, booster circuit 40 and local oscillator 55. Note that the first reception mixer 50 and the second reception mixer 60 have different distortion characteristics, and either one is selectively used.

LNA31は、入力された信号(高周波信号)を選択及び増幅し前段スイッチ32へ出力する。このとき、増幅された信号は第1及び第2の経路91、92に分岐される。第1及び第2の経路91、92の信号は、第1の受信ミキサ50及び移相器52、又は第2の受信ミキサ60及び移相器62によって直交ベースバンド信号に変換される。   The LNA 31 selects and amplifies the input signal (high frequency signal) and outputs it to the pre-stage switch 32. At this time, the amplified signal is branched to the first and second paths 91 and 92. The signals of the first and second paths 91 and 92 are converted into quadrature baseband signals by the first reception mixer 50 and the phase shifter 52 or the second reception mixer 60 and the phase shifter 62.

ここで、第1の受信ミキサ50は、第2の受信ミキサ60と比較して相対的に2次歪み性能が低くなっている。第1の受信ミキサ50は、第1低出力用周波数変換回路51a及び第2低出力用周波数変換回路51bを備えている。   Here, the first receiving mixer 50 has a relatively low second-order distortion performance as compared with the second receiving mixer 60. The first reception mixer 50 includes a first low-output frequency conversion circuit 51a and a second low-output frequency conversion circuit 51b.

第2の受信ミキサ60は、第1の受信ミキサ50と同様に、第1高出力用周波数変換回路61a及び第2高出力用周波数変換回路61bを備えている。第2の受信ミキサ60は、第1の受信ミキサ50と比較して相対的に2次歪み性能が高くなっている。この特性を実現するために、第2の受信ミキサ60には、3Vの電源電圧が昇圧回路40で6Vに昇圧されて供給される。このような構成とすることで、第2の受信ミキサ60は、十分なダイナミックレンジと電流供給にて、自局送信出力が高い状態であっても、所望の耐干渉性能を得るだけの低2次歪み(高IP2)性能を有する。   Similar to the first reception mixer 50, the second reception mixer 60 includes a first high-output frequency conversion circuit 61a and a second high-output frequency conversion circuit 61b. The second receiving mixer 60 has a relatively high second-order distortion performance as compared with the first receiving mixer 50. In order to realize this characteristic, a power supply voltage of 3V is boosted to 6V by the booster circuit 40 and supplied to the second reception mixer 60. By adopting such a configuration, the second receiving mixer 60 is low enough to obtain a desired anti-interference performance even when the local transmission output is high with a sufficient dynamic range and current supply. Has second-order distortion (high IP2) performance.

前段スイッチ32は、第1の経路91の第1の前段スイッチ32a及び第2の経路92の第2の前段スイッチ32bとを備え、それぞれにLNA31からの信号が入力される。そして、第1の前段スイッチ32aは、LNA31からの信号を第1低出力用周波数変換回路51aまたは第1高出力用周波数変換回路61aのいずれかを選択して出力する。また、第2の前段スイッチ32bは、LNA31からの信号を第2低出力用周波数変換回路51bまたは第2高出力用周波数変換回路61bのいずれかを選択して出力する。   The pre-stage switch 32 includes a first pre-stage switch 32a of the first path 91 and a second pre-stage switch 32b of the second path 92, and a signal from the LNA 31 is input to each. The first front-stage switch 32a selects and outputs the signal from the LNA 31 by selecting either the first low-output frequency converter circuit 51a or the first high-output frequency converter circuit 61a. Further, the second pre-stage switch 32b selects and outputs the signal from the LNA 31 by selecting either the second low output frequency conversion circuit 51b or the second high output frequency conversion circuit 61b.

後段スイッチ33は、第1の後段スイッチ33aと第2の後段スイッチ33bとを備えている。第1の後段スイッチ33aは、第1低出力用周波数変換回路51aまたは第1高出力用周波数変換回路61aのいずれかを選択してLPF34aに出力する。同様に、第2の後段スイッチ33bは、第2低出力用周波数変換回路51bまたは第2高出力用周波数変換回路61bのいずれかを選択してLPF34bへ出力する。   The rear switch 33 includes a first rear switch 33a and a second rear switch 33b. The first post-stage switch 33a selects either the first low-output frequency converter circuit 51a or the first high-output frequency converter circuit 61a and outputs the selected signal to the LPF 34a. Similarly, the second post-stage switch 33b selects either the second low output frequency conversion circuit 51b or the second high output frequency conversion circuit 61b and outputs the selected low output frequency to the LPF 34b.

LPF34a、34bは、それぞれの経路(91、92)において、所望の信号帯域をフィルタリングして各VGA35a、35bへ出力する。VGA35a、35bは、ベースバンド可変利得調整手段であって、利得制御を行う。AD36a、36bは、VGA35a、35bで利得制御された信号に対してAD変換を施し、DSP37へ出力する。   The LPFs 34a and 34b filter desired signal bands in the respective paths (91 and 92) and output the filtered signal bands to the VGAs 35a and 35b. The VGAs 35a and 35b are baseband variable gain adjusting means and perform gain control. The ADs 36 a and 36 b perform AD conversion on the signals whose gains are controlled by the VGAs 35 a and 35 b and output the signals to the DSP 37.

DSP37は、復調処理及び逆拡散処理等を行いデータ信号及びクロック信号を得る。さらに、DSP37は、前段スイッチ32及び後段スイッチ33の動作を制御して、待ち受け時及び通信時で自局送信出力が低い状態(以下、「低出力状態」という)において、第1の受信ミキサ50を選択し、通信時で自局送信出力が高い状態(以下、「高出力状態」という)において第2の受信ミキサ60を選択する。   The DSP 37 performs demodulation processing, despreading processing, and the like to obtain a data signal and a clock signal. Further, the DSP 37 controls the operations of the front-stage switch 32 and the rear-stage switch 33 so that the first reception mixer 50 is in a state where the local station transmission output is low (hereinafter referred to as “low output state”) during standby and during communication. And the second reception mixer 60 is selected in a state where the local station transmission output is high during communication (hereinafter referred to as “high output state”).

より具体的には、低出力状態のときに、図4に示すように、DSP37は、第1の前段スイッチ32a及び第1の後段スイッチ33aに対して第1低出力用周波数変換回路51aに接続するように制御信号を出力する。同様に、DSP37は、第2の前段スイッチ32b及び第2の後段スイッチ33bに対して第2低出力用周波数変換回路51bに接続するように制御信号を出力する。つまり、上流側から下流側へ信号が流れる経路として、LNA31、第1の前段スイッチ32a、第1低出力用周波数変換回路51a、第1の後段スイッチ33a、LPF34aを信号が流れる経路91aと、LNA31、第2の前段スイッチ32b、第2低出力用周波数変換回路51b、第2の後段スイッチ33b、LPF34bを信号が流れる経路92aが形成される。なお、図4及び後述の図5は、無線装置100の受信系120を示しており、一部構成及び符号を省略している。   More specifically, as shown in FIG. 4, in the low output state, the DSP 37 is connected to the first low output frequency conversion circuit 51a with respect to the first front switch 32a and the first rear switch 33a. The control signal is output as follows. Similarly, the DSP 37 outputs a control signal to the second front-stage switch 32b and the second rear-stage switch 33b so as to be connected to the second low-output frequency conversion circuit 51b. That is, as a path through which a signal flows from the upstream side to the downstream side, the LNA 31, the first front-stage switch 32a, the first low-output frequency conversion circuit 51a, the first rear-stage switch 33a, the path 91a through which the signal flows through the LPF 34a, and the LNA 31 A path 92a through which a signal flows is formed through the second pre-stage switch 32b, the second low-output frequency conversion circuit 51b, the second post-stage switch 33b, and the LPF 34b. 4 and FIG. 5 described later show the reception system 120 of the wireless device 100, and a part of the configuration and reference numerals are omitted.

一方、高出力状態のときには、図5に示すように、DSP37は、第1の前段スイッチ32a及び第1の後段スイッチ33aに対して第1高出力用周波数変換回路61aに接続するように制御信号を出力する。同様に、DSP37は、第2の前段スイッチ32b及び第2の後段スイッチ33bに対して第2高出力用周波数変換回路61bに接続するように制御信号を出力する。つまり、上流側から下流側へ信号が流れる経路として、LNA31、第1の前段スイッチ32a、第1高出力用周波数変換回路61a、第1の後段スイッチ33a、LPF34aを信号が流れる経路91bと、LNA31、第2の前段スイッチ32b、第2高出力用周波数変換回路61b、第2の後段スイッチ33b、LPF34bを信号が流れる経路92bが形成される。   On the other hand, in the high output state, as shown in FIG. 5, the DSP 37 controls the first front-stage switch 32a and the first rear-stage switch 33a to connect to the first high-output frequency conversion circuit 61a. Is output. Similarly, the DSP 37 outputs a control signal to the second front-stage switch 32b and the second rear-stage switch 33b so as to be connected to the second high-output frequency conversion circuit 61b. That is, as a path through which the signal flows from the upstream side to the downstream side, the LNA 31, the first front-stage switch 32a, the first high-output frequency conversion circuit 61a, the first rear-stage switch 33a, and the path 91b through which the LPF 34a flows, and the LNA 31 A path 92b through which a signal flows is formed through the second pre-stage switch 32b, the second high-output frequency conversion circuit 61b, the second post-stage switch 33b, and the LPF 34b.

以上の構成による無線装置100によると、待ち受け受信及び通信時で自局送信出力が低い状態である低出力状態にあっては、第1の受信ミキサ50(51a、51b)が選択され、低消費電流の動作態様にて運用される。また、通信時であって自局送信出力が高い状態では、DSP37が受信ミキサを第1の受信ミキサ50から第2の受信ミキサ60(61a、61b)へ切り替える。上述の通り、第2の受信ミキサ60は、第1の受信ミキサ50と比較して低2次歪み特性を有しているため、所望の耐干渉性能を確保することができる。また、通信時に自局送信出力が低くなった場合や、待ち受け受信になった場合は、DSP37は受信ミキサを第1の受信ミキサ50へ切り替え、低消費電流の動作形態に移行させる。この様に、自局送信出力に応じ、受信ミキサを適時切り替え、所要耐干渉性能を確保させる様に動作せると共に、電力消費の最適化を実現することができる。また、受信BPFを装備することなく所要耐干渉性能を得ることが可能となり、安価に無線機器を提供出来る。   According to the wireless device 100 having the above configuration, the first reception mixer 50 (51a, 51b) is selected in the low output state in which the local station transmission output is low during standby reception and communication, thereby reducing power consumption. It is operated in the current mode of operation. Further, in communication and when the local station transmission output is high, the DSP 37 switches the reception mixer from the first reception mixer 50 to the second reception mixer 60 (61a, 61b). As described above, the second reception mixer 60 has a low second-order distortion characteristic as compared with the first reception mixer 50, and therefore, it is possible to ensure desired interference resistance performance. Further, when the local station transmission output becomes low during communication or when standby reception is performed, the DSP 37 switches the reception mixer to the first reception mixer 50 and shifts to the operation mode with low current consumption. In this way, it is possible to switch the reception mixer in a timely manner in accordance with the transmission output of the local station and to operate so as to ensure the required anti-interference performance, and to optimize power consumption. Further, it is possible to obtain the required anti-interference performance without providing a receiving BPF, and it is possible to provide a wireless device at a low cost.

<第2の実施形態>
本実施形態に係る無線装置100は第1の実施形態の無線装置100と同一の構成で実現できる。異なる点は、受信ミキサの切り替え条件にあり、本実施形態では、DSP37が検出した干渉ブロックに応じて受信ミキサ(50、60)を切り替える。本実施形態は、主に図2(b)に示したように、希望波とともに高いレベルの干渉波(ブロッカ)が受信ミキサに入力された場合、2次歪みの性能向上を実現させることを想定している。
<Second Embodiment>
The wireless device 100 according to the present embodiment can be realized with the same configuration as the wireless device 100 of the first embodiment. The difference is in the receiving mixer switching condition. In this embodiment, the receiving mixer (50, 60) is switched according to the interference block detected by the DSP 37. In the present embodiment, as shown mainly in FIG. 2B, it is assumed that when a high-level interference wave (blocker) is input to the reception mixer together with the desired wave, the performance improvement of the second-order distortion is realized. is doing.

そこで、無線装置100において、DSP37は干渉波(ブロッカ)の有無を判断し、干渉波が無いと判断した場合は、第1の受信ミキサ50を選択する。これによって低消費電流での動作形態にて運用される。一方、DSP37は、高いレベルの干渉波(ブロッカ)が現れたと判断すると、動作すべき受信ミキサとして、第2の受信ミキサ60(61a、61b)に切り替え、歪みを軽減させることにより良好な通信状態を保持する。   Therefore, in the wireless device 100, the DSP 37 determines the presence or absence of an interference wave (blocker), and selects the first reception mixer 50 when determining that there is no interference wave. As a result, it is operated in an operation mode with low current consumption. On the other hand, if the DSP 37 determines that a high-level interference wave (blocker) has appeared, the DSP 37 switches to the second reception mixer 60 (61a, 61b) as the reception mixer to be operated, thereby reducing the distortion, thereby improving the communication state. Hold.

また、DSP37は、適時、干渉波を検出しており、干渉波(ブロッカ)が無くなった場合あるいは、干渉波レベルが低くなったと判断すると、動作すべき受信ミキサとして第1の受信ミキサ50(51a、51b)へ切り替え、低消費電流の動作形態に移行させる。この様に、高いレベルの干渉波(ブロッカ)が現れた場合のみ、歪み性能の高い受信ミキサを選択し通信を維持するように作用する。   Further, the DSP 37 detects the interference wave at the appropriate time, and when the interference wave (blocker) disappears or when it is determined that the interference wave level is low, the first reception mixer 50 (51a) as the reception mixer to be operated. , 51b) to shift to an operation mode with low current consumption. In this way, only when a high level interference wave (blocker) appears, the reception mixer having a high distortion performance is selected to maintain communication.

本実施形態によると、第1の実施形態と同様に、狭帯域無線システムにおいてもダイレクトコンバージョン受信方式を取り入れる事が可能となり安価に無線機器を提供出来る。   According to the present embodiment, as in the first embodiment, it is possible to adopt a direct conversion reception method even in a narrowband wireless system, and a wireless device can be provided at low cost.

以上、本発明を実施形態をもとに説明した。この実施形態は例示であり、それらの各構成要素の組み合わせにいろいろな変形例が可能なこと、またそうした変形例も本発明の範囲にあることは当業者に理解されるところである。例えば、上述の実施形態では、切り替え対称となる受信ミキサを2種類としたが、これに限る趣旨ではなく、3種類以上の歪み特性を有するように受信ミキサを設けてもよい。   The present invention has been described based on the embodiments. This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of these components, and such modifications are also within the scope of the present invention. For example, in the above-described embodiment, two types of reception mixers that are symmetrical to each other are used. However, the present invention is not limited to this, and the reception mixers may be provided so as to have three or more types of distortion characteristics.

本実施形態の特徴を簡単にまとめると以下の通りである。
本実施形態に係る無線受信機は、ダイレクトコンバージョン方式の無線受信機であって、歪み性能の異なる複数の受信ミキサと、前記受信ミキサを切り替える制御手段とを備える。
また、前記制御手段は、自局送信出力に応じて前記受信ミキサを切り替える。
また、前記制御手段は、自局送信出力が高い場合には、歪み特性の良好な受信ミキサを選択する。
また、前記制御手段は、干渉ブロックの検出に応じて前記受信ミキサを切り替える。
また、前記制御手段は、検出された干渉ブロックが大きいときに、歪み特性の良好な受信ミキサを選択する。
また、前記受信ミキサの前段に、自局送信出力のキャリアリークをフィルタリングするBPFが設けられていない。
The features of the present embodiment are summarized as follows.
The wireless receiver according to the present embodiment is a direct-conversion-type wireless receiver, and includes a plurality of reception mixers having different distortion performances and control means for switching the reception mixers.
The control means switches the reception mixer according to the local station transmission output.
The control means selects a reception mixer with good distortion characteristics when the local station transmission output is high.
The control means switches the reception mixer according to the detection of the interference block.
The control means selects a reception mixer with good distortion characteristics when the detected interference block is large.
Further, the BPF for filtering the carrier leak of the local station transmission output is not provided in the previous stage of the reception mixer.

100 無線装置
110 送信系
120 受信系
10 DUP
32 前段スイッチ
32a 第1の前段スイッチ
32b 第2の前段スイッチ
33 後段スイッチ
33a 第1の後段スイッチ
33b 第2の後段スイッチ
37 DSP
40 昇圧回路
50 第1の受信ミキサ
51a 第1低出力用周波数変換回路
51b 第2低出力用周波数変換回路
52、62 移相器
60 第2の受信ミキサ
61a 第1高出力用周波数変換回路
61b 第2高出力用周波数変換回路
100 wireless device 110 transmission system 120 reception system 10 DUP
32 Pre-stage switch 32a First pre-stage switch 32b Second pre-stage switch 33 Rear stage switch 33a First rear stage switch 33b Second rear stage switch 37 DSP
40 Booster circuit 50 First reception mixer 51a First low output frequency conversion circuit 51b Second low output frequency conversion circuit 52, 62 Phase shifter 60 Second reception mixer 61a First high output frequency conversion circuit 61b 2High-frequency output frequency conversion circuit

Claims (1)

ダイレクトコンバージョン方式の無線受信機であって、
歪み性能の異なる複数の受信ミキサと、
前記受信ミキサを切り替える制御手段と
を備えることを特徴とする無線受信機。
A direct conversion wireless receiver,
Multiple receiving mixers with different distortion performance,
And a control means for switching the receiving mixer.
JP2009156544A 2009-07-01 2009-07-01 Radio receiver Pending JP2011015112A (en)

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US8995591B2 (en) 2013-03-14 2015-03-31 Qualcomm, Incorporated Reusing a single-chip carrier aggregation receiver to support non-cellular diversity
US9026070B2 (en) 2003-12-18 2015-05-05 Qualcomm Incorporated Low-power wireless diversity receiver with multiple receive paths
US9118439B2 (en) 2012-04-06 2015-08-25 Qualcomm Incorporated Receiver for imbalanced carriers
US9154356B2 (en) 2012-05-25 2015-10-06 Qualcomm Incorporated Low noise amplifiers for carrier aggregation
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US9026070B2 (en) 2003-12-18 2015-05-05 Qualcomm Incorporated Low-power wireless diversity receiver with multiple receive paths
US9450665B2 (en) 2005-10-19 2016-09-20 Qualcomm Incorporated Diversity receiver for wireless communication
US9178669B2 (en) 2011-05-17 2015-11-03 Qualcomm Incorporated Non-adjacent carrier aggregation architecture
US9252827B2 (en) 2011-06-27 2016-02-02 Qualcomm Incorporated Signal splitting carrier aggregation receiver architecture
US9154179B2 (en) 2011-06-29 2015-10-06 Qualcomm Incorporated Receiver with bypass mode for improved sensitivity
US12081243B2 (en) 2011-08-16 2024-09-03 Qualcomm Incorporated Low noise amplifiers with combined outputs
JP2015502703A (en) * 2011-11-09 2015-01-22 クゥアルコム・インコーポレイテッドQualcomm Incorporated Dynamic receiver switching
US9362958B2 (en) 2012-03-02 2016-06-07 Qualcomm Incorporated Single chip signal splitting carrier aggregation receiver architecture
US9172402B2 (en) 2012-03-02 2015-10-27 Qualcomm Incorporated Multiple-input and multiple-output carrier aggregation receiver reuse architecture
US9118439B2 (en) 2012-04-06 2015-08-25 Qualcomm Incorporated Receiver for imbalanced carriers
US9166852B2 (en) 2012-05-25 2015-10-20 Qualcomm Incorporated Low noise amplifiers with transformer-based signal splitting for carrier aggregation
US9154356B2 (en) 2012-05-25 2015-10-06 Qualcomm Incorporated Low noise amplifiers for carrier aggregation
US9160598B2 (en) 2012-05-25 2015-10-13 Qualcomm Incorporated Low noise amplifiers with cascode divert switch for carrier aggregation
US9154357B2 (en) 2012-05-25 2015-10-06 Qualcomm Incorporated Multiple-input multiple-output (MIMO) low noise amplifiers for carrier aggregation
US9867194B2 (en) 2012-06-12 2018-01-09 Qualcomm Incorporated Dynamic UE scheduling with shared antenna and carrier aggregation
US9300420B2 (en) 2012-09-11 2016-03-29 Qualcomm Incorporated Carrier aggregation receiver architecture
US9543903B2 (en) 2012-10-22 2017-01-10 Qualcomm Incorporated Amplifiers with noise splitting
US9837968B2 (en) 2012-10-22 2017-12-05 Qualcomm Incorporated Amplifier circuits
US8995591B2 (en) 2013-03-14 2015-03-31 Qualcomm, Incorporated Reusing a single-chip carrier aggregation receiver to support non-cellular diversity
US10177722B2 (en) 2016-01-12 2019-01-08 Qualcomm Incorporated Carrier aggregation low-noise amplifier with tunable integrated power splitter

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