JP2011010441A - Drive device for power switching element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To overcome the problem in a conventional system that is difficult to quickly switch the charge speed of the gate of a power switching element Sw by the direct detected value of a current which flows to an upper arm and a lower arm.SOLUTION: A current, which flows in a free wheel diode FDp connected in reverse parallel with the power switching element Swp, is detected by a shunt resistor 50, as a minute current output by a sense terminal ST. When this current is a threshold current corresponding to a reference voltage generated by a reference voltage generating circuit 56 or over, the resistance value of the gate resistor 44 of the power switching element Swn is switched into a smaller one.

Description

  The present invention drives a voltage-controlled power switching element provided in at least one of the pair of electric paths so that a current flowing through an inductive load flows alternately in the low potential side electric path and the high potential side electric path. The present invention relates to a drive device for a power switching element, comprising: a means for detecting a current flowing in each of the low potential side electrical path and the high potential side electrical path.

  As this type of driving device, as seen in, for example, Patent Document 1 below, switching of the switching state of a transistor is performed depending on whether the current flowing in the power MOS field effect transistor is smaller than a predetermined current or larger than a predetermined current. There is also a proposal that variably sets the time. Thereby, when the current flowing through the transistor is small, surge noise can be suppressed by reducing the switching speed. In addition, when the current flowing through the transistor is large, the power loss associated with switching of the switching state can be reduced by increasing the switching speed.

  On the other hand, for example, in an inverter or the like connected to the in-vehicle main unit, the drive circuits that drive the upper arm and the lower arm are insulated from each other. Further, current flows alternately between the upper arm and the lower arm. Since the current flowing through the upper arm and the current flowing through the lower arm are currents flowing through the respective phases of the inverter, they can be detected by detecting the currents at the output terminals of the respective phases. However, since this current can be very large, detecting the phase current directly results in excessive power loss.

  Therefore, conventionally, as can be seen in, for example, Patent Document 1 below, as an inverter switching element, an inverter having a sense terminal that outputs a minute current corresponding to the current flowing through its input / output terminal is adopted, and the minute output from the sense terminal is adopted. It has also been proposed to detect the current flowing in the upper arm and the current flowing in the lower arm based on the current.

Japanese Patent No. 3287909 JP 2000-14161 A

  By the way, when the technique described in Patent Document 2 is adopted as the current detection technique in the technique of Patent Document 1 in which the switching time of the switching state of the transistor is variably set as described above, for example, the transistor of the upper arm is changed from the OFF state. When switching to the ON state, the current flowing through the upper arm cannot be detected. For this reason, the variable setting process of the switching time is performed based on the detected value of the current when the transistor of the upper arm was previously turned on. However, in this case, since the current greatly changes during the off-period of the transistor, there is a possibility that the setting to the switching speed corresponding to the current flowing through the transistor may be delayed.

  It should be noted that the present invention is not limited to the inverter drive circuit described above, and is used to drive a voltage-controlled power switching element provided in at least one of a low potential side electrical path and a high potential side electrical path as a path of current flowing through the inductive load. Thus, such a situation that it is difficult to appropriately change the switching speed of the switching state based on the direct detection of the current flowing through each of these paths is generally common.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a voltage control type provided in at least one of a low-potential side electrical path and a high-potential side electrical path as a path of a current flowing through an inductive load. It is an object of the present invention to provide a power switching element drive device that can appropriately change the switching speed of the power switching state based on the direct detection of the current flowing through each of the paths when driving the power switching element.

  Hereinafter, means for solving the above-described problems and the operation and effects thereof will be described.

  According to a first aspect of the present invention, there is provided a voltage-controlled power switching element provided in at least one of the pair of electric paths so that a current flowing through the inductive load is alternately passed through the low potential side electric path and the high potential side electric path. Driving device for driving the power switching element, and driving means for driving the power switching element, each of the detecting means for detecting the current flowing in each of the low potential side electrical path and the high potential side electrical path At the time, based on the information in the OFF state of the driving target about the current flowing through the path on the side that is not the driving target of the pair of electric paths, the change in the charge of the conduction control terminal of the driving target A variable means for varying the speed is provided.

  It is considered that the total value of the currents flowing through the high potential side electrical path and the low potential side electrical path is substantially continuous. In the above invention, in view of this point, the conduction control is performed by using the current flowing through the path on the side other than the path provided with the power switching element to be driven by using the current as close as possible when the drive target is in the ON state. The change rate of the terminal charge can be made variable.

  According to a second aspect of the present invention, in the first aspect of the present invention, the variable means may vary the rate of change when the power switching element is turned on based on the information.

  Since no current flows through the power switching element before the on operation, even if a means for detecting the current flowing through the power switching element is provided, the detected value cannot be used. For this reason, the said invention has especially big utility value of the invention specific matter of Claim 1.

  The invention according to claim 3 is the invention according to claim 2, wherein the variable means holds a reference value of the change speed, and the change speed is based on the information of 1 in the off state. After the process of making the value larger than the reference value, the process of temporarily returning the change speed to the reference value is performed prior to the next ON operation.

  The surge tends to increase as the rate of change increases. In the above invention, in view of this point, after performing the process of making the change speed larger than the reference value based on the information of 1, the process of returning to the reference value is performed, thereby ensuring that the surge becomes excessively large. Can be avoided.

  According to a fourth aspect of the present invention, in the third aspect of the present invention, the variable means is temporarily set to the reference value by using a trigger to switch to the off state after the power switching element is turned on. A returning process is performed.

  In the said invention, the process which once returns to a reference value using the switch command to an OFF state can be performed.

  The invention according to claim 5 is the invention according to any one of claims 1 to 4, wherein the power switching element is provided on the same semiconductor substrate as that connected in reverse parallel to the power switching element. The semiconductor device is mounted on a semiconductor device provided with a freewheel diode, and the semiconductor device includes a terminal that outputs a minute current having a correlation with a current flowing through the freewheel diode, and the information includes the minute current. The information is based on the detected value.

  The invention according to claim 6 is the invention according to any one of claims 1 to 5, wherein each of the pair of electrical paths includes a power switching element, and the pair of power switching elements are mutually connected. The information that is driven in a complementary manner and that is used to variably set the change rate of the charge at one of the conduction control terminals of the pair of power switching elements is the voltage at the other conduction control terminal. It is the information generated in consideration of.

  The detected value of the current flowing through the power switching element tends to depend on the voltage value applied to the conduction control terminal. When a freewheel diode is connected in antiparallel to the power switching element, the detected value of the current flowing through the freewheel diode also tends to depend on the voltage applied to the conduction control terminal of the power switching element. In the above invention, in view of this point, the applied voltage dependency can be removed in detecting the current by taking into account the voltage applied to the conduction control terminal.

  The invention according to claim 7 is the invention according to any one of claims 1 to 6, wherein each of the pair of electric paths includes a power switching element, and the pair of power switching elements are mutually connected. The information that is driven in a complementary manner and that is used to variably set the change rate of the charge at one of the conduction control terminals of the pair of power switching elements is switched to the other off state. The information is based on the current after the start timing.

  In the said invention, the information regarding the electric current in the timing approximated as much as possible to the ON period of any one power switching element can be utilized. In the above invention, the information used for the variable setting may be fetched based on an ON command signal of one of the power switching elements.

  The invention according to claim 8 is the invention according to claim 7, wherein the pair of power switching elements is connected to at least one of an in-vehicle main unit and a high-voltage battery provided in an in-vehicle high-voltage system insulated from the in-vehicle low-voltage system. And the variable means is connected to each of the pair of power switching elements, and the variable means corresponding to one of the pair of power switching elements. Is further provided with a high voltage communication path for receiving the information corresponding to the other.

1 is a system configuration diagram according to a first embodiment. FIG. Sectional drawing which shows the cross-sectional structure of IGBT and free wheel diode concerning the embodiment. The circuit diagram which shows the circuit structure of the drive unit concerning the embodiment. The time chart which shows the variable setting method of the gate charge speed concerning the embodiment. The figure which shows the voltage drop amount of shunt resistance by the output current of a sense terminal. The circuit diagram which shows the circuit structure of the drive unit concerning 2nd Embodiment.

(First embodiment)
Hereinafter, a first embodiment in which a drive device for a power switching element according to the present invention is applied to a hybrid vehicle will be described with reference to the drawings.

  FIG. 1 shows the system configuration of this embodiment. As shown in the figure, a motor generator 10 as an in-vehicle main machine is an inductive load, and is connected to a high voltage battery 12 via an inverter IV and a converter CV. The inverter IV is configured by connecting three series-connected bodies of a high-potential side power switching element Swp and a low-potential side power switching element Swn in parallel. Connection points of these power switching elements Swp and power switching elements Swn are connected to the respective phases of the motor generator 10. Further, the converter CV includes a capacitor C, a series connection body of the power switching element Swp on the high potential side and the power switching element Swn on the low potential side, a connection point of the power switching element Swp and the power switching element Swn, and the high voltage battery 12. And an inductive load (reactor L).

  Between the input / output terminals (between the collector and the emitter) of the high potential side power switching element Swp and the low potential side power switching element Swn, there is a high potential side freewheel diode FDp and a low potential side freewheel diode. The cathode and anode of FDn are connected.

  The drive unit DU is connected to the conduction control terminals (gates) of the power switching elements Swp and Swn constituting the inverter IV. The drive unit DU that drives the high-potential side power switching element Swp and the drive unit DU that drives the low-potential side power switching element Swn are capable of bidirectional communication via an interface. Here, in order to insulate the drive units DU that drive each of the power switching elements Swp and Swn from each other, the interface includes an insulating means such as a photocoupler.

  The power switching elements Swp and Swn are driven by the control device 16 using the low voltage battery 14 as a power source via the drive unit DU. The control device 16 controls operation signals gup, gvp, and gwp for operating the power switching elements Swp for the U phase, V phase, and W phase of the inverter IV based on detection values of various sensors (not shown), and power switching. Operation signals gn, gvn, and gwn for operating the element Swn are generated and output. Further, operation signals gcp and gcn for operating the power switching elements Swp and Swn of the converter CV are generated and output. Thereby, the power switching elements Swp and Swn are operated by the control device 16 via the drive unit DU. The high-potential side operation signals gup, gvp, gwp, and gcp and the low-potential side operation signals gun, gvn, gwn, and gcn are respectively divided into a high-potential side switching element Swp and a low-potential side switching element. Swn is driven complementary to each other. That is, during the period when one of the operation signals is a signal for turning on, the other operation signal is a signal for turning off.

  Note that the high voltage system including the inverter IV and the converter CV and the low voltage system including the control device 16 are insulated by an insulating means such as a photocoupler (not shown), and the operation signal is high-voltage via the insulating means. Output to the system.

  Each of the power switching elements Swp and Swn is a switching element that has an input terminal and an output terminal that are uniquely defined and prevents a current from flowing from the output terminal to the input terminal. Specifically, these are constituted by insulated gate bipolar transistors (IGBT). The power switching elements Swp and Swn include a sense terminal ST that outputs a minute current having a correlation with a current flowing between the input terminal and the output terminal and a current flowing through the freewheel diodes FDp and FDn. This function of the sense terminal ST is made possible by using a diode built-in type IGBT. That is, in this embodiment, the high-potential side power switching element Swp and the high-potential side freewheel diode FDp are formed adjacent to each other on the same semiconductor substrate. The free wheel diodes FDn on the side are formed adjacent to the same semiconductor substrate.

  FIG. 2A shows a cross-sectional configuration of the power switching element Swp (Swn) and the free wheel diode FDp (FDn) according to the present embodiment. In the following description, the power switching elements Swp and Swn are collectively referred to as the power switching element Sw, and the free wheel diodes FDp and FDn are collectively referred to as the free wheel diode FD.

  As illustrated, the semiconductor substrate 20 is formed with an IGBT region and a diode region. A region extending from the main surface side to the back surface side of the semiconductor substrate 20 is an N-type region 22 whose conductivity type is N-type. A P-type region 24 having a P-type conductivity is formed in the surface layer portion on the main surface side of the semiconductor substrate 20, and the N-type having a concentration higher than that of the N-type region 22 in the P-type region 24. An N-type region 26 having the conductivity type is formed. The P-type region 24 and the N-type region 26 are connected to an IGBT emitter terminal E and a diode anode terminal. A gate electrode 30 is formed on the P-type region 24 and the N-type region 26 via a gate oxide film 28.

  On the other hand, an N-type region 36 and a P-type region 34 having a concentration higher than that of the N-type region 22 are provided side by side on the back surface side of the semiconductor substrate 20. Here, the P-type region 34 constitutes a collector region of the IGBT, and the N-type region 36 constitutes a cathode region of the diode. An N-type region 32 having a concentration lower than that of the N-type region 22 is formed between the P-type region 34 and the N-type region 36 and the N-type region 22.

  FIG. 2B is a plan view schematically showing the main surface side of the semiconductor substrate 20. As shown in the drawing, most of the main surface side is an emitter region, and a gate region and a sense electrode 38 are formed as a region smaller than this. Here, the actual area of the sense electrode 38 is about one thousandth of the area of the emitter region, so that a very small current is correlated with the current flowing through the IGBT and the free wheel diode. Can be output.

  FIG. 3 shows a circuit configuration of the drive unit DU.

  As shown in the figure, the power supply 40 is connected to the gate of the power switching element Sw via a P-channel MOS transistor (charging switching element 41) and a gate resistor 42 for adjusting the charge / discharge speed of the gate. ing. The power supply 40 is connected to the gate of the power switching element Sw via a P-channel MOS transistor (charging switching element 43) and a gate resistor 44 for adjusting the charge / discharge speed of the gate. The gate of the power switching element Sw is connected to the emitter E of the power switching element Sw via the gate resistor 42 and the N-channel MOS transistor (discharge switching element 45). The gate of the power switching element Sw is connected to the emitter E of the power switching element Sw via the gate resistor 44 and the N-channel MOS transistor (discharge switching element 46). Here, the gate resistors 42 and 44 are resistors as linear elements.

  The drive control circuit 48 receives the operation signal g (general notation of the operation signals gup, gun, gvp, gvn, gwp, gwn, gcp, gcn) input to the drive unit DU through an insulating means such as a photocoupler (not shown). The power switching element Sw is driven by turning on and off the charging switching element 41 and the discharging switching element 45 in a complementary manner. That is, when the operation signal g becomes logic “H” to indicate that the power switching element Sw is to be turned on, the charging switching element 41 is turned on and the discharging switching element 45 is turned off. Thus, a positive charge is charged to the gate of the power switching element Sw. Further, when the operation signal g becomes logic “L” to instruct the power switching element Sw to be turned off, the charging switching element 41 is turned off and the discharging switching element 45 is turned on. Thus, positive charges are discharged from the gate of the power switching element Sw.

  A shunt resistor 50 is connected between the emitter E and the sense terminal ST of the power switching element S. The voltage of the shunt resistor 50 is converted by the inverting amplifier circuit 52 and then applied to the non-inverting input terminal of the comparator 54. Here, the inverting amplifier circuit 52 fixes the polarity of the voltage applied to the non-inverting input terminal of the comparator 54 regardless of whether a current flows through the power switching element Sw or a free wheel diode FD. belongs to. Here, as the inverting amplifier circuit 52, a circuit in which a positive voltage is applied to the non-inverting input terminal of the operational amplifier based on the emitter potential of the power switching element Sw is illustrated. The output voltage of the inverting amplifier circuit 52 becomes larger as the input voltage is smaller (negative and the absolute value is larger).

  A predetermined positive voltage (reference voltage) output from the reference voltage generation circuit 56 is applied to the inverting input terminal of the comparator 54. Therefore, the output signal of the comparator 54 becomes logic “H” when the forward current flowing through the free wheel diode FD becomes equal to or higher than the threshold current corresponding to the reference voltage.

  The output of the comparator 54 that outputs a signal based on the current flowing through one of the freewheel diodes FDp and FDn is taken into the drive unit DU corresponding to the other. Specifically, it is input to the operating means for operating the resistance value of the gate resistance. In the present embodiment, this operation means is typically configured to include an AND circuit 62 and an RS flip-flop 60. The AND circuit 62 generates a logical product signal of the output signal of the comparator 54 and one of the other operation signals. The RS flip-flop 60 takes this logical product signal into the reset terminal. Further, the RS flip-flop 60 takes the output signal of the drive control circuit 48 into the set terminal. As a result, in synchronization with the timing when the power switching element Sw connected to one of the freewheel diodes FDp and FDn is turned on, the current information (output signal of the comparator 54) flowing to either one is latched. .

  The output terminal of the RS flip-flop 60 is connected to the gates of the charging switching element 43 and the discharging switching element 46. As a result, the gate resistance value is reduced as the output signal of the output terminal of the RS flip-flop 60 becomes logic “L”. In other words, the gate resistance value of either one of the power switching elements Swp and Swn is switched to a low resistance when the current flowing through the freewheeling diode connected in antiparallel to either one becomes equal to or greater than the threshold current. . That is, the gate charging path is switched from a path having only the gate resistor 42 (high resistance path) to a pair of paths (low resistance path) including the gate resistors 42 and 44.

  The operation signal g is input to the drive control circuit 48 via the delay unit 47, which synchronizes the output timing of the output signal of the RS flip-flop 60 and the output signal of the drive control circuit 48. Is for.

  Furthermore, since the output signal of the drive control circuit 48 is input to the set terminal of the RS flip-flop 60, even if the gate resistance value is switched to a smaller side, this switching is limited to a single ON state switching. Will be done. Therefore, in order to switch the gate resistance value to the smaller side at the next switching to the ON state, it is necessary to input a logic “H” signal to the reset terminal of the RS flip-flop 60 again.

  This setting is for avoiding an excessively large surge. That is, reducing the gate resistance increases the surge. Here, when the output signal of the comparator 54 becomes logic “H”, the gate resistance value is temporarily switched to a smaller side, so that the resistance value is maintained until the output signal of the comparator 54 becomes logic “L”. There is a concern that the gate resistance value is inappropriately maintained on the small side due to the influence of noise or the like superimposed on the output signal of the comparator 54. For this reason, when the gate resistance value is switched to the smaller side, the process of switching the gate resistance to the larger side again is performed after the switching to the ON state once.

  FIG. 4 shows an aspect of the gate resistance value variable setting process according to the present embodiment. Specifically, FIG. 4A shows the transition of the operation signal g * p of the power switching element Swp, FIG. 4B shows the transition of the operation signal g * n of the power switching element Swn, and FIG. The transition of the phase current i * is shown in c). FIG. 4D shows the transition of the current icp flowing through the power switching element Swp, FIG. 4E shows the transition of the current icn flowing through the freewheel diode FDn, and FIG. The transition of the output signal of the comparator 54 of the side arm is shown, and FIG. 4G shows the transition of the gate resistance value.

  As shown in the figure, the phase current i * gradually increases and becomes equal to or greater than the threshold current Ith at time t1. Thereafter, even during the dead time period after the power switching element Swn is switched to the off state (time t2), a current equal to or greater than the threshold current Ith flows through the freewheel diode FDn, so the power switching element Swp is switched to the on state. Information (current information) indicating that the current exceeds the threshold current Ith is latched by the drive unit DU of the power switching element Swp at the timing (time t3). In other words, the output signal of the RS flip-flop 60 becomes logic “L”. Thereby, the gate resistance value is switched to the smaller side. For this reason, after the switching start timing (time t3) of the power switching element Swp to the on state, the switching process to the on state is performed by the gate resistance having a small resistance value. Then, at time t4 when the power switching element Swp is switched to the off state, the gate resistance value is switched again to the larger side.

  As described above, in the present embodiment, in a situation where the surge is relatively small and the power loss is likely to increase, it is possible to quickly detect this situation and reduce the gate resistance value, thereby reducing the power loss. . As shown in FIG. 3, in this embodiment, the output signal of the drive control circuit 48 is input to the set terminal of the RS flip-flop 60. As a result, the process of switching the gate resistance value to the low speed side (the process performed by inputting a logic “H” signal to the set terminal of the RS flip-flop 60) is used as the start timing of the OFF operation of the power switching element Sw. Can be delayed. For this reason, even when the ON period of the power switching element Sw is excessively short, it is possible to avoid switching the gate resistance value during the gate charging period.

  According to the embodiment described in detail above, the following effects can be obtained.

  (1) When driving one of the power switching elements Swp and Swn, the charge change rate of one of the gates can be varied based on the current information flowing in the free wheel diode connected in reverse parallel to either one It was. As a result, the rate of change of the gate charge can be made variable by using the current information at the timing as close as possible to the switching timing to one of the ON states.

  (2) Based on the current information, the rate of change of the gate charge when the power switching element is turned on is variable. Prior to switching to the on state, the phase current cannot be detected based on the output current of the sense terminal ST of the power switching element, so the current information is particularly effective.

  (3) When the resistance value of the gate resistor 44 is switched to the high speed side (low resistance side), the resistance value is temporarily switched to the low speed side (high resistance side) with the end of the switching process to the ON state once. . Thereby, the situation where a surge becomes large excessively can be avoided reliably.

  (4) Current information used for variable setting of the change rate of the gate charge of either one of the pair of power switching elements Swp and Swn is based on the detected current value after the switching start timing to the other one of the off states. Information. Thereby, the information regarding the electric current in the timing approximated as much as possible in any one ON period can be utilized.

(Second Embodiment)
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment.

  FIG. 5 shows the relationship between the current flowing through the power switching element Sw or the free wheel diode FD and the amount of voltage drop at the shunt resistor 50. Specifically, the relationship between when the gate applied voltage Vge (emitter-gate voltage) of the power switching element Sw is high and low is shown. As shown in the figure, the absolute value of the voltage drop amount increases when the gate applied voltage Vge is higher than when it is low.

  This means that when the power switching element Sw is in the OFF state, the amount of voltage drop when a forward current greater than the specified value flows through the free wheel diode FD is smaller than in the ON state. . On the other hand, in the present embodiment, the timing for detecting the currents of the freewheel diodes FDp, FDn is the timing for switching the power switching elements Swp, Swn to the on state, but in practice, between the upper arm and the lower arm. Therefore, since information transmission takes time, a current value before the switching timing is detected. For this reason, the current to be detected in the process of decreasing the voltage of the gate of the power switching element connected in antiparallel to the freewheel diodes FDp and FDn to be detected is detected. For this reason, the gate voltage at the actual detection timing of the current can change. Therefore, in the present embodiment, as shown in FIG. 6, the reference voltage output from the reference voltage generation circuit 56a is variably set based on the gate voltage. Specifically, the reference voltage corresponding to each of the power switching elements Swp and Swn is increased as the gate voltage is higher.

  According to this embodiment described above, the following effects can be obtained in addition to the effects (1) to (4) of the first embodiment.

  (5) The current information used for the variable setting of the change speed regarding one of the pair of power switching elements Swp and Swn is generated in consideration of the voltage of the other gate. Thereby, when detecting the current based on the output current of the sense terminal ST, the influence of the gate voltage dependency of the current detection result can be eliminated.

(Other embodiments)
Each of the above embodiments may be modified as follows.

  In each of the above embodiments, as described in, for example, Japanese Patent Application Laid-Open No. 2008-72848, when it is determined that a current is flowing through the freewheel diode FD, the power connected in reverse parallel thereto Regardless of the operation signal of the switching element Sw, processing for forcibly turning it off may be executed. In this case, in addition to being able to reduce the power loss in the freewheel diode FD, it is also possible to avoid the change in the gate voltage depending on the detection timing of the output current from the sense terminal ST. For this reason, even if it does not take the structure of 2nd Embodiment, it also becomes possible to detect the electric current which flows into the freewheel diode FD with high precision.

  When detecting the current flowing through the freewheeling diode FD, the method for removing the dependency on the gate voltage is not limited to the method in which the threshold value is variably set according to the gate voltage, as exemplified in the second embodiment. . For example, the resistance value of the shunt resistor may be variably set according to the gate voltage.

  As the gate resistance, the resistor (charging resistor) for switching the power switching element Sw to the on state is the same as the resistor (switching resistor) for switching the power switching element Sw to the off state. It is not limited to those to be performed, and they may be different from each other. In this case, an appropriate resistance value can be set for each of switching to the on state and switching to the off state. Such a setting is particularly effective because the relationship between the current flowing through the power switching element Sw and the surge is different between switching to the on state and switching to the off state.

  In each of the above embodiments, the voltage drop amount Vse is converted by inputting the voltage drop amount Vse due to the shunt resistor 50 to the inverting amplifier circuit 52 to which a positive bias is applied, so that the voltage drop amount Vse is always positive. Not limited to. For example, the voltage of the shunt resistor 50 may be applied to the inverting input terminal of the comparator 54, and the non-inverting input terminal may be set lower than the emitter potential of the power switching element SW.

  In each of the above-described embodiments, after the rate of change of the gate charge is made larger than the reference value, the switching from the on state to the off state of the power switching element Sw is used as a trigger to return to the reference value. Not exclusively. For example, the time may be larger than the reference value by a time having a predetermined length from the switching start command timing from the off state to the on state. Further, even if the control to return to the reference value is not performed regardless of the current information, the effects (1), (2), and (4) of the above embodiment can be obtained.

  In each of the above embodiments, the free wheel diode connected in reverse parallel to either one of the pair of power switching elements Swp, Swn is synchronized with the timing when the off state is switched to the on state. Although the current information which flows is acquired, it is not restricted to this. For example, the current flowing through the freewheeling diode connected in reverse parallel to either one of the pair of power switching elements Swp and Swn is detected in synchronization with the timing at which one of the power switching elements Swp and Swn is switched from the on state to the off state. May be. In addition, for example, either time is switched from the on state to the off state for the time required to reflect the detected current value in one of them to the variable setting of the other gate resistance value from the dead time. The current may be detected at a timing delayed from the generated timing. In this case, it is possible to change the resistance value of the gate resistor 44 when the other is switched to the on state, while making the change based on the current at the timing as close as possible to the switching timing.

  The current information flowing through either one of the pair of power switching elements Swp and Swn during the period in which the other is turned off is a binary value indicating whether or not this current is equal to or greater than the threshold current Not limited to signals. For example, the current value may be digitally expressed in three or more levels, or analog.

  In each of the above embodiments, the gate resistance value is selected from the two resistance values of the high resistance and the low resistance according to the current flowing through the power switching element Sw. Good. In this case, the gate resistance may be gradually decreased as the current increases. In other words, the rate of change of the gate charge may be gradually increased as the current increases.

  If the gate resistance is variable in two or more stages, it should be dealt with by changing the design by setting a plurality of thresholds to be compared with the current or by providing a plurality of comparison means (corresponding to the comparator 54). Can do.

  The means for making the gate charging speed variable is not limited to making the resistance value of the linear element variable. For example, a non-linear element may be used as described in JP 2009-55654 A. For example, the resistance value of the charging / discharging path of the gate is not limited to variable, and for example, means for changing the voltage applied to the gate may be used.

  In each of the above embodiments, the high-potential side power switching element Swp and the low-potential side power switching element Swn are complementarily driven, but the present invention is not limited thereto. Even in the case of not driving in a complementary manner, it is possible to perform variable setting processing of the charge change rate of the gate in the manner of each of the above embodiments.

  The power switching element Sw and the free wheel diode FD are not limited to be formed on the same semiconductor substrate, and may be configured in separate chips.

  In each of the above embodiments, the current flowing through the freewheel diode FD connected in reverse parallel to either one of the pair of power switching elements Swp and Swn is used when switching to the on state. Not limited to this, the current may be used when switching to the off state.

  In each of the above embodiments, the drive unit DU of the power switching element Swp and the drive unit DU of the power switching element Swn are separated from each other. However, the present invention is not limited to this, and the pair of drive units DU is integrated with high withstand voltage. A circuit (HVIC) may be configured in a lump. In this case, the high withstand voltage element in the HVIC is responsible for the high withstand voltage communication path for transmitting the current information on either side of the pair of power switching elements Swp and Swn to the RS flip-flop 60 on the other side.

  The power switching element Sw is not limited to the IGBT, and may be a power MOS field effect transistor, for example. In this case, since the on-resistance of the power MOS field effect transistor is usually smaller than that of the free wheel diode FD, it is considered that a current flows through the power MOS field effect transistor except during the dead time period. This current can be detected by, for example, the voltage between the input terminal and the output terminal (source and drain).

  The power conversion circuit is not limited to the inverter IV and the converter CV as a boost converter. For example, a step-down converter that steps down the voltage of the high voltage battery 12 and applies it to the low voltage battery 14 may be used.

  -As a power converter circuit, not only what is mounted in a hybrid vehicle, For example, you may mount in an electric vehicle.

  40 ... power supply, 42 ... switching element for charging, 44 ... gate resistance (one embodiment of variable means), 48 ... drive control circuit, 60 ... D flip-flop (one embodiment of variable means), Sw ... power switching element, FD: Freewheel diode.

Claims (8)

Driving means for driving a voltage-controlled power switching element provided in at least one of the pair of electric paths so that a current flowing through the inductive load alternately flows through the low potential side electric path and the high potential side electric path; In a drive device for a power switching element, comprising separate detection means for detecting a current flowing in each of a low potential side electrical path and a high potential side electrical path,
When driving the power switching element, based on the information in the OFF state of the driving target about the current flowing in the path on the side that is not the driving target of the pair of electric paths, the driving target A drive device for a power switching element, comprising: variable means for changing a change rate of electric charge of the conduction control terminal.   2. The drive device for a power switching element according to claim 1, wherein the variable means makes the change speed variable when the power switching element is turned on based on the information.   The variable means holds the reference value of the change speed, and after performing the process of making the change speed larger than the reference value based on the information of 1 in the off state, 3. The drive device for a power switching element according to claim 2, wherein a process of temporarily returning the change speed to the reference value is performed prior to an on operation.   4. The power switching according to claim 3, wherein the variable means performs a process of temporarily returning to the reference value, triggered by a command to switch to an OFF state after an ON operation of the power switching element. Device drive device. The power switching element is mounted on a semiconductor device provided with a freewheel diode provided on the same semiconductor substrate as that connected in reverse parallel to the power switching element,
The semiconductor device includes a terminal that outputs a minute current having a correlation with a current flowing through the freewheel diode,
5. The power switching element driving apparatus according to claim 1, wherein the information is information based on a detection value of the minute current. 6. Each of the pair of electrical paths is configured to include a power switching element,
The pair of power switching elements are driven complementarily to each other,
The information used for variably setting the rate of change of the charge at one conduction control terminal of the pair of power switching elements is information generated in consideration of the voltage at the other conduction control terminal. The drive device for a power switching element according to any one of claims 1 to 5, wherein: Each of the pair of electrical paths is configured to include a power switching element,
The pair of power switching elements are driven complementarily to each other,
The information used for variably setting the change rate of the charge at one of the conduction control terminals of the pair of power switching elements is information based on the current after the switching start timing to the off state of the other. The power switching element drive device according to claim 1, wherein the power switching element drive device is provided. The pair of power switching elements constitutes a power conversion circuit connected to at least one of the in-vehicle main unit and the high-voltage battery provided in the in-vehicle high voltage system insulated from the in-vehicle low voltage system. Each of the power switching elements is connected to the variable means separately.
8. The drive device for a power switching element according to claim 7, wherein the variable means corresponding to one of the pair of power switching elements further includes a high voltage communication path for receiving the information corresponding to the other.

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