JP2010268304A - Resin multilayer device and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To increase capacity of a capacitor even without changing characteristics of an inductor and a balun, and the size of the capacitor. <P>SOLUTION: This resin multilayer device is formed by a WLCSP technology, and is provided with: a substrate 10; a first resin layer 22; a first conductive pattern group 130; a second resin layer 24; a second conductive pattern group 150; and a third resin layer 26, wherein a capacitor 120 has; a lower electrode 132 of the first conductive pattern group 130; and an upper electrode 152 of the second conductive pattern group 150, an inductor has: a coil pattern 151 of the second conductive pattern group 150; and an underpass pattern 131 which is a conductive pattern of the first conductive pattern 130 and connected to an inner peripheral end of the coil pattern 151, and the lower electrode 132 is provided so that the distance between the lower electrode 132 and the upper electrode 152 becomes narrower than that between the coil pattern 151 and the underpass pattern 131. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a resin multilayer device having a capacitor and an inductor or / and / or a balun, and more particularly to a resin multilayer device having a multilayer capacitor and an inductor or / and / or a balun.

  In a high frequency circuit, a resonator and a filter including a capacitor and an inductor are used. Such resonators and filters include a multilayer capacitor and an inductor. In the multilayer resonator and multilayer filter, the capacitor upper electrode and the inductor coil pattern, and the capacitor lower electrode and the path pattern connected to the inner peripheral edge of the coil pattern are stacked via an insulating layer. There exists a thing of a structure (for example, patent document 1).

  Moreover, a balun is used in a high frequency circuit. Such a balun includes a stacked balun. A laminated balun includes a configuration in which an unbalanced signal transmission line and two balanced signal transmission lines are laminated via an insulating layer (for example, Patent Document 2).

  Further, in such a balun, there is a configuration in which a capacitor is connected to the balanced signal transmission line end and the unbalanced signal transmission line end in order to shorten the effective length of the transmission line (for example, Patent Document 3). . The transmission path length of the unbalanced signal transmission path is ½ or less of the signal wavelength, and the transmission path length of the balanced signal transmission path is ¼ or less of the signal wavelength. However, in a signal having a frequency of several hundred MHz to several GHz, This is because the transmission path length becomes too long.

  On the other hand, in recent years, a technique called WLCSP has been proposed (see, for example, Patent Document 4). WLCSP is a technique in which a resin multilayer device such as an inductor is formed on a wafer by a resin layer forming process and a conductive pattern group forming process such as a thick film copper pattern group, and then diced into individual pieces. In other words, it is a manufacturing method in which a wafer is packaged as it is. A package manufactured by the WLCSP technology is referred to as a wafer level package (WLP).

JP-A-10-065476 JP 2002-050910 A JP 2005-244848 A JP 2007-281230 A

  In the inductor, the distance between the coil pattern and the underpass pattern is required to satisfy the design specification value. If the interval between the two patterns is narrowed, the parasitic capacitance between the patterns increases, the distribution of the current flowing in the underpass pattern is disturbed due to interference between the coil pattern and the underpass pattern, and the Q value of the inductor decreases. It is.

  For this reason, in a multilayer device having a capacitor such as a multilayer LPF and an inductor, the interval between the coil pattern and the underpass pattern cannot be reduced, and between these patterns in accordance with the design distance of both patterns. The thickness of the insulating layer is set.

  In addition, the balun is required that the impedance on the unbalanced signal input / output side and the impedance on the balanced signal input / output side satisfy the impedance value of the design specification. Parameters to satisfy these impedance specifications are: transmission line width, transmission line thickness, insulation layer thickness between transmission lines (distance between transmission lines) and dielectric constant, insulation under the lower transmission line The thickness and dielectric constant of the layer, and the thickness and dielectric constant of the upper insulating layer of the upper transmission line.

  In the balun, it is necessary to increase the cross-sectional area of the transmission line in order to reduce the passage loss of the transmission line. However, since it is necessary to use a transmission line having the above design impedance value, the balanced signal transmission line and the unbalanced signal transmission line must be separated in order to increase the cross-sectional area of the transmission line. In other words, it is necessary to make the insulating layer between the balanced signal transmission line and the unbalanced signal transmission line thick so that the distance between the transmission lines is increased to match the impedance.

  Therefore, in a multilayer device having a capacitor and an inductor, the distance between the upper electrode and the lower electrode of the capacitor is the same as the design distance of the inductor. Further, in a multilayer device having a capacitor and a balun, the distance between the upper electrode and the lower electrode of the capacitor is the same as the above-mentioned distance based on the balun design impedance.

  As described above, in a multilayer device having a capacitor and an inductor or / and a balun, the distance between the electrodes of the capacitor needs to conform to the design value of the inductor or balun. There was a problem that it was difficult to adjust the capacitance value of the. Further, in order to make a capacitor with a large capacity, the electrode size of the capacitor has to be increased, and there are problems that the area occupied by the capacitor increases and the self-resonant frequency decreases.

  For example, an inductor is constituted by a first conductive pattern group on the first resin layer and a second conductive pattern group on the second resin layer, and the third conductive pattern group on the third resin layer and the second conductive pattern group on the fourth resin layer. It is conceivable to obtain a large-capacity capacitor by configuring a capacitor with the four conductive pattern groups and reducing the thickness of the third resin layer. However, in such a configuration in which the inductor and the capacitor are arranged in different layers, the resin layer and the conductive pattern layer are increased by two layers, and the device configuration and the manufacturing procedure become complicated.

  The present invention has been made to solve such a conventional problem. In a resin multilayer device having a capacitor and a multilayer circuit made of an inductor or / and a balun, the characteristics of the multilayer circuit and the size of the capacitor are improved. The object is to allow the capacitance of the capacitor to be increased without modification.

  The resin multilayer device of the present invention is a resin multilayer device having a capacitor and a laminated circuit composed of an inductor and / or a balun, and includes a substrate, a first resin layer formed on the substrate, and the first resin. A first conductive pattern group provided on the layer; a second resin layer formed on the first resin layer and on the first conductive pattern group; and a second conductive pattern provided on the second resin layer. A pattern group; and a third resin layer formed on the second resin layer and the second conductive pattern group, wherein the capacitor includes a lower electrode of the first conductive pattern group, and the second conductive pattern. An upper electrode of the group, and the stacked circuit includes a lower circuit pattern of the first conductive pattern group and an upper circuit pattern of the second conductive pattern group, and the upper surface of the lower electrode and the upper electrode With the underside of Away is such that said narrower than the distance between the upper surface of the lower circuit pattern and the lower surface of the upper circuit pattern and is characterized in that a lower electrode.

  According to the present invention, the lower electrode of the capacitor is provided so that the distance between the upper surface of the lower electrode of the capacitor and the lower surface of the upper electrode is smaller than the distance between the upper surface of the lower circuit pattern of the stacked circuit and the lower surface of the upper circuit pattern. As a result, the capacitance of the capacitor can be increased without changing the characteristics of the multilayer circuit and the size of the capacitor.

The perspective view which shows an example (Embodiment 1) of the resin multilayer device which concerns on this invention. Sectional drawing of the resin multilayer device shown in FIG. The schematic circuit diagram of the resin multilayer device shown in FIG. Sectional drawing which shows the manufacture procedure of the resin multilayer device shown in FIG. The perspective view which shows another example (Embodiment 2) of the resin multilayer device which concerns on this invention. The schematic circuit diagram of the resin multilayer device shown in FIG. Sectional drawing which shows another example (Embodiment 3) of the resin multilayer device which concerns on this invention. Sectional drawing which shows another example (Embodiment 4) of the resin multilayer device which concerns on this invention. Sectional drawing which shows another example (Embodiment 5) of the resin multilayer device which concerns on this invention. Sectional drawing which shows another example (Embodiment 6) of the resin multilayer device which concerns on this invention. Sectional drawing which shows another example (Embodiment 7) of the resin multilayer device which concerns on this invention. The fragmentary sectional view which shows the structural example of the capacitor in another example (Embodiment 8) of the resin multilayer device which concerns on this invention.

  Hereinafter, the present invention will be described in detail with reference to the drawings. However, the present invention is not limited thereto, and various modifications can be made without departing from the gist of the present invention. Note that the drawings used in the following description are schematic and may differ from actual sizes.

<Embodiment 1>
FIG. 1 is a perspective view illustrating a configuration example of a resin multilayer device according to Embodiment 1 of the present invention. FIG. 2 is a cross-sectional view of the resin multilayer device 100 of FIG. FIG. 3 is a schematic circuit diagram of the resin multilayer device 100 of FIG.

  The resin multilayer device 100 according to the first embodiment includes a substrate 10, a first resin layer 22, a first conductive pattern group 130, a second resin layer 24, a second conductive pattern group 150, and a third resin layer. 26 and two signal terminal portions 40 (first signal terminal portion) and 45 (second signal terminal portion). The resin multilayer device 100 includes an LC resonator in which a planar spiral inductor 110 and a multilayer capacitor 120 are connected in series.

[Substrate 10]
The substrate 10 is, for example, a silicon substrate, a semiconductor substrate such as GaAs, or an insulating substrate such as a glass substrate or ceramic.

[Multilayer resin body 20]
The first resin layer 22, the second resin layer 24, and the third resin layer 26 constitute a multilayer resin body 20. The first resin layer 22 is formed on the substrate 10 having the protective film 10a such as an oxide film. The second resin layer 24 is formed on the first resin layer 22 provided with the first conductive pattern group 130 including the underpass pattern 131 of the inductor 110 and the lower electrode 132 of the capacitor 120. The third resin layer 26 includes a second conductive pattern group 150 including a coil pattern 151 of the inductor 110, an upper electrode 152 of the capacitor 120, and signal electrode pads 51 and 52 of the signal terminal portions 40 and 45. Formed on layer 24.

  As these 1st resin layer 22, 2nd resin layer 24, and 3rd resin layer 26, photosensitive resins, such as a polyimide resin and an epoxy resin, are used, for example. The first resin layer 22, the second resin layer 24, and the third resin layer 26 have the same relative dielectric constant, for example, by being formed by the same method using the same material.

[Inductor 110, capacitor 120]
One end of the inductor 110 is connected to the first signal terminal unit 40, and the other end is connected to one end of the capacitor 120. The other end of the capacitor 120 is connected to the second signal terminal unit 45. Thus, the inductor 110 and the capacitor 120 constitute a series resonance circuit.

  The inductor 110 includes a planar spiral coil pattern 151 that is a conductive pattern of the second conductive pattern group 150, and an underpass pattern 131 that is a conductive pattern of the first conductive pattern 130. The inner peripheral end of the coil pattern 151 is connected to the signal electrode pad 51 of the first signal terminal unit 40 that is the conductive pattern of the second conductive pattern group 150 via the underpass pattern 131 and the wiring pattern of the second conductive pattern group 150. It is connected.

  The capacitor 120 includes a lower electrode 132 that is a conductive pattern of the first conductive pattern group 130 and an upper electrode 152 that is a conductive pattern of the second conductive pattern group 150. The lower electrode 132 is connected to the outer peripheral end of the coil pattern 151 of the second conductive pattern group 150 via the wiring pattern of the first conductive pattern group 130 and the wiring pattern of the second conductive pattern group 150. Further, the upper electrode 152 is connected to the signal electrode pad 52 of the second signal terminal portion 45 that is the conductive pattern of the second conductive pattern group 150 through the wiring pattern of the second conductive pattern group 150. The capacitor 120 is an MIM capacitor in which the second resin layer 24 between the lower electrode 132 and the upper electrode 152 is an insulating layer (dielectric layer).

  The thickness dimension of the lower electrode 132 of the capacitor 120 is larger than the thickness dimension of the conductive pattern of the underpass pattern 131 of the inductor 110 and other first conductive pattern groups 130. Accordingly, the position of the upper surface 132a of the lower electrode 132 is higher than the position of the upper surfaces 131a of the other conductive patterns of the first conductive pattern group 130. That is, the interval between the lower electrode 132 and the upper electrode 152 is smaller than the interval between the conductive pattern of the first conductive pattern group 130 such as the underpass pattern 131 and the conductive pattern of the second conductive pattern group 150 such as the coil pattern 151. ing.

  In this way, the lower electrode 132 of the capacitor 120 is made thicker than the other conductive patterns of the first conductive pattern group 130, and the distance between the lower electrode 132 and the upper electrode 152 is set to the other conductive pattern of the first conductive pattern group 130. By reducing the distance between the second conductive pattern group 150 and other conductive patterns, the capacitance of the capacitor 120 can be increased without changing the design of the inductor 110 and without increasing the electrode size of the capacitor 120. Can do.

[First signal terminal portion 40, second signal terminal portion 45]
The first signal terminal portion 40 is obtained by providing the signal electrode pad 51 of the second conductive pattern group 150 in the opening 26 a of the third resin layer 26. The signal electrode pad 51 is connected to the underpass pattern 131 of the inductor 110 through the wiring pattern of the second conductive pattern group 150 and the wiring pattern of the first conductive pattern group 130. The second signal terminal portion 45 is obtained by providing the signal electrode pad 52 of the second conductive pattern group 150 in the opening 26 b of the third resin layer 26. The signal electrode pad 52 is connected to the upper electrode 152 of the capacitor 120 through the wiring pattern of the second conductive pattern group 150.

[Manufacturing procedure]
FIG. 4 is a cross-sectional view for explaining the manufacturing procedure of the resin multilayer device 100 as follows. In the following description, since the resin multilayer device 100 is a WLP, an LC resonator is formed on a wafer by a resin layer formation process and a conductive pattern group formation process such as a copper pattern group, and then diced into individual pieces. Manufactured by WLCSP technology.

  First, as shown in FIG. 4A, a first resin layer 22 is formed on a substrate 10 that is a wafer provided with a protective film 10a. As the first resin layer 22, a photosensitive insulating resin is used. The photosensitive resin fluid resin material is coated on the substrate 10 by spin coating and baked to form a photosensitive resin layer.

  Next, as shown in FIG. 4B, the first conductive pattern group 130 including the underpass pattern 131 of the inductor 110 and the lower electrode 132 of the capacitor 120 is provided on the first resin layer 22.

  As the first conductive pattern group 130, copper plating is used. After the seed layer is formed on the first resin layer 22, a resist is formed and patterned, and then copper plating is performed to form the first conductive pattern group 130 including the underpass pattern 131, the lower layer portion 132α of the lower electrode 132, and the like. To do. At this time, the thicknesses of the conductive patterns of the lower layer portion 132α of the lower electrode 132 and the underpass pattern 131 and other first conductive pattern groups 130 are the same.

  Further, a seed layer for selective thick film copper plating is formed thereon, a resist pattern is formed on the seed layer to expose only the lower layer portion 132α of the lower electrode 132, and the lower layer portion 132α of the lower electrode 132 is formed on the seed layer. Then, copper plating is selectively grown to form the upper layer portion 132β of the lower electrode 132. Then, the resist pattern and the seed layer are removed. As a result, the thickness of the lower electrode 132 becomes thicker than the conductive patterns of the underpass pattern 131 and other first conductive pattern groups 130.

  Next, as shown in FIG. 4C, the second resin layer 24 is formed on the first resin layer 22 provided with the first conductive pattern group 130 including the underpass pattern 131 and the lower electrode 132 formed by thick film copper plating. The openings 24 a, 24 b, and 24 c are formed in the second resin layer 24 to contact the conductive pattern of the first conductive pattern group 130 with the conductive pattern of the second conductive pattern group 150. As the second resin layer 24, a photosensitive insulating resin having the same relative dielectric constant as that of the first resin layer 22 is used. The photosensitive resin fluid resin material is coated on the first resin layer 22 provided with the first conductive pattern group 130 by spin coating to form a photosensitive resin layer. Then, openings 24a, 24b, and 24c are provided in the photosensitive resin layer by photolithography.

  Next, as shown in FIG. 4D, the second conductive pattern group 150 including the coil pattern 151 of the inductor 110, the upper electrode 152 of the capacitor 120, the signal electrode pads 51 and 52, and the like is formed on the second resin layer 24. Provide.

  The signal electrode pad 51 is an electrode pad for guiding the underpass pattern 131 of the inductor 110 to the first signal terminal unit 40. The signal electrode pad 52 is an electrode pad for guiding the upper electrode 152 of the capacitor 120 to the second signal terminal unit 45.

  As the second conductive pattern group 150, the same copper plating as that of the first conductive pattern group 130 is used. After the seed layer is formed on the second resin layer 24, a resist is formed and patterned, and then copper plating is performed to form the second conductive pattern group 150 including the coil pattern 151, the upper electrode 152, and the signal electrode pads 51 and 52. To do.

  Next, a third resin layer 26 to be a sealing resin layer is formed on the second resin layer 24 provided with the second conductive pattern group 150, and signal electrode pads 51 and 52 are formed on the third resin layer 26. Openings 26a and 26b that are exposed are provided. As the third resin layer 26, a photosensitive insulating resin having the same dielectric constant as that of the first resin layer 22 and the second resin layer 24 is used. The photosensitive resin fluid resin material is coated on the second resin layer 24 provided with the second conductive pattern group 150 by spin coating to form a photosensitive resin layer. Then, openings 26a and 26b are formed in the photosensitive resin layer by photolithography.

  After completing the above procedure, the substrate 10 which is a wafer is diced to obtain a WLP resin multilayer device 100.

  As described above, according to the first embodiment, the distance between the lower electrode 132 and the upper electrode 152 of the capacitor 120 is smaller than the distance between the coil pattern 151 and the underpass pattern 131 of the inductor 110. By increasing the thickness of the lower electrode 132, the capacitance of the capacitor 120 can be increased without changing the characteristics of the inductor 110 and the electrode size of the capacitor 120. In the resin multilayer device according to the first embodiment of the present embodiment, the first resin layer is made of a photosensitive insulating resin, but is not necessarily photosensitive.

<Embodiment 2>
FIG. 5 is a perspective view illustrating a configuration example of the resin multilayer device according to the second embodiment of the present invention. In FIG. 5, the same components as those in FIG. FIG. 6 is a schematic circuit diagram of the resin multilayer device 200 of FIG. However, in FIG. 6, in order to explain the balun 210 in an easy-to-understand manner, the planar spiral type first balanced signal transmission line 30 having the first space E1 on the inner circumference and the second spiral E2 having the second space E2 on the inner circumference. Second balanced signal transmission path 35, a planar spiral type first unbalanced signal transmission path section 50c having a first space E1 on the inner periphery, and a planar spiral type second unbalance having a second space E2 on the inner periphery. The unbalanced signal transmission path 50 configured to include the signal transmission path section 50d is drawn in a straight transmission path.

  The resin multilayer device 200 according to the second embodiment includes a substrate 10, a first resin layer 22, a first conductive pattern group 130, a second resin layer 24, a second conductive pattern group 150, and a third resin layer. 26, two balanced signal terminal portions 60 (first balanced signal terminal portion) and 65 (second balanced signal terminal portion), two ground terminal portions 155 (first ground terminal portion) and 156 (second ground terminal) Part) and an unbalanced signal terminal part 90. In the resin multilayer device 200, a multilayer balun 210 and multilayer capacitors 240 and 245 are built.

  The second resin layer 24 is a first resin provided with a first conductive pattern group 130 including the first balanced signal transmission path 30, the second balanced signal transmission path 35, and the lower electrodes 137 and 138 of the capacitors 240 and 245. It is formed on the layer 22.

  The third resin layer 26 includes the second conductive pattern group 150 including the unbalanced signal transmission line 50, the upper electrodes 157 and 158 of the capacitors 240 and 245, and the electrode pads 53, 54, and 57 of the terminal portions 60, 65, and 90. It is formed on the second resin layer 24 provided.

[Balan 210]
The balun 210 includes the first resin layer 22, two balanced signal transmission paths 30 (first balanced signal transmission path) and 35 (second balanced signal transmission path), the second resin layer 24, and one non-loading line. The balanced signal transmission path 50 and the third resin layer 26 are configured. The balun 210 includes a first balun portion 210a arranged in a plane spiral type so as to have a first space E1 on the inner periphery, and a first spiral balun arranged in a plane spiral type so as to have a second space E2 on the inner circumference. 2 balun portions 210b. The first balun unit 210a includes a planar spiral type first balanced signal transmission path 30 having a first space E1 on the inner periphery, and a first unbalanced signal transmission path unit 50c facing the first balanced signal transmission path unit 50c. The second balun unit 210b includes a planar spiral type second balanced signal transmission path 35 having a second space E2 on the inner periphery, and a second unbalanced signal transmission path unit 50d facing the second balanced signal transmission path unit 50d.

  The first balanced signal transmission path 30 and the second balanced signal transmission path 35 are two transmission paths formed on the first resin layer 22 as the conductive patterns of the first conductive pattern group 130 electrically independently of each other. It is. The unbalanced signal transmission path 50 is formed on the second resin layer 24 as a conductive pattern of the second conductive pattern group 150. The unbalanced signal transmission path 50 has a first unbalanced signal transmission path section 50 c provided such that the lower surface thereof faces the upper surface of the first balanced signal transmission path 30, and the lower surface thereof is a second balanced signal transmission path 35. This is a single transmission line in which the outer peripheral ends of the second unbalanced signal transmission path portion 50d provided so as to face the upper surface of the first and second unbalanced signal lines are integrally connected.

The outer peripheral end (one end) 30a of the first balanced signal transmission path 30 and the outer peripheral end (one end) 35a of the second balanced signal transmission path 35 are signal ends to which balanced signals (differential signals) are input and output, respectively. The electrode pad 133 disposed on the signal end 30a of the first balanced signal transmission path 30 is connected to the electrode pad 153 connected to the first balanced signal terminal section 60 via the through electrode 220, and the second balanced signal transmission path. The electrode pad 134 disposed on the signal end 35 a of the 35 is connected to the electrode pad 154 connected to the second balanced signal terminal portion 65 through the through electrode 225.
Further, the inner peripheral end (other end) 30b of the first balanced signal transmission path 30 and the inner peripheral end (other end) 35b of the second balanced signal transmission path 35 are respectively grounded ends. The electrode pad 135 disposed on the ground terminal 30b of the first balanced signal transmission line 30 is connected to the first ground terminal portion 155 connected to the upper electrode 157 of the capacitor 240 via the through electrode 230, and the second balanced signal. The electrode pad 136 disposed on the ground end 35 b of the transmission path 35 is connected to the second ground terminal portion 156 that is continuous with the upper electrode 158 of the capacitor 245 through the through electrode 235.

  One end (the inner peripheral end of the first unbalanced signal transmission unit 50c) 50a of the unbalanced signal transmission path 50 is a signal end to which an unbalanced signal is input and output, and is connected to the unbalanced signal terminal unit 90. Are connected to the first ground terminal portion 155 via the capacitor 240. The other end (the inner peripheral end of the second unbalanced signal transmission unit 50d) 50b of the unbalanced signal transmission path 50 is an open end, and is connected to the second ground terminal unit 156 via the capacitor 245. .

  The first balanced signal transmission path 30 and the second balanced signal transmission path 35 are simultaneously formed of the same metal material as the conductive patterns of the first conductive pattern group 130, and are made of, for example, a plating metal such as copper plating. Further, it is desirable that the transmission line lengths of the first balanced signal transmission line 30 and the second balanced signal transmission line 35 are formed to be the same length. The first balanced signal transmission line 30 and the second balanced signal transmission line 35 are desirably formed to have the same width and the same thickness.

  The unbalanced signal transmission path 50 is made of a plating metal such as copper plating as the conductive pattern of the second conductive pattern group 150. The unbalanced signal transmission line 50 is preferably formed of the same metal material by the same formation method as the first balanced signal transmission line 30 and the second balanced signal transmission line 35. The transmission path length of the unbalanced signal transmission path 50 is formed to be longer than the total of the transmission path lengths of the first balanced signal transmission path 30 and the second balanced signal transmission path 35. The unbalanced signal transmission path 50 is desirably formed to have the same width and the same thickness as the first balanced signal transmission path 30 and the second balanced signal transmission path 35.

  The balun 210 includes the first balanced signal transmission line 30, the first balanced signal transmission line 30, the second balanced signal transmission line 35, and the unbalanced signal transmission line 50 which are disposed close to each other via the second resin layer 24. And a circuit that generates electromagnetic coupling between the second balanced signal transmission path 35 and the unbalanced signal transmission path 50.

  In this balun 210, when balanced signals are input to the signal ends 30a and 35a of the first balanced signal transmission path 30 and the second balanced signal transmission path 35, these balanced signals are converted into unbalanced signals. An unbalanced signal is output from the 50 signal terminals 50a. Conversely, when an unbalanced signal is input to the signal end 50a of the unbalanced signal transmission line 50, the unbalanced signal is converted into a balanced signal, and the first balanced signal transmission line 30 and the second balanced signal transmission are converted. A balanced signal is output from the signal ends 30 a and 35 a of the path 35.

  Furthermore, the balun 210 also has a function as a transformer for converting impedance. For impedance conversion, the impedance ZD1 on the unbalanced signal side and the impedance ZD2 on the balanced signal side are required to be impedance values according to design specifications. For example, the impedance ZD1 on the unbalanced signal side is 50Ω, and the impedance ZD1 + ZD2 on the balanced signal side is 100Ω, 150Ω, or 200Ω.

  In the balun, if the wavelength of the signal to be transmitted (signal to be converted) is λ, the transmission line lengths of the first balanced signal transmission line 30 and the second balanced signal transmission line 35 are λ / 4 or less, and the unbalanced signal transmission line 50 The transmission path length is set to λ / 2 or less.

[Capacitors 240 and 245]
The capacitor 240 is disposed in the first space E1 of the first balun unit 210a, and the capacitor 245 is disposed in the second space E2 of the second balun unit 210b.

  The capacitor 240 includes a lower electrode 137 that is a conductive pattern of the first conductive pattern group 130 and an upper electrode 157 that is a conductive pattern of the second conductive pattern group 150. The lower electrode 137 is connected to the signal end 50a of the unbalanced signal transmission line 50 (unbalanced signal electrode pad of the unbalanced signal terminal portion 90) via the wiring pattern of the first conductive pattern group 130 and the wiring pattern of the second conductive pattern group 150. 57), and the upper electrode 157 is connected to the ground electrode pad 135 of the first ground terminal portion 155 through the wiring pattern of the second conductive pattern group 150.

  The capacitor 245 includes a lower electrode 138 that is a conductive pattern of the first conductive pattern group 130 and an upper electrode 158 that is a conductive pattern of the second conductive pattern group 150. The lower electrode 138 is connected to the open end 50b of the unbalanced signal transmission path 50 through the wiring pattern of the first conductive pattern group 130 and the wiring pattern of the second conductive pattern group 150, and the upper electrode 158 is connected to the second electrode 158. The conductive pattern group 150 is connected to the ground electrode pad 136 of the second ground terminal portion 156 through the wiring pattern.

  The thickness dimensions of the lower electrodes 137 and 138 of these capacitors 240 and 245 are larger than the thickness dimensions of the conductive patterns of the first balanced signal transmission path 30, the second balanced signal transmission path 35, and other first conductive pattern groups 130. It is thick. Accordingly, the upper surface positions of the lower electrodes 137 and 138 are higher than the upper surface positions of the other conductive patterns of the first conductive pattern group 130.

  That is, the distance between the lower electrode 137 and the upper electrode 157 of the capacitor 240 and the distance between the lower electrode 138 and the upper electrode 158 of the capacitor 245 are determined by the first balanced signal transmission path 30, the second balanced signal transmission path 35, and other first conductivity. The distance between the conductive pattern of the pattern group 130 and the conductive pattern of the second conductive pattern group 150 other than the unbalanced signal transmission path 50 is narrower.

In this manner, the lower electrodes 137 and 138 of the capacitors 240 and 245 are made thicker than the other conductive patterns of the first conductive pattern group 130, and the distance between the lower electrode and the upper electrode of these capacitors is set to the first conductive pattern group. By making the distance between the other conductive patterns of 130 and the other conductive patterns of the second conductive pattern group 150 narrower, without changing the design of the balun 210, without increasing the electrode size of the capacitors 240 and 245, The capacitances of the capacitors 240 and 245 can be increased. Thus, the effective length of the balun transmission line can be shortened.

[Balanced signal terminal portions 60, 65, ground terminal portions 155, 156, unbalanced signal terminal portion 90]
The first ground terminal portion 155 and the unbalanced signal terminal portion 90 are disposed in the first space E1 of the first balun portion 210a, and the second ground terminal portion 156 is the second space E2 of the second balun portion 210b. Is placed inside. Note that the first balanced signal terminal unit 60 and the second balanced signal terminal unit 65 are disposed outside the balun 210.

  The first balanced signal terminal portion 60 is obtained by providing the balanced signal electrode pad 53 of the second conductive pattern group 150 in the opening 26 c of the third resin layer 26. The second balanced signal terminal portion 65 is provided with the balanced signal electrode pad 54 of the second conductive pattern group 150 in the opening 26 d of the third resin layer 26. The unbalanced signal terminal portion 90 is obtained by providing the unbalanced signal electrode pad 57 of the second conductive pattern group 150 in the opening 26 g of the third resin layer 26.

[Manufacturing Procedure of Resin Multilayer Device 200]
A manufacturing procedure of the resin multilayer device 200 according to Embodiment 2 will be described below. In the following description, since the resin multilayer device 200 is a WLP, a balun 210 and capacitors 240 and 245 are formed on a wafer by a resin layer formation process and a conductive pattern group formation process such as a thick film copper pattern group, and then It is manufactured by WLCSP technology to dice into chips.

  First, the 1st resin layer 22 is formed on the board | substrate 10 which is a wafer provided with the protective film 10a (refer FIG. 4). As the first resin layer 22, a photosensitive insulating resin is used. The photosensitive resin fluid resin material is coated on the substrate 10 by spin coating and baked to form a photosensitive resin layer.

  Next, the first conductive pattern group 130 including the first balanced signal transmission path 30, the second balanced signal transmission path 35, the lower electrodes 137 and 138 of the capacitors 240 and 245, and the like is provided on the first resin layer 22.

  As the first conductive pattern group 130, copper plating is used. After the seed layer is formed on the first resin layer 22, a resist is formed and patterned, and then copper plating is performed, and the lower layers of the first balanced signal transmission path 30, the second balanced signal transmission path 35, and the lower electrodes 137 and 138, respectively. A first conductive pattern group 130 including a portion is formed. At this time, the thickness of the conductive pattern of the lower conductive layer of the lower electrode, the first balanced signal transmission path 30, the second balanced signal transmission path 35 and other first conductive pattern groups 130 is the same.

  Furthermore, a seed layer for thick film copper plating is formed thereon, and a resist pattern is formed on the seed layer to expose only the lower layer portions of the lower electrodes 137 and 138. On these lower layer portions, Copper plating is selectively grown to form an upper layer portion on the lower layer portion of each of the lower electrodes 137 and 138. Then, the resist pattern and the seed layer are removed. Accordingly, the thicknesses of the lower electrodes 137 and 138 are thicker than the conductive patterns of the first balanced signal transmission path 30, the second balanced signal transmission path 35, and other first conductive pattern groups 130.

  Next, on the first resin layer 22 provided with the first conductive pattern group 130 including the first balanced signal transmission path 30, the second balanced signal transmission path 35, and the lower electrodes 137 and 138 by thick film copper plating, Two resin layers 24 are formed, and openings for contacting the conductive patterns of the first conductive pattern group 130 with the conductive patterns of the second conductive pattern group 150 are provided in the second resin layer 24. As the second resin layer 24, a photosensitive insulating resin having the same relative dielectric constant as that of the first resin layer 22 is used. The photosensitive resin fluid resin material is coated on the first resin layer 22 provided with the first conductive pattern group 130 by spin coating to form a photosensitive resin layer. Then, an opening is provided in the photosensitive resin layer by a photolithography method.

  Next, the second resin layer 24 includes the unbalanced signal transmission line 50, the upper electrodes 157 and 158 of the capacitors 240 and 245, the electrode pads 53, 54, and 57 of the terminal portions 60, 65, and 90, and the like. A conductive pattern group 150 is provided.

  As the second conductive pattern group 150, the same copper plating as that of the first conductive pattern group 130 is used. After the seed layer is formed on the second resin layer 24, a resist is formed and patterned, and then copper plating is performed, and the unbalanced signal transmission path 50, the upper electrodes 157 and 158, the electrode pads 53, 54, 57, 153, and 154 are formed. Then, the second conductive pattern group 150 including the ground terminal portions 155 and 156 is formed.

  Next, a third resin layer 26 to be a sealing resin layer is formed on the second resin layer 24 provided with the second conductive pattern group 150, and electrode pads 53, 54, 57 are formed on the third resin layer 26. Are provided with openings 26c, 26d, and 26g. As the third resin layer 26, a photosensitive insulating resin having the same dielectric constant as that of the first resin layer 22 and the second resin layer 24 is used. The photosensitive resin fluid resin material is coated on the second resin layer 24 provided with the second conductive pattern group 150 by spin coating to form a photosensitive resin layer. Then, openings 26c, 26d, and 26g are formed in the photosensitive resin layer by photolithography.

  After the above procedure is completed, the substrate 10 which is a wafer is diced to obtain a WLP resin multilayer device 200.

  As described above, according to the second embodiment, the distances between the lower electrodes 137 and 138 and the upper electrodes 157 and 158 of the capacitors 240 and 245 are set so that the first balanced signal transmission line 30 and the second balanced signal transmission of the balun 210 are the same. By increasing the thickness of the lower electrodes 137 and 138 of the capacitors 240 and 245 so as to be narrower than the distance between the path 35 and the unbalanced signal transmission path 50, the characteristics of the balun 210 and the size of the capacitors 240 and 245 are not changed. In both cases, the capacitance of the capacitors 240 and 245 can be increased.

  Note that the resin multilayer device 100 according to the first embodiment may further include the balun 210 according to the second embodiment. Alternatively, the resin multilayer device 100 of the first embodiment may be configured to further include the balun 210 and the capacitors 240 and 245 of the second embodiment. In the resin multilayer device of Embodiment 2 of the present example, the first resin layer uses a photosensitive insulating resin, but it does not necessarily have to be photosensitive.

<Embodiment 3>
FIG. 7 is a cross-sectional view illustrating a configuration example of the resin multilayer device according to the third embodiment of the present invention. In FIG. 7, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals. The resin multilayer device 300 according to the third embodiment includes a substrate 10, a first resin layer 22, a first conductive pattern group 130, a second resin layer 324, a second conductive pattern group 150, and a third resin layer. 26 and two signal terminal portions 40 (first signal terminal portion) and 45 (second signal terminal portion).

  That is, the resin multilayer device 300 of Embodiment 3 in FIG. 7 is obtained by replacing the second resin layer 24 with the second resin layer 324 in the resin multilayer device 100 of Embodiment 1 (see FIG. 2). . The second resin layer 324 is a resin having a relative dielectric constant higher than that of the second resin layer 24 of the first embodiment, and is, for example, a photosensitive resin. Therefore, in the resin multilayer device 300, the relative dielectric constant of the second resin layer 324 is higher than that of the first resin layer 22 and the third resin layer 26.

  As described above, according to the third embodiment, by providing the second resin layer 324 having a higher dielectric constant than the first resin layer 22 and the third resin layer 26, the capacitor 120 can be further increased in capacity. It becomes possible.

  Note that the high dielectric constant second resin layer 324 of the third embodiment can be applied to the resin multilayer device 200 of the second embodiment. That is, in the resin multilayer device 200 of the second embodiment, the second resin layer 24 may be the second resin layer 324 having a high relative dielectric constant of the third embodiment.

<Embodiment 4>
FIG. 8 is a cross-sectional view illustrating a configuration example of the resin multilayer device according to the fourth embodiment of the present invention. In FIG. 8, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals. The resin multilayer device 400 according to the fourth embodiment includes a substrate 10, a first resin layer 22, a first conductive pattern group 130, a second resin layer 24, a second conductive pattern group 150, and a third resin layer. 26, and a first signal terminal portion 40 having a solder bump 440 and a second signal terminal portion 45 having a solder bump 445.

  That is, the resin multilayer device 400 of Embodiment 4 in FIG. 8 is soldered onto the electrode pads 51 and 52 of the signal terminal portions 40 and 45 in the resin multilayer device 100 of Embodiment 1 (see FIG. 2). Bumps 440 and 445 are provided. These solder bumps 440 and 445 are for flip-chip mounting the resin multilayer device 400 on a mounting substrate.

  As described above, according to the fourth embodiment, the resin multilayer device 400 can be flip-chip mounted on the mounting substrate by providing the solder bumps 440 and 445 on the signal terminal portions 40 and 45, respectively.

  The configuration in which the solder bump is provided on the terminal portion of the fourth embodiment can be applied to the resin multilayer device 200 of the second embodiment. That is, in the resin multilayer device 200 of the second embodiment, the solder bumps may be provided on the electrode pads 53, 54, and 57 of the terminal portions 60, 65, and 90, respectively.

<Embodiment 5>
FIG. 9 is a cross-sectional view illustrating a configuration example of the resin multilayer device according to the fifth embodiment of the present invention. In FIG. 9, the same components as those in FIGS. 1, 2, 7, and 8 are denoted by the same reference numerals. The resin multilayer device 500 according to the fifth embodiment includes a substrate 10, a first resin layer 22, a first conductive pattern group 130, a second resin layer 324, a second conductive pattern group 150, and a third resin layer. 26, and a first signal terminal portion 40 having a solder bump 440 and a second signal terminal portion 45 having a solder bump 445.

  That is, the resin multilayer device 500 according to the fifth embodiment shown in FIG. 9 is the same as the resin multilayer device 100 according to the first embodiment (see FIG. 2). The second resin layer 324 has a high rate, and solder bumps 440 and 445 are provided on the electrode pads 51 and 52 of the signal terminal portions 40 and 45 as in the fourth embodiment.

  As described above, according to the fifth embodiment, the second resin layer 324 having a higher dielectric constant than that of the first resin layer 22 and the third resin layer 26 is provided, and solder bumps are provided on the signal terminal portions 40 and 45, respectively. By providing 440 and 445, the capacity of the capacitor 120 can be further increased, and the resin multilayer device 500 can be flip-chip mounted on the mounting substrate.

  The configuration provided with the second resin layer 324 and the solder bumps 440 and 445 according to the fifth embodiment can be applied to the resin multilayer device of the second embodiment.

<Embodiment 6>
FIG. 10 is a cross-sectional view illustrating a configuration example of the resin multilayer device according to the sixth embodiment of the present invention. In FIG. 10, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals. The resin multilayer device 600 according to the sixth embodiment includes a substrate 10, a first resin layer 22, a first conductive pattern group 130, a second resin layer 24, a second conductive pattern group 150, and a third resin layer. 26, and a first signal terminal portion 40 having an antioxidant layer 640 and a second signal terminal portion 45 having an antioxidant layer 645.

  That is, the resin multilayer device 600 of the sixth embodiment shown in FIG. 10 is formed on the electrode pads 51 and 52 of the signal terminal portions 40 and 45 in the resin multilayer device 100 of the first embodiment (see FIG. 2). Antioxidation layers 640 and 645 are provided. These anti-oxidation layers 640 and 645 are formed on the electrode pads 51 and 52 in the opening of the third resin layer 26 by plating made of gold (Au) after plating made of nickel (Ni) by electroless plating, for example. Surface treatment is applied. These antioxidant layers 640 and 645 are for wire bonding mounting the resin multilayer device 600 on a printed circuit board or the like.

  As described above, according to the sixth embodiment, by providing the anti-oxidation layers 640 and 645 on the electrode pads 51 and 52 of the signal terminal portions 40 and 45, respectively, the resin multilayer device 600 is bonded to the printed circuit board by wire bonding. Since the electrode pads 51 and 52 and the bonding wire can be reliably brought into ohmic contact when mounted, the reliability of wire bond mounting can be improved.

  The configuration in which the antioxidant layer is provided on the electrode pad of the terminal portion of the sixth embodiment can also be applied to the resin multilayer device 200 of the second embodiment. That is, in the resin multilayer device 200 of the second embodiment, the electrode pads 53, 54, and 57 of the terminal portions 60, 65, and 90 may be subjected to a surface treatment with an antioxidant layer. .

<Embodiment 7>
FIG. 11 is a cross-sectional view illustrating a configuration example of the resin multilayer device according to the seventh embodiment of the present invention. In FIG. 11, the same components as those in FIGS. 1, 2, 7, and 10 are denoted by the same reference numerals. The resin multilayer device 700 according to the seventh embodiment includes a substrate 10, a first resin layer 22, a first conductive pattern group 130, a second resin layer 324, a second conductive pattern group 150, and a third resin layer. 26, and a first signal terminal portion 40 having an antioxidant layer 640 and a second signal terminal portion 45 having an antioxidant layer 645.

  That is, the resin multilayer device 700 of the seventh embodiment shown in FIG. 11 is the same as the resin multilayer device 100 of the first embodiment (see FIG. 2), in which the second resin layer 24 has a dielectric constant as in the third embodiment. The second resin layer 324 has a high rate, and the anti-oxidation layers 640 and 645 are provided on the electrode pads 51 and 52 of the signal terminal portions 40 and 45 as in the sixth embodiment.

  As described above, according to the seventh embodiment, the second resin layer 324 having a relative dielectric constant higher than that of the first resin layer 22 and the third resin layer 26 is provided, and the signal terminal portions 40 and 45 are provided. By providing the anti-oxidation layers 640 and 645 on the electrode pads 51 and 52, respectively, it becomes possible to further increase the capacity of the capacitor 120, and at the time of wire bonding mounting the resin multilayer device 700 on the printed board. Since the pads 51 and 52 and the bonding wire can be reliably brought into ohmic contact, the reliability of wire bond mounting can be improved.

  The configuration in which the second resin layer 324 according to the seventh embodiment is provided and the configuration in which the surface treatment with the antioxidant layer is performed on the electrode pad of the terminal portion may be applied to the resin multilayer device according to the second embodiment. Is possible.

<Eighth embodiment>
FIG. 12 is a partial cross-sectional view illustrating a configuration example of a capacitor in the resin multilayer device according to the eighth embodiment of the present invention. In FIG. 12, the same components as those in FIGS. 1, 2, 5, and 7 to 11 are denoted by the same reference numerals.

  In the resin multilayer device according to the eighth embodiment, in the resin multilayer device according to any one of the first to seventh embodiments, the configuration of the capacitors 120, 240, and 245 is the configuration of the capacitor 820 in FIG. In FIG. 12, the upper electrode 851 of the capacitor 820 is one of the upper electrodes 152, 157, 158 of the capacitors 120, 240, 245 of the first to seventh embodiments, and the second resin layer 824 is It is the 2nd resin layer 24 or 324 of Embodiment 1-7.

  The capacitor 820 of the eighth embodiment has a lower electrode 831 of the first conductive pattern group 130 and an upper electrode 851 of the second conductive pattern group 150. The capacitor 820 includes a resin core 822 formed on the first resin layer 22 by a resin core post forming method, and a lower electrode 831 provided on the resin core 822. Therefore, since the upper surface position of the lower electrode 831 is higher than the upper surface positions of the other conductive patterns of the first conductive pattern group 130, the distance between the lower electrode 831 and the upper electrode 851 can be reduced.

  The resin core 822 is made of, for example, the same photosensitive resin as the first resin layer 22. The lower electrode 831 has the same thickness as the other conductive patterns of the first conductive pattern group 130, and does not need to be thicker than the other conductive patterns by selective plating as in the first to seventh embodiments. .

  A manufacturing procedure of the capacitor 820 will be described below. First, a resin layer is further formed on the first resin layer 22 and patterned to form a resin core 822 protruding from the upper surface of the first resin layer 22 at a position where the lower electrode 831 is provided. Then, copper plating is performed on the first resin layer 22 provided with the resin core 822 to provide the first conductive pattern group 130 including the lower electrode 831. Thereby, the lower electrode 831 is provided as a post electrode on the resin core 822. Further, a second resin layer 824 is formed thereon, and copper plating is performed on the second resin layer 824 to provide the second conductive pattern group 150 including the upper electrode 851. And the 3rd resin layer 26 is formed on this.

  As described above, according to the eighth embodiment, the lower electrode 831 is provided as a post electrode by the resin core post forming method, so that the thickness of the lower electrode 831 is made thicker than the other conductive patterns of the first conductive pattern group 130. At least, the distance between the lower electrode 831 and the upper electrode 851 of the capacitor 820 can be reduced, so that the capacitance can be increased without increasing the electrode size of the capacitor 820.

  10 substrate, 20 multilayer resin body, 22 first resin layer, 24 second resin layer, 24a, 24b, 24c opening, 26 third resin layer, 26a, 26b, 26c, 26d, 26g opening, 30 first equilibrium Signal transmission path, 30a Signal end, 30b Ground end, 35 Second balanced signal transmission path, 35a Signal end, 35b Ground end, 40 First signal terminal section, 45 Second signal terminal section, 50 Unbalanced signal transmission path, 50a Signal end, 50b Open end, 50c First unbalanced signal transmission path, 50d Second unbalanced signal transmission path, 51, 52 Signal electrode pad, 53, 54 Balanced signal electrode pad, 57 Unbalanced signal electrode pad, 60 First balanced signal terminal section, 65 Second balanced signal terminal section, 155 First ground terminal section, 156 Second ground terminal section, 90 Unbalanced signal terminal section, 100 Resin multilayer device, 11 0 inductor, 120 capacitor, 130 first conductive pattern group, 131 underpass pattern, 131a upper surface, 132 lower electrode, 132a lower electrode upper surface, 132α lower electrode lower layer, 132β lower electrode upper layer, 133,134 electrode pads 137, 138 Lower electrode, 135, 136 Ground electrode pad, 150 Second conductive pattern group, 151 Coil pattern, 152, 157, 158 Upper electrode, 153, 154 Electrode pad, 200 Resin multilayer device, 210 Balun, 210a First Balun part, 210b Second balun part, 240,245 capacitor, 300 resin multilayer device, 324 Second resin layer, 400 resin multilayer device, 440,445 solder bump, 500 resin multilayer device, 600 resin multilayer device, 64 , 645 antioxidant layer 700 resin multilayer device, 820 a capacitor 822 resin core, 824 the second resin layer, 831 a lower electrode, 851 an upper electrode.

Claims (5)

A resin multilayer device having a capacitor and a laminated circuit made of an inductor or / and a balun,
A substrate, a first resin layer formed on the substrate, a first conductive pattern group provided on the first resin layer, and formed on the first resin layer and the first conductive pattern group. A second resin layer, a second conductive pattern group provided on the second resin layer, and a third resin layer formed on the second resin layer and the second conductive pattern group,
The capacitor includes a lower electrode of the first conductive pattern group and an upper electrode of the second conductive pattern group,
The laminated circuit has a lower circuit pattern of the first conductive pattern group and an upper circuit pattern of the second conductive pattern group,
The lower electrode is provided such that the distance between the upper surface of the lower electrode and the lower surface of the upper electrode is narrower than the distance between the upper surface of the lower circuit pattern and the lower surface of the upper circuit pattern. Resin multilayer device.   2. The resin multilayer device according to claim 1, wherein the second resin layer has a relative dielectric constant higher than that of the first resin layer and the third resin layer.   3. The resin multilayer device according to claim 1, wherein the lower electrode is thicker than the lower circuit pattern.   3. The resin multilayer device according to claim 1, wherein the lower electrode is provided on a resin core formed on the first resin layer. 4. It is a manufacturing method of the resin multilayer device according to claim 1,
Coating and curing a fluid resin on the wafer to be the substrate to form the first resin layer;
Providing the first conductive pattern group on the first resin layer such that an upper surface position of the lower electrode is higher than an upper surface position of the lower circuit pattern;
On this, a fluid resin is coated and cured to form the second resin layer;
Providing the second conductive pattern group including the upper electrode and the upper circuit pattern on the second resin layer;
On top of this, a fluid resin is coated and cured to form the third resin layer;
A method for producing a resin multilayer device, comprising:

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