JP2010186871A - Method for manufacturing imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing an imaging device reducing warpage of a glass wafer on which a thin film is formed and capable of being easily manufactured. <P>SOLUTION: The method for manufacturing an imaging device includes: a step of forming a mask 21 in a part on a first surface of a glass wafer 20; a step of forming a thin film 30 on the first surface of the glass wafer; a step of removing the mask and forming a groove in the thin film in the part on the first surface of the glass wafer; and a step of bonding a semiconductor wafer 10 on a second surface facing the first surface of the glass wafer. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method for manufacturing an imaging device in which a thin film is directly formed on a glass wafer.

  Along with miniaturization of electronic equipment, semiconductor devices to be mounted need to be miniaturized and highly integrated. In the second half of the 1990s, the practical application of Wafer Level Chip Scale Package (wafer level CSP) has begun. The wafer level CSP is a flip chip type in which lead wires are arranged, and the semiconductor chip surface is faced downward and bonded to the substrate by bumps.

  In addition, since the late 1990s, development of stacked packages (multi-chip packages) has been underway, in which a plurality of semiconductor chips can be stacked three-dimensionally to achieve significant downsizing, and a package using through electrodes has been proposed. (For example, refer to Patent Document 1). The study of wafer level CSP for optical elements begins around 2000. Recently, devices having a structure of glass + adhesive layer + image sensor + penetrating electrode have been created at the wafer level.

  On the other hand, the camera module includes components such as an image sensor, a lens, an infrared cut film (IRCF), a diaphragm, and a light shield. However, since it is necessary to make the camera module at a low cost, it is desirable to reduce the number of parts as much as possible. For this reason, in the case of an imaging device having a through electrode and a glass substrate, it is conceivable to form IRCF directly on the glass substrate. However, if this is performed at the wafer level, warping occurs in the direction in which the glass substrate contracts or the glass substrate extends due to the relationship between the thermal expansion coefficients of the IRCF and the glass substrate. In some cases, the warpage of the glass substrate increases. As a result, problems such as inability to convey in the manufacturing apparatus and adsorption on the stage occur.

  In order to solve this problem, in Patent Document 2, warpage of the glass substrate can be suppressed by providing a groove in the glass substrate before directly forming the IRCF on the glass substrate.

  However, in the manufacturing method of the glass substrate with IRCF as in Patent Document 2 described above, it is difficult to provide a groove in the glass substrate, and high processing accuracy is required. For this reason, it is difficult to easily manufacture a glass substrate with IRCF, and the manufacturing cost is further increased.

JP-A-10-223833 JP 2006-282480 A

  The present invention provides an imaging device manufacturing method that can reduce the warpage of a glass wafer on which a thin film is formed and can be easily manufactured.

  An imaging device manufacturing method according to an aspect of the present invention includes a step of forming a mask on a part of a first surface of a glass wafer, a step of forming a thin film on the first surface of the glass wafer, and the mask. And forming a groove in the thin film in the part on the first surface of the glass wafer; and bonding a semiconductor wafer to a second surface opposite to the first surface of the glass wafer; Are provided.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the imaging device which can reduce the curvature of the glass wafer in which the thin film was formed, and can manufacture easily can be provided.

Sectional drawing which shows the camera module which concerns on embodiment of this invention. The process flow which shows the manufacturing method of the camera module which concerns on embodiment of this invention. FIG. 3A is a plan view showing Structural Example 1 of the glass substrate with IRCF according to the embodiment of the present invention, and FIG. 3B shows Structural Example 1 of the glass substrate with IRCF according to the embodiment of the present invention. FIG. FIG. 4A is a plan view showing Structural Example 2 of the glass substrate with IRCF according to the embodiment of the present invention, and FIG. 4B shows Structural Example 2 of the glass substrate with IRCF according to the embodiment of the present invention. FIG. FIG. 5A is a plan view showing Structural Example 3 of the glass substrate with IRCF according to the embodiment of the present invention, and FIG. 5B shows Structural Example 3 of the glass substrate with IRCF according to the embodiment of the present invention. FIG. FIG. 6A is a cross-sectional view showing a method for manufacturing a glass substrate with IRCF according to an embodiment of the present invention, and FIG. 6B is a diagram with IRCF according to an embodiment of the present invention following FIG. Sectional drawing which shows the manufacturing method of a glass substrate, FIG.6 (c) is sectional drawing which shows the manufacturing method of the glass substrate with IRCF which concerns on embodiment of this invention following FIG.6 (b), FIG.6 (d) is FIG. Sectional drawing which shows the manufacturing method of the glass substrate with IRCF which concerns on embodiment of this invention following FIG.6 (c).

  Embodiments of the present invention will be described below with reference to the drawings. Here, a camera module is taken as an example of the imaging device. In the description, common parts are denoted by common reference symbols throughout the drawings.

(1) Structure of Camera Module First, the structure of the camera module according to the present embodiment will be described. FIG. 1 is a cross-sectional view illustrating a configuration of a camera module according to the present embodiment.

  As shown in FIG. 1, the camera module includes a silicon substrate (imaging device chip) 10, a glass substrate (cover glass) 20, a solder ball 11, an IRCF (infrared cut film) 30, a light shielding / electromagnetic shield 60, an imaging lens 40, A lens holder 50 is provided.

  The glass substrate 20 is a light transmissive support substrate. An IRCF 30 is formed on the first surface of the glass substrate 20. A lens holder 50 including the imaging lens 40 is placed on the IRCF 30 via an adhesive 72. Here, there may be a region where the IRCF 30 is not formed at the end of the glass substrate 20.

  The second surface of the glass substrate 20 and the first surface of the silicon substrate 10 are bonded together with an adhesive 71. An image sensor (not shown) is formed on the first surface of the silicon substrate 10. An area where the adhesive 71 does not exist is provided on the imaging element. This is to prevent the microlens and the adhesive 71 from having substantially the same refractive index and the condensing effect of the microlens from being lost. On the second surface of the silicon substrate 10, external terminals, for example, solder balls 11 are formed. A light shielding / electromagnetic shield 60 is disposed around the silicon substrate 10 and the glass substrate 20, and the light shielding / electromagnetic shield 60 is bonded to the lens holder 50 with an adhesive 73.

(2) Camera Module Manufacturing Method Next, a camera module manufacturing method according to the present embodiment will be described. FIG. 2 is a process flow showing a manufacturing method of the camera module of FIG. In the present embodiment, a camera module having a through electrode and a glass substrate is created at the wafer level.

  First, a solid-state imaging device (not shown) is formed on a silicon substrate (silicon wafer) 10 (step S1). That is, an image pickup device including a photodiode and a transistor is formed on the silicon substrate 10. Furthermore, an internal electrode (not shown), an interlayer insulating film (not shown), an element surface electrode (not shown), a color filter (not shown), and a microlens (not shown) are formed on the silicon substrate 10. It is formed. Subsequently, a die sort test is performed on each chip including the image pickup device to check whether each chip operates normally (step S2). In the die sort test, a tester needle is applied to the element surface electrode.

  Next, an adhesive 71 is formed on the first surface of the silicon substrate 10 by a spin coat method or a laminate method. The adhesive 71 has a function capable of patterning by lithography and a function of maintaining a patterning shape as well as an adhesive function. The adhesive 71 formed on the silicon substrate 10 is patterned so as to be removed from the imaging element by lithography, that is, not formed (step S3).

  On the other hand, a process of forming the IRCF 30 on the glass substrate (glass wafer) 20 is performed separately from the processes of steps S1 to S3. First, a transparent substrate, for example, a glass substrate 20 is prepared (Step S4). Thereafter, IRCF 30 is directly formed on the first surface of glass substrate 20 by vapor deposition (step S5).

  Next, the first surface of the silicon substrate 10 with the adhesive 71 is bonded to the second surface of the glass substrate 20 (step S6).

  Next, the silicon substrate 10 is shaved and thinned from the second surface side by back grinding or the like (step S7). Scratch marks remain on the second surface of the silicon substrate 10 after back grinding, and the unevenness thereof ranges from several μm to 10 μm. If the process proceeds to the next lithography and RIE process as it is, there is a possibility of causing a lithography defect and an RIE defect. Therefore, it is desirable to planarize the second surface of the silicon substrate 10 by CMP (Chemical Mechanical Polish), wet etching, or the like. Further, the variation in thickness of the silicon substrate 10 needs to be within an average value ± 5 μm. If there is a variation in the thickness of the silicon substrate 10 in the plane, in the next RIE process, etching will be insufficient in a portion where the silicon is thick, and an etching called notching will occur in the bottom in a portion where the silicon is thin.

  Next, a resist is applied on the second surface of the silicon substrate 10, and an opening is made by lithography at a position corresponding to a pad opening (not shown) on the first surface of the silicon substrate 10 (step S8). At this time, since the opening of the second surface of the silicon substrate 10 is aligned with an alignment mark (not shown) on the first surface of the silicon substrate 10, means such as a double-sided aligner and a double-sided stepper Must be used.

  Next, through holes are formed as follows using the patterned resist as a mask (step S9).

  First, only silicon of the silicon substrate 10 is etched by RIE. By the way, a silicon device process for forming an image sensor and a transistor usually proceeds in the order of well formation, STI (Shallow Trench Isolation) formation, source / drain formation, gate / electrode formation, and wiring formation. Here, in the STI formation, it is not desirable to form silicon hills or shallow trenches of a certain size or more. This is because when a large sized silicon hill exists during CMP, the remaining CMP occurs on the hill, and when a large sized shallow trench exists, overcutting occurs in the hill. For this reason, in either case, there is a possibility of causing misalignment in the next lithography process or disconnection of the upper metal wiring. Therefore, a dummy STI is usually formed on a portion of the silicon substrate 10 where a huge pattern such as an electrode pad is formed.

  However, when forming a through electrode, it is important not to place STI under the electrode pad. This is because the gas type differs between the RIE of the silicon substrate 10 and the RIE of the insulating film. If there is an insulating film pattern in the silicon substrate 10 during the RIE of the silicon substrate 10, an etching failure occurs there and a sword-like shape is formed. This is because an etching residue may be formed. When CMP residue is inevitably generated under the electrode pad during STI CMP, the portion where the residue is generated is opened by lithography, and after performing partial wet etching or the like, CMP is performed to eliminate the CMP residue. Need to do.

  Further, the shape of the through hole of the silicon substrate 10 formed by RIE is preferably a tapered shape that gradually becomes narrower from the opening of the second surface toward the back. If a notching or bowing shape occurs and a taper in the opposite direction is formed, it may cause the formation failure of the insulating film by the next CVD or the formation failure of the metal seed layer by sputtering.

  A stopper at the time of RIE of the silicon substrate 10 is a layer directly in contact with the silicon substrate 10 in an interlayer insulating film (not shown) or a gate insulating film formed on the silicon substrate 10.

  Next, the resist is removed by ashing and wet cleaning (step S10). Preferably, it is desirable to remove RIE residue by performing HF wet cleaning after silicon RIE or after resist stripping.

Next, an insulating film (not shown) such as SiO ₂ , SiON, or SiN is formed on the entire second surface of the silicon substrate 10 by a method such as CVD (Chemical Vapor Deposition) (step S11).

  Next, a resist is applied again, only the bottom of the through hole of the silicon substrate 10 is opened by lithography (step S12), and RIE of the insulating film is performed using the resist as a mask (step S13). In the RIE of the insulating film, all the insulating films between the CVD insulating film formed earlier, the silicon substrate 10 formed by the silicon device process, and the internal electrodes are etched. At this time, the internal electrode serves as a stopper during the RIE of the insulating film.

  Subsequently, the resist is removed by ashing and wet cleaning (step S14). Since the surface of the internal electrode may be oxidized by several nanometers to several tens of nanometers, it is desirable that the surface be etched slightly by alkaline wet etching.

  Next, a metal seed layer is formed on the insulating film and the internal electrode by sputtering (step S15). In the sputtering process, it is desirable that the oxide layer on the surface of the internal electrode is first removed by reverse sputtering. Subsequently, sputtering of a metal seed such as Ti or Cu is performed. In order to prevent the occurrence of corrosion on the surface of the internal electrode, the time between the RIE of the insulating film and the metal seed sputtering is preferably within 3 hours, and at most within 24 hours.

  Next, a resist is applied for electrode patterning on the second surface of the silicon substrate 10, and patterning is performed by lithography so that the resist remains only in the portion where the electrode is not formed (step S16). Next, plating is performed on the metal seed layer by electric field plating or the like, and through electrodes and wirings are formed (step S17). Thereafter, the resist is removed by a method such as wet etching (step S18). Subsequently, the metal seed is etched by wet cleaning or the like, and the insulating film is exposed in a region other than the through electrode and the wiring (step S19). In addition, there may be a method in which electroplating is performed on the entire surface first, and then through electrodes and wirings are formed by lithography and etching. However, in this method, the amount of plating solution to be used increases and an expensive process is required. turn into.

  Next, a solder resist (not shown) is formed on the entire second surface of the silicon substrate 10 by a method such as spin coating. Further, the opening of the solder resist is performed by lithography only in the region where the solder ball 11 is placed (step S20). Thereafter, a continuity check is performed (step S21), and the solder ball 11 is placed on the conductor layer (not shown) in the opening portion of the solder resist (step S22).

  Finally, the silicon substrate 10 and the glass substrate 20 are separated into pieces by dicing (step S23), pickup (step S24), mounting of the lens 40 (step S25), and image check (lens adjustment) (step S26) are performed. Is called. Thus, the camera module is packed (step S27), and the manufacturing of the camera module is completed.

In the present embodiment, the glass substrate 20 is used as the light transmissive support substrate, but a temperature of 100 ° C. to 200 ° C. is applied by curing various resists or CVD. As a result, if the thermal expansion coefficients of silicon and glass are different, the silicon substrate 10 is cracked or broken. For this reason, as much as possible, it is necessary to use what has the same thermal expansion coefficient of about 3.17-3.3 * 10 < ^-6 > (K < ^-1 >) as a silicon | silicone and glass. In general, glass having the same thermal expansion coefficient as silicon is an insulator and has a high resistance. However, in an RIE apparatus, an asher apparatus, a sputtering apparatus, and the like, the sample being processed is held by an electrostatic chuck rather than a mechanical chuck. In this case, the glass substrate 20 has a disadvantage that it cannot be held by the electrostatic chuck. In order to avoid this, it may be necessary to adhere a conductive film, a plate, or the like to the surface of the glass substrate 20 or to spin coat a conductive liquid.

(3) Structure of Glass Substrate (Glass Wafer) Formed with IRCF Next, the structure of the glass substrate (hereinafter referred to as a glass substrate with IRCF) formed with IRCF in the camera module according to the present embodiment will be described in detail. . Here, the glass substrate with IRCF at the wafer level before the dicing process will be described.

  Fig.3 (a) shows the top view of the structural example 1 of the glass substrate with IRCF which concerns on this embodiment. FIG.3 (b) shows sectional drawing in the IIIB-IIIB line | wire of Fig.3 (a).

  As shown in FIG. 3A, in the glass substrate with IRCF of Structural Example 1, a region where the IRCF 30 does not exist on the first surface of the glass substrate 20 (hereinafter referred to as the first region) and a region where the IRCF 30 exists. (Hereinafter referred to as the second region). The first region is formed in a cross shape on the glass substrate 20 and is provided on the dicing line. The second region is partitioned on the glass substrate 20 by the first region.

As shown in FIG. 3B, in the cross section of the glass substrate with IRCF of Structural Example 1, the glass substrate 20 is exposed because the IRCF 30 does not exist in the first region. In the second region, the IRCF 30 is directly formed on the glass substrate 20. Here, the IRCF 30 in the second region is configured by alternately laminating, for example, 40 layers of high refractive index layers (for example, Ta ₂ O ₅ ) and low refractive index layers (for example, SiO ₂ ).

  Fig.4 (a) shows the top view of the structural example 2 of the glass substrate with IRCF which concerns on this embodiment. FIG. 4B is a sectional view taken along line IVB-IVB in FIG.

  As shown in FIG. 4A, in the glass substrate with IRCF of Structural Example 2, a plurality of first regions are formed vertically and horizontally on the glass substrate 20 and provided on the dicing line. The second region is partitioned by a plurality of first regions on the glass substrate 20. Accordingly, the second region in the structural example 2 is partitioned smaller than the structural example 1 described above.

  As shown in FIG. 4B, in the cross section of the glass substrate with IRCF of Structural Example 2, the IRCF 30 does not exist in each first region, and thus the glass substrate 20 is exposed. Further, the IRCF 30 is directly formed on the glass substrate 20 in each partitioned second region.

  Fig.5 (a) shows the top view of the structural example 3 of the glass substrate with IRCF which concerns on this embodiment. FIG.5 (b) shows sectional drawing in the VB-VB line | wire of Fig.5 (a).

  As shown in FIG. 5A, in the glass substrate with IRCF of Structural Example 3, the first region is provided on all dicing lines on the glass substrate 20. The second region is partitioned on the glass substrate 20 by a plurality of first regions. That is, the second region is partitioned by all dicing lines. Thereby, the second region in the structural example 3 is partitioned at the chip level.

  As shown in FIG. 5B, in the cross section of the glass substrate with IRCF of Structural Example 3, the IRCF 30 does not exist in each first region, and thus the glass substrate 20 is exposed. That is, the glass substrate 20 on all the dicing lines is exposed. In each divided second region, the IRCF 30 is directly formed on the first surface of the glass substrate 20.

  In the first to third structural examples, since the first region where the IRCF 30 does not exist is formed on the glass substrate with IRCF, the glass substrate 20 is more than the case where the IRCF is formed on the entire surface of the glass substrate. The amount of warpage can be reduced. Moreover, the amount of curvature of the glass substrate 20 can be further reduced by increasing the first region where the IRCF 30 does not exist as in the structural example 2. Further, as in the structure example 3, the first region where the IRCF 30 does not exist is formed on all the dicing lines, so that the warpage amount of the glass substrate 20 is equivalent to the case where the glass substrate with IRCF is formed at the chip level. Can be reduced.

  In Structural Examples 1 to 3, the first surface of the glass substrate 20 in the first region where the IRCF 30 is not present and the first surface of the glass substrate 20 in the second region where the IRCF 30 are present have the same height. is there. That is, both are flat surfaces.

(4) Manufacturing method of glass substrate with IRCF The manufacturing process of the glass substrate with IRCF according to the present embodiment (steps S4 and S5 in FIG. 2) will be described in detail below. 6A to 6D are cross-sectional views showing a manufacturing process of the glass substrate with IRCF according to the present embodiment.

  First, as shown in FIG. 6A, a transparent substrate, for example, a glass substrate (glass wafer) 20 is prepared. For example, the glass substrate 20 has a thickness of 500 μm and a diameter of 300 mm.

  Next, as shown in FIG. 6B, a mask 21 is formed on the dicing line on the first surface of the glass substrate 20. The mask 21 is preferably a metal mask having a thickness of 100 μm, for example, but is not limited thereto, and for example, a drafting tape may be attached.

Next, as shown in FIG. 6C, IRCFs 30 and 30 ′ are formed on the first surface of the glass substrate 20 exposed from the mask 21 and on the mask 21. The IRCFs 30 and 30 ′ are formed with a thickness of 1 μm, for example, by vapor deposition. Further, for example, 40 layers of the IRCFs 30 and 30 ′ are alternately laminated with a high refractive index layer (for example, Ta ₂ O ₅ ) and a low refractive index layer (for example, SiO ₂ ). In addition, the formation method of IRCF30 and 30 'is not restricted to vapor deposition, A sputtering method may be used.

  Next, as shown in FIG. 6D, the mask 21 is removed, and at the same time, the IRCF 30 ′ formed on the mask 21 is removed. Therefore, a region where no IRCF exists is formed on the glass substrate 20, and the glass substrate 20 in this region is exposed. That is, a groove is formed in the IRCF. Thus, the glass substrate with IRCF according to the present embodiment is formed.

  In the step of forming the mask 21 on the dicing line on the first surface of the glass substrate 20 (FIG. 6B), in the structure example 1, the mask 21 is formed in a cross shape on the dicing line. In Structural Example 2, the mask 21 is formed in a grid pattern on a plurality of dicing lines. In Structural Example 3, the mask 21 is formed on all the dicing lines.

  In addition to the manufacturing method shown in FIGS. 6A to 6D, a glass substrate with IRCF may be formed as follows. First, an IRCF is formed on a silicon substrate, and a resist is applied on the IRCF. Next, the resist is patterned, and the resist on the dicing line is removed. Thereafter, the IRCF is etched using the patterned resist as a mask. Thereby, a groove is formed in the IRCF.

(5) Effect According to the embodiment of the present invention, the mask 21 is formed on the dicing line on the first surface of the glass substrate 20 in the step of forming the glass substrate with IRCF. Thereafter, IRCFs 30 and 30 ′ are formed on the first surface of the glass substrate 20 exposed from the mask 21 and on the mask 21, and then the mask 21 and IRCF 30 ′ are removed. In this way, a glass substrate with IRCF in which a region where the IRCF 30 does not exist is provided on the first surface of the glass substrate 20 is formed.

  As described above, when the IRCF is directly formed on the glass substrate at the wafer level, the mask 21 is formed, the IRCFs 30 and 30 'are formed, and the mask 21 and the IRCF 30' are removed. Therefore, a glass substrate with IRCF can be easily formed, and an increase in manufacturing cost can be suppressed.

  Moreover, in this embodiment, the area | region where IRCF30 does not exist is provided in the glass substrate with IRCF. For this reason, even when a glass substrate with IRCF is formed at the wafer level, a warp of the glass substrate unit with IRCF formed by cutting the amount of warpage of the glass substrate 20 at the position of the region where the IRCF 30 does not exist by inserting a groove in the IRCF 30. It can be suppressed to the same extent as the amount. For example, when the IRCF 30 is directly formed on the glass substrate 20 having a thickness of 500 μm, the warp of the glass substrate 20 can be reduced to 100 μm or less. Accordingly, even when the camera module is formed at the wafer level, the silicon substrate 10 having a diameter of 300 mm and the glass substrate with IRCF can be favorably bonded.

  Thus, in this embodiment, it is possible to easily manufacture a glass substrate with IRCF while reducing the amount of warpage of the glass substrate with IRCF.

  Further, in the camera module according to the present embodiment, as described above, the IRCF 30 can be directly formed on the glass substrate 20 by reducing the amount of warpage of the glass substrate with IRCF. It becomes possible to remove the cut glass. Thereby, the number of parts of a camera module can be reduced and the manufacturing cost of a camera module can be reduced. Further, by removing the IR cut glass provided between the imaging lens 40 and the glass substrate, the distance between the imaging lens 40 and the glass substrate with IRCF can be shortened, so that the camera module can be reduced in size. be able to.

  In addition, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention in the implementation stage. Furthermore, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and the effect described in the column of the effect of the invention Can be obtained as an invention.

  DESCRIPTION OF SYMBOLS 10 ... Silicon substrate, 20 ... Glass substrate, 21 ... Mask, 11 ... Solder ball, 30, 30 '... Infrared cut film (IRCF), 40 ... Imaging lens, 50 ... Lens holder, 60 ... Light shielding and electromagnetic shield, 71, 72, 73: Adhesive.

Claims (4)

Forming a mask on a portion of the first surface of the glass wafer;
Forming a thin film on the first surface of the glass wafer;
Removing the mask and forming a groove in the thin film in the portion on the first surface of the glass wafer;
Adhering a semiconductor wafer to a second surface opposite the first surface of the glass wafer;
An imaging device manufacturing method comprising:   The method for manufacturing an imaging device according to claim 1, wherein the part on the first surface of the glass wafer is on a dicing line.   The imaging device manufacturing method according to claim 1, wherein the mask is a metal mask.   The method of manufacturing an imaging device according to claim 1, wherein the thin film is an infrared cut film.

Images