JP2010181835A - Display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve microfabrication of wiring lines on a display panel and reduction in the resistance of the wiring lines. <P>SOLUTION: The display panel includes a plurality of integrated circuits 221, 222 laid in a circumference of a pixel region, and a plurality of wiring lines 241 to 243 formed along the circumference of the pixel region. The wiring lines 241 to 243 connect integrated circuits 221, 222. The plurality of wiring lines 241 to 243 are covered with an insulating layer 280. The wiring lines 241 to 243 in a length direction partially have cross-section-enlarged portions 261 to 266 where the cross sections of the lines 241 to 243 are enlarged in the width direction. The cross-section enlarged portions 261 to 266 each includes: a columnar portion 261a to 266a extended from the line 241 to 243 in the thickness direction of a glass substrate 121; and an enlarged portion 261b to 266b spreading from the columnar portion 261a to 266a in the width direction of the wiring line 241 to 243, while the insulating layer 280 is interposed between the enlarged portion and other wiring lines. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a display panel, for example, a display panel provided with a plurality of wirings in a peripheral portion of a pixel region.

  As the display panel, for example, an active matrix liquid crystal display device is known. The active matrix liquid crystal display device includes a TFT (Thin Film Transistor) as a switching element. The liquid crystal display device also includes a liquid crystal panel including two substrates facing each other.

  On one substrate (array substrate) of the liquid crystal panel, gate bus lines (scanning signal lines) and source bus lines (video signal lines) are provided in a lattice pattern on a transparent substrate (for example, a glass substrate). A TFT is provided in the vicinity of the intersection between the gate bus line and the source bus line. The TFT includes a gate electrode connected to the gate bus line, a source electrode connected to the source bus line, and a drain electrode. The drain electrode is connected to pixel electrodes arranged in a matrix on the substrate in order to form an image. Further, on the other substrate (color filter substrate) of the liquid crystal panel, a common electrode for applying a voltage to the pixel electrode through the liquid crystal layer is provided on the transparent substrate. When the gate electrode of each TFT receives an active gate signal (scan signal) from the gate bus line, the source signal (video signal) received by the source electrode of the TFT from the source bus line is supplied to the common electrode. A voltage is applied to the liquid crystal layer based on the common electrode signal. As a result, the liquid crystal is driven and a desired image is displayed on the screen.

  In such a liquid crystal display device, for example, a gate driver for sending a scanning signal to a gate bus line, a source driver for sending a signal to a source bus line, a control circuit for controlling these, etc. are provided on a substrate (array substrate) of the liquid crystal panel. (For example, JP-A-2008-89619 (Patent Document 1) is known.

JP2008-89619

  When an integrated circuit such as a gate driver, a source driver, or a control circuit is formed on a substrate (array substrate) of a liquid crystal panel, wiring for connecting these circuits is formed on the substrate. In such a case, if each wiring can be made fine (narrow pitch), it contributes to miniaturization of the liquid crystal panel. Moreover, if the resistance value of each wiring can be lowered, it contributes to the reduction in power consumption (labor saving) of the liquid crystal display device. The present invention relates to a display panel in which wiring for connecting integrated circuits such as a gate driver, a source driver, and a control circuit is formed on a substrate, and the wiring formed on the substrate is miniaturized and the resistance is reduced. We propose a possible structure.

  The display panel according to the present invention includes a transparent substrate having a pixel region formed in the center. On the transparent substrate, a plurality of integrated circuits are arranged at the periphery of the pixel region. A plurality of wirings are formed along the peripheral edge of the pixel region on the transparent substrate. The plurality of wirings connect the integrated circuits. The plurality of wirings are covered with an insulating layer. In addition, in the length direction of the wiring, a cross-sectional enlarged portion in which a cross section in the width direction of the wiring is partially enlarged is provided. The cross-sectional enlarged portion includes a pillar portion extending in the thickness direction of the transparent substrate from the wiring, and an enlarged portion extending in the width direction of the wiring from the pillar portion with an insulating layer interposed between the other wirings. I have. According to such a display panel, it is possible to achieve finer wiring and lower resistance. Furthermore, it is possible to save space and labor of a display device using such a display panel.

  In this case, a plurality of cross-sectional enlarged portions are provided in the plurality of wirings, and each cross-sectional enlarged portion is preferably arranged so as to be shifted in the length direction of the wiring.

The disassembled perspective view which shows the structure of the liquid crystal panel which concerns on one Embodiment of this invention. 1 is a cross-sectional view illustrating a structure of a liquid crystal panel according to an embodiment of the present invention. 1 is a cross-sectional view showing a wiring structure of a liquid crystal panel according to an embodiment of the present invention. Sectional drawing which shows the structure of the cross-sectional expansion part provided in the wiring of the liquid crystal panel which concerns on one Embodiment of this invention. Sectional drawing which shows the manufacturing process of a cross-section expansion part. Sectional drawing which shows the manufacturing process of a cross-section expansion part. Sectional drawing which shows the manufacturing process of a cross-section expansion part. Sectional drawing which shows the manufacturing process of a cross-section expansion part. Sectional drawing which shows the manufacturing process of a cross-section expansion part. Sectional drawing which shows the other form of a cross-section enlarged part. Sectional drawing which shows the other form of a cross-section enlarged part.

  Hereinafter, a display panel according to an embodiment of the present invention will be described with reference to the drawings. In addition, the same code | symbol is attached | subjected suitably to the member or site | part which has the same effect | action. Here, a mode of a display panel according to the present invention will be described by taking a liquid crystal display panel as an example.

FIG. 1 is an exploded perspective view showing the structure of the liquid crystal panel 100. FIG. 2 shows a cross-sectional structure of the liquid crystal panel 100.
As shown in FIG. 1, this liquid crystal display device has a structure in which an array substrate 120 and a color filter substrate 140 are bonded together with a frame-shaped sealing material 160 interposed therebetween. Liquid crystal 180 is sealed inside the frame-shaped sealing material 160 in the gap between the array substrate 120 and the color filter substrate 140.

  In this embodiment, the array substrate 120 includes a glass substrate 121 as a transparent substrate, and gate bus lines 211 (scanning signal lines) and source bus lines 212 (video signal lines) are provided in a grid pattern. A pixel region 210 is formed at the center of the glass substrate 121. In addition, integrated circuits such as a gate driver 221 and a source driver 222 are provided in the peripheral portion 120 a of the pixel region 210. In addition, a plurality of (three in the illustrated example) wirings 241 to 243 for connecting the integrated circuits 221 and 222 are further provided on the peripheral portion 120a of the pixel region 210. FIG. 3 shows a portion where such wirings 241 to 243 are formed. Note that FIG. 3 omits the insulating layer 280 formed on the wirings 241 to 243 for convenience of illustration. In this embodiment, as shown in FIG. 3, cross-sectional enlarged portions 261 to 266 are provided in the wirings 241 to 243. By the cross-sectional enlarged portions 261 to 266, the wirings 241 to 243 are miniaturized and the resistance is reduced. Details will be described below.

  In this embodiment, as shown in FIG. 2, the array substrate 120 is a substrate larger than the color filter substrate 140. When the array substrate 120 and the color filter substrate 140 are bonded together, the peripheral edge 120 a of the array substrate 120 (the peripheral edge 120 a of the pixel region 210) protrudes from the color filter substrate 140. As shown in FIG. 1, a gate driver 221 as an integrated circuit, a source driver 222, and a control circuit 223 are arranged on the peripheral edge 120 a of the array substrate 120.

  The gate driver 221 is a drive circuit that sends a scanning signal to the gate bus line 211. The source driver 222 is a drive circuit that sends a signal to the source bus line 212. The control circuit 223 performs various controls of the liquid crystal display device. For example, the control circuit 223 generates a signal to be sent to the gate bus line 211 and a signal to be sent to the source bus line 212 based on a video signal input from the outside. Then, the generated signals are sent to the gate bus line 211 and the source bus line 212 in synchronization.

  In this embodiment, the gate driver 221 and the source driver 222 are connected by a plurality of wirings 241 to 243 as shown in FIGS. FIG. 4 shows a cross-sectional structure of the wirings 241 to 243 at the site where the cross-sectional enlarged portion 265 is formed. In this embodiment, the wirings 241 to 243 are provided between the source driver 222 and the gate driver 221. The wirings 241 to 243 are arranged in order from the outside of the array substrate 120 and extend along the peripheral edge 120a of the array substrate 120, respectively.

  In this embodiment, connection terminals 241a to 243a of the wirings 241 to 243 are provided at positions where the gate driver 221 is disposed. The gate driver 221 is connected to the connection terminals 241a to 243a. In addition, connection terminals 241b to 243b of wirings 241 to 243 are provided at positions where the source driver 222 is disposed. The source driver 222 is connected to the connection terminals 241b to 243b. In this embodiment, as shown in FIG. 3, the wirings 241 and 242 include cross-sectional enlarged portions 261 to 266 that partially enlarge the wiring cross section in the length direction.

  Hereinafter, the cross-sectional enlarged portion 265 will be described as an example of the cross-sectional enlarged portions 261 to 266. As shown in FIG. 4, the cross-sectional enlarged portion 265 includes a column portion 265 a and an enlarged portion 265 b. The column part 265 a is a part extending from the wiring 242 in the thickness direction of the glass substrate 121. The enlarged portion 265b extends from the column portion 265a in the width direction of the wiring 242 with the insulating layer 280 interposed between the other wirings 241 and 243. The enlarged portion 265b of the cross-sectional enlarged portion 265 is provided at a position higher than the wirings 241 to 243 by the column portion 265a. An insulating layer 280 is interposed between the enlarged portion 265b and the other wirings 241 and 243. Accordingly, the enlarged portion 265b is not electrically connected to the other wirings 241 and 243.

  The cross-sectional enlarged portion 265 has been described based on FIG. Although illustration is omitted, the other cross-sectional enlarged portions 261 to 264 and 266 have the same structure. That is, the other cross-sectional enlarged portions 261 to 264 and 266 include column portions 261 a to 264 a and 266 a extending from the wirings 241 and 242 in the thickness direction of the glass substrate 121, respectively. Further, the other cross-sectional enlarged portions 261 to 264 and 266 include enlarged portions 261 b to 264 b and 266 b extending from the pillar portions 261 a to 264 a and 266 a in the width direction of the wirings 241 to 243.

  The cross-sectional enlarged portions 261 to 266 are provided so as to be shifted in the length direction of the wirings 241 and 242. That is, in this embodiment, the cross-sectional enlarged portions 261 to 266 extend in the width direction of the wirings 241 to 243. For this reason, a plurality of cross-sectional enlarged portions 261 to 266 are provided in the length direction of the wirings 241 and 242 without being interfered with each other by providing a position shifted in the length direction of the wirings 241 and 242. Can be provided. In addition, an insulating layer 280 is interposed between each cross-sectional enlarged portion 261 to 266 and another wiring (a wiring different from the wiring provided with the cross-sectional enlarged portion 261 to 266). For this reason, the wiring provided with the cross-sectional enlarged portions 261 to 266 is not electrically connected to the other wiring.

  For example, as shown in FIG. 4, the portion where the cross-sectional enlarged portions 261 to 266 are provided enlarges the cross section of the wirings 241 and 242 in the cross section in the width direction of the wirings 241 and 242. For this reason, the electrical resistances of the wirings 241 and 242 are reduced at the portions where the cross-sectional enlarged portions 261 to 266 are provided.

  In this embodiment, as shown in FIG. 3, the enlarged cross-sectional portions 261, 263, 264, and 266 are provided in the wiring 241. Further, the cross-sectional enlarged portions 262 and 265 are respectively provided in the wiring 242. That is, in this embodiment, among the three wirings 241 to 243, the wiring 241 provided on the outermost side of the peripheral edge portion 120a of the array substrate 120 is provided with four cross-sectional enlarged portions 261, 263, 264, and 266. It has been. In addition, two cross-sectional enlarged portions 262 and 265 are provided in the wire 242 provided in the middle of the peripheral edge portion 120a among the three wires 241 to 243. Of the three wires 241 to 243, the wire 243 provided on the innermost side of the peripheral portion 120a is not provided with an enlarged section.

  Among the three wires 241 to 243, the wire 241 provided on the outermost side of the peripheral edge 120a of the array substrate 120 is the longest. Next, the wiring 242 provided in the middle of the peripheral edge 120a is long. The wiring 243 provided on the innermost side of the peripheral portion 120a is the shortest of the three wirings 241 to 243. In this embodiment, the basic cross section of each wiring 241 to 243 is the same, and each wiring 241 to 243 is formed of the same material. For this reason, when the cross-sectional enlarged portions 261 to 266 described above are not provided, the resistance of each of the wirings 241 to 243 is considered to increase as the wirings 241 to 243 become longer. For this reason, when the cross-sectional enlarged portions 261 to 266 described above are not provided, the wiring 241 provided on the outermost side of the peripheral edge portion 120a of the array substrate 120 is considered to have the highest resistance value. Next, the resistance value of the wiring 242 provided in the middle of the peripheral edge portion 120a is high, and the resistance value of the wiring 243 provided on the innermost side of the peripheral edge portion 120a is considered to be the lowest.

  In this embodiment, four cross-sectional enlarged portions 261, 263, 264, and 266 are provided on the longest wiring 241. The next long wiring 242 is provided with two cross-sectional enlarged portions 262 and 265. Further, the shortest wiring 243 is not provided with an enlarged section. Each of the enlarged cross-sectional portions 261 to 266 partially reduces the electrical resistance of the wiring. In addition, as a whole wiring, it is considered that the electrical resistance of the whole wiring decreases according to the number of cross-sectional enlarged portions. In the state where the cross-sectional enlarged portions 261 to 266 are not provided, the overall resistance value of the wiring is higher as the wiring is longer. In this embodiment, the longer the wiring is, the more cross-sectional enlarged portions are provided. In other words, a large number of cross-sectional enlarged portions 261 to 266 are provided in the wiring having a high overall resistance value in a state where the cross-sectional enlarged portions 261 to 266 are not provided. Thereby, the dispersion | variation in the resistance value of each wiring 241-243 is improved.

  In this embodiment, variation in resistance values of the wirings 241 to 243 is improved, so that signals can be transmitted more stably through the wirings 241 to 243. In this embodiment, since the cross-sectional enlarged portions 261 to 266 are provided in the wirings 241 and 242, the resistance values of the wirings 241 and 242 are decreased.

  In this embodiment, as shown in FIG. 4, the cross-sectional enlarged portions 261 to 266 include column portions 261 a to 266 a extending from the wirings 241 to 243 in the thickness direction of the glass substrate 121. The cross-sectional enlarged portions 261 to 266 include enlarged portions 261b to 266b extending from the column portions 261a to 266a in the width direction of the wires 241 to 243 with the insulating layer 280 interposed between the cross-sectional enlarged portions 261 to 266. ing. For this reason, even if the space | interval of each wiring 241-243 is narrowed, it can prevent that the cross-sectional enlarged parts 261-266 electrically contact another wiring. For this reason, the space | interval of each wiring 241-243 can be narrowed. In this manner, the wirings 241 to 243 formed on the array substrate 120 can be miniaturized and the resistance can be reduced.

  Further, in this embodiment, the wirings 241 to 243 connecting the gate driver 221 and the source driver 222 are illustrated, but the structure of the cross-sectional enlarged portions 261 to 266 described above can be applied to other wirings. For example, when an integrated circuit (for example, a control circuit, a signal generation circuit, etc.) is similarly provided on the peripheral portion of the substrate of the liquid crystal panel, and wiring for connecting these integrated circuits is provided, the low resistance of the wiring For the sake of simplicity, it is preferable to provide the above-mentioned enlarged section. As described above, the enlarged cross-section portion contributes to a reduction in the resistance of the wiring. In addition, when a plurality of wirings are provided side by side on the substrate of the liquid crystal panel, it is possible to realize a reduction in resistance and miniaturization of these wirings as a whole.

  In this embodiment, as shown in FIG. 1, the wirings 241 to 243 formed on the array substrate 120 of the liquid crystal panel 100 are exemplified. As another form, for example, if the same wiring may be formed on the color filter substrate, the cross-sectional enlarged portion can be provided in the wiring. That is, by providing the cross-sectional enlarged portion in the wiring formed on the substrate of the liquid crystal panel 100, the resistance value of the wiring as the entire liquid crystal panel 100 is lowered. Thereby, the electric power required for driving the liquid crystal panel 100 can be reduced. In the case where a plurality of wirings are provided side by side on the substrate of the liquid crystal panel 100, the resistance value of each wiring can be adjusted by providing the above-described cross-sectional enlarged portion, and the wiring contributes to miniaturization and space saving. . As described above, in the display panel, a plurality of wirings formed along the peripheral edge of the transparent substrate can be miniaturized. The peripheral part of the display panel is fitted to a frame-like frame, for example. In this embodiment, since the plurality of wirings formed along the peripheral edge of the transparent substrate can be miniaturized, the frame of the frame that supports the display panel can be thinned. That is, a thinner frame can be employed for the display device.

  Next, an example of the formation process of the cross-sectional enlarged portions 261 to 266 will be described. The wirings 241 to 243 and the cross-sectional enlarged portions 261 to 266 are preferably formed in accordance with a series of steps for forming the gate bus lines 211, the source bus lines 212, TFTs (not shown), and the like on the array substrate 120. 5 to 7 show a process of forming the cross-sectional enlarged portion 265. Other cross-sectional enlarged portions 261 to 264 and 266 can be formed by the same method.

  For example, when forming the gate bus line 211, the source bus line 212, TFT (not shown), etc., a fine film made of a metal thin film on a glass substrate by a technique such as etching or photolithography. A simple wiring. The wirings 241 to 243 are preferably formed in accordance with a process of forming the gate bus line 211, the source bus line 212, the TFT (not shown), and the like. For example, the wirings 241 to 243 are preferably formed in a predetermined pattern on the glass substrate 121 in accordance with the process of forming the gate bus line 211 and the source bus line 212.

  Moreover, the cross-sectional enlarged portion 265 may be formed by, for example, a so-called lift-off process, as shown in FIGS. For example, as shown in FIG. 5, wirings 241 to 243 are formed in a predetermined pattern on the glass substrate 121. Next, as shown in FIG. 8, a photoresist 291 having a reverse pattern of the cross-sectional enlarged portions 261 to 266 is formed on the glass substrate 121 on which the wirings 241 to 243 are formed. The photoresist 291 having the reverse pattern can be formed by combining, for example, a negative photoresist 291a and a positive photoresist 291b. In this embodiment, as shown in FIG. 6, a negative photoresist layer 291a is formed on the wirings 241 to 243 except for the portion 292 where the cross-sectional enlarged portion 265 is formed. Next, as shown in FIG. 7, a layer of positive photoresist 292b is formed on the layer of negative photoresist 291a. Next, as shown in FIG. 8, the positive photoresist 292 b is removed from the portion where the cross-sectional enlarged portions 261 to 266 are formed, and a photoresist 291 having a reverse pattern is formed.

  Next, as shown in FIG. 9, a metal thin film is formed on the photoresist 291 having the reverse pattern, and a cross-sectional enlarged portion 265 is formed. Thereafter, as shown in FIG. 4, unnecessary metal and photoresist are removed. Thus, the cross-sectional enlarged portion 265 having a predetermined shape can be formed by combining lift-off and mask alignment. The wirings 241 to 243 and the cross-sectional enlarged portion 265 are preferably covered with an insulating layer 280 as shown in FIG. Other cross-sectional enlarged portions 261 to 264 and 266 can be formed in the same manner. As mentioned above, although an example was shown about the formation method of cross-section enlarged portions 261-266, the formation method of cross-section enlarged portions 261-266 is not limited above.

  10 and 11 show the structures of the cross-sectional enlarged portions 271 and 272 according to other embodiments. For example, as shown in FIG. 10, the cross-sectional enlarged portion 271 may increase the width of the enlarged portion 271b. In FIG. 10, reference numeral 271 a indicates a pillar portion of the cross-sectional enlarged portion 271. Further, as shown in FIG. 11, the enlarged portion 272b of the cross-sectional enlarged portion 272 may be formed to extend from the column portion 272a only to one side in the width direction of the wirings 241 to 243.

  The display panel according to the present invention has been described above by taking the liquid crystal panel according to one embodiment of the present invention as an example, but the display panel according to the present invention is not limited to the above-described liquid crystal panel.

  For example, the specific configuration of the liquid crystal panel, the arrangement of integrated circuits such as gate drivers and source drivers, the wiring pattern, the arrangement of the cross-sectional enlarged portion, the shape, and the like may be changed as appropriate. Moreover, although the liquid crystal panel was mentioned as an example in embodiment mentioned above, the display panel which concerns on this invention is not limited to a liquid crystal panel. The structure of the display panel according to the present invention can be applied to a so-called flat panel display such as an organic EL or a plasma display. In this case, as described above, the present invention contributes to miniaturization of a plurality of wirings formed along the peripheral edge of the transparent substrate in the display panel. For this reason, the frame of these flat panel displays can be made thin.

100 Liquid crystal panel 120 Array substrate 120a Peripheral part (peripheral part of pixel region)
121 Glass substrate (transparent substrate, substrate)
140 Color filter substrate 160 Seal material 180 Liquid crystal 210 Pixel region 211 Gate bus line 212 Source bus line 221 Gate driver (integrated circuit)
222 Source Driver (Integrated Circuit)
223 Control circuits 241 to 243 Wiring 241a to 243a Connection terminals 241b to 243b Connection terminals 261 to 266, 271, 272 Cross section enlarged portions 260a to 266a, 271a, 272a Column portions 260b to 266b, 271b, 272b Enlarged portion 280 Insulating layer 291 Reverse Pattern photoresist 291a Negative photoresist 291b Positive photoresist

Claims (3)

A display panel having a plurality of wirings at the periphery of the pixel region,
A transparent substrate with a pixel region formed in the center;
A plurality of integrated circuits disposed on the periphery of the pixel region on the transparent substrate;
A plurality of wirings formed on the transparent substrate along the peripheral edge of the pixel region and connecting the integrated circuits;
An insulating layer covering the plurality of wirings;
A cross-sectional enlarged portion in which the cross-section in the width direction of the wiring is partially enlarged in the length direction of the wiring;
With
The cross-sectional enlarged portion extends from the pillar in the width direction of the wiring in a state where the insulating layer is interposed between the pillar extending from the wiring in the thickness direction of the transparent substrate and another wiring. A display panel with a widened area.   The display panel according to claim 1, wherein the plurality of cross-sectional enlarged portions are provided in the plurality of wirings, and each cross-sectional enlarged portion is arranged to be shifted in a length direction of the wiring.   A display device comprising the display panel according to claim 1.

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