JP2010060686A - Electrooptical apparatus and method of manufacturing the same, and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To stabilize the operation of an electrooptical apparatus such as a liquid crystal panel while efficiently suppressing the occurrence of a light leakage current in a TFT. <P>SOLUTION: On the substrate (10), the electrooptical apparatus has: a semiconductor layer (30a) having a channel region, a source drain region, and an LDD region; a gate electrode (30b) opposing the channel region; an upper light shielding film (1) laminated on an upper layer side than the semiconductor layer and formed at least larger than the channel region and the LDD region; a lower light shielding film (11) laminated on a lower layer side than the semiconductor layer and formed at least larger than the channel region and the LDD region; and a lower interlayer dielectric (12) laminated between the semiconductor layer and the lower light shielding film and so formed that the thickness of the film is smaller at least in the region overlapping the source drain region than in the region overlapping the LDD region. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a technical field of an electro-optical device such as a liquid crystal device, and an electronic apparatus such as a liquid crystal projector including the electro-optical device.

  A liquid crystal device which is an example of this type of electro-optical device is frequently used not only as a direct-view display but also as a light modulation means (light valve) of, for example, a projection display device. In particular, in the case of a projection display device, strong light from a light source is incident on a liquid crystal light valve, and this light causes a thin film transistor (that is, TFT: Thin Film Transistor, hereinafter simply referred to as “TFT”) in the liquid crystal light valve. Light leakage current may occur, which may cause image quality degradation or malfunction. Therefore, the liquid crystal light valve has a built-in light shielding means for blocking incident light.

  For example, Patent Documents 1 and 2 disclose a technique for effectively shielding light entering a semiconductor layer by forming a light shielding film wider than the semiconductor layer of the TFT. Further, in Patent Documents 3 and 4, not only the light incident perpendicularly to the substrate is formed by efficiently forming a light shielding film by forming a capacitor electrode, a scanning line, etc. using a light shielding conductive material. A technique for improving the light shielding property of light entering from the side is disclosed.

Japanese Patent No. 3731447 JP 2004-4722 A JP-A-2005-45017 Japanese Patent No. 3307144

  However, according to the above background art, since the gate electrode is used as a light shielding film, the channel region of the semiconductor layer is relatively shielded from light, but the region other than the channel region, particularly an LDD (Lightly Doped Drain). No light shielding means is provided in the area. For this reason, there still remains a problem that image quality deteriorates and malfunctions due to generation of light leakage current. In addition, if the distance between the light shielding film and the semiconductor layer is reduced in order to improve the light shielding property, for example, when the scanning line is used as the light shielding film, the LDD layer is activated by the potential of the scanning signal supplied to the scanning line. There is also a problem that it causes a malfunction.

  The present invention has been made in view of the above-described problems, for example, and provides an electro-optical device capable of stable operation while efficiently suppressing generation of light leakage current in a TFT, a manufacturing method thereof, and an electronic apparatus. This is the issue.

  In order to solve the above problems, a first electro-optical device of the present invention has a channel region, a source / drain region, and a semiconductor layer having an LDD region formed between the channel region and the source / drain region on a substrate; A gate electrode disposed so as to face the channel region via a gate insulating film, and laminated on the upper layer side of the semiconductor layer, and at least from the channel region and the LDD region when viewed in plan on the substrate A broadly formed upper light-shielding film, a lower-layer light-shielding film that is laminated on a lower layer side than the semiconductor layer, and is formed wider than at least the channel region and the LDD region when viewed in plan on the substrate, and the semiconductor Layered between the layer and the lower light-shielding film, and when viewed in plan on the substrate, at least the film thickness in the region overlapping the LDD region And a lower level interlayer insulating film towards the film thickness in the region overlapping the drain region is formed to be smaller.

  According to the electro-optical device of the invention, the substrate includes a semiconductor layer including a channel region, a source / drain region, and an LDD region, and a gate electrode disposed so as to face the channel region with a gate insulating film interposed therebetween. TFT is formed. Here, the TFT in the present invention may be a top gate type TFT in which the gate electrode is disposed on the upper side of the semiconductor layer, or a bottom gate type TFT in which the gate electrode is disposed on the lower side of the semiconductor layer, Alternatively, a double gate TFT may be constructed. The LDD region is formed in a region between the channel region and the source / drain region.

  An upper light shielding film and a lower light shielding film are laminated on the upper and lower layers of the semiconductor layer, respectively, and are formed so as to have at least a larger area than the channel region and the LDD region when viewed in plan on the substrate. ing. By forming the light shielding films above and below the semiconductor layer in this manner, light can be prevented from entering the semiconductor layer including the LDD region and the channel region, and generation of light leakage current in the LDD region and the channel region can be suppressed. can do. Here, in order to more efficiently shield light between the upper and lower light shielding films, the lower light shielding film and the upper light shielding film are formed wider than at least the channel region and the LDD region. In other words, not only the light incident from the direction perpendicular to the substrate but also the light blocking ability is enhanced not only for light incident from an oblique or lateral side of the substrate.

  The lower interlayer insulating film is laminated between the semiconductor layer and the lower light-shielding film, and when viewed in plan on the substrate, the film thickness in the region overlapping the source / drain region is more than the film thickness in the region overlapping at least the LDD region. It is formed to be smaller. That is, in the present invention, in the region overlapping the LDD region of the semiconductor layer, the lower insulating film is formed to be thicker than other regions (for example, end portions of the source / drain regions). . Since the lower interlayer insulating film is formed in this manner, the distance between the upper light shielding film and the lower light shielding film is locally reduced in the region overlapping the source / drain region. That is, only a small gap or gap is left between the light shielding films through which light entering the LDD region or the channel region from obliquely or laterally can enter. Therefore, such light can be effectively shielded.

  Further, since the lower interlayer insulating film is formed so that the film thickness is increased in the region overlapping the LDD region, even if a predetermined potential is applied to the lower light shielding film, the LDD region is affected by the potential. Can be activated and the risk of malfunction can be reduced or eliminated. Here, as a typical technique for improving the light shielding property of the semiconductor layer by the lower light shielding film, it is considered to reduce the thickness of the lower interlayer insulating film formed between the semiconductor layer and the lower light shielding film. It is done. However, according to this method, the film thickness of the lower interlayer insulating film becomes thin even in the region overlapping the LDD region. Therefore, if a potential is applied to the lower light shielding film, the LDD region malfunctions. End up. In that respect, according to the present invention, in the region overlapping the LDD region, the lower interlayer insulating film is formed thick to prevent malfunction of the LDD region, while in the region overlapping the source / drain region, the lower interlayer insulating film By forming a thin film, the light shielding property of the semiconductor layer by the lower light shielding film can be improved.

  As described above, according to the electro-optical device of the present invention, generation of light leakage current in the channel region can be effectively suppressed by the two light shielding films arranged above and below the semiconductor layer. Further, since the lower insulating film is formed thick in a region overlapping with the LDD region, it is possible to prevent the LDD region from malfunctioning even when a potential is applied to the lower light shielding film. Further, since the lower interlayer insulating film is formed thin in the region overlapping with the source / drain region, the light shielding ability of the lower light shielding film to the semiconductor layer can be enhanced. In this way, an electro-optical device capable of displaying a high-quality image can be realized.

  In one aspect of the electro-optical device of the present invention, the scanning line that extends in the first direction on the substrate and supplies a scanning signal to the gate electrode intersects the first direction on the substrate. A data line extending in a second direction and supplying an image signal to the source / drain region; and a pixel electrode provided for each pixel corresponding to an intersection of the data line and the scanning line, The LDD region includes a data line side LDD region formed between a data line side source / drain region electrically connected to the data line among the channel region and the source / drain region, and the channel region and the source / drain region. A pixel electrode side LDD region formed between the pixel electrode side source / drain regions electrically connected to the pixel electrode in the region, and the lower interlayer insulating film is formed on the substrate. In the data-line-side LDD region when viewed in plane and region overlapping the one of the pixel electrode side LDD region has a step on the surface so that the film thickness increases.

  According to this aspect, for example, a scanning line that supplies a scanning signal input to the gate electrode of the switching TFT in order to drive the pixel electrode provided for each pixel on / off, and the pixel electrode provided for each pixel A data line for supplying an image signal and pixel electrodes arranged for each pixel corresponding to the intersection of the scanning line and the data line are provided. According to this configuration, each pixel electrode is turned on / off by, for example, a TFT functioning as a switching element in accordance with the scanning signal input from the scanning line, and an image signal is written to the pixel electrode via the data line. The pixel electrode is a transparent electrode made of a transparent conductive material such as ITO (Indium Tin Oxide).

  In the TFT, the LDD region is electrically connected to the data line side LDD region between the channel region and the data line and the data line side source / drain region, the channel region, and the pixel electrode. And a pixel electrode side LDD region between the pixel electrode side source / drain regions.

  The lower interlayer insulating film has a step on the surface so as to increase the film thickness in a region that overlaps either the data line side LDD region or the pixel electrode side LDD region when viewed in plan on the substrate. . Although the lower interlayer insulating film is thickly formed in the data line side LDD region and the pixel electrode side LDD region, the best mode is to prevent malfunction in the LDD region. If the lower interlayer insulating film is formed thick only in the LDD region, it is possible to alleviate the occurrence of malfunctions in the LDD region. In particular, by changing the film thickness of the lower interlayer insulating film only for the source / drain region connected to the LDD region where light leakage is relatively likely to occur or the adverse effect due to light leakage is relatively obvious, the light shielding performance To increase the efficiency.

  In the aspect including the above-described scanning line, the lower light-shielding film may be formed to have a portion that also serves as the scanning line.

  According to this aspect, the lower light-shielding film includes, for example, a scanning line that supplies a scanning signal input to the gate electrode of the switching TFT in order to drive the pixel electrode provided for each pixel on / off. Is formed. Therefore, the lower light-shielding film is a non-transparent metal having conductivity and light-shielding property, such as Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), Mo (molybdenum), Pd (palladium). And a light shielding material such as a single metal, an alloy, a metal silicide, a polysilicide, or a laminate of these, including at least one of high melting point metals such as). That is, since it is necessary to form the lower light-shielding film before completion of the TFT, it is preferable to use a metal that can withstand high-temperature processing during TFT manufacturing.

  In the electro-optical device according to this aspect, during operation, a scanning signal as a voltage signal is supplied to the lower light-shielding film including the scanning lines. If it is formed thin, the LDD region of the semiconductor layer is activated by the potential of the scanning signal applied to the lower light-shielding film, causing malfunction. For this reason, in the region overlapping the LDD region when viewed in plan on the substrate, the lower insulating film is formed thick, and this ensures a large distance between the lower light-shielding film (that is, the scanning line) and the LDD region. Such a malfunction can be prevented.

  The upper light shielding film may be formed to have a portion that also serves as the data line.

  According to this aspect, the upper light shielding film includes, for example, a data line that supplies an image signal to a pixel electrode provided for each pixel. Therefore, the data line is formed of a non-transparent metal having electrical conductivity and light shielding property, for example, a metal having a relatively low melting point such as Al (aluminum), Ag (silver), Au (gold), Cu (copper), etc. Similarly to the lower light-shielding film, it is made of a light-shielding material such as a simple metal, an alloy, a metal silicide, a polysilicide, or a laminate of these containing at least one of refractory metals such as Ti. Since the upper light-shielding film can be formed after the TFT is completed, it is not necessary to use a metal that can withstand high-temperature processing during TFT manufacturing. On the other hand, it is desirable to use Al or the like in view of conductivity, manufacturing cost, and the like.

  By using the data line for supplying the image signal as the upper light-shielding film in this way, the laminated structure on the substrate is not complicated as compared with the case of separately forming the light-shielding film in addition to the data line. An efficient laminated structure can be formed.

  In such a configuration, the upper light shielding film may further include a portion that also serves as the relay wiring that electrically connects the pixel electrode side source / drain region and the pixel electrode.

  If comprised in this way, the relay wiring which electrically relays between a pixel electrode and the pixel electrode side source / drain area | region will be formed as a part of upper side light shielding film. The relay wiring is formed, for example, through a contact hole in an interlayer insulating film provided between the semiconductor layer and the pixel electrode, and electrically connects the pixel electrode side source / drain region and the pixel electrode formed in layers separated from each other. Connected. By using the upper light shielding film so as to also serve as the relay wiring in this way, the upper light shielding film can be formed while minimizing the complexity of the laminated structure.

  In another aspect of the electro-optical device of the present invention, the electro-optical device further includes a capacitive electrode, and a dielectric film laminated between the upper light-shielding film and the capacitive electrode, and the upper light-shielding film and the capacitive electrode include the dielectric It arrange | positions so that it may oppose on both sides of a film | membrane.

  According to this aspect, for example, by providing a capacitor electrode having a predetermined potential or a fixed potential on the upper layer side of the upper light-shielding film, and forming the dielectric film between the upper light-shielding film, the storage capacitor can be easily formed on the substrate. Can be formed. That is, a stacked capacitor (that is, a capacitor or a capacitor) is constructed from the pair of upper light-shielding film and capacitor electrode, and the dielectric film sandwiched between them. The capacitor constructed in this way functions as a storage capacitor or a storage capacitor for the pixel electrode by being connected to, for example, the source / drain region connected to the pixel electrode.

  The capacitance value of the storage capacitor may be increased or decreased by appropriately adjusting the film thickness of the dielectric film and the area of the capacitor electrode facing each other. The capacitor electrode is made of a light-shielding material such as a simple metal, an alloy, a metal silicide, a polysilicide, or a laminate of these including at least one of a metal having a low melting point such as Al and a high melting point metal such as Ti. Good.

  If formed in this way, it is possible to reduce the manufacturing cost of the electro-optical device and reduce the overall size of the electro-optical device while minimizing the complexity of the laminated structure, and a high-definition electro-optical device can be obtained. Can be realized.

  In order to solve the above-described problem, the electro-optical device manufacturing method of the present invention forms a lower light-shielding film on the substrate so as to form the lower light-shielding film wider than the semiconductor layer when viewed in plan on the substrate. Forming a lower interlayer insulating film so as to locally increase the film thickness on the lower light-shielding film, and locally forming the lower interlayer insulating film. A semiconductor layer forming step of forming a semiconductor layer so that an LDD region is disposed in a region where the film is formed thick, and a gate electrode is formed so as to face the channel region of the semiconductor layer through a gate insulating film A gate electrode forming step; and an upper light shielding film forming step of forming the upper light shielding film on the semiconductor layer so as to be wider than the semiconductor layer as viewed in plan on the substrate.

  According to the manufacturing method of the present invention, first, in the lower light-shielding film forming step, the lower light-shielding film is formed so as to be wider than a semiconductor layer to be formed later on the substrate. As the lower light-shielding film is provided wider, the light-shielding ability for not only light that enters vertically from the lower side of the substrate but also light that enters from the licked side of the substrate increases, so as long as the aperture area of the pixel is not too narrow, The lower the light shielding film, the better.

  In the lower interlayer insulating film forming step, a lower interlayer insulating film is formed on the lower light shielding film. In particular, after the lower interlayer insulating film is formed so as to cover the lower light shielding film, the lower interlayer insulating film is formed so as to locally increase the film thickness. At this time, since the semiconductor layer is formed in the next semiconductor layer forming step so that the LDD region is disposed in the region having a large film thickness, it is assumed that the LDD region is formed in advance when the lower interlayer insulating film is formed. To form.

  In the semiconductor layer forming step, the semiconductor layer is formed so that the LDD region is disposed in a region where the film thickness is locally thick in the lower interlayer insulating film. By forming the semiconductor layer in this manner, a sufficient distance between the LDD region and the lower light shielding film can be secured. For this reason, even if the lower light-shielding film is kept at a constant potential, it is possible to prevent the LDD region of the semiconductor layer from being activated by the potential.

  In the gate electrode formation step, the gate electrode is formed so as to face the channel region of the semiconductor layer with a gate insulating film interposed therebetween.

  In the upper light shielding film forming step, an upper light shielding film is formed on the upper layer of the semiconductor layer. The upper light-shielding film is formed so that the semiconductor layer is included in the lower light-shielding film when viewed in plan on the substrate in order to improve the light-shielding property against light incident from above the substrate. Here, as described above, since the lower interlayer insulating film is formed thick in the region overlapping the LDD region, the distance between the upper light shielding film and the lower light shielding film is large in the region overlapping the LDD region, and the source / drain region It is formed small in the region overlapping with. As a result, the gap between the two light shielding films arranged on the upper and lower sides in the region overlapping with the source / drain region is narrowed, and it is possible to effectively shield the light that enters the semiconductor layer from the outside. As a result, it is possible to suppress the occurrence of light leakage current in the channel region.

  As described above, the above-described electro-optical device according to the present invention can be easily manufactured.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention (including various aspects thereof).

  According to the electronic apparatus of the present invention, since the electro-optical device according to the present invention described above is provided, a projection display device capable of displaying a high-quality image, a television, a mobile phone, an electronic notebook, Various electronic devices such as a word processor, a viewfinder type or a monitor direct-view type video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. Further, as the electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper can be realized.

  The operation and other advantages of the present invention will become apparent from the best mode for carrying out the invention described below.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, a TFT active matrix driving type liquid crystal device with a built-in driving circuit, which is an example of the electro-optical device of the present invention, is taken as an example.

<1. Liquid crystal device>
<First Embodiment>
First, the overall configuration of the liquid crystal device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing the overall configuration of the liquid crystal device according to this embodiment, and FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG.

  1 and 2, in the liquid crystal device according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are arranged to face each other. The TFT array substrate 10 is, for example, a transparent substrate such as a quartz substrate or a glass substrate, a silicon substrate, or the like. The counter substrate 20 is a transparent substrate such as a quartz substrate or a glass substrate. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20. The TFT array substrate 10 and the counter substrate 20 are bonded to each other by a sealing material 52 provided in a sealing region located around the image display region 10a provided with a plurality of pixel electrodes.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. In the sealing material 52, a gap material such as glass fiber or glass bead is dispersed for setting the distance between the TFT array substrate 10 and the counter substrate 20 (that is, the inter-substrate gap) to a predetermined value.

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a is provided on the counter substrate 20 side in parallel with the inside of the seal area where the sealing material 52 is disposed. However, part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side.

  A data line driving circuit 101 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing region in which the sealing material 52 is disposed in the peripheral region. The sampling circuit 7 is provided so as to be covered with the frame light shielding film 53 on the inner side of the seal region along the one side. The scanning line driving circuit 104 is provided along two sides adjacent to the one side so as to be covered with the frame light shielding film 53.

  On the TFT array substrate 10, vertical conduction terminals 106 for connecting the two substrates with the vertical conduction material 107 are arranged in regions facing the four corner portions of the counter substrate 20. Thus, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20.

  In FIG. 2, on the TFT array substrate 10, a laminated structure is formed in which wirings such as TFTs for pixel switching, scanning lines, and data lines are formed. In the image display area 10a, pixel electrodes 9 made of a transparent material such as ITO (Indium Tin Oxide) are provided in a matrix on the upper layer of pixel switching TFTs, scanning lines, data lines and the like. An alignment film (not shown in FIG. 2) is formed on the pixel electrode 9. On the other hand, a black matrix 23 is formed on the surface of the counter substrate 20 facing the TFT array substrate 10. The black matrix 23 is formed of, for example, a light-shielding metal film or the like, and is patterned in, for example, a lattice shape or a stripe shape in the image display region 10a on the counter substrate 20. On the black matrix 23, a counter electrode 21 made of a transparent material such as ITO is formed across the entire surface of the counter substrate 20 (for example, in a solid shape) so as to face the plurality of pixel electrodes 9. An alignment film (not shown in FIG. 2) is formed on the counter electrode 21.

  A liquid crystal layer 50 is formed between the TFT array substrate 10 and the counter substrate 20 that are configured as described above and are arranged so that the pixel electrode 9 and the counter electrode 21 face each other. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  1 and FIG. 2, on the TFT array substrate 10, in addition to the drive circuits such as the data line drive circuit 101 and the scanning line drive circuit 104, a plurality of data lines are precharged at a predetermined voltage level. There may be formed a precharge circuit for supplying a signal prior to an image signal, an inspection circuit for inspecting quality, defects, etc. of the electro-optical device during manufacturing or at the time of shipment, an inspection pattern, and the like.

  Next, the electrical configuration of the image display area of the liquid crystal device according to the present embodiment will be described with reference to FIG. FIG. 3 is an equivalent circuit diagram of various elements, wirings, and the like in a plurality of pixels formed in a matrix forming the image display area of the liquid crystal device according to this embodiment.

  In FIG. 3, a pixel electrode 9 and a pixel switching TFT 30 are formed in each of a plurality of pixels formed in a matrix that forms the image display region 10a. The TFT 30 is electrically connected to the pixel electrode 9, and performs switching control of the pixel electrode 9 during operation of the liquid crystal device. Image signals S1, S2,..., Sn to be written to the data lines 6 may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6. Good.

  The scanning line 11 is electrically connected to the gate of the TFT 30, and the liquid crystal device according to the present embodiment applies the scanning signals G1, G2,..., Gm to the scanning line 11 in a pulsed manner at a predetermined timing. It is configured to apply in a line sequential order. By closing the switch of the TFT 30 as a switching element for a certain period, the image signals S1, S2,..., Sn supplied from the data line 6 are written at a predetermined timing. A predetermined level of image signals S1, S2,..., Sn written to the liquid crystal via the pixel electrode 9 is constant between the counter electrode 21 (see FIG. 2) formed on the counter substrate 20 (see FIG. 2). Hold for a period.

  The liquid crystal constituting the liquid crystal layer 50 (see FIG. 2) modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The transmittance for light is increased, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device as a whole.

  In order to prevent the image signal held here from leaking, a storage capacitor 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9 and the counter electrode 21 (see FIG. 2). The storage capacitor 70 is a capacitive element that functions as a storage capacitor that temporarily holds the potential of each pixel electrode 9 in response to supply of an image signal. Although the detailed structure of the storage capacitor 70 will be described later, one electrode is connected to the TFT 30 in parallel with the pixel electrode 9, and the other electrode is connected to a fixed potential capacitor line 300 so as to have a constant potential. ing. By providing the storage capacitor 70 in this manner, the potential holding characteristic of the pixel electrode 9 is improved, and display characteristics such as improvement of contrast and reduction of flicker can be improved.

  Next, a specific configuration of the laminated structure on the TFT array 10 substrate that realizes the above-described operation will be described with reference to FIGS.

  4 is a plan view showing a configuration around the TFT 30 of the electro-optical device according to this embodiment, and FIG. 5 is a cross-sectional view taken along the line AA ′ of FIG. In FIGS. 4 and 5, the scale of each layer / member is different for each layer / member to have a size that can be recognized on the drawing. In FIG. 4, for convenience of explanation, each layer is shown transparently, and some of the members shown in FIG. 5 are omitted.

  As shown in FIG. 4, the data lines 6 and the scanning lines 11 are arranged so as to cross each other. The scanning line 11 extends along the X direction in the drawing, and the data line 6 extends along the Y direction in the drawing. Although not shown here, an opening region defined by the data line 6, the scanning line 11, and various wirings (that is, light that actually contributes to display is transmitted or reflected in each pixel). In the region, a plurality of pixel electrodes 9 are provided for each pixel.

  The pixel switching TFT 30 is arranged corresponding to the intersection of the scanning line 11 and the data line 6. Here, as shown in FIG. 5, the TFT 30 includes a semiconductor layer 30a and a gate electrode 30b. The gate electrode 30b is disposed so as to face the channel region 30a2 with the gate insulating film 13 interposed therebetween, and has a scanning line 11 and a contact hole (not shown in FIGS. 4 and 5) formed on the TFT array substrate 10. Is electrically connected.

  The semiconductor layer 30a constituting the TFT 30 includes a data line side source / drain region 30a1, a channel region 30a2, a pixel electrode side source / drain region 30a3, a data line side source / drain region 30a1, and a data line side LDD region provided between the channel region 30a2. 30a4 and a pixel electrode side LDD region 30a5 provided between the pixel electrode side source / drain region 30a3 and the channel region 30a2. The data line side source / drain region 30a1, the channel region 30a2, the pixel electrode side source / drain region 30a3, the data line side LDD region 30a4, and the pixel electrode side LDD region 30a5 are formed of a semiconductor layer by impurity implantation such as ion implantation, for example. This is an impurity region formed by implanting impurities into 30a. In particular, the data line side LDD region 30a4 and the pixel electrode side LDD region 30a5 are formed as low concentration impurity regions with less impurities than the data line side source / drain region 30a1 and the pixel electrode side source / drain region 30a3, respectively. According to such an impurity region, when the TFT 30 is not operating, the off-current flowing between the data line side source / drain region 30a1 and the pixel electrode side source / drain region 30a3 is reduced, and the on-current flowing when the TFT 30 is operating is reduced. Can be suppressed.

  4 and 5, the scanning line 11 is provided on the TFT array substrate 10. For example, the scanning line 11 includes at least one of refractory metals such as Ti, Cr, W, Ta, Mo, and Pd, a simple metal, an alloy, a metal silicide, a polysilicide, and a laminate of these. Made of light-shielding material. That is, the lower light-shielding film in the present invention is the scanning line 11 in the present embodiment. Therefore, the scanning line 11 serves as a lower light-shielding film, such as back-surface reflection on the TFT array substrate 10 or light emitted from another liquid crystal device by a multi-plate projector or the like and penetrating the composite optical system. The channel region 30a2 of the TFT 30 and its periphery are shielded from the return light that enters the device from the side. In particular, in the present embodiment, the width of the scanning line 11 is the semiconductor layer 30a including the channel region 30a2, the data line side LDD region 30a4, and the pixel electrode side LDD region 30a5 when viewed in plan on the TFT array substrate 10. It is formed wider than the whole. Thus, by forming the scanning line 11 that functions as the lower light-shielding film widely, not only the light that attempts to enter the semiconductor layer 30a perpendicular to the TFT array substrate 10, but also the incident from obliquely or laterally. It is possible to efficiently block the light to be transmitted.

  Subsequently, referring to FIG. 5, a base insulating film 12 that is a “lower interlayer insulating film” in the present invention is laminated between the scanning line 11 and the semiconductor layer 30 a. Here, the base insulating film 12 has a data line side LDD region 30a4 and a pixel electrode side LDD compared to the data line side source / drain region 30a1 and the pixel electrode side source / drain region 30a3 (hereinafter referred to as “the former region” as appropriate). A step is formed on the surface of the region 30a5 (hereinafter referred to as “the latter region” where appropriate) so that the film thickness is increased. That is, the entire region of the base insulating film 12 except for the former region and the latter region may be formed to have the former height, or may be formed to have the latter height. . For example, the base insulating film 12 in the former region may be formed so as to be locally thickly stacked in a plurality of film forming steps or the like, or the base insulating film 12 in the latter region may be locally thinned by an etching step or the like. You may form in.

  FIG. 6 is a schematic diagram showing a region where the base insulating film 12 is formed thick in the peripheral region of the TFT 30. In FIG. 6, detailed structures other than the data line 6, the scanning line 11, the semiconductor layer 30a, etc. are omitted, and the respective layers / members are sized to be recognized on the drawing. Each scale is different. The base insulating film 12 is formed thick in a region surrounded by a dotted line in the drawing, that is, in a region including the data line side LDD layer 30a4 and the pixel electrode side LDD layer 30a5.

  Here, in order to improve the light shielding property with respect to light entering from the lower side of the TFT array substrate 10, typically, the base insulating film 12 is made as thin as possible so that the lower light shielding is performed. It is conceivable to reduce the distance between the scanning line 11 as the film and the semiconductor layer 30a (see FIG. 5). However, since the lower light-shielding film is formed by the scanning lines 11 in this embodiment, a scanning signal (that is, a voltage signal) is applied to the lower light-shielding film during the operation of the liquid crystal device. Therefore, if the entire thickness of the lower insulating film 12 is reduced and the interval between the scanning line 11 and the LDD region is narrowed, the LDD region is activated under the influence of the potential applied to the scanning line 11, The semiconductor layer 30a will malfunction. Therefore, as shown in FIG. 5, in the data line side LDD region 30a4 and the pixel electrode side LDD region 30a5, the distance between the scanning line 11 and the LDD region is increased by forming the base insulating film 12 thick. By ensuring, malfunction of the LDD layer is prevented. On the other hand, the base insulating film 12 is formed at a thickness smaller than that of the LDD region at the ends of the data line side source / drain region 30a1 and the pixel electrode side source / drain region 30a2. As a result, the distance between the scanning line 11 (that is, the lower light-shielding film) and the semiconductor layer 30a is narrowed, so that the light shielding property to the semiconductor layer 30a by the scanning line 11 can be improved.

  As shown in FIG. 5, the base insulating film 12 is formed thick in the region other than the LDD region as well as the channel insulating layer 12 in the channel layer 30a2 and the source / drain region near the LDD region. You may do it.

  Returning to FIG. 5 again, a storage capacitor 70 is formed on the upper layer side of the TFT 30 (that is, the semiconductor layer 30a and the gate electrode 30b) with the first interlayer insulating film 14 interposed therebetween. The storage capacitor 70 is formed by disposing the lower capacitor electrode 1 and the upper capacitor electrode 8 so as to sandwich the dielectric film 7 therebetween.

  The upper capacitor electrode 8 extends from the image display area 10a in which the pixel electrode 9 is disposed to the periphery thereof, and the upper capacitor of the pixels adjacent to each other in the direction in which the data line 6 extends (that is, the Y direction in FIG. 4). The electrodes 8 are electrically connected to each other. The upper capacitor electrode 8 is electrically connected to a constant potential source and is maintained at a fixed potential. Alternatively, the upper capacitor electrode 8 may be electrically connected to the power source of the counter electrode, and may be maintained at a predetermined rectangular wave-like potential that is inverted. Particularly in the present embodiment, the upper capacitor electrode 8 is formed of a non-transparent metal film containing a metal or alloy such as Al (aluminum) or Ag (silver). That is, the upper capacitor electrode 8 is configured as a part of the upper light-shielding film in the present invention, and plays a role of shielding light entering the semiconductor layer 30a from above the TFT array substrate 10. Thus, by using the upper capacitor electrode 8 that is widely formed in the image display region 10a as the upper light shielding film, it is possible to provide a good light shielding against the light entering the semiconductor layer 30a from above the TFT array substrate 10. Can be performed.

  The lower capacitor electrode 1 electrically connects the pixel electrode side source / drain region 30a3 of the TFT 30 and the pixel electrode 9 to each other. Specifically, the lower capacitor electrode 1 is electrically connected to the pixel electrode side source / drain region 30 a 3 through a contact hole 33 opened in the first interlayer insulating film 14. Although not shown here, the lower capacitor electrode 1 is electrically connected to the pixel electrode 9 via another relay layer or the like, and transmits an image signal to the pixel electrode 9. That is, the lower capacitor electrode 1 also functions as a relay wiring that relays the electrical connection between the pixel electrode side source / drain region 30a3 and the pixel electrode 9. In the present embodiment, the lower capacitor electrode 1 is made of conductive polysilicon. That is, the storage capacitor 70 in this embodiment has a so-called MIS structure.

  The dielectric film 7 is, for example, a single layer structure or a multilayer structure formed of a silicon oxide (SiO 2) film such as an HTO (High Temperature Oxide) film, an LTO (Low Temperature Oxide) film, or a silicon nitride (SiN) film. have.

  The data line 6 is laminated on the upper layer side of the storage capacitor 70 via the interlayer insulating film 15. The data line 6 is electrically connected to the data line side source / drain region 30a1 of the semiconductor layer 30a through the contact hole 32. Particularly in the present embodiment, the data line 6 is made of a non-transparent metal or the like, and together with the upper capacitor electrode 8 is formed as a part of the upper light shielding film in the present invention. For this reason, the light that is about to enter the semiconductor layer 30a from above the TFT array substrate 10 is shielded by both the upper capacitor electrode 8 and the data line 6 in a double or superimposed manner. 30a can be shielded very well.

  Here, as shown in FIG. 5, the distance between the upper light shielding film (that is, the upper capacitor electrode 8 and the data line 6) and the lower light shielding film (that is, the scanning line 11) is in the vicinity of the contact holes 32 and 33. It is narrower. That is, the distance between the contact holes 32 and 33 is narrower than the distance between the upper and lower light shielding films near the channel layer 30a2. In this way, by narrowing the interval between the light shielding films disposed on the upper and lower sides in the regions on both sides of the channel layer 30a2, not only the light entering from the direction perpendicular to the TFT array substrate 10, but also obliquely or laterally. It is also possible to block light that is about to enter. Therefore, the light shielding property can be improved in one region of the semiconductor layer 30a including the channel region 30a2 and the LDD region. Furthermore, it is possible to effectively prevent stray light from being generated by internal reflection between the upper light shielding film and the lower light shielding film. As a result, the occurrence of light leakage current in the semiconductor layer 30a can be suppressed, and a liquid crystal device that can perform higher-quality image display can be realized.

  7 is a cross-sectional view taken along line B-B ′ of FIG. In FIG. 7, for convenience of explanation, each member shown in FIG. 4 is omitted as appropriate.

  As shown in FIG. 7, the semiconductor layer 30a has a scanning line 11 as a lower light-shielding film on the lower layer side, and capacitive electrodes 8 and data lines 6 as upper light-shielding films on the upper layer side. Therefore, for example, it is possible to effectively shield light that is about to enter the semiconductor layer 30a from the direction indicated by the arrow in the drawing. With this configuration, it is possible to block light that is about to enter from the top and bottom directions of the TFT array substrate 10, and it is possible to greatly suppress the occurrence of light leakage current of the semiconductor layer 30a.

  As described above, according to the electro-optical device according to the present embodiment, at least in the LDD region, the base insulating film 12 is formed thick to prevent malfunction due to the potential of the scanning line 11. In other regions (for example, the source / drain regions), the light shielding property of the lower light shielding film is improved by forming the base insulating film 12 thin in order to improve the light shielding property. Further, by reducing the distance between the upper and lower light shielding films in the vicinity of the end of the channel region, the entry of light from the outside into the semiconductor layer 30a is suppressed, thereby reducing the occurrence of light leakage current. As a result, a liquid crystal device capable of effectively preventing the occurrence of light leakage current and displaying a high-quality image can be realized.

<Second Embodiment>
With reference to FIG. 8, another embodiment of the liquid crystal device according to the present embodiment will be described. FIG. 8 is a diagram showing a cross-sectional view of the hierarchical structure near the TFT 30 in the present embodiment.

  In the present embodiment, the base insulating film 12 is formed so as to be thick only in the vicinity of two LDD regions (that is, the data line side LDD region 30a4 and the pixel electrode side LDD region 30a5).

  FIG. 9 is a schematic view showing a region where the base insulating film 12 is formed thick in the peripheral region of the TFT 30. In FIG. 9, detailed structures other than the data line 6, the scanning line 11, the semiconductor layer 30a, etc. are omitted, and the respective layers / members are sized to be recognized on the drawing. Each scale is different. The base insulating film 12 is formed thick in a region surrounded by a dotted line in the drawing, that is, in a region including the data line side LDD layer 30a4 and the pixel electrode side LDD layer 30a5.

  In this way, the base insulating film 12 is formed thinner in the channel region 30a2 than in the first embodiment. Accordingly, also in the channel region 30 a 2, the distance from the scanning line 11 that is the lower light-shielding film is narrowed, so that light that enters from the lower side of the TFT array substrate 10 can be more effectively shielded.

<2. Manufacturing method of liquid crystal device>
Next, with reference to FIG. 10 and FIG. 11, the method for manufacturing the liquid crystal device in the embodiment described above will be described for each step.

  First, as shown in FIG. 10A, scanning lines 11 are formed on a TFT array substrate 10 by sputtering or the like using a non-transparent metal or the like. For example, it is made of a light shielding material such as a simple metal, an alloy, a metal silicide, a polysilicide, or a laminate of these including at least one of refractory metals such as Ti, Cr, W, Ta, Mo, and Pd. do it. Here, it is preferable that the width of the scanning line 11 is formed so as to be wider than the width of the semiconductor layer 30a formed in a later step. By forming the scanning line 11 wide in this way, the scanning line 11 functions as a lower light-shielding film in the present invention, and efficiently emits light that is about to enter the semiconductor layer 30a from the lower side of the TFT array substrate 10. It is possible to shield the light.

  Subsequently, a base insulating film 12 is formed on the scanning line 11 by vapor deposition or the like (FIGS. 10B and 10C). Here, the base insulating film 12 is laminated on the TFT array substrate 10 with a predetermined film thickness, and then the base insulating film 12 is at least a region corresponding to the LDD regions 30a4 and 30a5 in the semiconductor layer 30a formed in the next step. A step is formed on the surface of the base insulating film 12 by dry etching or wet etching so that the film 12 becomes thick (FIG. 10C). Here, as shown in FIG. 10C, a step is formed so that the thickness of the base insulating film 12 is increased in regions corresponding to the data line side LDD region 30a4, the channel region 30a2, and the pixel electrode side LDD region 30a5. is doing.

  Subsequently, a semiconductor layer 30a is formed on the base insulating film 12 (see FIG. 10D). The data line side LDD region 30a4, the pixel electrode side LDD region 30a5, and the channel region 30a2 are arranged in the region where the thickness of the base insulating film 12 is thick, and the data line side source / drain is formed in the region where the base insulating film 12 is thinly formed. The semiconductor layer 30a is formed so that the region 30a1 and the pixel electrode side source / drain region 30a3 are arranged. Specifically, for example, impurities may be implanted into the semiconductor layer 30a formed on the base insulating film 12 by impurity implantation such as an ion implantation method. In particular, the data line side LDD region 30a4 and the pixel electrode side LDD region 30a5 are formed as low concentration impurity regions with less impurities than the data line side source / drain region 30a1 and the pixel electrode side source / drain region 30a3, respectively. At this time, the impurity implantation may be performed in a self-aligned form using the gate electrode 30b as a mask, or the impurity implantation may be performed by forming a mask different from the gate electrode 30b.

  Further, a thin gate insulating film 13 is formed on the semiconductor layer 30a by thermal oxidation or the like, and a gate electrode 30b is formed thereon by vapor deposition, sputtering or the like. The gate electrode is made of a material such as polysilicon, and is electrically connected to the scanning line 11 via a contact hole (not shown in FIG. 10) provided in the laminated structure.

  Subsequently, as shown in FIG. 10E, the first interlayer insulating film 14 is laminated on the gate insulating film 13 and the gate electrode 30b.

  Next, as shown in FIG. 10F, a contact hole 32 is opened in the gate insulating film 13 and the first interlayer insulating film 14 to form the lower capacitor electrode 1. Here, the lower capacitor electrode 1 is formed widely using a non-transparent light-shielding material so as to cover the upper portion of the semiconductor layer 30a from above. As a result, the lower capacitor electrode 1 functions as a part of the upper light shielding film in the present invention, and can shield light that enters the semiconductor layer 30 a from above the TFT array substrate 10. Here, in particular, the lower capacitor electrode 1 is formed through the contact hole 33 so that the distance from the scanning line 11 formed on the TFT array substrate 10 is reduced. Thereby, compared with the case where the semiconductor layer 30a is simply sandwiched between the planar light-shielding films, the light entering from the side of the TFT array substrate 10 can be well shielded.

  Next, with reference to FIG. 11G, a process for forming a storage capacitor will be described. A dielectric film 7 is formed on the lower capacitor electrode 1, and an upper capacitor electrode 8 is laminated thereon. The upper capacitor electrode 8 is made of a non-transparent material having light shielding properties, and constitutes a part of the upper light shielding film in the present invention. As a result, the light to be incident from above the TFT array substrate 10 together with the lower capacitor electrode 1 is shielded, so that the light shielding property of the upper light shielding film in the present invention can be improved.

  Subsequently, an interlayer insulating film 15 is further stacked on the upper capacitor electrode 8 (see FIG. 11H). Then, contact holes 32 are opened in the gate insulating film 13 and the interlayer insulating films 14 and 15 to form the data lines 6 (FIG. 11 (i)). In this embodiment, in particular, the data line 6 is also made of a non-transparent material having a light shielding property, so that the data line can be used as a part of the upper light shielding film of the present invention. Then, an interlayer insulating film 15 is formed on the data line 6.

  Although not shown in FIG. 11 on the interlayer insulating film 15, a laminated structure on the TFT array substrate 10 is completed by forming pixel electrodes, alignment films, and the like.

  The TFT array substrate 10 completed in this way is arranged to face the counter substrate 20 completed by laminating the counter electrode and the alignment film via the liquid crystal 50, thereby completing the liquid crystal device.

<3: Electronic equipment>
Next, the case where the liquid crystal device which is the above-described electro-optical device is applied to various electronic devices will be described. FIG. 12 is a plan view showing a configuration example of the projector. Hereinafter, a projector using the liquid crystal device as a light valve will be described.

  As shown in FIG. 12, a projector 1100 includes a lamp unit 1102 made of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G are the same as those of the liquid crystal device described above, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In the dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Therefore, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R and 1110B.

  In addition, since light corresponding to each primary color of R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  In addition to the electronic device described with reference to FIG. 12, a mobile personal computer, a mobile phone, a liquid crystal television, a viewfinder type, a monitor direct-view type video tape recorder, a car navigation device, a pager, an electronic device Examples include a notebook, a calculator, a word processor, a workstation, a videophone, a POS terminal, and a device equipped with a touch panel. Needless to say, the present invention can be applied to these various electronic devices.

  In addition to the liquid crystal devices described in the above embodiments, the present invention includes a reflective liquid crystal device (LCOS), a plasma display (PDP), a field emission display (FED, SED), an organic EL display, and a digital micromirror device. (DMD), electrophoresis apparatus and the like are also applicable.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the gist or concept of the invention that can be read from the claims and the entire specification. For electro-optical devices with such changes The substrate, the electro-optical device, and the electronic apparatus including the electro-optical device are also included in the technical scope of the present invention.

It is a top view which shows the whole structure of the liquid crystal device which concerns on 1st Embodiment. It is HH 'sectional drawing of FIG. 1 is a block diagram illustrating an electrical configuration of a liquid crystal device according to a first embodiment. FIG. 3 is a plan view illustrating a configuration around a TFT of the liquid crystal device according to the first embodiment. FIG. 5 is a cross-sectional view taken along line AA ′ in FIG. 4. FIG. 3 is a schematic diagram illustrating a region where a base insulating film is formed thick in a peripheral region of the TFT 30 of the liquid crystal device according to the first embodiment. FIG. 5 is a sectional view taken along line BB ′ in FIG. 4. It is sectional drawing which shows the cross section along TFT of the liquid crystal device which concerns on 2nd Embodiment. It is a schematic diagram which shows the area | region in which the base insulating film was formed thickly in the peripheral area | region of TFT30 of the liquid crystal device which concerns on 2nd Embodiment. It is sectional drawing which shows the manufacturing method of the laminated structure on the TFT array substrate of the liquid crystal device which concerns on 1st Embodiment for every process. FIG. 11 is a cross-sectional view showing the manufacturing method of the stacked structure on the TFT array substrate of the liquid crystal device according to the first embodiment for each step following FIG. 10; It is a top view which shows the structure of the projector which is an example of the electronic device to which the electro-optical apparatus is applied.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Lower capacity electrode, 6 Data line, 8 Upper capacity electrode, 9 Pixel electrode, 10 TFT array substrate, 10a Image display area, 11 Scan line, 12 Lower interlayer insulation film 20 Opposite substrate, 21 Counter electrode, 30 TFT, 30a Semiconductor layer, 30a1 data line side source / drain region, 30a2 channel region, 30a3 pixel electrode side source / drain region, 30a4 data line side LDD region, 30a5 pixel electrode side LDD region, 30b gate electrode, 50 liquid crystal

Claims (8)

On the board
A semiconductor layer having a channel region, a source / drain region, and an LDD region formed between the channel region and the source / drain region;
A gate electrode disposed to face the channel region via a gate insulating film;
An upper light-shielding film that is stacked on the upper layer side of the semiconductor layer and is formed wider than at least the channel region and the LDD region when viewed in plan on the substrate;
A lower light-shielding film that is stacked on a lower layer side than the semiconductor layer and is formed wider than at least the channel region and the LDD region when viewed in plan on the substrate;
Layered between the semiconductor layer and the lower light-shielding film and viewed in plan on the substrate, the film thickness in the region overlapping the source / drain region is smaller than the film thickness in the region overlapping at least the LDD region. An electro-optical device comprising: a lower interlayer insulating film formed as described above. A scanning line extending in a first direction on the substrate and supplying a scanning signal to the gate electrode;
A data line extending in a second direction intersecting the first direction on the substrate and supplying an image signal to the source / drain region;
A pixel electrode provided for each pixel corresponding to the intersection of the data line and the scanning line,
The LDD region includes a data line side LDD region formed between a data line side source / drain region electrically connected to the data line among the channel region and the source / drain region, and the channel region and the source. A pixel electrode side LDD region formed between the pixel electrode side source / drain regions electrically connected to the pixel electrode in the drain region;
The lower interlayer insulating film has a step on the surface so as to increase the film thickness in a region overlapping with either the data line side LDD region or the pixel electrode side LDD region when viewed in plan on the substrate. The electro-optical device according to claim 1, comprising:   The electro-optical device according to claim 2, wherein the lower light-shielding film has a portion that also serves as the scanning line.   The electro-optical device according to claim 2, wherein the upper light-shielding film has a portion that also serves as the data line.   The said upper side light shielding film has a part which serves as the said relay wiring which electrically relay-connects between the said pixel electrode side source / drain area | region and the said pixel electrode, It is any one of Claim 2 to 4 characterized by the above-mentioned. Electro-optic device. A capacitive electrode;
A dielectric film laminated between the upper light shielding film and the capacitor electrode;
6. The electro-optical device according to claim 1, wherein the upper light-shielding film and the capacitor electrode are disposed so as to face each other with the dielectric film interposed therebetween. Forming a lower light-shielding film on the substrate to form the lower light-shielding film wider than the semiconductor layer when viewed in plan on the substrate;
A lower interlayer insulating film forming step of forming a lower interlayer insulating film on the lower light shielding film so as to locally increase the film thickness; and
A semiconductor layer forming step of forming a semiconductor layer so that an LDD region is disposed in a region of the lower interlayer insulating film that is locally thick;
Forming a gate electrode so as to face the channel region of the semiconductor layer via a gate insulating film; and
An upper light-shielding film forming step of forming the upper light-shielding film on the semiconductor layer so as to be wider than the semiconductor layer when viewed in plan on the substrate.   An electronic apparatus comprising the electro-optical device according to claim 1.

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