JP2010050583A - Solid-state imaging apparatus, method for driving the same and imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enhance a frame rate while keeping a one-channel output. <P>SOLUTION: In a CCD solid-state imaging apparatus 10A having first and second horizontal transfer sections 16A and 16B, an auxiliary transfer section 17 is provided continuously to the output side of the second horizontal transfer section 16B, for example, and a single output section (a charge voltage conversion section 18 and an output circuit 19) is provided at the end of the transfer destination of the first horizontal transfer section 16A and the auxiliary transfer section 17 in order to keep the one-channel output, thus enhancing the frame rate. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device, a driving method of the solid-state imaging device, and an imaging device, and in particular, a charge transfer type solid-state imaging device represented by a CCD (Charge Coupled Device) solid-state imaging device, a driving method of the solid-state imaging device, and the solid state The present invention relates to an imaging apparatus using the imaging apparatus.

  As a method for transferring a signal charge in a charge transfer type solid-state imaging device, for example, a CCD solid-state imaging device, the signal is transferred in one vertical direction and then transferred in one horizontal direction, and an electric signal corresponding to the signal charge is output from one output circuit. It is common to do.

  When this transfer method is employed, the output for one screen can be obtained by repeating the operation of performing horizontal transfer for each vertical transfer line (row) by the number of vertical lines. Therefore, when the number of lines increases as the number of pixels increases, the number of times of vertical transfer that requires more time than horizontal transfer increases. Then, the time required to output one image increases, so that the frame rate eventually decreases.

  As a method for improving (improving) the frame rate, a so-called multi-channel output method or the like having a plurality of systems of horizontal transfer units and output circuits and performing horizontal transfer and output in parallel between these systems is known. (For example, refer to Patent Document 1).

JP-A-11-103421

  However, when the multi-channel output method is adopted, the output circuits of a plurality of systems become independent, resulting in variations in characteristics between channels, which may adversely affect image quality. As the characteristic variation, there is a characteristic variation in an analog circuit part such as a charge-voltage converter or an output circuit that converts a signal charge into a signal voltage. Further, since output circuits and the like are required for the number of channels, the chip area increases and the number of terminals cannot be avoided.

  Accordingly, an object of the present invention is to provide a solid-state imaging device capable of improving the frame rate with one channel output, a driving method of the solid-state imaging device, and an imaging device using the solid-state imaging device. To do.

In order to achieve the above object, the present invention provides:
A plurality of pixels arranged in a matrix, a vertical transfer unit that transfers signal charges read from the pixels of the first pixel group and signal charges read from the pixels of the second pixel group in the reverse direction; In a solid-state imaging device comprising: a first horizontal transfer unit provided on one transfer destination side of the vertical transfer unit; and a second horizontal transfer unit provided on the other transfer destination side of the vertical transfer unit;
A single output unit is provided in common for the first and second horizontal transfer units, and
An auxiliary transfer unit that transfers signal charges output from one of the first and second horizontal transfer units in at least one transfer direction of the vertical transfer unit is provided continuously on at least one output side of the first and second horizontal transfer units.
Then, the signal charge supplied directly from one of the first and second horizontal transfer units and supplied from the other via the auxiliary transfer unit, or the auxiliary transfer from both the first and second horizontal transfer units The signal charge supplied via the unit is converted into an electrical signal by a single output unit and output.

  In the solid-state imaging device having the above-described configuration, a plurality of pixels arranged in a matrix are divided into pixels in the first and second pixel groups. Then, the signal charges read from the pixels of both pixel groups are transferred in the opposite directions by the vertical transfer unit, and further transferred separately by the first and second horizontal transfer units, thereby improving the frame rate. Further, the signal charge output from at least one of the first and second horizontal transfer units is made into a single output unit by the auxiliary transfer unit provided continuously on the output side of at least one of the first and second horizontal transfer units. By guiding, the output unit can be shared among multiple channels. That is, it is possible to improve the frame rate while maintaining one channel output.

  According to the present invention, since the output unit can be shared among the multi-channel horizontal transfer units, the frame rate can be improved while keeping the output of one channel without increasing the chip area or the number of terminals. Can do.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In each embodiment described below, a case where the solid-state imaging device is applied to, for example, an interline transfer (IT) type CCD solid-state imaging device will be described as an example.

[First Embodiment]
FIG. 1 is a schematic configuration diagram showing a CCD solid-state imaging device according to the first embodiment of the present invention. In FIG. 1, an imaging unit 11 includes a plurality of sensor units (pixels) 12 two-dimensionally arranged in a matrix, a readout gate unit 13 provided adjacent to the sensor units 12, and a matrix pixel array. On the other hand, it is composed of a vertical transfer unit 14 composed of a CCD provided for each pixel column.

  In the imaging unit 11, one unit including a packet of one sensor unit 12, a reading gate unit 13 adjacent to the sensor unit 12, and a vertical transfer unit 14 corresponding to one sensor unit 12 is a unit cell 15. Here, the packet of the vertical transfer unit 14 is a unit for handling the signal charge for one pixel in the vertical transfer unit 14. Then, the transfer channel of the vertical transfer unit 14 is formed by continuously connecting these packets.

  The sensor unit 12 is composed of, for example, a PN junction photodiode, and photoelectrically converts incident light into a signal charge having a charge amount corresponding to the luminance level and accumulates the signal light. The read gate unit 13 reads the signal charges accumulated in the sensor unit 12 to the vertical transfer unit 14 by applying a read pulse φROP.

  The vertical transfer unit 14 is driven to transfer by multi-phase vertical transfer pulses, for example, four-phase vertical transfer pulses φV1 to φV4. The number of phases of the vertical transfer pulse is not limited to four. The vertical transfer unit 14 performs vertical transfer so as to transfer the signal charges read from the sensor unit 12 of the first pixel group and the signal charges read from the sensor unit 12 of the second pixel group in opposite directions. It is driven by pulses φV1 to φV4.

  Specifically, the vertical transfer unit 14 reads the signal charges read from the sensor unit 12, and the signal charges of each sensor unit 12 in the lower half pixel group of the imaging unit 11 in the lower direction of the drawing. The signal charge of each sensor unit 12 in the upper half pixel group is transferred in the upward direction in the figure. In this vertical transfer, portions corresponding to one scanning line (one line) are sequentially performed in the horizontal blanking period. Here, the vertical direction refers to the arrangement direction of the pixels in the pixel column.

  Here, in the vertical transfer unit 14, four transfer electrodes corresponding to the four-phase vertical transfer pulses φV1 to φV4 are repeatedly arranged in the transfer direction above a transfer channel in which packets are connected. For example, each transfer electrode corresponding to the first phase and the third phase also serves as the gate electrode of the read gate unit 13.

  Therefore, among the four-phase vertical transfer pulses φV1 to φV4, the first-phase and third-phase vertical transfer pulses φV1 and φV3 take three values of low level, intermediate level, and high level. The third high-level pulse is used as a read pulse φROP applied to the read gate unit 13.

  That is, the third-phase read pulse φROP of the first-phase and third-phase vertical transfer pulses φV1 and φV3 is applied to each transfer electrode (gate electrode of the read gate unit 13) corresponding to the first and third phases. The As a result, the signal charge accumulated in the sensor unit 12 is read out to the vertical transfer unit 14.

  The vertical transfer pulses φV2 and φV3 of the second phase and the fourth phase have binary values of a low level and an intermediate level. Then, the four-phase vertical transfer pulses φV1 to φV4 periodically transition between the low level and the intermediate level, whereby the transfer drive of the vertical transfer unit 14 is performed, and the signal charge read from the sensor unit 12 is changed. The vertical transfer unit 14 performs vertical transfer.

  On one (lower) transfer destination side of the vertical transfer unit 14, a first horizontal transfer unit 16A made of a CCD is provided along the pixel arrangement direction of the pixel row. In the first horizontal transfer section 16A, the signal charges of the sensor sections 12 of the lower half pixel group of the image pickup section 11 are vertically transferred line by line by the transfer operation in the downward direction of the figure by the vertical transfer section 14. Horizontal transfer (hereinafter referred to as “VH transfer”) is performed.

  On the other (upper) transfer destination side of the vertical transfer unit 14, a second horizontal transfer unit 16B made of a CCD is provided along the pixel arrangement direction of the pixel row. In the second horizontal transfer section 16B, the signal charges of the sensor sections 12 of the upper half pixel group of the imaging section 11 are VH-transferred in order for each line by the upward transfer operation of the vertical transfer section 14 in the figure. The

  The horizontal transfer units 16A and 16B are driven to transfer by, for example, two-phase horizontal transfer pulses φH1 and φH2. By this transfer driving, the horizontal transfer units 16A and 16B sequentially transfer the signal charges for one line transferred from the plurality of vertical transfer units 14 in the horizontal direction (in the horizontal scanning period after the horizontal blanking period ( In this example, the data is transferred in the left direction in the figure. Here, the horizontal direction refers to the arrangement direction of the pixels in the pixel row.

  On the transfer destination side (output side) of the second horizontal transfer unit 16B, an auxiliary transfer unit 17 composed of a CCD is provided continuously to the horizontal transfer unit 16B. Here, “continuously” means a state in which the auxiliary transfer unit 17 can transfer the signal charge transferred by the second horizontal transfer unit 16B as it is.

  The auxiliary transfer unit 17 is provided along the vertical direction on the left side of the image pickup unit 11 in the drawing, and transfers the signal charge output (transferred) from the horizontal transfer unit 16B in the downward direction (vertical direction) in the drawing. The auxiliary transfer unit 17 serves as a buffer for holding the signal charge output from the second horizontal transfer unit 16B.

  The number of transfer stages of the auxiliary transfer unit 17 is preferably set to be the same as the number of transfer stages of the horizontal transfer unit 16B. Note that the number of transfer stages of the auxiliary transfer unit 17 is not necessarily the same as the number of transfer stages of the horizontal transfer unit 16B. However, by setting the number of transfer stages of the auxiliary transfer unit 17 to be the same as the number of transfer stages of the horizontal transfer unit 16B, the signal charge for one line can be held in the auxiliary transfer unit 17 (line buffer). Further, the auxiliary transfer unit 17 can be driven to be driven by the same horizontal transfer pulses φH1 and φH2 as the horizontal transfer units 16A and 16B.

  At the end of each transfer destination side of the first horizontal transfer unit 16A and the auxiliary transfer unit 17, for example, a charge-voltage conversion unit 18 having a floating diffusion amplifier configuration is provided for both transfer units 16A and 17. The charge-voltage converter 18 sequentially converts the signal charges transferred by the first horizontal transfer unit 16A and the auxiliary transfer unit 17 into signal voltages and outputs the signal voltages. This signal voltage is output via an output circuit 19 composed of, for example, a source follower circuit.

  The components such as the sensor unit 12, the read gate unit 13, the vertical transfer unit 14, the first and second horizontal transfer units 16A and 16B, the auxiliary transfer unit 17, the charge voltage conversion unit 18 and the output circuit 19 described above are semiconductor substrates. (Hereinafter sometimes referred to as “chip”) 20. The output signal of the output circuit 19 enters the imaging unit 11 through the subject, and is output to the outside of the chip 20 via the terminal 21 as an imaging signal OUT obtained by photoelectric conversion in accordance with the luminance level by the sensor unit 12. Is output.

  The interline transfer type CCD solid-state imaging device 10A according to the first embodiment is configured as described above. In the CCD solid-state imaging device 10A, the charge-voltage conversion unit 18 and the output circuit 19 constitute a single output unit that outputs an electrical signal corresponding to the signal charge. Here, the output circuit 19 may be provided outside the semiconductor substrate 20.

  In the present embodiment, the auxiliary transfer unit 17 is provided continuously to the second horizontal transfer unit 16B. However, the auxiliary transfer unit 17 may be provided to be continuous to the first horizontal transfer unit 16A. is there.

  Next, a series of operations of vertical transfer, horizontal transfer, and signal output in the CCD solid-state imaging device 10A according to the first embodiment having the above-described configuration will be described with reference to the operation explanatory diagram of FIG.

  The signal charges read from each sensor unit 12 of the imaging unit 11 are transferred vertically by the transfer operation by the vertical transfer unit 14 with respect to the lower half of the signal charges of the imaging unit 11 in the downward direction in the figure. The signal charge is vertically transferred in the upward direction in the figure (transfer operation indicated by arrow A in the figure).

  At this time, signal charges are simultaneously VH transferred from the vertical transfer unit 14 to the first and second horizontal transfer units 16A and 16B by one line. That is, VH transfer of signal charges for two lines is performed at a time from the vertical transfer unit 14. Therefore, it is possible to reduce the time of the horizontal blanking period as compared with the case where VH transfer of signal charges is performed one line at a time (details will be described later).

  Next, the signal charges of two lines are transferred in the same direction (in this example, the left direction in the figure) by the transfer operation by the first and second horizontal transfer units 16A and 16B (transfer of the arrow B in the figure). Operation). By this horizontal transfer operation, first, the signal charges transferred by the first horizontal transfer unit 16A are sequentially converted into signal voltages by the charge-voltage conversion unit 18 and output (output operation indicated by arrow C in the figure).

  On the other hand, for the signal charges transferred by the second horizontal transfer unit 16B, the transfer operation is inherited by the auxiliary transfer unit 17 continuous to the horizontal transfer unit 16B, and the transfer operation by the auxiliary transfer unit 17 moves downward in the figure. Transferred (transfer operation indicated by arrow D in the figure). The transfer operation at this time is part of the horizontal transfer operation by the second horizontal transfer unit 16B.

  By the transfer operation indicated by the arrow D, the horizontal transfer by the second horizontal transfer unit 16B is performed until the conversion of the signal charges for one line horizontally transferred by the first horizontal transfer unit 16A to the signal voltage is completed. That is, the signal charge for the line is waiting in the auxiliary transfer unit 17.

  When the charge-voltage conversion on the first horizontal transfer unit 16A side is completed, the signal charge for one line on the second horizontal transfer unit 16B side is sequentially converted into a signal voltage by the charge-voltage conversion unit 18 and output. (Output operation of arrow E in the figure).

  The above-described series of operations of vertical transfer (VH transfer), horizontal transfer, and signal output are repeatedly executed for all the lines (pixel rows) of the imaging unit 11, so that the imaging signal OUT for one screen is obtained. It is derived from the terminal 21 as one channel output. However, as is apparent from the series of operations described above, the order of the lines of the 1-channel output does not correspond to the order of the lines of the imaging unit 11. Therefore, the rearrangement of the line order is electrically performed in the signal processing unit at the subsequent stage.

(About improving the frame rate)
Next, the reason why the frame rate is improved by the vertical transfer operation in the CCD solid-state imaging device 10A according to the first embodiment will be described.

<When the horizontal transfer unit has one system>
First, a case where the horizontal transfer unit has one system (one channel) will be described. As is clear from the timing chart shown in FIG. 4, when one horizontal transfer unit is used, the time required for VH transfer (horizontal blanking period) in one horizontal period (1H) in which one line of signal charge is transferred. The ratio is large.

Here, as shown in FIG. 3, the number of transfer stages (number of bits) of the horizontal transfer unit is B, the number of fields of one screen is n, the number of transfer stages (number of lines) of the vertical transfer unit is m, and bits in the vertical blanking period Let Vb be the number and Hb be the number of bits in the horizontal blanking period. At this time, the number of bits per frame (bit / frame) is
bit / frame
= [{(B + Hb) × m} + Vb] × n (1)
It is given by

<When there are two horizontal transfer units>
Next, the case where there are two horizontal transfer units, that is, the case of the CCD solid-state imaging device 10A according to the first embodiment having the first and second horizontal transfer units 16A and 16B will be described.

  As is apparent from the timing chart shown in FIG. 6, when two horizontal transfer units 16A and 16B are provided, VH transfer is simultaneously performed on these horizontal transfer units 16A and 16B, so that the horizontal block in one field period can be obtained. The total time of the ranking period is halved. That is, by transferring the signal charges for two lines at a time by VH transfer, the frame rate can be improved by the amount that the transfer time for the VH transfer can be reduced.

Here, as shown in FIG. 5, the number of transfer stages (number of bits) C of the auxiliary transfer unit 17 having the role of a line buffer capable of holding the signal charge for one line is set to the number of transfer stages of the horizontal transfer units 16A and 16B ( The number of bits) is the same as B. At this time, the number of bits per frame (bit / frame) is
bit / frame
= [{(2B + Hb) × m / 2} + Vb] × n (2)
It is given by

  As described above, for example, the auxiliary transfer unit 17 is provided continuously on the output side of the second horizontal transfer unit 16B, and an output unit (18 is provided at each transfer destination end of the first horizontal transfer unit 16A and the auxiliary transfer unit 17. , 19), the output unit can be shared between the first and second horizontal transfer units 16A and 16B. As a result, it is possible to improve the frame rate while maintaining one channel output without increasing the chip area or the number of terminals.

[Second Embodiment]
FIG. 7 is a schematic configuration diagram showing a CCD solid-state imaging device according to the second embodiment of the present invention. In FIG. 7, the same parts as those in FIG.

  In the CCD solid-state imaging device 10A according to the first embodiment, the auxiliary transfer unit 17 is provided on the output side of the second horizontal transfer unit 16B (or the second horizontal transfer unit 16A). On the other hand, the CCD solid-state imaging device 10B according to the present embodiment employs a configuration in which auxiliary transfer units 17A and 17B are provided on both output sides of the first and second horizontal transfer units 16A and 16B.

  The CCD solid-state imaging device 10B according to this embodiment is basically the same as the CCD solid-state imaging device 10A according to the first embodiment except for the configuration of the auxiliary transfer units 17A and 17B. Accordingly, since the constituent elements other than the auxiliary transfer units 17A and 17B are duplicated, the description thereof is omitted.

  The auxiliary transfer unit 17A is continuous with the transfer destination side (output side) of the first horizontal transfer unit 16A, and is provided along the vertical direction on the left side of the image pickup unit 11 in the drawing. The auxiliary transfer unit 17A transfers the signal charge transferred from the first horizontal transfer unit 16A in the upward direction in the figure and guides it to the charge-voltage conversion unit 18 provided at the intermediate position in the vertical direction of the imaging unit 11.

  The auxiliary transfer unit 17B is continuous to the transfer destination side of the second horizontal transfer unit 16B, and is provided along the vertical direction on the left side of the image pickup unit 11 in the drawing. The auxiliary transfer unit 17B preferably has the same number of transfer stages as the auxiliary transfer unit 17A, transfers the signal charge transferred from the second horizontal transfer unit 16B in the downward direction of the figure, and guides it to the charge-voltage conversion unit 18. Here, the number of transfer stages of the auxiliary transfer units 17A and 17B is preferably set to ½ of the number of lines m of the imaging unit 11. However, this is an example, and the present invention is not limited to this.

  The auxiliary transfer units 17A and 17B are driven to transfer by the same horizontal transfer pulses φH1 and φH2 as the first and second horizontal transfer units 16A and 16B. At this time, the transfer operation of the set of the horizontal transfer unit 16A and the auxiliary transfer unit 17A and the transfer operation of the set of the horizontal transfer unit 16B and the auxiliary transfer unit 17B can freely control the stop timing and start timing of the transfer operation. It is like that.

  Next, a series of operations of vertical transfer, horizontal transfer, and signal output in the CCD solid-state imaging device 10B according to the second embodiment having the above-described configuration will be described with reference to the operation explanatory diagram of FIG.

  The signal charges read from each sensor unit 12 of the imaging unit 11 are transferred vertically by the transfer operation by the vertical transfer unit 14 with respect to the lower half of the signal charges of the imaging unit 11 in the downward direction in the figure. The signal charge is vertically transferred in the upward direction in the figure (transfer operation indicated by arrow A in the figure).

  At this time, signal charges are simultaneously VH transferred from the vertical transfer unit 14 to the first and second horizontal transfer units 16A and 16B by one line. That is, VH transfer of signal charges for two lines is performed at a time from the vertical transfer unit 14. Accordingly, it is possible to reduce the time of the horizontal blanking period as compared with the case where signal charge VH transfer is performed one line at a time.

  Next, the signal charges of two lines are transferred in the same direction (in this example, the left direction in the figure) by the transfer operation by the first and second horizontal transfer units 16A and 16B (transfer of the arrow B in the figure). Operation). At the same time, the auxiliary transfer units 17A and 17B also perform transfer operations in synchronization with the first and second horizontal transfer units 16A and 16B (transfer operation indicated by arrow C in the figure).

  Then, the transfer operation of one system is stopped at the timing when the leading signal charge reaches the output stage of the auxiliary transfer units 17A and 17B. For example, the transfer operations of the second horizontal transfer unit 16B and the auxiliary transfer unit 17B are stopped. At this time, the signal charge for one line transferred by the first horizontal transfer unit 16A and the auxiliary transfer unit 17A is sequentially converted to a signal voltage by the charge-voltage conversion unit 18 and output (the output operation indicated by the arrow D in the figure). ).

  When the conversion of the signal charges on the first horizontal transfer unit 16A and auxiliary transfer unit 17A side into the signal voltage is completed, the transfer operations of the second horizontal transfer unit 16B and auxiliary transfer unit 17B that have been stopped are restarted. Subsequently, the signal charge for one line transferred by the second horizontal transfer unit 16B and the auxiliary transfer unit 17B is sequentially converted into a signal voltage by the charge voltage conversion unit 18 and output (indicated by an arrow D in the figure). Output operation).

  The above-described series of operations of vertical transfer (VH transfer), horizontal transfer, and signal output are repeatedly executed for all the lines of the imaging unit 11, so that the imaging signal OUT for one screen is 1 from the terminal 21. Derived as channel output. Further, as described in the first embodiment, since the order of the lines of the one-channel output does not correspond to the order of the lines of the imaging unit 11, the order of the lines is changed in the signal processing unit at the subsequent stage. It is done electrically.

(About improving the frame rate)
As shown in the timing chart of FIG. 10, in the case of the second embodiment, the time required to transfer the signal charge is increased by the transfer time corresponding to the number of transfer stages of the auxiliary transfer units 17A and 17B compared to the case of the first embodiment. . However, the time that is increased due to the auxiliary transfer units 17A and 17B is less than the horizontal blanking period that can be reduced by performing VH transfer of signal charges for two lines at a time, that is, the number of pixels. In relatively few devices, the frame rate can be improved.

Here, as shown in FIG. 9, the transfer stage number (bit number) D of the auxiliary transfer units 17A and 17B is set to m / 2 (m: the number of lines). At this time, the number of bits per frame (bit / frame) is
bit / frame
= [{(2B + Hb + D) × m / 2} + Vb] × n (3)
It is given by That is, as described above, in the case of the second embodiment, the number of bits (bit / frame) per frame is equivalent to the number of transfer stages D of the auxiliary transfer units 17A and 17B compared to the case of the first embodiment. To increase.

  Here, when the configuration of the second embodiment is adopted, the conditions for improving the frame rate as compared with the case where the horizontal transfer unit is one system are as follows. From Expression (3) <Expression (1), {(2B + Hb + D) × m / 2} <{(B + Hb) × m}, that is, D <Hb may be satisfied. That is, the frame rate can be improved if there is a relationship that satisfies the condition D <Hb, that is, a relationship in which the horizontal blanking period (number of bits) Hb is larger than the number of transfer stages (number of bits) D of the auxiliary transfer units 17A and 17B.

  As described above, the output unit (18, 19) is provided at an intermediate position between the first and second horizontal transfer units 16A and 16B, and the auxiliary transfer unit 17A is provided between the output unit and both horizontal transfer units 16A and 16B. , 17B, a single output unit can be shared between the horizontal transfer units 16A, 16B. As a result, it is possible to improve the frame rate while maintaining one channel output without increasing the chip area or the number of terminals.

[Modification]
In each of the above embodiments, one vertical transfer unit 14 is divided into two and signal charges are transferred in the reverse direction. However, the vertical transfer unit 14 of each pixel column is set in units of two transfer units having reverse transfer directions. It is also possible to transfer the signal charges in the reverse direction by each transfer unit. In this case, for example, it is possible to divide the pixel group into an odd-numbered pixel group and an even-numbered pixel group and transfer the signal charges of each pixel group in the upside down direction.

  In each of the above embodiments, the first and second horizontal transfer units 16A and 16B are each described as an example. However, the first and second horizontal transfer units 16A and 16B are described as examples. It is also possible to configure at least one of these by a plurality of transfer units. When the side on which the auxiliary transfer unit 17 is provided is configured by a plurality of transfer units, the auxiliary transfer unit 17 may be configured by the same number of transfer units.

  The present invention is not limited to application to a CCD solid-state imaging device, but can be applied to all solid-state imaging devices having a plurality of horizontal transfer units. The solid-state imaging device may be formed as a single chip, or may be in a module-like form having an imaging function in which an imaging unit and a signal processing unit or an optical system are packaged together. Good.

  Further, the present invention is not limited to application to a solid-state imaging device, and can also be applied to an imaging device that uses the solid-state imaging device as an imaging device. Here, the imaging apparatus refers to a camera system such as a digital still camera or a video camera, or an electronic device having an imaging function such as a mobile phone. Note that the above-described module form mounted on an electronic device, that is, a camera module may be used as an imaging device.

[Imaging device]
FIG. 11 is a block diagram showing an example of the configuration of the imaging apparatus according to the present invention. As shown in FIG. 11, an imaging apparatus 100 according to the present invention includes an optical system including a lens group 101 and the like, an imaging element 102, a DSP circuit 103 which is a camera signal processing circuit, a frame memory 104, a display apparatus 105, and a recording apparatus 106. The operation system 107 and the power supply system 108 are included. The DSP circuit 103, the frame memory 104, the display device 105, the recording device 106, the operation system 107, and the power supply system 108 are connected to each other via a bus line 109.

  The lens group 101 captures incident light (image light) from a subject and forms an image on the imaging surface of the imaging element 102. The imaging element 102 converts the amount of incident light imaged on the imaging surface by the lens group 101 into an electrical signal in units of pixels and outputs the electrical signal. As the imaging element 102, the CCD solid-state imaging device according to the first and second embodiments described above is used.

  The display device 105 includes a panel type display device such as a liquid crystal display device or an organic EL (electroluminescence) display device, and displays a moving image or a still image captured by the image sensor 102. The recording device 106 records a moving image or a still image captured by the image sensor 102 on a recording medium such as a video tape or a DVD (Digital Versatile Disk).

  The operation system 107 issues operation commands for various functions of the imaging apparatus under operation by the user. The power supply system 108 appropriately supplies various power supplies serving as operation power supplies for the DSP circuit 103, the frame memory 104, the display device 105, the recording device 106, and the operation system 107 to these supply targets.

1 is a schematic configuration diagram illustrating a CCD solid-state imaging device according to a first embodiment of the present invention. It is operation | movement explanatory drawing about a series of operation | movement of the vertical transfer in the CCD solid-state imaging device which concerns on 1st Embodiment, a horizontal transfer, and a signal output. It is explanatory drawing about the frame rate in case a horizontal transfer part is 1 system | strain. It is a timing chart with which it uses for description of the frame rate in case a horizontal transfer part is one system. It is explanatory drawing about the frame rate in the case of the CCD solid-state imaging device concerning 1st Embodiment. It is a timing chart with which it uses for description of the frame rate in the case of the CCD solid-state imaging device which concerns on 1st Embodiment. It is a schematic block diagram which shows the CCD solid-state imaging device concerning 2nd Embodiment of this invention. It is operation | movement explanatory drawing about a series of operation | movement of the vertical transfer in the CCD solid-state imaging device which concerns on 2nd Embodiment, a horizontal transfer, and a signal output. It is explanatory drawing about the frame rate in the case of the CCD solid-state imaging device concerning 2nd Embodiment. It is a timing chart with which it uses for description of the frame rate in the case of the CCD solid-state imaging device concerning 2nd Embodiment. It is a block diagram which shows an example of a structure of the imaging device which concerns on this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10A, 10B ... CCD solid-state imaging device, 11 ... Imaging part, 12 ... Sensor part, 13 ... Read-out gate part, 14 ... Vertical transfer part, 15 ... Unit cell, 16A ... 1st horizontal transfer part, 16B ... 2nd horizontal transfer , 17, 17A, 17B ... auxiliary transfer unit, 18 ... charge-voltage conversion unit, 19 ... output circuit, 20 ... semiconductor substrate

Claims (8)

A plurality of pixels arranged in a matrix;
A vertical transfer unit that transfers the signal charges read from the pixels of the first pixel group and the signal charges read from the pixels of the second pixel group in opposite directions;
A first horizontal transfer unit provided on one transfer destination side of the vertical transfer unit;
A second horizontal transfer unit provided on the other transfer destination side of the vertical transfer unit;
An auxiliary transfer unit that is continuously provided on at least one output side of the first and second horizontal transfer units, and transfers signal charges output from the one side in at least one transfer direction of the vertical transfer unit;
The signal charge supplied directly from one of the first and second horizontal transfer units and from the other via the auxiliary transfer unit, or the auxiliary transfer unit from both the first and second horizontal transfer units A solid-state imaging device comprising: a single output unit that outputs an electric signal corresponding to a signal charge supplied via the signal. The output unit is continuously provided on one output side of the first and second horizontal transfer units,
The solid-state imaging device according to claim 1, wherein the auxiliary transfer unit is provided between the other output side of the first and second horizontal transfer units and the output unit. The solid-state imaging device according to claim 2, wherein the number of transfer stages of the auxiliary transfer unit is the same as the number of transfer stages of the first and second horizontal transfer units. The solid-state imaging device according to claim 2, wherein the auxiliary transfer unit holds a signal charge for one line transferred from the vertical transfer unit to one of the first and second horizontal transfer units. The output unit is provided at an intermediate position between the first horizontal transfer unit and the second horizontal transfer unit,
The auxiliary transfer unit includes a first auxiliary transfer unit provided between the output side of the first horizontal transfer unit and the output unit, and an output side of the second horizontal transfer unit and the output unit. The solid-state imaging device according to claim 1, further comprising a second auxiliary transfer unit provided. The solid-state imaging device according to claim 5, wherein the number of transfer stages of the first and second horizontal transfer units is ½ of the number of lines of the imaging unit. The signal charges read from the pixels of the first pixel group and the signal charges read from the pixels of the second pixel group are transferred in the reverse direction by the vertical transfer unit,
The signal charges transferred in the reverse direction by the vertical transfer unit are separately transferred by the first and second horizontal transfer units, respectively.
The signal charge output from at least one of the first and second horizontal transfer units is transferred in at least one transfer direction of the vertical transfer unit by the auxiliary transfer unit provided continuously on the at least one output side. ,
The signal charge supplied directly from one of the first and second horizontal transfer units and from the other via the auxiliary transfer unit, or the auxiliary transfer unit from both the first and second horizontal transfer units A method for driving a solid-state imaging device, which outputs an electric signal corresponding to a signal charge supplied via a single output unit. A plurality of pixels arranged in a matrix;
A vertical transfer unit that transfers the signal charges read from the pixels of the first pixel group and the signal charges read from the pixels of the second pixel group in opposite directions;
A first horizontal transfer unit provided on one transfer destination side of the vertical transfer unit;
A second horizontal transfer unit provided on the other transfer destination side of the vertical transfer unit;
An auxiliary transfer unit that is continuously provided on at least one output side of the first and second horizontal transfer units, and transfers signal charges output from the one side in at least one transfer direction of the vertical transfer unit;
The signal charge supplied directly from one of the first and second horizontal transfer units and from the other via the auxiliary transfer unit, or the auxiliary transfer unit from both the first and second horizontal transfer units An imaging device using a solid-state imaging device comprising: a single output unit that outputs an electrical signal corresponding to a signal charge supplied via the electrical signal.

Images