JP2009237326A - Optical integrated circuit module, optical bench used for optical integrated circuit module and method of manufacturing optical integrated circuit module - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an optical integrated circuit module of which the yield is improved, an optical bench used for the module and a method of manufacturing the optical integrated circuit module. <P>SOLUTION: The optical integrated circuit module 1 is manufactured by optically connecting a plurality of semiconductor waveguides 8 of an LD array 2 and a plurality of optical waveguides 9 of a plane optical wave circuit 5 by abutting the end face 4 of an SOB (silicon optical bench) 3 as an optical bench on which the LD array 2 is mounted and the end face 7 of a PLC 6 as an optical waveguide element on which the plane optical wave circuit 5 is formed. In the optical integrated circuit module 1, the end face 4 of the SOB 3 is polished to a surface roughness smaller than the surface roughness cut with a dicer. Namely, by finishing by polishing the end face 4 of the SOB 3, the positional accuracy of the end face 4 is enhanced and the error ΔZ of the end face distance Z is reduced. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an end face of an optical bench on which a semiconductor waveguide element is mounted and an end face of an optical waveguide element on which a planar lightwave circuit (PLC) is formed, The present invention relates to an optical integrated circuit module in which optical waveguides of a planar lightwave circuit are optically connected, an optical bench used in the module, and a method for manufacturing the optical integrated circuit module.

  Attempts have been made to develop hybrid devices (optical integrated circuit modules) in which different types of waveguide materials (waveguide elements) such as semiconductor waveguide elements and silica-based optical waveguide elements are optically connected. Since the optical coupling portion between different types of waveguide elements has a small mode diameter of the waveguide of each waveguide element (the semiconductor waveguide of the semiconductor waveguide element and the optical waveguide of the optical waveguide element), and the height of the waveguide is also different, It is necessary to align the waveguides with high accuracy.

Conventionally, a method has been studied in which a terrace-type reference portion is provided on a Si substrate so that the height of the semiconductor waveguide of the semiconductor waveguide device and the height of the optical waveguide of the planar lightwave circuit are matched (for example, see Patent Document 1).
JP 2002-031731 A

  By the way, forming the terrace-type reference portion on the Si substrate as in the prior art disclosed in Patent Document 1 is structurally difficult to manufacture and cannot guarantee a high yield, so it is simpler and has a higher yield. A technology that can guarantee the above is desired.

  Further, the end face of the semiconductor waveguide element mounted on the optical bench such as the Si substrate and the end face of the optical waveguide element (PLC substrate) on which the planar lightwave circuit is formed are brought into contact with each other, so that the semiconductor waveguide and the plane of the semiconductor waveguide element are planar. When optical waveguides of a lightwave circuit are optically connected, it is conceivable to cut the end face of the optical bench with a dicer. In this case, there is a concern that the precision of the end face distance between the end face of the semiconductor waveguide element and the end face of the optical waveguide element may be affected by the cutting accuracy of the dicer.

  The present invention has been made in view of such conventional problems, and an object of the present invention is to provide an optical integrated circuit module capable of improving the yield, an optical bench used for the module, and an optical integrated circuit module. It is to provide a manufacturing method.

  In order to solve the above-described problem, an optical module according to the invention described in claim 1 is configured such that an end face of an optical bench on which a semiconductor waveguide element is mounted and an end face of an optical waveguide element on which a planar lightwave circuit is formed are brought into contact with each other. An optical integrated circuit module in which a semiconductor waveguide of a semiconductor waveguide element and an optical waveguide of a planar lightwave circuit are optically connected, wherein the end surface of the optical bench has a surface roughness smaller than the surface roughness cut by a dicer It is characterized by being a polished surface.

  According to this configuration, (1) the end surface of the optical bench that is abutted with the end surface of the optical waveguide element is a surface with better processing accuracy than the end surface cut by the dicer. For this reason, when the end surface of the optical bench is abutted against the end surface of the optical waveguide element, the end surface of the semiconductor waveguide element, for example, the light emitting surface of the laser diode or the light incident surface (light receiving surface) of the photodiode, and the optical waveguide element The error ΔZ of the end face distance Z between the end faces can be reduced. As a result, variation in coupling loss ΔC between the semiconductor waveguide of the optically connected semiconductor waveguide element and the optical waveguide of the planar lightwave circuit can be reduced, and the yield when manufacturing the optical integrated circuit module is improved. can do. (2) In general, since the surface cut by the dicer is very rough and the surface roughness is large, the end surface of the optical bench cut by the dicer and the end surface of the optical waveguide element are brought into contact with each other and bonded to the optical bench. When connecting the optical waveguide element and the optical waveguide element, the reliability of adhesion is poor. Further, chipping occurs in the adhesive applied to the cut surface, and scratches and cracks are likely to occur from this, and the reliability of adhesion is also poor in this respect. On the other hand, according to this configuration, since the end surface of the optical bench is a surface polished to a surface roughness smaller than the surface roughness cut by the dicer, the reliability of adhesion is improved. At the same time, chipping does not easily occur in the adhesive applied to the polished surface, and the occurrence of scratches and cracks can be suppressed, so that the reliability of bonding is also improved in this respect.

  In order to solve the above problems, an optical bench used in an optical integrated circuit module according to the invention of claim 2 is an optical waveguide device in which an end surface of an optical bench on which a semiconductor waveguide device is mounted and a planar lightwave circuit are formed. An optical bench used for an optical integrated circuit module in which a semiconductor waveguide of a semiconductor waveguide device and an optical waveguide of a planar lightwave circuit are optically connected to each other, the surface on which the semiconductor waveguide device is mounted Further, a polishing marker for visually confirming the remaining dimension from the end face of the optical bench to the target finish position is formed.

  According to this configuration, when polishing the end face of the optical bench that is abutted with the end face of the optical waveguide element, the remaining dimensions from the end face of the optical bench to the target finish position are visually confirmed with a microscope or the like. As a result, the end face of the optical bench can be precisely processed by polishing to the target finish position. Thereby, when the end face of the optical bench is brought into contact with the end face of the optical waveguide element, the error ΔZ of the end face distance Z between the end face of the semiconductor waveguide element and the end face of the optical waveguide element can be reduced. As a result, variation in coupling loss ΔC between the semiconductor waveguide of the optically connected semiconductor waveguide element and the optical waveguide of the planar lightwave circuit can be reduced, and the yield when manufacturing the optical integrated circuit module is improved. can do.

  The optical bench according to a third aspect of the invention is characterized in that the polishing marker is a step-like member in which a plurality of steps shifted by a predetermined interval in the polishing direction are continuous in a plan view.

  According to this configuration, the stepped member that is a polishing marker is visually confirmed with a microscope or the like, and by checking to what level a plurality of steps of the member is cut with a dicer, The remaining dimensions from the end face to the target finish position can be known. Depending on the size of the remaining dimensions, the size and polishing rate of the abrasive grains used for polishing can be determined, so that the processing accuracy of the end face by polishing can be improved and the processing time can be shortened.

  In the optical bench according to the invention described in claim 4, the polishing marker is an aggregate in which a plurality of rectangular or linear members are arranged with a certain interval shifted in the polishing direction in plan view. It is characterized by.

  According to this configuration, an assembly of a plurality of rectangular or linear members, which are polishing markers, is visually recognized with a microscope or the like, and up to which member of the plurality of rectangular or linear members is cut with a dicer. The remaining dimensions from the end surface of the optical bench to the target finish position can be known by confirming whether or not Depending on the size of the remaining dimensions, the size and polishing rate of the abrasive grains used for polishing can be determined, so that the processing accuracy of the end face by polishing can be improved and the processing time can be shortened.

  An optical bench according to a fifth aspect of the invention is characterized in that the polishing markers are formed on both the left and right sides of the position where the semiconductor waveguide element is mounted.

  According to this configuration, by visually observing the polishing markers on both the left and right sides of the position where the semiconductor waveguide element is mounted with a microscope or the like, the left and right sides of the position where the semiconductor waveguide element is mounted are viewed from the end face of the optical bench. You can know the remaining dimensions to the target finish position. Thereby, the parallelism of the end surface of an optical bench and the end surface of a semiconductor waveguide element improves. As a result, the coupling loss variation ΔC between the semiconductor waveguide of the optically connected semiconductor waveguide element and the optical waveguide of the planar lightwave circuit can be further reduced, and the yield in manufacturing the optical integrated circuit module can be reduced. Further improvement can be achieved.

  The optical bench according to claim 6 is a wiring pattern which is a transmission path for transmitting an electrical signal between the semiconductor waveguide element and the electronic element on a surface on which the semiconductor waveguide element is mounted. And a solder film on which the semiconductor waveguide element is mounted.

  In order to solve the above-mentioned problem, an optical integrated circuit module manufacturing method according to the invention described in claim 7 is an optical waveguide element in which an end face of an optical bench on which a semiconductor waveguide element is mounted and a planar lightwave circuit is formed. A method for producing an optical integrated circuit module in which a semiconductor waveguide element and an optical waveguide of a planar lightwave circuit are optically connected to each other by matching an end surface, and the end surface of the optical bench is cut with a dicer, and after the cutting, The cut end surface of the optical bench is polished to a target finish position.

  According to this configuration, (1) the end surface of the optical bench that is abutted with the end surface of the optical waveguide element is polished since the end surface of the optical bench is polished to a target finish position after the end surface of the optical bench is cut with a dicer. The surface becomes better in processing accuracy than the end surface cut by the dicer. For this reason, when the end face of the optical bench is brought into contact with the end face of the optical waveguide element and bonded, the error ΔZ of the end face distance Z between the end face of the semiconductor waveguide element and the end face of the optical waveguide element can be reduced. . As a result, variation in coupling loss ΔC between the semiconductor waveguide of the optically connected semiconductor waveguide element and the optical waveguide of the planar lightwave circuit can be reduced, and the yield when manufacturing the optical integrated circuit module is improved. can do. (2) Since the polished end face of the optical bench has a surface roughness smaller than the surface roughness cut by the dicer, the reliability of adhesion is improved. At the same time, chipping is unlikely to occur in the adhesive applied to the polished surface, and the occurrence of scratches and cracks can be suppressed. Adhesion reliability is improved.

  An optical integrated circuit module manufacturing method according to an eighth aspect of the present invention is the semiconductor integrated circuit module, wherein after the end surface of the optical bench is cut with a dicer, the remaining dimension from the cut end surface of the optical bench to a target finish position is determined by the semiconductor. The polishing marker formed on the surface of the optical bench on which the waveguide element is mounted is visually recognized and grasped, and then the end face of the optical bench is polished by the grasped remaining dimension.

  According to this configuration, after cutting the end face of the optical bench with a dicer, when polishing the end face of the optical bench that is abutted with the end face of the optical waveguide element, the remaining dimension from the end face of the optical bench to the target finish position is Since the polishing marker can be visually confirmed, the end surface of the optical bench can be accurately processed by polishing to the target finish position. Thereby, when the end face of the optical bench is brought into contact with the end face of the optical waveguide element and bonded, the error ΔZ of the end face distance Z between the end face of the semiconductor waveguide element and the end face of the optical waveguide element can be reduced. As a result, the variation ΔC in coupling loss between the semiconductor waveguide of the optically connected semiconductor waveguide element and the optical waveguide of the planar lightwave circuit can be reduced.

  According to the present invention, it is possible to realize an optical integrated circuit module capable of improving the yield.

Next, embodiments embodying the present invention will be described with reference to the drawings.
(First embodiment)
First, an optical integrated circuit module 1 according to a first embodiment of the present invention will be described with reference to FIG.

  The optical integrated circuit module 1 includes an end face 4 of a silicon (Si) optical bench (SOB) 3 as an optical bench on which a semiconductor laser diode array (LD array) 2 as a semiconductor waveguide element is mounted, and a planar lightwave circuit 5. A plurality of semiconductor waveguides 8 of the LD array 2 and a plurality of optical waveguides 9 of the planar lightwave circuit 5 are optically matched with an end face 7 of a silica-based optical waveguide element (PLC) 6 as an optical waveguide element formed with Is an optical module connected to The LD array 2 is, for example, a semiconductor laser diode array in which a plurality of distributed feedback (DFB) semiconductor laser diodes are arranged in a line.

  In this way, the optical integrated circuit module 1 in which the end surface 4 of the SOB 3 and the end surface 7 of the PLC 6 are abutted and the plurality of semiconductor waveguides 8 of the LD array 2 and the plurality of optical waveguides 9 of the planar lightwave circuit 5 are optically connected. When manufacturing, it is necessary to bring the end face 7 of the PLC 6 and the end face 4 of the SOB 3 into contact with each other (L = 0) in order to obtain a reference point.

  Therefore, when the optical integrated circuit module 1 is manufactured, the end face distance Z between the end face 7 of the PLC 6 and the end face 10 of the LD array 2 is determined by Z = D + L, but at the position of the end face 4 of the SOB 3. When the error ΔL occurs, the error of the end face distance Z is affected.

  Therefore, in the optical integrated circuit module 1 according to the first embodiment, the end surface 4 of the SOB 3 is a surface polished to a surface roughness smaller than the surface roughness cut by the dicer. That is, in the optical integrated circuit module 1, the end face 4 of the SOB 3 is finished by polishing, thereby increasing the positional accuracy of the end face 4 and reducing the error ΔZ of the end face distance Z.

  FIG. 2 shows the relationship between the error ΔZ of the end face distance Z and the variation ΔC of the coupling loss C. From FIG. 2, by increasing the positional accuracy of the end face 4 and reducing the error ΔZ of the end face distance Z, a plurality of semiconductor waveguides 8 of the LD array 2 optically connected and a plurality of optical waveguides of the planar lightwave circuit 5 are obtained. It can be seen that the variation ΔC in the coupling loss C with respect to 9 can be kept small.

The PLC 6 is manufactured as follows.
A silica material (SiO ₂ -based glass particles) serving as a lower cladding layer and a core layer is deposited on a Si substrate by flame deposition (FHD), and heated to melt and transparentize the glass film. Thereafter, a desired plurality of optical waveguides 9 are formed by photolithography and reactive ion etching, and an upper cladding is formed again by the FHD method.

  Next, the optical bench according to the first embodiment used in the optical integrated circuit module 1 shown in FIG. 1 will be described with reference to FIG.

  In the SOB 3 as the optical bench shown in FIG. 3, polishing markers 20 and 21 for visually confirming the remaining dimensions from the end surface of the SOB 3 to the target finish position are formed on the surface 3a on which the LD array 2 is mounted. Has been. The target finish position is the position indicated by the polishing target line 30 in FIG.

  Further, on the surface 3a of the SOB 3, a wiring pattern 22, which is a transmission path for transmitting an electric signal between each DFB semiconductor laser diode (LD) of the LD array 2 and a driver IC as an electronic element (not shown), 23 and a solder film 24 on which the LD array 2 is mounted. In FIG. 3, reference numeral “31” denotes a dicing line for separating one chip of SOB 3 from one silicon (Si) wafer by a dicer.

  The polishing markers 20 and 21 are formed on the left and right sides of the solder film 24 on which the LD array 2 is mounted. As shown in FIG. 4A, the left polishing marker 20 is a step-like member in which a plurality of steps shifted by a predetermined distance d in the polishing direction indicated by an arrow 25 in FIG. is there. Similarly, as shown in FIG. 4B, the right polishing marker 21 is a step-like member in which a plurality of steps shifted by a fixed distance d in the polishing direction are continuous in a plan view. The constant interval d is, for example, 1 μm or several μm. Each of the polishing markers 20 and 21 is formed on the surface 3a of the SOB 3 by a metal vapor deposition method such as a sputtering method.

  Each of the plurality of wiring patterns 22 and 23 is, for example, an electrode film (Ti / Ni / Au) in which Ti, NI, and Au are sequentially stacked from the surface 3a side of the SOB 3. The solder film 24 is formed by stacking Au and Sn sequentially from the surface 3a side of the SOB 3. Both end portions of the Au layer of the solder film 24 are electrically connected to the two wiring patterns 22.

  For example, the LD array 2 is mounted (flip chip mounting) by soldering the back electrode (common electrode) of the substrate to the Sn layer of the solder film 24. As a result, the back electrode of the LD array 2 is electrically connected to the negative electrode of the power source (not shown) via the two wiring patterns 22.

  On the other hand, a plurality of independent upper electrodes respectively corresponding to a plurality of LDs are formed on the surface of the LD array 2. The plurality of upper electrodes are electrically connected to the corresponding plurality of wiring patterns 23 by wires (not shown). As a result, the modulation signal is input from the driver IC that drives the LD array 2 to the plurality of LDs of the LD array 2 via the plurality of wiring patterns 23 and the plurality of wires (not shown), respectively. The optical signal modulated by is emitted and optically coupled to the plurality of optical waveguides 9 of the PLC 6.

Next, a manufacturing method of the optical integrated circuit module 1 shown in FIG. 1 will be described.
The optical integrated circuit module 1 is manufactured as follows.
(Step 1) First, the LD array 2 is mounted on the solder film 24 of SOB 3 (see FIG. 1).
(Step 2) Next, the end face of the SOB 3 is cut with a dicer.
(Step 3) Next, the end face of the cut SOB 3 is polished to the target finish position indicated by the polishing target line 30 in FIG.

In this step 3, first, the remaining dimensions from the end face of the SOB 3 cut by the dicer to the target finish position are grasped by visually observing the polishing markers 20 and 21 formed on the surface 3a of the SOB 3 with a microscope. Thereafter, the end surface of the SOB 3 is polished by the remaining dimension ascertained.
By this polishing, the end surface of the SOB 3 becomes the end surface 4 (see FIG. 1) polished to a surface roughness smaller than the surface roughness cut by the dicer.

  (Step 4) Next, the PLC 6 is moved with respect to the LD array 2 to actively align the plurality of optical waveguides 9 of the PLC 6 with respect to the plurality of semiconductor waveguides 8 of the LD array 2.

  (Step 5) After this alignment, a UV curable adhesive is applied between the end face 4 of the SOB 3 and the end face 7 of the PLC 6, and the UV curable adhesive is irradiated with UV light to cure the entire UV curable adhesive.

  As a result, the SOB 3 on which the LD array 2 is mounted and the PLC 6 are combined to complete the optical integrated circuit module 1. The combined SOB 3 and PLC 6 may be fixed on a substrate for reinforcement.

According to 1st Embodiment comprised as mentioned above, there exist the following effects.
In the optical integrated circuit module 1 according to the first embodiment, the end surface 4 of the SOB 3 is a surface polished to a surface roughness smaller than the surface roughness cut by the dicer. That is, in the optical integrated circuit module 1, the end face 4 of the SOB 3 is finished by polishing, thereby increasing the positional accuracy of the end face 4 and reducing the error ΔZ of the end face distance Z. As a result, the end surface 4 of the SOB 3 as the optical bench that is abutted against the end surface 7 of the PLC 6 as the optical waveguide element becomes a surface with better processing accuracy than the end surface cut by the dicer. Therefore, when the end face 4 of the SOB 3 is abutted against the end face 7 of the PLC 6, the error ΔZ of the end face distance Z between the end face 10 of the LD array 2 that is the light emission face of each LD and the end face 7 of the PLC 6 is reduced. can do. As a result, variation in coupling loss ΔC between the plurality of semiconductor waveguides 8 of the optically connected LD array 2 and the plurality of optical waveguides 9 of the planar lightwave circuit 5 can be suppressed, and the optical integrated circuit module 1 can be reduced. The yield at the time of manufacturing can be improved.

  ○ Since the end surface 4 of SOB3 is a surface polished to a surface roughness smaller than the surface roughness cut by a dicer, the end surface 4 of SOB3 and the end surface 7 of PLC 6 were brought into contact with each other, and a UV curing adhesive was used. When bonding the optical bench and the optical waveguide element by bonding, the reliability of bonding is improved.

  ○ Chipping is unlikely to occur in the UV curable adhesive applied to the polished end face 4 of SOB3, and the occurrence of scratches and cracks can be suppressed. This also improves the reliability of bonding.

  In the SOB 3 as the optical bench according to the first embodiment, the remaining dimension from the end surface 4 of the SOB 3 to the target finish position indicated by the polishing target line 30 in FIG. Polishing markers 20 and 21 for confirmation are formed. With this configuration, when polishing the end surface of the SOB 3 that is abutted against the end surface 7 of the PLC 6, the remaining dimensions from the end surface of the SOB 3 to the target finish position can be confirmed by visually observing the polishing markers 20 and 21 with a microscope or the like. The end face 4 of the SOB 3 can be accurately processed by polishing to the target finish position. Thus, when the end face 4 of the SOB 3 is abutted against the end face 7 of the PLC 6, the error ΔZ of the end face distance Z between the end face 10 of the LD array 2 and the end face 7 of the PLC 6 can be reduced. As a result, variation in coupling loss ΔC between each semiconductor waveguide 8 of the optically connected LD array 2 and each optical waveguide 9 of the planar lightwave circuit 5 can be suppressed, and the optical integrated circuit module 1 is manufactured. The yield at the time can be improved.

  ○ The polishing markers 20 and 21 of SOB3 are step-like members in which a plurality of steps shifted by a predetermined interval in the polishing direction are continuous in a plan view. With this configuration, the stepped members that are the polishing markers 20 and 21 are visually confirmed with a microscope or the like, and by checking to what level the plurality of steps of the members are cut with a dicer, the SOB3 The remaining dimensions from the end face 4 to the target finish position can be known. Depending on the size of the remaining dimensions, the size and polishing rate of the abrasive grains used for polishing can be determined, so that the processing accuracy of the end face 4 by polishing can be improved and the processing time can be shortened.

  ○ The polishing markers 20 and 21 of SOB3 are formed on the left and right sides of the position (solder film 24) where the LD array 2 is mounted. With this configuration, by visually observing the polishing markers 20 and 21 with a microscope or the like, the remaining dimensions from the end face 4 of the SOB 3 to the target finish position can be known on both the left and right sides of the solder film 24 on which the LD array 2 is mounted. . Thereby, the parallelism between the end face 4 of the SOB 3 and the end face 10 of the LD array 2 is improved. As a result, the variation ΔC in coupling loss between the plurality of semiconductor waveguides 8 of the optically connected LD array 2 and the plurality of optical waveguides 9 of the planar lightwave circuit 5 can be further reduced, and the optical integrated circuit module 1 The yield in manufacturing can be further improved.

  In the method of manufacturing the optical integrated circuit module 1 according to the first embodiment, the end surface of the SOB 3 is cut with a dicer, and after the cutting, the end surface of the SOB 3 is polished to the target finish position. With this configuration, the end surface 4 of the SOB 3 becomes a surface with better processing accuracy than the end surface cut by the dicer. For this reason, the dispersion loss ΔC between the plurality of semiconductor waveguides 8 of the optically connected LD array 2 and the plurality of optical waveguides 9 of the planar lightwave circuit 5 can be suppressed, and the optical integrated circuit module 1 can be reduced. The yield at the time of manufacturing can be improved.

  Further, by this manufacturing method, the end surface 4 of the SOB 3 is a surface polished to a surface roughness smaller than the surface roughness cut by the dicer, so the end surface 4 of the SOB 3 and the end surface 7 of the PLC 6 are brought into contact with each other, and the UV When the optical bench and the optical waveguide element are bonded by bonding using a hardened adhesive, the reliability of bonding is improved. Furthermore, this manufacturing method makes it difficult for chipping to occur in the UV curable adhesive applied to the end face 4 of the polished SOB 3 and suppresses the occurrence of scratches and cracks, so that the reliability of adhesion is improved in this respect as well.

(Second Embodiment)
Next, an optical bench according to the second embodiment used in the optical integrated circuit module 1 shown in FIG. 1 will be described with reference to FIG.

  In the optical bench according to the present embodiment, the left polishing marker 20A corresponding to the left polishing marker 20 among the left and right polishing markers 20 and 21 shown in FIG. Thus, a plurality of rectangular or linear members 40 are aggregates arranged at regular intervals in the polishing direction indicated by the arrow 25 in FIG. Similarly, among the polishing markers 20 and 21, the right polishing marker (not shown) corresponding to the right polishing marker 21 also has a plurality of rectangular or linear members fixed in the polishing direction in plan view. It is an aggregate arranged with an interval of.

  According to the optical bench according to the second embodiment, an assembly of a plurality of members 40 that are polishing markers 20A is visually recognized with a microscope or the like, and up to which member 40 of the plurality of members 40 is cut with a dicer. By confirming, it is possible to know the remaining dimension from the end face of the SOB 3 to the target finish position. Depending on the size of the remaining dimensions, the size and polishing rate of the abrasive grains used for polishing can be determined, so that the processing accuracy of the end face of the SOB 3 by polishing can be improved and the processing time can be shortened.

In addition, this invention can also be changed and embodied as follows.
In each of the above embodiments, the LD array 2 is used as the semiconductor waveguide element. However, in addition to the semiconductor laser diode, the “semiconductor waveguide element” includes a semiconductor optical amplifier (SOA), a semiconductor electric field, and the like. It includes an electro-absorption type (Elcctro Absorption: EA) modulator using an absorption effect, a semiconductor light receiving element, and the like.

  In each of the above embodiments, the optical integrated circuit module using the LD array 2 as the semiconductor waveguide element has been described. However, as the semiconductor waveguide element, one semiconductor laser diode or one semiconductor optical amplifier, one electroabsorption type is used. (Elcctro Absorption: EA) The present invention can also be applied to an optical integrated circuit module having a configuration using a modulator or one semiconductor light receiving element, an optical bench used in the optical integrated circuit module, and a method of manufacturing the optical integrated circuit module. It is.

1 is a side view showing a schematic configuration of an optical integrated circuit module according to a first embodiment. 2 is a graph showing a relationship between an error ΔZ of an end face distance Z and a variation ΔC in coupling loss C in the optical integrated circuit module shown in FIG. The top view which shows SOB which is the optical bench which concerns on 1st Embodiment. (A) is an enlarged view showing the left polishing marker shown in FIG. 3, (B) is an enlarged view showing the right polishing marker shown in FIG. The enlarged view which shows the marker for grinding | polishing on the left side of SOB which is an optical bench which concerns on 2nd Embodiment.

Explanation of symbols

1: Optical integrated circuit module 2: Semiconductor laser diode array (LD array)
3: SOB (silicon optical bench) as an optical bench
3a: surface 4: SOB end face 5: planar lightwave circuit 6: PLC as an optical waveguide device
7: PLC end face 8: Semiconductor waveguide 9: Optical waveguide 10: LD array end face 20, 21: Polishing marker 22, 23: Wiring pattern 24: Solder film 30: Polishing target line 40 indicating the target finish position: rectangular Shaped or linear member

Claims (8)

The end face of the optical bench on which the semiconductor waveguide element is mounted and the end face of the optical waveguide element on which the planar lightwave circuit is formed are brought into contact with each other to optically connect the semiconductor waveguide of the semiconductor waveguide element and the optical waveguide of the planar lightwave circuit. An optical integrated circuit module,
The optical integrated circuit module according to claim 1, wherein an end surface of the optical bench is a surface polished to a surface roughness smaller than a surface roughness cut by a dicer. The end face of the optical bench on which the semiconductor waveguide element is mounted and the end face of the optical waveguide element on which the planar lightwave circuit is formed are brought into contact with each other to optically connect the semiconductor waveguide of the semiconductor waveguide element and the optical waveguide of the planar lightwave circuit. An optical bench used for an optical integrated circuit module,
An optical bench, wherein a polishing marker for visually confirming a remaining dimension from an end surface of the optical bench to a target finish position is formed on a surface on which the semiconductor waveguide element is mounted.   3. The optical bench according to claim 2, wherein the polishing marker is a stepped member in which a plurality of steps shifted by a predetermined interval in the polishing direction are continuous in a plan view.   3. The optical bench according to claim 2, wherein the polishing marker is an assembly in which a plurality of rectangular or linear members are arranged with a certain interval shifted in the polishing direction in a plan view.   The optical bench according to any one of claims 2 to 4, wherein the polishing markers are formed on both left and right sides of a position where the semiconductor waveguide element is mounted.   On the surface on which the semiconductor waveguide element is mounted, a wiring pattern which is a transmission path for transmitting an electrical signal between the semiconductor waveguide element and the electronic element, and a solder film on which the semiconductor waveguide element is mounted The optical bench according to claim 2, wherein the optical bench is provided. An optical integrated circuit in which an end face of an optical bench on which a semiconductor waveguide element is mounted and an end face of an optical waveguide element on which a planar lightwave circuit is formed are connected to each other and the semiconductor waveguide element and the optical waveguide of the planar lightwave circuit are optically connected A module manufacturing method,
Cutting the end face of the optical bench with a dicer,
After the cutting, the cut end surface of the optical bench is polished to a target finish position. After cutting the end face of the optical bench with a dicer, the remaining dimension from the cut end face of the optical bench to the target finish position is used for polishing formed on the surface of the optical bench on which the semiconductor waveguide element is mounted. Visually grasp the marker,
8. The method of manufacturing an optical integrated circuit module according to claim 7, wherein the end face of the optical bench is polished by the grasped remaining dimension.

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