JP2009230590A - Arithmetic device for executing distributed processing, server and distributed processing method - Google Patents

Abstract

Synchronous control is performed such that even if computation of a distributed processing system is temporarily stopped, a computation result of a computing device constituting the distributed processing system does not shift.
When a request for suspension of distributed processing is received from a server, an arithmetic processing suspension unit that stops the arithmetic device and a distributed processing provided for each arithmetic device from the server when the distributed processing stops. Based on the calculation time step reference notification that refers to the value of the counter that counts the calculation progress, the counter value acquired from the calculation time step reference unit that acquires the counter value and transmits it to the server, and the calculation time step reference unit for each calculation device An operation end time step update unit that obtains from the server the time step maximum value obtained by adding 1 count to the maximum counter value detected by detecting the maximum value from the server and records it in the register, and an operation that resumes the distributed processing from the stopped state A resuming unit, and resumes the distributed processing to advance to the time step maximum value, and then stops the distributed processing again.
[Selection] Figure 1

Description

  The present invention relates to a technique for synchronous control of time steps of a distributed processing apparatus.

  In recent years, when executing a program such as an SPMD (single program multiple data) type program in a distributed processing system environment, after confirming the progress after execution, the program is stopped synchronously in order to continue execution. There is a need to want.

  Conventionally, when an SPMD type program is stopped synchronously, it has been realized by using a message passing or a synchronization function between computers by a computer (server) equipped with a general-purpose OS (Operating System).

  FIG. 7 is a diagram showing a configuration of a distributed processing system in the case where synchronization is realized by exchange between conventional computers (servers). The distributed processing system 70 includes four servers A (71a), a server B (71b), a server C (71c), and a server D (71d). Each server AD (71a-71d) has CPU72 (72a-72d) and OS74 (74a-74d), and each CPU has the calculating part 73 (73a-73d). The calculation unit 73 performs calculation processing, and the OS 74 performs control of the servers A to D (71a, 71b, 71c, 71d) themselves and each server.

  SPMD type programs P0 (P1, P2, P3, P4) are respectively installed in the servers A to D (71a to 71d), and the servers 71b, 71c, and 71d are stored using data D1 to D3 input from the outside. Perform the operations assigned to each. Server A (71a), as a parent server, communicates with other servers B to D (71b, 71c, 71d) to send and receive commands and data. Communication is also performed between the other servers B to D (71b, 71c, 71d).

  Normally, in the distributed processing system configured as described above, when the user confirms the progress of the computation, the user outputs a computation suspension command from the OS 74a of the server A (71a) which is the parent server. It is transmitted to the OS 74b, 74c, 74d of each server BD (71b, 71c, 71d). After that, each of the servers A to D (71a, 71b, 71c, 71d) that has received the calculation pause command stops the calculation after preparing for the pause.

FIG. 8 is a diagram for explaining the operation of the distributed processing system shown in FIG.
In step S81, the server A (71a) instructs the server B (71b) to start computation (server B computation start notification). In step S82, the server B (71b) receives the server B calculation start notification and starts executing the program P0 from the timing of step S83.

  Next, in step S84, the server A (71a) instructs the server C (71c) to start computation (server C computation start notification). In step S85, the server C (71c) receives the server C calculation start notification and starts executing the program P0 from the timing of step S86.

Similarly, in step S87, server A (71a) instructs server D (71d) to start computation (server D computation start notification). In step S88, the server D (71d) receives the server D calculation start notification, and starts executing the program P0 from the timing of step S89.

At the timing of step S810, the server A (71a) is in a standby state until the calculations of the other servers B to D (71b to 71d) are completed.
In step S814, the calculation of the server B (71b) ends, and a server B calculation end notification is transmitted from the server B (71b). At the timing of step S815, the server A (71a) receives the server B calculation end notification. Next, in step S816, the calculation of the server C (71c) ends, and a server C calculation end notification is transmitted from the server C (71c). At the timing of step S817, the server A (71a) receives a server C calculation end notification. Similarly, in step S818, the calculation of server D (71d) ends, and a server D calculation end notification is transmitted from server D (71d). At the timing of step S819, the server A (71a) receives the server D calculation end notification.

  At the timing of step S820, the server A (71a) determines that the computations of the other servers B to D (71b to 61d) have ended, and exits the standby state. In step S821, the following program is executed.

  However, when the execution of the SPMD type program is controlled by the OS (software) as described above, if each of the servers A to D (71a to 71d) pauses the computation, each of the servers A to D (71a to 71a) There is a problem that a deviation occurs in the calculation result executed in 71d).

Patent Documents 1 and 2 propose a synchronization process between servers using an FPGA.
JP 11-31148 A Japanese Patent Laid-Open No. 02-090357

  It is an object of the present invention to perform synchronous control that does not cause a deviation in the calculation results of the calculation devices constituting the distributed processing device even if the calculation of the distributed processing device is temporarily stopped.

  An arithmetic processing pause unit that is a plurality of arithmetic devices that execute distributed processing connected to a server that is one of the aspects, and that stops the arithmetic device when a request for suspension of the distributed processing is received from the server And when the distributed processing is stopped, the counter value is acquired based on a calculation time step reference notification that refers to the value of the counter that counts the calculation progress of the distributed processing provided for each of the arithmetic devices from the server. An arithmetic time step reference unit to be transmitted to the server, and a maximum value is detected from the counter value acquired from the arithmetic time step reference unit for each arithmetic device, and at least one count is added to the detected maximum value of the counter value An operation end time step update unit that obtains the maximum value of the time step obtained from the server and records it in a register, and a stop And a resuming operation resumption section the distributed processing from the state, stopping the dispersion treatment resumed to re-dispersion treatment from advancing to the time step maximum value.

  By providing an arithmetic device that is dedicated hardware as described above, an OS or the like is not required for the arithmetic device. In addition, since the arithmetic unit executes an arithmetic operation according to an instruction from the server, it is possible to easily match the entire system.

  Even when the computation of the distributed processing apparatus is temporarily stopped, it is possible to perform synchronous control that does not cause a deviation in the computation results of the computing apparatus constituting the distributed processing apparatus.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Example 1
FIG. 1 is a diagram showing a configuration of a distributed processing system including one computer (server: host PC or the like) and a plurality of dedicated hardware. A distributed processing system 1 shown in FIG. 1 includes a server 2 and a plurality of arithmetic devices 3 (3a, 3b, 3c˜: dedicated hardware). And the synchronization shift | offset | difference at the time of a calculation suspension in the case of performing distributed processing, such as an SPMD program, using the distributed processing system 1 shown in FIG. 1 is prevented.

  The synchronization deviation of the SPMD program will be described with reference to FIG. For example, the case of simulating fluid movement will be described. FIG. 2A shows a case where the movement of the fluid is divided into eight spaces and distributed processing is performed using four arithmetic devices (hardware 1 to hardware 4). The hardware 1 is in charge of operations in three spaces, the hardware 2 is in charge of operations in one space, the hardware 3 is in charge of operations in three spaces, and the hardware 4 is in charge of operations in one space.

  The vertical axis shown in FIG. 2B indicates the name of the arithmetic device, and the horizontal axis indicates the progress in the simulation (count value: time step). For example, it shows what state the fluid will be after 1 second, 2 seconds, and so on.

  When the hardware 1 to 4 start the distributed processing at the same time (count value = 0, real time = 0 seconds) and stop at the count value 3, the calculation progress of the arithmetic device having a large space in charge becomes slow. In FIG. 2B, if the hardware 2 advances the calculation to the count value 3, the progress of the hardware 1 becomes 1/3 because the amount of the space 1 is three times that of the hardware 2. In other words, when stopped in real time, the count values of hardware 1 and hardware 2 will be shifted.

Therefore, the calculation is executed until all the count values from hardware 1 to hardware 4 become the same, thereby eliminating the synchronization shift.
FIG. 3 shows the configuration of the server 2. The server 2 includes a communication unit 33, an OS 34 (Operating System), a calculation unit 35, a calculation data setting instruction unit 36, a calculation end time step setting instruction unit 37, a calculation start instruction unit 38, a calculation pause instruction unit 39, and a calculation time step. A reference instruction unit 310, a calculation end time step update instruction unit 311, a calculation resumption instruction unit 312, and a restart data acquisition instruction unit 313 are installed.

The communication unit 33 communicates with each arithmetic device 3 (3a to 3c).
The arithmetic unit 35 executes a program including an SPMD (single program multiple data) type program. Further, the calculation unit 35 has a maximum value time step calculation unit 314. Here, the SPMD program executed by the server 2 in FIG. 1 is a portion related to the program P1 in the program P0 described with reference to FIGS. Further, the server 2 transmits calculation data used for the SPMD program to each calculation device 3. In FIG. 1, calculation data D1 to D3 used for programs P2 to P4 in the SPMD program are transmitted. The server 2 also transfers an instruction to execute the SPMD program to each arithmetic device 3.

The arithmetic data setting instruction unit 36 generates an instruction to set arithmetic data input from an input device (not shown) connected to the server 2 to each arithmetic device 3.
The calculation end time step setting instruction unit 37 generates an instruction to set the time step for ending the simulation calculated by the distributed processing in each calculation device 3.

The calculation start instruction unit 38 generates a calculation start notification to instruct each calculation device 3 to start calculation.
The calculation pause instruction unit 39 generates a calculation pause notice for giving an instruction to each calculation device 3 when the simulation being calculated by the distributed processing is paused.

  The calculation time step reference instructing unit 310 generates a calculation time step reference notification used when referring to how far a calculation such as a simulation during distributed processing of each calculation device 3 has progressed.

  The calculation end time step update instruction unit 311 advances the value of the calculation end time step register 6 of each calculation device 3 in order to advance the calculation to the maximum value time step calculated by the maximum value time step calculation unit 314 described later. A calculation time step update notification for updating is generated.

The calculation restart instruction unit 312 generates a notification for releasing the temporary stop and starting the calculation again.
The restart data acquisition instruction unit 313 generates a notification for acquiring data including calculation data necessary for restarting the calculation.

  The computing device 3 includes a computing unit 4 (4a to 4c), a counter 5 (5a to 5c), a computation end time step register 6 (6a to 6c), and the like. For example, the arithmetic unit 3 uses the programmable integrated circuit or the like to construct the arithmetic unit 4 (4a to 4c), the counter 5 (5a to 5c), and the arithmetic end time step register 6 (6a to 6c). Control each part. Here, the programmable integrated circuit is an FPGA (Field Programmable Gate Array), a CPLD (Complex Programmable Logic Device), or the like, but is not limited to these devices.

  The arithmetic device 3 has a program assigned thereto, and a circuit is constructed based on the program. In FIG. 1, a program P2 is assigned to the arithmetic device 3a, a program P3 is assigned to the arithmetic device 3b, and a program P4 is assigned to the arithmetic device 3c. For example, when using an FPGA, data for circuit construction generated based on the programs P2, P3, and P4 is stored in a memory from an external device (such as a PC) to each arithmetic device 3, and the circuit is configured during configuration. To construct. Also, the data D1, D2, and D3 transmitted from the server 2 are received by the computing device 3 corresponding to the data, and computation is performed using the data.

  The counter 5 (5a to 5c) is a counter provided for controlling the synchronization of the server 2 and the arithmetic device 3, and is a counter that counts at predetermined time intervals. Here, the fixed time counted by the counter 5 is not actually measured by the system clock supplied to the CPU. For example, when the movement of the fluid is simulated at intervals of 1 second for 0 to 100 seconds, the amount of calculation is different if the movement of the fluid after 10 seconds is different from the movement after 11 seconds. If the movement of the fluid is more complicated after 11 seconds than after 10 seconds, the amount of calculation after 11 seconds is greater than the amount of calculation after 10 seconds. That is, the counter 5 is a counter that counts every time a calculation corresponding to a preset time is completed.

  The calculation end time step register 6 (6a to 6c) is a register for setting the count value of the counter 5 that ends the calculation, for example, when performing a simulation. Data to be set in the calculation end time step register 6 (calculation end time step) is input from the server 2.

FIG. 4 is a diagram illustrating a configuration of the arithmetic device 3.
The arithmetic device 3 includes an arithmetic unit 4, a counter 5, an arithmetic end time step register 6, and a communication unit 7.
, Control unit 8, memory 9, calculation data setting unit 10, calculation end time step setting unit 11, calculation start unit 12, calculation pause unit 13, calculation time step reference unit 14, calculation end time step update unit 15, calculation restart Unit 16 and restart data acquisition unit 17.

  The communication unit 7 transmits / receives computation data (data used by each computation device 3 for computation), control data (notification for controlling the computation device 3 itself, and notification for controlling computation) transmitted / received to / from the server 2. ) Including the communication control.

  The control unit 8 controls each unit (including 4 to 7 and 9 to 17 illustrated in FIG. 4) that configures the calculation device 3 based on the calculation data and control data received from the communication unit 7. The memory 9 records data such as calculation data and calculation results.

  The calculation data setting unit 10 sets calculation data and transfers the set calculation data to the calculation unit 4 via the control unit 8. The calculation data is set in the calculation data setting unit 10 by inputting calculation data necessary for distributed processing (such as an SPMD type program) from an input device (not shown) connected to the server 2 and the communication unit 7 and the control unit. 8 is set after being transferred to the calculation data setting unit 10 via 8. For example, the calculation data is recorded in a memory provided in the calculation data setting unit 10. Further, when the calculation is started, the calculation data setting unit 10 receives a request notification for transferring the set calculation data transmitted from the control unit 8 to the calculation unit 4 as necessary. Thereafter, the calculation data is transferred to the calculation unit 4 via the control unit 8 based on the request notification.

  The calculation end time step setting unit 11 controls the calculation end time step register 6 to set calculation end time step data indicating the time step at which the server 2 and each calculation device 3 end the distributed processing. Here, the time step corresponds to a value counted by the counter 5 described above. The calculation end time step data is input from the server 2 and transferred to the calculation end time step setting unit 11 via the communication unit 7 and the control unit 8. Thereafter, the calculation end time step setting unit 11 records the calculation end time step data in the calculation end time step register 6. Further, the control unit 8 refers to the calculation end time step data recorded in the calculation end time step register 6 and ends the calculation of the calculation unit 4.

  The calculation start unit 12 is used when starting calculation of distributed processing. When the calculation start notification is received from the server 2, the calculation units 4 of all the calculation devices 3 are started. The calculation start notification is transmitted from the server 2 and received by the communication unit 7, and is transmitted from the communication unit 7 to the calculation start unit 12 via the control unit 8. For example, if a calculation start flag is provided in the calculation start unit 12 and the content of the calculation start notification indicates calculation start, the calculation start flag is changed to a starting state, and the calculation unit 4 starts calculation of distributed processing. . Note that the value of the counter 5 may be set to the initial state by detecting the transition to the start state with reference to the calculation start unit 12 at the start of the calculation.

  The calculation pause unit 13 is used to pause during calculation of distributed processing. When the calculation suspension notification is received from the server 2, the calculation units 4 of all the calculation devices 3 are immediately stopped. The calculation suspension notification is transmitted from the server 2 and received by the communication unit 7, and is transmitted from the communication unit 7 to the calculation suspension unit 13 via the control unit 8. For example, a calculation pause flag is provided in the calculation pause unit 13, and if the content of the suspension notification of distributed processing indicates calculation pause, the calculation pause flag is changed to a paused state, and the calculation unit 4 Stop immediately. The calculation result calculated by the calculation unit 4 is also stored in the memory 9 or the like.

  The calculation time step reference unit 14 refers to the value of the counter 5 and detects up to which time step the calculation is currently executed. The calculation time step reference unit 14 acquires the value of the counter 5 and transfers it to the control unit 8. Then, the communication unit 7 transmits the value indicated by the time step temporarily stopped to the server 2 via the control unit 8.

  The calculation end time step update unit 15 receives the maximum time step value generated based on the time step value transmitted from each calculation device 3 when paused. When the calculation end time step update unit 15 receives the time step maximum value notification, the calculation end time step update unit 15 sets the time step indicated by the time step maximum value notification in the calculation end time step register via the calculation end time step setting unit 11. The time step maximum value is generated by the server 2. The maximum time step is selected from the time steps at the time of suspension of each arithmetic device 3 collected by the server 2, and at least one time step is further added to the selected maximum time step. For example, if the time step T1 when the arithmetic device 3a is temporarily stopped, the time step T2 when the arithmetic device 3b is stopped, and the time step T3 when the arithmetic device 3c is stopped, the maximum time step when stopping is T1. T1 + 1 is set to the maximum time step value and is included in the time step maximum value notification.

  The calculation restarting unit 16 restarts the temporarily stopped calculation and executes the calculation until the time step reaches the maximum value. The calculation resuming unit 16 refers to the calculation end time step register 6 to acquire the maximum time step value, notifies the calculation unit 4 via the control unit 8 of the calculation restart, and the calculation result temporarily stored in the memory. The data is notified to be transferred to the calculation unit.

The restart data acquisition unit 17 acquires data necessary for releasing the pause and starting the operation again after the pause (pause without synchronization deviation).
(Description of operation)
The operation of the distributed processing apparatus shown in FIG. 1 will be described with reference to FIG. However, for the sake of convenience, FIG. 5 will be described using the configuration of the server 2, the arithmetic device 3a (hardware 1), and the arithmetic device 3b (hardware 2).

  In step S1 to step S2, the OS and program of the server 2 are executed to perform distributed processing. Here, the program is a program including an SPMD (single program multiple data) type program.

  In step S3, calculation data is set from the input device connected to the server 2, and the calculation data is transmitted to the calculation device 3a. At this time, arithmetic device identification data for identifying the arithmetic device 3a is transmitted together with the arithmetic data.

In step S4, the calculation data transmitted from the server 2 is received by the communication unit 7 of the calculation device 3a and set in the calculation data setting unit 10 of the calculation device 3a.
In steps S5 and S6, calculation data is set in the calculation data setting unit 10 of the calculation device 3b in the same manner as in steps S3 and S4.

  In step S7, a computation end time step (T1_end) for finishing the computation of the distributed processing is set from the input device connected to the server 2, and the computation end time step is transmitted to the computation device 3a. At this time, computation device identification data for identifying the computation device 3a is transmitted together with the computation end time step setting notification.

In step S8, the calculation end time step transmitted from the server 2 is received by the communication unit 7 of the calculation device 3a and set in the calculation end time step setting unit 11 of the calculation device 3a.
In step S9 and step S10, the calculation end time step is set in the calculation end time step setting unit 11 of the calculation device 3b as in steps S7 and S8.

For example, when “100” is set in T1_end, when the time step (count of the counter 5) reaches 100, the arithmetic device 3a ends the distributed processing.
In step S11, a calculation start notification for starting calculation of distributed processing is set from the input device connected to the server 2, and the calculation start notification is transmitted to the calculation device 3a. At this time, the calculation device identification data for identifying the calculation device 3a is transmitted together with the calculation start notification.

  In step S12, the communication unit 7 of the calculation device 3a receives the calculation start notification transmitted from the server 2 and sets the calculation start unit 12 of the calculation device 3a to be in a state where the calculation is started, and then sets the calculation unit 4 Start the operation. Further, the counter value of the counter 5 is set to zero.

In steps S13 and S14, as in steps S11 and S12, the calculation start unit 12 of the calculation device 3b is set to be in a state where the calculation is started.
Next, the server 2 detects a calculation pause event. For example, the computation pause event is an event for temporarily halting computation in order to confirm a computation result in the middle of distributed processing.

  In step S15, a calculation pause notification is set in the server 2 to pause the distributed processing based on the calculation pause event, and the calculation pause notification is transmitted to the calculation device 3a. At this time, computation device identification data for identifying the computation device 3a is transmitted together with the computation suspension notification.

  In step S16, the communication unit 7 of the calculation device 3a receives the calculation suspension notification transmitted from the server 2, and the calculation suspension unit 13 of the calculation device 3a sets the calculation paused state. Further, the calculation of the calculation device 3a is stopped. Further, the counter 5 stops counting.

  In steps S17 and S18, as in steps S15 and S16, the calculation pause unit 13 of the calculation device 3b is set to be in a state where the calculation is temporarily stopped. Further, the calculation of the calculation device 3a is stopped.

At this time, the count value of the arithmetic device 3a is 6, and the count value of the arithmetic device 3b is 8.
In step S19, the calculation time step reference notification is set to confirm the time step when the server 2 is temporarily stopped, and the calculation time step reference notification is transmitted to the calculation device 3a. At this time, arithmetic device identification data for identifying the arithmetic device 3a is transmitted together with the arithmetic time step reference notification.

  In step S <b> 20, the communication unit 7 of the calculation device 3 a receives the calculation time step reference notification transmitted from the server 2, and the calculation time step reference unit 14 of the calculation device 3 a acquires the counter value of the counter 5.

In step S21, the count value is transmitted to the server 2 from the communication unit 7 of the arithmetic device 3a. In this example, 6 is transmitted as the count value.
In step S22, the communication unit of the server 2 acquires the count value of the arithmetic device 3a.

  In step S23, step S24, step S25, and step S26, the server 2 acquires the count value at the time of the temporary stop of the arithmetic device 3b similarly to steps S19 to S22. In this example, the server 2 acquires 8 as the count value.

In steps S27 to S28, the server 2 detects the maximum value from the counter values (time steps at the time of temporary stop) acquired from the respective arithmetic devices 3a and 3b. In this example, since the counter value 8 of the arithmetic device 3b is larger than the counter value 6 of the arithmetic device 3a, the count value 8 is selected. Then, 1 is added to the count value 8 to calculate the maximum time step value (Tend = 8 + 1). Here, the reason why 1 is added to the time step is that the calculation is stopped during the calculation.

  In step S29, the maximum time step value is transmitted from the communication unit of the server 2 to the arithmetic device 3a. At this time, arithmetic device identification data for identifying the arithmetic device 3a is transmitted together with the maximum time step value.

  In step S30, the communication unit 7 of the arithmetic device 3a receives the time step maximum value transmitted from the server 2, and the calculation end time step update unit 15 sets the time step maximum value in the calculation end time step register 6. In this example, the maximum time step value is set in the calculation end time step register 6, but another register may be provided instead of the calculation end time step register 6.

In steps S31 and S32, as in steps S29 and S30, the time step maximum value is acquired by the computing device 3b by transmission from the server 2.
In step S33, a computation resumption notification for resuming computation from the server 2 to the maximum time step value is transmitted to the computation device 3a. At this time, the calculation device identification data for identifying the calculation device 3a is transmitted together with the calculation restart notification.

  In step S34, the calculation restart notification is received by the communication unit 7 of the calculation device 3a, and the calculation resumed by the calculation restarting unit 16 is resumed, and the calculation is executed until the time step maximum value is reached.

In steps S35 and S36, as in steps S33 and S34, calculation is executed by the notification from the server 2 until the time step maximum value is reached in the calculation device 3b.
The arithmetic units 3a and 3b perform arithmetic operations up to the maximum time stamp value and automatically stop. Here, the time at which the arithmetic device 3a and the arithmetic device 3b are actually stopped differs depending on the amount of calculation.

  In step S37, it is confirmed that the server 2 has stopped by calculating up to the maximum time stamp value. The server 2 is set with a calculation time step reference notification in order to confirm the time step at the time of restart, and transmits the calculation time step reference notification to the calculation device 3a. At this time, arithmetic device identification data for identifying the arithmetic device 3a is transmitted together with the arithmetic time step reference notification.

  In step S38, the communication unit 7 of the calculation device 3a receives the calculation time step reference notification transmitted from the server 2, and the calculation time step reference unit 14 of the calculation device 3a acquires the counter value of the counter 5.

In step S39, the count value is transmitted to the server 2 from the communication unit 7 of the arithmetic device 3a. In this example, 9 is transmitted as the count value.
In step S40, the communication unit of the server 2 acquires the count value of the arithmetic device 3a.

  In step S41, step S42, step S43, and step S44, the server 2 acquires the count value when the computing device 3b is stopped again, as in steps S37 to S40. In this example, the server 2 acquires 9 as the count value.

  In step S45, the server 2 transmits a restart data acquisition notification to the arithmetic device 3a in order to acquire the arithmetic result from the arithmetic device 3a. At this time, arithmetic device identification data for identifying the arithmetic device 3a is transmitted together with the restart data acquisition notification.

In step S46, the arithmetic device 3a receives a restart data acquisition notification. And
Based on the restart data acquisition notification, the restart data acquisition unit 17 collects the calculation results at the time of restart and transmits them to the server 2 in step S47. In step S48, the server 2 acquires a calculation result.

  In step S49, step S50, step S51, and step S52, similarly to steps S45 to S48, the server 2 executes a process for acquiring a calculation result when the calculation device 3b is stopped again.

In steps S53 to S54, the server 2 ends the program.
In steps S55 to S56, the server 2 restarts the calculation using the calculation result obtained when the distributed processing program is stopped again. In this example, each arithmetic device 3a, 3b performs an operation until the time step reaches 100. Alternatively, the calculation is performed again from time step 0.

  For example, in an FPGA or the like, there are cases where an event notification function such as an interrupt cannot be implemented due to restrictions on the circuit area, power consumption, and memory mounting capacity of dedicated hardware. The synchronization between the computing device (dedicated hardware) can be controlled from the on-board computer, and the synchronization stop can be realized.

(Example 2)
In order to execute the distributed processing after the suspension earlier, the server 2 gives priority to the computation device 3 having a smaller time stamp by comparing the time steps acquired at the time of suspension when sending the computation resume notification to each computation device 3. Make it run.

  FIG. 6A (a diagram showing the time step of each arithmetic device 3 at the time of pause) shows that the count value of arithmetic device 3 (hardware 1) is 3, the count value of arithmetic device 3 (hardware 2) is 1, and arithmetic device 3 (hardware 1). Since the count value of the hardware 3) is 3, FIG. 6B is a diagram illustrating rearrangement in ascending order of time steps when resuming computation.

  The present invention can be applied not only to the above-described SPMD type program but also to a case where a plurality of programs are distributedly processed. For example, the arithmetic devices 3a to 3c are in charge of the fluid calculation, and the other arithmetic devices 3 are allowed to calculate the temperature based on the fluid movement.

In the distributed processing system configured as described above, it is possible to synchronize the stop of program operation from a single server using a two-stage stop command of temporary stop and main stop.
Further, the present invention is not limited to the above embodiment, and does not depart from the gist of the present invention.

It is a figure which shows the structure of a distributed processing system. It is a figure for demonstrating the synchronization shift in a distributed processing system. It is a figure which shows the structure of a server. It is a figure which shows the structure of an arithmetic unit. It is a figure which shows operation | movement of a distributed processing system. It is a figure which shows the priority at the time of starting a calculation after pausing. It is a figure which shows the conventional distributed processing system. It is a figure which shows operation | movement of the conventional distributed processing system.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Distributed processing system 2 Server 3 Arithmetic unit 4 Computation part 5 Counter 6 Computation end time step register 7 Communication part 8 Control part 9 Memory 10 Computation data setting part 11 Computation end time step setting part 12 Computation start part 13 Computation pause part 14 Calculation time step reference unit 15 Calculation end time step update unit 16 Calculation restart unit 17 Restart data acquisition unit 33 Communication unit 34 OS
35 Calculation unit 36 Calculation data setting instruction unit 37 Calculation end time step setting instruction unit 38 Calculation start instruction unit 39 Calculation pause instruction unit 310 Calculation time step reference instruction unit 311 Calculation end time step update instruction unit 312 Calculation restart instruction unit 313 Start data acquisition instruction unit 314 Maximum value time step calculation unit 70 Distributed processing system 71 Server 72 CPU
73 Calculation unit 74 OS

Claims (6)

A plurality of arithmetic devices that execute distributed processing connected to a server,
When receiving a request for suspension of the distributed processing from the server, an arithmetic processing suspension unit for stopping the arithmetic device;
When the distributed processing is stopped, the server acquires the counter value based on a calculation time step reference notification that refers to the value of a counter that counts the calculation progress of the distributed processing provided for each arithmetic device from the server. A computation time step reference section to be transmitted to
A maximum time step value obtained by detecting a maximum value from the counter value acquired from the calculation time step reference unit for each arithmetic device and adding at least one count to the maximum value of the detected counter value is acquired from the server. An operation end time step update unit to be recorded in a register;
An operation restarting unit that restarts the distributed processing from a stopped state,
An arithmetic unit, wherein the distributed processing is resumed and advanced to the maximum value of the time step, and then the distributed processing is stopped again.   2. The calculation according to claim 1, wherein the calculation is restarted from the calculation device having the smallest degree of progress indicated by the counter value in the calculation device based on the counter value acquired by the calculation time step reference unit. apparatus. A server connected to the arithmetic device according to claim 1 or 2,
The maximum value of the time step is obtained by detecting the maximum value from the value of the counter that counts the calculation progress of the distributed processing for each arithmetic device when the distributed processing is stopped, and adding at least one count to the detected maximum value of the counter value. A server that calculates and transmits to the arithmetic device.   4. The server according to claim 3, wherein based on the counter value, an instruction to restart the operation is transmitted from the arithmetic device having the smallest progress indicated by the counter value in the arithmetic device to the arithmetic device. 5. A distributed processing method for a plurality of arithmetic devices connected to a server,
The server requests the suspension of the distributed processing,
The computing device receives the request and pauses processing for each computing device,
The server transmits a calculation time step reference notification that refers to the value of a counter that counts the calculation progress of the distributed processing provided for each of the arithmetic devices when the distributed processing is stopped,
The arithmetic unit acquires the counter value based on the arithmetic time step reference notification and transmits the counter value to the server,
The server detects a maximum value from the counter value acquired from the arithmetic device, calculates a time step maximum value obtained by adding at least one count to the detected maximum value of the counter value, and transmits the time step maximum value to the arithmetic device,
The arithmetic unit records the time step maximum value in a register,
The server sends a notification to resume the distributed processing from a stopped state to the arithmetic device,
The arithmetic unit restarts the distributed processing based on a notification to restart the distributed processing from a stopped state, advances the distributed processing to the maximum time step, and stops.
A distributed processing method.   The calculation is resumed from the arithmetic device having the smallest degree of progress indicated by the counter value in the arithmetic device based on the counter value acquired from the arithmetic device at the time of suspension. Distributed processing method.

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