JP2009200315A - Method of manufacturing semiconductor device - Google Patents

Abstract

When a thin film transistor is manufactured using a printing method, the accuracy of alignment between a first electrode and a second electrode becomes a problem. If it is produced by photolithography, a photomask for each layer is required, which increases costs.
The essence of the present invention is that not only the gate shape is processed using a resist pattern formed on a substrate by exposure with a photomask for a gate pattern, but also the processing of the source and drain electrodes is performed using lift-off. Do. Thus, alignment of the source / drain electrode and the gate electrode is performed.
[Selection] Figure 1

Description

  The present invention relates to a method for manufacturing a semiconductor device including a thin film transistor (TFT) using an organic semiconductor material or an oxide semiconductor material, and in particular, only by using one photomask, a first electrode and a pair of second semiconductor devices. And a method of manufacturing a semiconductor device capable of aligning the third electrode.

  Conventionally, in the method of forming a film when forming an organic thin film transistor (organic TFT), as a means of avoiding the problem of misalignment of various patterns when produced by a printing method, the advantages of photolithography and the advantages of a printing method (For example, refer to Patent Document 1).

  Conventionally, as a method of manufacturing a TFT with an organic semiconductor material, there has been a method of processing a gate insulating film only by performing gate patterning and oxidizing (see, for example, Patent Document 2).

JP 2006-269709 A JP 2004-349292 A

  In recent years, various research and development have been conducted on display devices having a thin film transistor (TFT) device. Since this TFT has low power consumption and space saving, it has begun to be used as a display device driving transistor for portable devices such as mobile phones, notebook computers, and PDAs. Most of such TFTs are made of an inorganic semiconductor material typified by crystalline silicon or amorphous silicon. This is because the semiconductor device can be manufactured using a manufacturing process and manufacturing technology of a conventional semiconductor device. However, when a semiconductor manufacturing process is used, a substrate that can be formed is limited because a processing temperature when forming a semiconductor film is 350 ° C. or higher. In particular, flexible substrates typified by plastic often have a heat-resistant temperature of 200 ° C. or less, and it is difficult to produce TFTs made of inorganic semiconductor materials using ordinary semiconductor manufacturing processes.

  Recently, research and development of TFT devices using organic semiconductor materials and oxide semiconductor materials (hereinafter collectively referred to as organic TFTs, oxide TFTs, etc.) that can be manufactured at low temperatures have been promoted. Yes. An organic TFT and an oxide TFT can be formed on a substrate having low heat resistance such as plastic because an organic semiconductor film can be formed at a low temperature. Therefore, it becomes possible to fabricate a new flexible device that has not existed before.

  Depending on the material, the film formation method for forming organic TFTs is best selected from inkjet and other coating / printing methods, spin coating methods, spray methods, transfer methods, vapor deposition methods, dipping methods, cast methods, etc. Method is used. For example, in the case of an organic semiconductor material, a low molecular compound such as a pentacene derivative is formed by a vapor deposition method or the like, and a high molecular compound such as a polythiophene derivative is formed from a solution. In the case of producing by a printing method, there is a problem of misalignment of various patterns, and the accuracy of printing is about 20 μm. With this degree of alignment accuracy, parasitic capacitance occurs between the electrodes. As a means for avoiding this, there is an example relating to a method of manufacturing a semiconductor device having an organic thin film transistor. For example, Patent Document 1 can be cited. In this example, the advantages of photolithography and the printing method are combined.

  Recently, by using coating and printing processes typified by inkjet, micro-dispensing, transfer methods, etc., it is possible to reduce the cost by creating TFT channel parts with a small amount of organic semiconductor material without waste. Development is underway. In addition, research and development for producing electrodes and wiring parts by coating and printing is also underway. Furthermore, various combinations of gate materials and gate insulating films have been reported. For example, Patent Document 2 has been reported as an example in which gate patterning is performed and the gate insulating film is processed only by oxidation.

  As described above, in order to compensate for the drawbacks of the coating / printing technique, there is a method using so-called back exposure, but this method requires a transparent substrate and a transparent gate insulating film. These materials have certain limitations. For example, the transparency of each member may not match the photosensitive wavelength of a commercially available photosensitive material. In this case, it is also necessary to develop a photosensitive material that meets these transparency requirements. Therefore, in general, photolithography is usually performed using a plurality of photomasks. Therefore, the advantage such as low cost in printing cannot be utilized, and the cost is drastically increased.

  In order to reduce the number of masks, a method of forming a gate insulating film by oxidation as in the case of Patent Document 2 is also disclosed. However, even in this method, since all other members are subjected to photolithography processing, a mask is required for each layer, and at most, one mask for processing the gate insulating film can be reduced.

  For these problems, the object of the present invention is to provide a high-performance TFT in which the first electrode and the second and third electrodes are aligned on the substrate using a coating / printing method. It is to provide a manufacturing method.

The present invention realizes the alignment of the first electrode and the pair of second and third electrodes by using one photomask. Therefore, the present invention is extremely useful for manufacturing a field effect transistor using a thin film semiconductor layer. In addition, the present invention can provide a method for producing a high-performance TFT on a flexible substrate, for example, using a photolithography technique and a coating or printing method.
(1) The basic form of the present invention is as follows. That is,
A step of laminating a first conductive film and a first insulating film on a substrate;
A step of forming a photoresist film on the laminate;
A step of processing the photoresist film corresponding to the first electrode;
Using the processed photoresist film, the step of processing the first conductive film and the first insulating film stack into a first electrode and first insulating film stack;
Forming a second insulating film on a pair of side walls of the first electrode;
Second conductive films for second and third electrodes (on the side portions of the second insulating film formed on the pair of side walls and on the stacked body of the first electrode and the first insulating film) An electrode material film) is formed by coating (or printing);
The photoresist film on the first insulating film is removed, the second conductive films for the second and third electrodes on the first insulating film are removed, and the second and third electrodes A step of forming
A method of manufacturing a semiconductor device, comprising: applying a semiconductor material (including application) including a step of contacting the second and third electrodes and covering the first insulating film. In the present specification, the term “application” is used as a comprehensive meaning including “printing”. These specific methods will be described later. In particular, according to printing, the amount of material used can be reduced to the required amount for the pattern.

  The second mode of the present invention is a mode in which a field effect TFT is manufactured. That is, the first electrode is a gate electrode, the second and third electrodes are source or drain electrodes, respectively, and the first insulating film is a gate insulating film. 1 is a method for manufacturing a semiconductor device according to an embodiment.

  According to a third aspect of the present invention, in the step of laminating the first conductive film and the insulating film, the first conductive film is formed by anodic oxidation. It is a manufacturing method of an apparatus.

  According to a fourth aspect of the present invention, in the step of forming the second insulating film on the pair of sidewalls of the first electrode, the pair of sidewalls of the first electrode is formed by anodization. A method for manufacturing a semiconductor device according to the first embodiment.

  In addition, it is naturally possible to combine these second, third, and fourth modes as appropriate, which is extremely useful. Here, in the case where anodic oxidation is used for forming the oxide film, it is necessary to take a method for preventing oxidation at a place where oxidation by this anodic oxidation is difficult, for example, a contact portion. Needless to say. The situation is the same in various embodiments of the present invention. In the following Example 3, a specific example is shown.

  Furthermore, the present invention can be applied to various specific forms depending on the circuit configuration of the semiconductor device. An example in which semiconductor devices are arranged in a matrix and an example in which two semiconductor devices are connected to each other are as follows.

  In other words, the former is provided on both sides of the first electrode, the first insulating film on the top, the second insulating film formed on a pair of side surfaces of the first electrode. A semiconductor device comprising a set of the second and third electrodes and the semiconductor film provided in contact with the second and third electrodes and covering the first insulating film; And a plurality of matrix strips.

  In this case, the first electrode of each semiconductor device in the row or column arranged in the matrix strip is connected by the wiring that becomes the first conductive film, and the second electrode in the basic step is used. And after the step of forming the third electrode, a step of connecting the second or third electrode of each semiconductor device in a column or row arranged in the matrix strip with a third conductive film is used. Useful. It is practical to form this third conductive film by the same method as the second conductive film.

  Further, the latter is provided on both sides of the first electrode, the first insulating film on the top, the second insulating film formed on a pair of side surfaces of the first electrode. A semiconductor device comprising a set of the second and third electrodes and the semiconductor film provided in contact with the second and third electrodes and covering the first insulating film; , At least two of them are arranged.

In this case, after the step of processing into the stacked body of the first electrode and the first insulating film in the basic process, the stacked body of the first semiconductor device of the two semiconductor devices. Forming a fourth conductive film connected to the substrate; and
After the step of forming the second and third electrodes, the fourth conductive film connected to the first semiconductor device of the two semiconductor devices and the second of the two semiconductor devices. It is useful to use a step of forming a fifth conductive film that connects the second or third electrode of the semiconductor device. It is practical to form the fourth conductive film by a method similar to that for the second conductive film.

  Specific examples of both will be described later.

  A semiconductor material to be subjected to the application (that is, application including printing) is typically an organic semiconductor material. More specific materials will be described later. Further, in the present invention, an oxide semiconductor material or a silicon-containing semiconductor material can be used as the semiconductor material.

  In addition, the said application | coating (namely, application | coating also including printing) is an inkjet method, a micro-dispensing method, a transfer method, a screen coating / printing method, a slit coating method, a spray coating method, a capillary coating method, a dip method, a spin coating method. One type or a plurality of types can be used.

  FIG. 1 illustrates a process flow of a typical embodiment of TFT manufacturing according to the present invention. The outline is that a material of a first conductive film (a gate film in this example) that can be anodized is formed on a substrate, and the surface is anodized to form a first insulating film. A resist is applied thereon, and then the resist is processed into a gate pattern shape using photolithography. The first insulating film (an anodic oxide film in this example) and the first conductive film (a gate film in this example) are processed using the pattern. Subsequently, a source / drain material is applied to a necessary portion by printing. Then, lift-off is performed using the remaining gate pattern resist. Finally, by printing a semiconductor material directly on the gate, there is no misalignment between the first electrode (in this example, the gate electrode) and the pair of second and third electrodes (in this example, the source / drain electrodes). High performance TFT can be manufactured. More specifically, it will be described in detail in the following section “Best Mode for Carrying Out the Invention”.

  According to the present invention, it is possible to realize alignment processing of the first electrode and the pair of second and third electrodes by using only one photomask.

  Prior to specific description of various embodiments of the present invention, the main embodiment of the present invention and specific materials used will be described in more detail.

  The gist of the present invention will be described as follows using a specific example of TFT. That is, using a resist pattern formed by exposure with a gate pattern photomask on a predetermined substrate, not only processing of the gate shape but also processing of the source / drain electrodes is performed using lift-off. Thus, the source / drain electrode and the gate electrode are aligned. In this case, it is useful to use a flexible substrate for the TFT, which enables a wider range of applications of the TFT.

A typical flow of the TFT manufacturing process is the process of FIG. 1 described above.
・ (A) in FIG.
(1) A step of laminating a first conductive film (a material film for a gate electrode) and a first insulating film (after processing to become a gate insulating film) on a substrate. For the first insulating film in this step, it is practical and preferable that the surface of the first conductive film is formed by anodic oxidation.
・ (B) in FIG.
(2) A step of forming a photoresist film thereon and processing it into a desired shape (in the case of TFT, the shape of the gate electrode). This processing is usually performed by exposure using a photomask and development.

In order to improve the performance of the TFT, the gate electrode is preferably processed by patterning a photoresist film. That is, high-precision processing of the basic shape in the present invention is possible. As a photoresist for the resist pattern described above, both positive and negative types can be used in principle. In general, the positive type is preferable for the purpose of the present invention from the viewpoint of ease of resist removal.
(3) Using this processed photoresist pattern, the laminate of the first conductive film and the first insulating film has a first electrode (corresponding to a gate electrode in the case of a TFT) and a first electrode. A laminated body of insulating films (corresponding to a gate insulating film in the case of TFT) is processed.
・ (C) in FIG.
(4) A step of forming a second insulating film on a pair of opposite side walls of the first electrode.

  This second insulating film is intended to insulate the first electrode from the second and third electrodes (corresponding to a source electrode and a drain electrode in the case of TFT) formed in a later step. is there.

  The formation of the second insulating film on the pair of opposing side walls of the first electrode can be performed by forming an oxide film by anodic oxidation or by applying an insulating film. It is practically preferable that the formation of the second insulating film on the pair of opposing side walls of the first electrode is by anodic oxidation of the first electrode. A conventional method is sufficient for the anodizing method itself. That is, the metal part to be anodized is opposed to the counter electrode (usually a Pt electrode is used) in the anodizing solution, voltage is applied, and current is further applied.

This anodic oxidation method does not require the substrate or the like to be heated. Accordingly, a substrate material having relatively low heat resistance, for example, an organic polymer material such as a plastic substrate can be used. Therefore, the present invention makes it possible to use a flexible substrate, for example.
・ (D) in FIG.
(5) A pattern is formed on the second and third electrode regions and the first electrode pattern region by applying the second and third electrode materials (that is, application including printing). Process.
・ (E) of FIG.
(6) A step of removing the photoresist on the first electrode and removing the second and third electrode materials on the first electrode. This process is commonly referred to as lift-off. Thus, the second and third electrodes (source / drain electrodes in the case of TFT) are formed.
・ (F) in FIG.
(7) A step of applying or printing a semiconductor material layer that can be applied (that is, including printing) between the second and third electrodes (between the source and drain electrodes). Naturally, the heat treatment determined by each semiconductor material is performed. This semiconductor layer becomes a base material of the semiconductor device.

  Thus, only one pattern forming mask is used, and the first electrode (corresponding to the gate electrode in the case of TFT) and the second and third electrodes (corresponding to the source / drain electrodes in the case of TFT) are aligned. It becomes possible.

  Examples of the coating method (that is, coating including printing) include an inkjet method, a micro-dispensing method, a transfer method, a screen coating / printing method, a slit coating method, a spray coating method, a capillary coating method, a dip method, and a spin coating method. This is a typical example. For the purposes of the present invention, it is practical to use at least one of these to form the parts.

  Next, specific materials used in the present invention will be described.

  A typical example of the flexible substrate is a metal thin film sheet or a flexible resin sheet so-called plastic film. In the case of a metal thin film sheet, the surface needs to be insulated in order to be applied to device fabrication. Examples of plastic films include polyethylene terephthalate, polyethylene naphthalate, polyetherimide, polyethersulfone, polyetheretherketone, polyphenylene sulfide, polyacrylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate. I can do it. As described above, the plastic film has a characteristic of bending flexibly. This is advantageous for various applications that require flexible characteristics of the device. Further, these substrate surfaces may be treated to assist in the formation of the print pattern. When a metal substrate is used, an insulator coating is applied to the surface of the metal. For example, an insulator coat is applied to the surface of an aluminum plate, a stainless plate, or the like.

  Examples of the first electrode material (gate electrode material in TFT) include metals that can be anodized, such as aluminum and tantalum.

  Examples of the second and third electrode materials (source / drain electrode materials in TFT) include conductive material solutions such as metal nanoparticle solutions and conductive polymer solutions. The metal nanoparticle material has a metal nucleus at the center and an organic compound bonded so as to cover it. Typical examples of the central metal nucleus include gold, silver, copper, platinum, nickel, palladium and the like. As the nucleus, one kind or a plurality of kinds of these metals may be mixed. Nitrogen, sulfur, and oxygen atoms are typical examples of the bond between the metal nucleus and the organic compound. The portion of the organic compound is a linear hydrocarbon or a cyclic hydrocarbon, and may have a substituent. These metal nanoparticles can be dispersed in a solvent to form a liquid material, resulting in a printable ink. Furthermore, a conductive polymer solution or the like can also be used as a coating or printing material. Finally, such a metal fine particle solution is heated to be metallized. This metallization can also be done by oxidation or exposure to a halogen gas.

  Examples of the organic semiconductor material include polyacene derivatives represented by pentacene and rubrene, polythiophene derivatives, polyethylene vinylene derivatives, polypyrrole derivatives, polyisothianaphthene derivatives, polyaniline derivatives, polyacetylene derivatives, polydiacetylene derivatives, polyazulene derivatives, polypyrene derivatives, poly Examples such as carbazole derivatives, polyselenophene derivatives, polybenzofuran derivatives, polyphenylene derivatives, polyindole derivatives, polypyridazine derivatives, porphyrin derivatives, metal phthalocyanine derivatives, fullerene derivatives, and polymers or oligomers in which two or more of these repeating units are mixed Can be given as Moreover, you may perform a doping process to these organic-semiconductor materials as needed. In addition, in order to improve the performance of the organic semiconductor transistor, a surface treatment may be performed on the bonding surface between the organic semiconductor and the substrate by a process before printing the organic semiconductor. If necessary, these organic semiconductors may be laminated.

  As examples of the oxide semiconductor material, ZnO, InGaZnO (indium gallium zinc oxide), and the like can be given.

  Next, several embodiments of the present invention will be specifically described. In the examples, since the used inkjet printing apparatus had both the positional accuracy and the minimum value of the drawing line width of 20 μm, the gate electrode line width was set to 20 μm or more.

<Example 1>
This example is an example of a thin film transistor device using an organic semiconductor. FIGS. 2A and 2B to FIGS. 9A and 9B are a cross-sectional view and a top view of a thin film transistor device showing this example in the order of manufacturing steps. In this example, the position of the first electrode (corresponding to the gate electrode in this example) and the second and third electrodes (corresponding to the source / drain electrodes in this example) using one gate / pattern mask. This is an example of matching. Each figure having the figure number ending in “B” is a plan view, and each figure having the figure number ending in “A” is a cross-sectional view taken along line AA ′ in each of the above plan views. Hereinafter, in the plan view and cross-sectional view of the apparatus shown in the order of the manufacturing process in the specification of the present application, the end of the figure number is “FIGS. 2A, 2B to FIGS. 9A, 9B and FIGS. 17A, 17B to FIGS. Each figure “A” is a sectional view, each figure ending with “B” is a plan view, and FIGS. 10A, 10B to FIGS. 16A, 16B are suffixed with “A”. Each figure is a plan view, and each figure ending in “B” is a sectional view.

(1) A first conductive film (a material film for a gate electrode) and an insulating film (which will be a gate insulating film after processing) are stacked on a substrate 1, and a photoresist film is formed thereon.
That is, using polycarbonate, which is an organic compound, as a substrate, aluminum 2 serving as a first electrode was formed on the substrate 1 to a thickness of 100 nm by sputtering. Thereafter, 30 nm on the surface of aluminum was oxidized by an anodic oxidation method to form an alumina film 3 as a first insulating film. The alumina film 3 becomes a first insulating film, that is, a gate insulating film in the TFT. Thereafter, 1 μm of i-line resist 4 was applied and baked at 100 ° C. for 2 minutes (cross-sectional view: FIG. 2A, plan view: FIG. 2B).

  Of course, the first insulating film 3 may be formed by a deposition method or the like. The same applies to the following embodiments.

(2) The photoresist film is processed into a desired shape (in the case of TFT, the shape of the gate electrode).
That is, using the photomask 5 (for the gate pattern in this example), the photoresist 4 was exposed with i-line 6 from a high-pressure mercury lamp (cross-sectional view: FIG. 3A, plan view: FIG. 3B). The substrate is heated at 100 ° C. for 2 minutes and developed with a tetramethylammonium 2.38 w% aqueous solution. Further, washing with water was performed to obtain a resist pattern 4 that was processed with a first electrode pattern (corresponding to a gate electrode pattern) (cross-sectional view: FIG. 4A, plan view: FIG. 4B).

(3) Using this processed photoresist pattern, the stacked body of the first conductive film and the first insulating film is composed of the first electrode 2 (corresponding to a gate electrode in the case of TFT) and the first electrode. 1 is processed into a laminate of insulating films 3 (corresponding to a gate insulating film in the case of TFT).
That is, the alumina layer 3 and the aluminum layer 2 were wet-etched with a 2.38 w% aqueous solution of tetramethylammonium to obtain a gate pattern shape (cross-sectional view: FIG. 5A, plan view: FIG. 5B).

(4) Second insulating films 21 and 22 are formed on a pair of opposing side walls of the first electrode 2.
That is, the side wall of the patterned first electrode (in this example, the aluminum layer) 2 was anodized. A gate pattern of the first electrode (aluminum in this example) 2 surrounded by the second insulating films (this anodic oxide film in this example) 21 and 22 and the substrate 1 thus obtained was obtained (sectional view: FIG. 6A, plan view: FIG. 6B).

(5) Applying the second and third electrode materials (7, 71, 72) onto the second and third electrode regions and the first electrode pattern region (that is, coating including printing). Thus, a pattern is formed.
That is, the metal nanoparticle solution was printed on a necessary part using an ink jet method and heated at 120 ° C. for 20 minutes (cross-sectional view: FIG. 7A, plan view: FIG. 7B). As the metal nanoparticles used in this example, gold nanoparticles whose surface was protected with butanethiolate were dispersed in a toluene solution. The average particle size of the metal nuclei of the metal nanoparticles was 4 nm.

(6) The photoresist 4 above the first electrode 2 is removed, and the second and third electrode materials 7 on the first electrode are removed by lift-off. Thus, the second and third electrodes 71 and 72 are formed.
That is, the resist 4 was peeled off using tetrahydrofuran, and the metal 7 immediately above the first electrode 2 (gate electrode in this example) was peeled off (cross-sectional view: FIG. 8A, plan view: FIG. 8B). At this time, the heights of the second and third electrodes (source and drain electrodes in this example) 71 and 72 were 100 nm. As seen in FIG. 8A, the second insulating films 21 and 22 insulate the first electrode 2 from the pair of second and third electrodes 71 and 72.

(7) The semiconductor material layer that can be applied or printed is between the second and third electrodes 71 and 72 (between the source and drain electrodes in this example), and both the electrodes 71 and 72 are on the semiconductor material layer 8. In contact therewith, application (that is, application including printing) is performed.
That is, a 5% chloroform solution of an organic semiconductor (Poly (3-hexylthiophene-2, 5-diyl) Regular) is used between the pair of second and third electrodes 71 and 72 immediately above the first electrode 2. The semiconductor layer 8 to be a channel portion was printed by an ink jet printing method, and heat treatment was performed at 120 ° C. for 5 minutes (cross-sectional view: FIG. 9A, plan view: FIG. 9B). The thickness of the semiconductor layer 8 serving as the channel portion was 5 μm.

The mobility of this transistor was determined to be 0.085 cm ² / Vs. This value is a characteristic of the organic thin film transistor that is considered not to be misaligned between the upper and lower electrodes. Further, there was no warpage or distortion of the substrate, and it was exactly the same as before the pattern formation.

Below, the example which changed each member of the said Example is demonstrated.
[Gate electrode materials]
When aluminum was used in Example 1 and tantalum was used to produce a transistor in the same manner, the mobility was 0.08 cm ² / Vs, and a transistor with no inferiority could be obtained.

[Substrate]
An organic thin film transistor was formed in the same manner as in Example 1 except that the substrate in Example 1 was a glass substrate made of a silicon compound. The mobility of this transistor was 0.105 cm ² / Vs equivalent to that of a plastic substrate.

An organic thin film transistor was formed in the same manner as in Example 1 except that the substrate in Example 1 was made of a polyimide-coated paper. The mobility of this transistor was 0.095 cm ² / Vs equivalent to that of a plastic substrate.

  For example, the plastic film as the substrate is polyethylene terephthalate, polyethylene naphthalate, polyetherimide, polyethersulfone, polyetheretherketone, polyphenylene sulfide, polyacrylate, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, etc. In this case, the same effect can be obtained.

[Conductive materials]
A transistor was formed in the same manner as in Example 1 except that the gold nanoparticles in Example 1 were replaced with silver nanoparticles. The mobility of this transistor was 0.077 cm ² / Vs. When using platinum nanoparticles, mobility 0.1 cm ² / Vs, when the copper nano-particles, the mobility became 0.08 cm ² / Vs, and the gold nanoparticles used when the same performance. Although the various materials have characteristic differences due to, for example, a difference in work function between gold and silver, the object of the present invention can be sufficiently achieved. Among these materials, gold nanoparticles are the most advantageous material in terms of performance, ease of synthesis, and storage stability. Furthermore, when an aqueous solution of PEDOT / PSS, which is a conductive polymer, was used, the mobility was 0.115 cm ² / Vs, and equivalent performance was obtained.

  Even if gold, silver, copper, platinum, nickel, palladium, or the like is used as the central metal nucleus of the metal nanoparticle material, the object of the present invention can be sufficiently achieved. As the nucleus, one kind or a plurality of kinds of these metals may be mixed.

[About semiconductor materials]
A transistor was formed in the same manner as in Example 1 except that the chloroform solution of (Poly (3-hexylthiophene-2, 5-diyl) Regioregular) in Example 1 was replaced with, for example, a polyaniline solution doped with an emeraldine salt. . The mobility of this transistor was 0.05 cm ² / Vs. Such an example has also sufficiently achieved the object of the present invention.

Further, the organic semiconductor of Example 1 was changed to a 1.3 wt% aqueous solution of Poly (styrenesulfonate) / poly (s, 3-dihydrothieno- [3,4-b] -1,4-dioxin) to form a transistor. The mobility of this transistor was 0.078 cm ² / Vs. This example is slightly advantageous in terms of cost.

When pentacene was used by vapor deposition, the mobility was 0.15 cm ² / Vs. In this case, although it is not a printing method, there is no great difference in cost because of partial replacement.

In addition, when ZnO formed by sputtering instead of an organic material was used as the semiconductor material, the mobility was 4.0 cm ² / Vs. In addition, when InGaZnO (indium gallium zinc oxide) is used as a semiconductor material, a good TFT can be provided. Furthermore, a silicon-containing semiconductor can also be used.

  Furthermore, as a semiconductor material, the above-mentioned pentacene, polyacene derivatives represented by rubrene, polythiophene derivatives, polyethylene vinylene derivatives, polypyrrole derivatives, polyisothianaphthene derivatives, polyaniline derivatives, polyacetylene derivatives, polydiacetylene derivatives, polyazulene derivatives, polypyrene derivatives, Polycarbazole derivatives, polyselenophene derivatives, polybenzofuran derivatives, polyphenylene derivatives, polyindole derivatives, polypyridazine derivatives, porphyrin derivatives, metal phthalocyanine derivatives, fullerene derivatives, polymers or oligomers in which two or more of these repeating units are mixed, etc. Even with this example, a good TFT can be provided.

[Insulating film]
2A and 2B in Example 1, when the 0.5% xylene solution of epoxidized polybutadiene was used for the insulating film formed on aluminum, the mobility was 0.09 cm 2 / Vs. This value is almost equivalent to the value of the first embodiment. This example is slightly advantageous in terms of cost.

  Further, when the insulating film is made of a 2% methyl amyl ketone solution of polyhydroxystyrene, the mobility is 0.07 cm 2 / Vs, and the object of the present invention can be achieved. The polyhydroxystyrene of this example is inexpensive and has the merit that methyl amyl ketone as a safety solvent can be used. Further, the mobility when a 3% methyl amyl ketone solution of polyimide is used is 0.07 cm 2 / Vs, and the object of the present invention can be achieved.

<Example 2>
In this example, transistors are formed in a 3 × 4 matrix in the same procedure as in the first embodiment. 10A and 10B to FIGS. 16A and 16B. Each figure whose figure number ends with “A” is a plan view, and each figure whose figure number ends with “B” is a cross-sectional view taken along line AA ′ in the above-described plan view.

  This example is a form in which a large number of transistors are juxtaposed, but the method of forming each transistor is the same as in Example 1 except that a plurality of transistors are formed in the same process and necessary connections are made to them. It is the same. Therefore, here, the difference will be mainly described. In addition, the material of each site | part used in this example is the same as that of Example 1.

  (1) A first conductive film (gate electrode material film) 2 and an insulating film (after processing, which becomes a gate insulating film) 3 are stacked on a substrate 1, and a photoresist film is formed thereon. Here, the insulating film 3 is formed by anodic oxidation of the first conductive film 2. 10A and 10B correspond to the states shown in FIGS. 2B and 2A of the first embodiment.

  (2) The photoresist film is processed into a desired shape (gate electrode shape).

  (3) Using this processed photoresist pattern 4, a laminate of the first conductive film and the first insulating film is formed into a first electrode 2 (gate electrode) and a first insulating film (gate insulation). Membrane) 3 is processed into a laminate.

  In this example, as seen in FIG. 11A, corresponding to a 3 × 4 matrix of transistors, the shape of the photoresist film 4 is 4-a, 4-b, 4-c rows, 4-1, It is formed corresponding to the columns 4-2, 4-3, and 4-4. Further, the 4-d column is provided with a part for connecting each row or the like as necessary.

  (4) Second insulating films 21 and 22 are formed on a pair of opposing side walls of the first electrode 2 (FIGS. 12A and 12B). Also in this example, the second insulating films 21 and 22 were formed by anodic oxidation of the first electrode 2.

  (5) Semiconductor material layers 7, 71, 72 are formed on the second and third electrode regions and the first electrode pattern region by applying the second and third electrode materials (see FIG. 13A, 13B). Incidentally, since the portion of the column 4-d is not a portion where a transistor is formed, naturally, a semiconductor material layer is not formed.

  (6) The photoresist 4 on the first electrode 2 is removed, and the second and third electrode materials 7 on the first electrode 2 are removed by lift-off. Thus, the second and third electrodes 71 and 72 are formed (FIGS. 14A and 14B).

  (7) In this example, twelve transistors are connected by four gate wirings 110 and three third conductive films (here, signal wirings) 111. Although not shown in the figure, the gate wiring 110 is composed of a first conductive film extending from the gate electrode 2 existing below the gate insulating film 3 in the top view.

  The difference from the first embodiment is that a portion 120 that separates the gate wirings 110 shown in FIG. 15A is provided, and the third conductive film (here, signal wiring) 111 is used for connection. . In this embodiment, the gate wiring is separated by directly peeling the aluminum 2 by laser light irradiation. The resist may be applied over the entire surface, the resist may be peeled off by laser irradiation only at the part to be peeled off, and wet etching may be performed with an alkaline aqueous solution. The procedure for forming the signal wiring was made in the same procedure as that for forming the source / drain electrodes, using the same gold nanoparticle solution as that for forming the source / drain electrodes. The cross-sectional structure of each transistor portion is as shown in FIG. 15B and is basically the same as that of the first embodiment.

  (8) A semiconductor material layer 8 that can be applied or printed is applied between the second and third electrodes 71 and 72 (between the source and drain electrodes) (FIGS. 16A and 16B).

  When the performance of each of these transistors was measured, the mobility was a variation of about 5%.

  In the second embodiment, the object of the present invention can be sufficiently achieved by changing the various materials of each member described in the first embodiment.

<Example 3>
In this example, two organic semiconductor transistors Tr1 and Tr2 are formed by the same method as in Example 1, and the gate electrode of one transistor and the other source electrode are connected. The manufacturing method is shown in FIGS. 17A and 17B to FIGS. 25A and 25B. Each figure having the figure number ending in “B” is a plan view, and each figure having the figure number ending in “A” is a cross-sectional view taken along line AA ′ in the above plan view. It goes without saying that the present invention can take various specific forms such as mutual connection of transistors depending on the circuit configuration regardless of this example.

  (1) On the substrate 1, a first conductive film (gate electrode material film) 2 and an insulating film (after processing, which becomes a gate insulating film) 3 are laminated, and a photoresist film is formed thereon ( Cross section: FIG. 17A, plan view: FIG. 17B). This manufacturing method itself is the same as that of Example 1.

  (2) The photoresist film is processed into a desired shape (gate electrode shape).

  That is, using the photomask 5 (for the gate pattern in this example), the photoresist 4 was exposed with i-line 6 from a high-pressure mercury lamp (cross-sectional view: FIG. 18A, plan view: FIG. 18B). The substrate is heated to develop the photoresist. Further, washing with water was performed to obtain a resist pattern 4 processed with a first electrode pattern (gate electrode pattern) (cross-sectional view: FIG. 19A, plan view: FIG. 19B).

  (3) Using this processed photoresist pattern 4, the laminate of the first conductive film 2 and the insulating film 3 is made up of the first electrode (gate electrode) and the first insulating film (gate insulating film). It is processed into a laminate (cross-sectional view: FIG. 20A, plan view: FIG. 20B).

  (4) A second conductive film is formed for transistor connection.

  That is, in this embodiment, in order to connect the two transistors Tr1 and Tr2, as shown in FIG. 20B, the fourth conductive film (connecting auxiliary pattern) 9 is formed of a gold nanoparticle solution. Since gold is not anodized, its surface remains metal during anodization of the gate sidewall (FIGS. 21A and 21B). Accordingly, when connecting the two transistors shown in FIGS. 24A and 24B, the transistor can be used as an extraction electrode from the gate. The method for forming the second conductor layer is the same as the method for forming the first conductor layer described above. Examples of the metal material that is not anodized include Au, Ag, Cu, Pt, Ni, Pd, and the like, and a fine particle solution of these metals can be used for the same purpose. Furthermore, as described above, a conductive polymer solution containing these metals can also be used. In the figure, the shape of the second conductive film is elliptical on the top surface, but it is needless to say that the shape is not limited to this.

  (5) Second insulating films 21 and 22 are formed on a pair of opposing side walls of the first electrode 2 (FIGS. 21A and 21B). Also in this example, the first electrode 2 was anodized.

  (6) The second and third electrode materials 7, 71 and 72 are applied on the second and third electrode regions and the first electrode pattern region (FIGS. 22A and 22B).

  (7) The photoresist 4 on the first electrode 2 is removed, and the second and third electrode materials 4 on the first electrode 3 are removed by lift-off. Thus, the second and third electrodes 71 and 72 are formed (FIGS. 23A and 23B). In this step, a part of the second conductive film 9 is simultaneously removed, but the remaining second conductive film 9 and the first conductive film 2 are naturally connected.

(8) The second conductive film (connection auxiliary pattern) 9 is drawn out from the gate electrode 2 of one transistor Tr1, and connected to the second (or third) electrode 71 of the other transistor Tr2 using the wiring 12. did. (FIGS. 24A and 24B)
(9) The applyable semiconductor material layer 8 is applied between the second and third electrodes (between the source and drain electrodes) (FIGS. 25A and 25B).

  Two transistors manufactured in this example could be manufactured with the same mobility.

  In the third embodiment, the object of the present invention can be sufficiently achieved by changing the various materials of each member described in the first embodiment.

  As described above, the present invention has been described in detail. In the organic semiconductor manufacturing process, (1) a necessary material is drawn on a required area by a printing method, and (2) the first electrode is aligned with the second and third electrodes. The necessary portion is created by aligning the first electrode and the second and third electrodes in a self-aligned manner. For this reason, an electrode substrate in which the three electrodes are accurately aligned through the insulating film can be formed by using a printing method. In addition, if the printing method of the present invention is used, it is only necessary to use a necessary material in a minimum area, and in addition, it is possible to manufacture with only one gate pattern photomask. Therefore, the manufacturing cost can be greatly reduced.

  In the present invention, all processes can be formed at a low temperature. Therefore, even when the substrate is made of a flexible material such as plastic and has a thermoplastic material that can be deformed by heat, the upper wiring / electrode is used as another electrode. In contrast, it can be formed in a self-aligned manner. Such a board | substrate is suitable for the board | substrate which makes a display like flexible electronic paper, for example.

  As described above, according to each of the embodiments of the present invention, it is possible to realize the alignment processing of the first electrode and the pair of second and third electrodes by using only one photomask. The gate electrode and the source / drain electrode of the field effect transistor using a thin film can be combined. Therefore, it is possible to provide a field effect thin film transistor using a semiconductor material that can be applied or printed by using the methods of the above embodiments. Furthermore, from the viewpoint that a semiconductor material that can be applied or printed can be used, each of the above embodiments can use a flexible substrate.

  As described above, each of the above embodiments of the present invention is useful for manufacturing an organic thin film transistor, an oxide transistor, and a semiconductor device having a coating or printable semiconductor material in a channel portion.

The main modes of the present invention will be enumerated as follows.
(1) a step of laminating a first conductive film and an insulating film on a substrate;
Forming the photoresist film corresponding to the first electrode on the stack;
Using the processed photoresist film, a step of processing the stacked body of the first conductive film and the insulating film into a stacked body of the first electrode and the first insulating film;
Forming a second insulating film on a pair of side walls of the first electrode;
Second conductive films for second and third electrodes on both sides of the second insulating film formed on the pair of side walls and on the laminate of the first electrode and the first insulating film Forming (electrode material film) by coating or printing;
The photoresist film on the first insulating film is removed, the second conductive films for the second and third electrodes on the first insulating film are removed, and the second and third electrodes are A process to be formed;
Forming a semiconductor film by coating or printing a semiconductor material which is in contact with the second and third electrodes and covers the first insulating film and which can be applied or printed. .
(2) The first item (1), wherein the first electrode is a gate electrode, the second and third electrodes are source or drain electrodes, and the first insulating film is a gate insulating film. The manufacturing method of the semiconductor device as described in 1).
(3) The semiconductor according to any one of (1) to (2), wherein in the step of stacking the first conductive film and the insulating film, the first conductive film is formed by anodic oxidation. Device manufacturing method.
(4) In the step (1), the step of forming the second insulating film on the pair of side walls of the first electrode includes forming the pair of side walls of the first electrode by anodic oxidation. The manufacturing method of the semiconductor device as described in (3).
(5) A method for manufacturing a semiconductor device according to (1) above,
In the step of forming the photoresist film corresponding to the first electrode on the laminated layer, a plurality of the photoresist films corresponding to the first electrode are formed in a matrix strip,
And the first electrode of each semiconductor device in the row or column arranged in the matrix strip is connected by the first conductive film,
In addition, after the step of forming the second and third electrodes, a step of connecting the second or third electrode of each semiconductor device in a column or row arranged in the matrix strip with a third conductive film. Have
The first electrode, the first insulating film on the top, the second insulating film formed on a pair of side surfaces of the first electrode, and the second and the second films provided on both sides of the first electrode A matrix device includes a plurality of semiconductor devices each formed of a set of the third electrode and the semiconductor film provided in contact with the second and third electrodes and covering the first insulating film. A method for manufacturing a semiconductor device, wherein the semiconductor device has a configuration in which the semiconductor devices are arranged.
(6) A method of manufacturing a semiconductor device as described in (1) above,
In the step of forming the photoresist film corresponding to the first electrode on the stacked layer, at least two photoresist films corresponding to the first electrode are formed and formed,
After the step of processing into a stacked body of the first electrode and the first insulating film, a fourth conductive film connected to the stacked body of the first semiconductor device of the two semiconductor devices is formed. Process, and
After the step of forming the second and third electrodes, the fourth conductive film connected to the first semiconductor device of the two semiconductor devices and the second of the two semiconductor devices. Forming a fifth conductive film for connecting the second or third electrode of the semiconductor device,
The first electrode, the first insulating film above the first electrode, the second insulating film formed on a pair of side surfaces of the first electrode, and the second and second films provided on the side portions At least two semiconductor devices configured by a set of the third electrode and the semiconductor film provided in contact with the second and third electrodes and covering the first insulating film are disposed. A method for manufacturing a semiconductor device, characterized by comprising:
(7) The method for manufacturing a semiconductor device according to (6), wherein the fourth conductive film is formed by coating (a coating method including printing). The fourth conductive film is preferably a material that is not anodized.
(8) The method of manufacturing a semiconductor device as described in (1) to (7) above, wherein the semiconductor material to be applied (application method including printing) is an organic semiconductor.
(9) The method of manufacturing a semiconductor device as described in (1) to (7) above, wherein the semiconductor material to be coated or printed is an oxide semiconductor.
(10) The method for manufacturing a semiconductor device according to any one of (1) to (7) above, wherein the semiconductor material to be applied (application method including printing) is a silicon-containing semiconductor.
(11) The application (application method including printing) is an inkjet method, a micro-dispensing method, a transfer method, a screen coating / printing method, a slit coating method, a spray coating method, a capillary coating method, a dip method, or a spin coating method. Of these, one type or a plurality of types are used. The method for manufacturing a semiconductor device according to any one of (1) to (10) above.

It is a figure which shows the transistor formation process flow by this invention. 2B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. It is the top view shown in order of the manufacturing process of the transistor of Example 1 of this invention. 3B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. It is the top view shown in order of the manufacturing process of the transistor of Example 1 of this invention. FIG. 4B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 4B shown in the order of the manufacturing steps of the transistor of Example 1 of the present invention. It is the top view shown in order of the manufacturing process of the transistor of Example 1 of this invention. FIG. 5B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 5B, shown in the order of the manufacturing steps of the transistor of Example 1 of the present invention. It is the top view shown in order of the manufacturing process of the transistor of Example 1 of this invention. FIG. 6B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 6B, shown in the order of the manufacturing steps of the transistor of Example 1 of the present invention. It is the top view shown in order of the manufacturing process of the transistor of Example 1 of this invention. FIG. 7B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 7B, shown in the order of the manufacturing steps of the transistor of Example 1 of the present invention. It is the top view shown in order of the manufacturing process of the transistor of Example 1 of this invention. FIG. 9B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. It is the top view shown in order of the manufacturing process of the transistor of Example 1 of this invention. FIG. 9B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 9B, illustrating the order of the manufacturing steps of the semiconductor device having the transistor of Example 1 of the present invention. It is the top view shown in order of the manufacturing process of the semiconductor device which has a transistor of Example 1 of this invention. It is the top view shown in order of the manufacturing process of the semiconductor device which has a transistor of Example 2 of this invention. It is sectional drawing in line A-A 'of the top view of FIG. 10A shown to the manufacturing process order of the semiconductor device which has the transistor of Example 2 of this invention. It is the top view shown in order of the manufacturing process of the transistor of Example 2 of this invention. FIG. 11B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 11A shown in the order of the manufacturing steps of the transistor of Example 2 of the present invention. It is the top view shown in order of the manufacturing process of the transistor of Example 2 of this invention. FIG. 12B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 12A, which is shown in the order of the manufacturing steps of the transistor of Example 2 of the present invention. It is the top view shown in order of the manufacturing process of the transistor of Example 2 of this invention. FIG. 13B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 13A, shown in the order of the manufacturing steps of the transistor of Example 2 of the present invention. It is the top view shown in order of the manufacturing process of the transistor of Example 2 of this invention. FIG. 14B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 14A shown in the order of the manufacturing steps of the transistor of Example 2 of the present invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 2 of this invention. It is sectional drawing in line A-A 'of the top view of FIG. 15A shown in order of the manufacturing process of the wiring board of Example 2 of this invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 2 of this invention. It is sectional drawing in line A-A 'of the top view of FIG. 16A shown in order of the manufacturing process of the wiring board of Example 2 of this invention. It is sectional drawing in line A-A 'of the top view of FIG. 17B shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 3 of this invention. FIG. 19B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 18B, shown in the order of the manufacturing steps of the wiring board according to the third embodiment of the present invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 3 of this invention. FIG. 19B is a cross-sectional view taken along line A-A ′ of the plan view of FIG. 19B, shown in the order of the manufacturing steps of the wiring board according to the third embodiment of the present invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is sectional drawing in line A-A 'of the top view of FIG. 20B shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is sectional drawing in line A-A 'of the top view of FIG. 21B shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is sectional drawing in line A-A 'of the top view of FIG. 22B shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 3 of this invention. FIG. 24B is a cross-sectional view taken along line A-A ′ in the plan view of FIG. 23B, shown in the order of the manufacturing steps of the wiring board according to the third embodiment of the present invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is sectional drawing in line A-A 'of the top view of FIG. 24B shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is sectional drawing in line A-A 'of the top view of FIG. 25B shown in order of the manufacturing process of the wiring board of Example 3 of this invention. It is the top view shown in order of the manufacturing process of the wiring board of Example 3 of this invention.

Explanation of symbols

1: substrate, 2: first conductive film (after processing, for example, first electrode (gate electrode)), 3: first insulating film (for example, gate insulating film), 4: resist, 5: gate pattern Photomask for formation, 6: exposure light, 7: second conductive film, 8: semiconductor film, 9: fourth conductive film (for example, auxiliary pattern for wiring), 12: fifth conductive film (for example, wiring) , 21, 22: second insulating film, 71, 72: second and third electrodes (for example, source and drain electrodes), 110: gate wiring, 111: third conductive film (for example, signal wiring), 120: Separation part.

Claims (17)

A step of laminating a first conductive film and a first insulating film on a substrate;
Forming the photoresist film corresponding to the first electrode on the stack;
Using the processed photoresist film, the step of processing the first conductive film and the first insulating film stack into a first electrode and first insulating film stack;
Forming a second insulating film on a pair of side walls of the first electrode;
The second conductive film for the second and third electrodes on the side portion of the second insulating film formed on the pair of side walls and the stacked body of the first electrode and the first insulating film. A step of forming by coating,
The photoresist film on the first insulating film is removed, the second conductive films for the second and third electrodes on the first insulating film are removed, and the second and third electrodes are A process to be formed;
Forming a semiconductor film by coating a semiconductor material in contact with the second and third electrodes and covering the first insulating film. In claim 1,
The step of laminating the first conductive film and the first insulating film is characterized in that the first conductive film is formed by anodic oxidation. In claim 1,
The method of forming the second insulating film on the pair of side walls of the first electrode is characterized in that the pair of side walls of the first electrode is formed by anodic oxidation. In claim 1,
A method of manufacturing a semiconductor device, wherein the semiconductor material to be coated is an organic semiconductor. In claim 1,
A method of manufacturing a semiconductor device, wherein the semiconductor material to be coated is an oxide semiconductor. In claim 1,
A method for manufacturing a semiconductor device, wherein the semiconductor material to be coated is a silicon-containing semiconductor. In claim 1,
The semiconductor material is applied by one or more of an inkjet method, a micro-dispensing method, a transfer method, a screen coating / printing method, a slit coating method, a spray coating method, a capillary coating method, a dip method, and a spin coating method. A method of manufacturing a semiconductor device, characterized in that the method is performed using a type. In claim 1,
Manufacturing of a semiconductor device, wherein the first electrode is a gate electrode, the second and third electrodes are source or drain electrodes, respectively, and the first insulating film is a gate insulating film. Method. In claim 8,
The step of laminating the first conductive film and the first insulating film is characterized in that the first conductive film is formed by anodic oxidation. In claim 8,
The method of forming the second insulating film on the pair of side walls of the first electrode is characterized in that the pair of side walls of the first electrode is formed by anodic oxidation. In claim 8,
A method of manufacturing a semiconductor device, wherein the semiconductor material to be coated is an organic semiconductor. In claim 8,
A method of manufacturing a semiconductor device, wherein the semiconductor material to be coated is an oxide semiconductor. In claim 8,
A method for manufacturing a semiconductor device, wherein the semiconductor material to be coated is a silicon-containing semiconductor. In claim 8,
The semiconductor material is applied by one or more of an inkjet method, a micro-dispensing method, a transfer method, a screen coating / printing method, a slit coating method, a spray coating method, a capillary coating method, a dip method, and a spin coating method. A method of manufacturing a semiconductor device, characterized in that the method is performed using a type. In claim 1,
In the step of forming the photoresist film corresponding to the first electrode on the laminated layer, a plurality of the photoresist films corresponding to the first electrode are formed in a matrix strip,
And the first electrode of each semiconductor device in the row or column arranged in the matrix strip is connected by the first conductive film,
In addition, after the step of forming the second and third electrodes, the step of connecting the second or third electrode of each semiconductor device in a column or row arranged in the matrix strip with a third conductive film Have
The first electrode, the first insulating film above the first electrode, the second insulating film formed on a pair of side surfaces of the first electrode, and the second and second films provided on the side portions A matrix device includes a plurality of semiconductor devices each formed of a set of the third electrode and the semiconductor film provided in contact with the second and third electrodes and covering the first insulating film. A method for manufacturing a semiconductor device, characterized in that an individual arrangement is formed. In claim 1,
In the step of forming the photoresist film corresponding to the first electrode on the stacked layer, at least two photoresist films corresponding to the first electrode are formed and formed,
After the step of processing into a stacked body of the first electrode and the first insulating film, a fourth conductive film connected to the stacked body of the first semiconductor device of the two semiconductor devices is formed. Having a process,
After the step of forming the second and third electrodes, the fourth conductive film connected to the first semiconductor device of the two semiconductor devices and the second of the two semiconductor devices. Forming a fifth conductive film for connecting the second or third electrode of the semiconductor device,
The first electrode, the first insulating film above the first electrode, the second insulating film formed on a pair of side surfaces of the first electrode, and the second and second films provided on the side portions At least two semiconductor devices configured by a set of the third electrode and the semiconductor film provided in contact with the second and third electrodes and covering the first insulating film are disposed. A method for manufacturing a semiconductor device, characterized in that a formed shape is formed. In claim 16,
The method of manufacturing a semiconductor device, wherein the fourth conductive film is formed by coating.

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