JP2009118077A - Receiver and its control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a receiver capable of reducing the influence on an active antenna, and surely detecting the connection state of the active antenna. <P>SOLUTION: The receiver 20 connected to an active antenna 10 comprises a current mirror circuit, equipped with a reference-side transistor (transistor 60) and an output-side transistor (transistor 61); a power feed circuit (antenna power feed circuit 23) for feeding power to the active antenna via the output terminal of the reference-side transistor; a current-detecting circuit (resistor 62) for detecting the current fed to the active antenna through the power feed circuit by a current through the output terminal of the output side transistor, and a state-determining circuit (comparator 57 and resistors 54-56) for determining the connection of the active antenna to the receiver, by the current detected by the current-detecting circuit. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a receiving apparatus and a receiving apparatus control method.

  Patent Document 1 discloses a technique related to an active antenna in which an antenna element and an amplifier circuit are integrated. According to such a technique, it is possible to increase the reception sensitivity and reduce the noise level.

  FIG. 4 shows a configuration of a receiving apparatus to which an active antenna is connected. As shown in this figure, the active antenna 10 includes an antenna element 11 and a low noise amplifier 12. The receiving device 20 includes an antenna state detection circuit 21, a signal processing circuit 22, an antenna power supply circuit 23, and a power supply circuit 24. The active antenna 10 and the receiving device 20 are connected by a coaxial cable 30.

  Here, the antenna element 11 captures radio waves transmitted from a transmission device (not shown) and supplies the radio waves to the low noise amplifier 12. The low noise amplifier 12 operates using the DC power supplied from the receiving device 20 as a power source, amplifies the received signal captured by the antenna element 11 with a predetermined gain, and passes the coaxial signal 30 to the receiving device 20 as an RF signal. Supply.

  The antenna state detection circuit 21 supplies DC power from the antenna power supply circuit 23 to the active antenna 10, detects the connection state of the active antenna 10, and supplies the detection result to the signal processing circuit 22 as a detection signal DET. . The antenna state detection circuit 21 supplies the RF signal supplied from the active antenna 10 to the signal processing circuit 22.

  The signal processing circuit 22 determines the connection state of the active antenna 10 based on the detection signal DET supplied from the antenna state detection circuit 21 and performs signal processing on the RF signal supplied from the antenna state detection circuit 21.

  The antenna power supply circuit 23 generates DC power to be supplied to the active antenna 10 based on the DC power supplied from the power supply circuit 24 and supplies the DC power to the antenna state detection circuit 21. The power supply circuit 24 supplies DC power to the signal processing circuit 22 and the antenna power supply circuit 23.

  FIG. 5 is a diagram illustrating a configuration of the antenna state detection circuit 21. As shown in this figure, the antenna state detection circuit 21 includes capacitors 50 and 51, a coil 52, resistors 53 to 56, and a comparator 57. The capacitor 50 is a DC cut capacitor and prevents a DC voltage from being applied to the signal processing circuit 22. The capacitor 51 is a decoupling capacitor. The coil 52 prevents high frequency signals from flowing into the comparator 57 and the antenna power supply circuit 23. The resistor 53 is a resistor for detecting a current supplied from the antenna power supply circuit 23 to the active antenna 10. The resistors 54 to 56 are resistors for generating reference voltages VH and VL supplied to the comparator. The comparator 57 compares the voltage VD generated in the resistor 53 with the reference voltages VH and VL generated in the resistors 54 to 56, and outputs a detection signal DET which is a 2-bit signal according to the comparison result.

6A is a diagram showing the relationship between the voltage VD generated in the resistor 53, the reference voltages VH and VL generated in the resistors 54 to 56, and the detection signal DET that is an output signal of the comparator 57. As shown in this figure, when VD is in the range of VL <VD <VH, it is determined as an appropriate antenna current range, and B0 and B1 of the detection signal DET are set to “1” and “0”, respectively. When VD is in the range of VD ≦ VL, it is determined that the antenna current is excessive and the antenna is short-circuited, and B0 and B1 of the detection signal DET are set to “0” and “0”, respectively. When VD is in the range of VH ≦ VD, it is determined that the antenna current is excessive and the antenna is open, and B0 and B1 of the detection signal DET are set to “1” and “1”, respectively. . The signal processing circuit 22 can know the connection state of the active antenna 10 by referring to the bits B0 and B1 of the detection signal DET supplied from the antenna state detection circuit 21.
JP-A-8-88508

  By the way, in the receiving apparatus 20 shown in FIGS. 4 and 5, in order to eliminate the influence of noise and the like and stably detect the antenna connection state, the range (VL to VH) for determining that the antenna connection is normal is wide. It is desirable to set. For this purpose, it is necessary to set a large value for the resistor 53. However, if the value of the resistor 53 is increased, a voltage drop occurs in the resistor 53, and the power supply voltage supplied to the low noise amplifier 12 of the active antenna 10 is correspondingly increased. It will decline. Specifically, the resistance value of the resistor 53 is 10Ω, the normal antenna current I is in the range of 20 mA to 50 mA, and the supply voltage from the antenna feeding circuit 23 is 5V. In this case, the reference voltages VH and VL are 4.8 V and 4.5 V, respectively, and the range for determining that the antenna connection is normal is 0.3 V (= VH−VL).

  Therefore, in order to double the voltage range for normal antenna connection to 0.6 V, the resistance value of the resistor 53 needs to be doubled to 20Ω. However, when the resistance value is increased, the voltage drop in the resistor 53 is 0.4 to 1.0 V when the normal antenna current I is in the range of 20 mA to 50 mA. In this case, since the power supply voltage supplied to the low noise amplifier 12 is 4.0V to 4.6V, when the power supply voltage of the low noise amplifier 12 is 4V, a sufficient power supply voltage margin cannot be obtained. There is a point.

  An object of the present invention is to provide a receiving apparatus and a control method capable of reliably detecting a connection state of an active antenna while reducing an influence on the active antenna.

In order to solve the above problems, a receiving device of the present invention is a receiving device to which an active antenna is connected, and includes a current mirror circuit having a reference side transistor and an output side transistor, and the reference side transistor with respect to the active antenna. A detection circuit that detects a current supplied from the power supply circuit to the active antenna based on a current flowing through the output terminal of the output-side transistor, and the detection circuit And a determination circuit for determining a connection state of the active antenna to the own device based on the current detected by.
According to the above configuration, the power supply power is supplied from the power supply circuit to the active antenna via the output terminal of the reference side transistor, and based on the current flowing through the output terminal of the output side transistor constituting the reference side transistor and the current mirror circuit. Then, the detection circuit detects the current supplied to the active antenna, and the determination means determines the connection state of the active antenna to the own device based on the current detected by the detection circuit. For this reason, since the voltage drop at the time of current detection can be reduced, it is possible to reliably detect the connection state of the active antenna while reducing the influence on the active antenna.

Further, in the receiving device having the above configuration, the determination circuit determines that the active antenna is normally connected when the current detected by the detection circuit is within a predetermined range, and the predetermined circuit It is determined that the active antenna is in a short-circuited state if it is larger than the predetermined range, and it is determined that the active antenna is in an open state if it is smaller than the predetermined range.
According to the above configuration, the connection state of the active antenna is determined by the determination circuit based on whether or not the current detected by the detection circuit belongs to the predetermined range. For this reason, even if there is variation in the current flowing through the active antenna, the connection state can be reliably determined.

Further, in the receiving device having the above configuration, the determination circuit includes a comparator, and the comparator compares a voltage corresponding to the current detected by the detection circuit with a reference voltage corresponding to the predetermined range. A signal corresponding to a connection state of the active antenna is output.
According to the above configuration, the comparator compares the reference voltage corresponding to the predetermined range with the voltage corresponding to the current detected by the detection circuit, and outputs a signal corresponding to the connection state. For this reason, the connection state of the active antenna can be easily determined by referring to the signal output from the comparator.

In the receiving device having the above-described configuration, the determination circuit includes an A / D conversion circuit, and the A / D conversion circuit has a voltage corresponding to the current detected by the detection circuit and the predetermined range. The signal is compared with a corresponding reference voltage, and a signal corresponding to the connection state of the active antenna is output.
According to the above configuration, the A / D conversion circuit compares the reference voltage corresponding to the predetermined range with the voltage corresponding to the current detected by the detection circuit, and outputs a signal corresponding to the connection state. For this reason, the connection state of the active antenna can be easily determined by referring to the signal output from the A / D conversion circuit.

Also, the control method for a receiving device of the present invention is a control method for a receiving device to which an active antenna is connected, wherein power is supplied to the active antenna via an output terminal of a reference-side transistor, and the power supply A current fed from the circuit to the active antenna is detected based on a current flowing through an output terminal of an output side transistor that constitutes a current mirror circuit together with the reference side transistor, and the current of the active antenna is detected based on the detected current. It is characterized by determining a connection state to the own device.
According to the above configuration, power is supplied to the active antenna through the output terminal of the reference-side transistor, and the active antenna is based on the current flowing through the output terminal of the output-side transistor that forms the current mirror circuit with the reference-side transistor. A current fed to the antenna is detected, and a connection state of the active antenna to the own device is determined based on the detected current. For this reason, since the voltage drop at the time of current detection can be reduced, it is possible to reliably detect the connection state of the active antenna while reducing the influence on the active antenna.

  According to the present invention, the antenna current detection accuracy indicating the antenna connection state is improved by suppressing a decrease in the antenna feeding voltage (preventing malfunction due to noise, etc.).

(A) Configuration of Embodiment Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram showing a configuration example of a receiving system having a receiving apparatus according to an embodiment of the present invention. As shown in this figure, the receiving system includes an active antenna 10 and a receiving device 20 as main components. Here, the active antenna 10 includes an antenna element 11 and a low noise amplifier 12. The receiving device 20 includes an antenna state detection circuit 41, a signal processing circuit 22, an antenna power supply circuit 23 (corresponding to “power supply circuit” in the claims), and a power supply circuit 24. The active antenna 10 and the receiving device 20 are connected by a coaxial cable 30.

  Here, the antenna element 11 captures a radio wave transmitted from a GPS (Global Positioning System) satellite (not shown) and supplies it to the low noise amplifier 12, for example. The low noise amplifier 12 operates using the DC power supplied from the receiving device 20 as a power source, amplifies the received signal captured by the antenna element 11 with a predetermined gain, and passes through the coaxial cable 30 as an RF (Radio Frequency) signal. The signal is supplied to the receiving device 20.

  The antenna state detection circuit 41 supplies DC power from the antenna power supply circuit 23 to the active antenna 10 through the coaxial cable 30, detects the connection state of the active antenna 10, and outputs the detection result as a detection signal DET. This is supplied to the processing circuit 22. The antenna state detection circuit 41 extracts the RF signal supplied from the active antenna 10 and supplies it to the signal processing circuit 22.

  The signal processing circuit 22 determines the connection state of the active antenna 10 based on the detection signal DET supplied from the antenna state detection circuit 41 and performs signal processing on the RF signal supplied from the antenna state detection circuit 41. When the active antenna 10 is not connected or in a short circuit state, the signal processing circuit 22 displays predetermined information on a human interface (HIF) (not shown), and the active antenna 10 is normal. It is possible to notify the user that it is not.

  The antenna power supply circuit 23 generates DC power to be supplied to the active antenna 10 based on the DC power supplied from the power supply circuit 24 and supplies the DC power to the antenna state detection circuit 41. The power supply circuit 24 supplies DC power to the signal processing circuit 22 and the antenna power supply circuit 23.

  FIG. 2 is a diagram illustrating a configuration example of the antenna state detection circuit 41. As shown in this figure, the antenna state detection circuit 41 corresponds to capacitors 50 and 51, a coil 52, resistors 54 to 56 (corresponding to “determination circuit” in the claims), and resistor 62 (corresponding to “detection circuit” in the claims). ), A comparator 57 (corresponding to “judgment circuit” in the claims), a transistor 60 (corresponding to “reference transistor” in the claims), and a transistor 61 (corresponding to “output transistor” in the claims). .

  Here, the capacitor 50 has one terminal connected to the signal processing circuit 22 and the other terminal connected to one terminal of the coil 52. The other terminal of the capacitor 50 is connected to the low noise amplifier 12 via the coaxial cable 30. The capacitor 50 is a DC cut capacitor and prevents the DC voltage output from the coil 52 from being applied to the signal processing circuit 22.

  The capacitor 51 has one terminal connected to the other terminal of the coil 52 and the collector terminal of the transistor 60, and the other terminal grounded. The capacitor 51 is a decoupling capacitor and has a function of suppressing power supply noise and accompanying radiated electromagnetic noise. The coil 52 has one terminal connected to the other terminal of the capacitor 50 and the low noise amplifier 12, and the other terminal connected to one terminal of the capacitor 51 and the collector of the transistor 60. The coil 52 blocks or attenuates the RF signal, which is a high-frequency signal, so that it does not flow into the comparator 57 and the antenna power supply circuit 23.

  The transistors 60 and 61 are PNP-type bipolar transistors and constitute a current mirror circuit. That is, the emitter terminal (corresponding to “output terminal” in the claims) of the transistor 60 is connected to the antenna feeding circuit 23, and the base terminal is connected to the base terminal of the transistor 61 and the collector terminal of the transistor 60. The collector terminal (corresponding to “output terminal” in the claims) of the transistor 60 is connected to one terminal of the capacitor 51 and the other terminal of the coil 52.

  The emitter terminal (corresponding to “output terminal” in the claims) of the transistor 61 is connected to the antenna feeding circuit 23 and the emitter terminal of the transistor 60, and the base terminal is connected to the base terminal of the transistor 60 and the collector terminal of the transistor 60. Yes. The collector terminal (corresponding to “output terminal” in the claims) of the transistor 61 is connected to the input terminal of the comparator 57 and one terminal of the resistor 62.

  The resistor 62 has one terminal connected to the collector terminal of the transistor 61 and the input terminal of the comparator 57, and the other terminal grounded. A current Id flowing between the emitter and collector, which is the output terminal of the transistor 61 constituting the current mirror circuit, flows into the resistor 62, and a voltage corresponding to the resistance value appears. The comparator 57 compares the voltage generated in the resistor 62 with the reference voltage generated in the resistors 54 to 56, and outputs a detection signal DET.

  The resistors 54 to 56 are connected in series, and a DC voltage of the antenna feeding circuit 23 is applied to one terminal of the resistor 54, and one terminal of the resistor 56 is grounded. A reference voltage VHd appears at the connection between the other terminal of the resistor 54 and one terminal of the resistor 55, and this reference voltage VHd is input to one reference voltage input terminal of the comparator 57. Further, a reference voltage VLd (<VHd) appears at a connection portion between the other terminal of the resistor 55 and the other terminal of the resistor 56, and this reference voltage VLd is input to the other reference voltage input terminal of the comparator 57.

  The comparator 57 inputs the voltage VDd appearing at the resistor 62 from the input terminal, compares the voltage VDd with the reference voltages VHd and VLd, generates a 2-bit detection signal DET based on the comparison result, and outputs it. .

  FIG. 6B is a diagram showing the relationship between the voltage VDd generated in the resistor 62, the reference voltages VHd and VLd generated in the resistors 54 to 56, and the detection signal DET that is an output signal of the comparator 57. As shown in this figure, when VDd is in the range of VLd <VDd <VHd, it is determined as an appropriate antenna current range, and B0 and B1 of the detection signal DET are set to “1” and “0”, respectively. When VDd is in the range of VDd ≦ VLd, it is determined that the antenna current is excessive and the antenna is open, and B0 and B1 of the detection signal DET are set to “0” and “0”, respectively. When VDd is in the range of VHd ≦ VDd, it is determined that the antenna current is excessive and the antenna is short-circuited, and B0 and B1 of the detection signal DET are set to “1” and “1”, respectively. In the signal processing circuit 22, the connection state of the active antenna 10 can be known by referring to the bits B 0 and B 1 of the detection signal DET supplied from the antenna state detection circuit 41.

(B) Operation of Embodiment Next, the operation of the embodiment of the present invention will be described. When the power of the receiving device 20 is turned on, the power supply circuit 24 starts to operate and supplies DC power to the signal processing circuit 22 and the antenna power supply circuit 23. As a result, the signal processing circuit 22 and the antenna feeding circuit 23 start to operate. The power of the power supply circuit 24 is also supplied to a display device as a human interface (not shown), so that the display device can be operated.

  The antenna power supply circuit 23 obtains a DC voltage (for example, 5V) to be supplied to the antenna state detection circuit 41 by boosting or stepping down the DC voltage supplied from the power supply circuit 24. The DC voltage generated by the antenna feeding circuit 23 is supplied to each part of the antenna state detection circuit 21 shown in FIG. As a result, the resistors 54 to 56 divide the DC voltage supplied from the antenna power supply circuit 23 according to the respective resistance values, generate reference voltages VHd and VLd, and generate one reference voltage input terminal of the comparator 57 and the other. Are input to the reference power input terminals.

  Further, the DC voltage supplied from the antenna power supply circuit 23 is applied to the emitter terminals of the transistors 60 and 61. Since the collector terminal of the transistor 60 is connected to the low noise amplifier 12 via the coil 52 and the coaxial cable 30, when a DC voltage is applied to the emitter terminal, the antenna current I flows into the low noise amplifier 12, and low noise. The amplifier 12 is in an operating state.

  At this time, since the transistor 60 and the transistor 61 constitute a current mirror circuit, a current Id having a value almost equal to the antenna current I flowing between the emitter and collector of the transistor 60 is also generated between the emitter and collector of the transistor 61. Flowing. This current Id flows into the resistor 62, and a voltage VDd corresponding to the current Id and the resistance value of the resistor 62 is generated at one terminal of the resistor 62. The voltage VDd generated in this way is input to the input terminal of the comparator 57.

  The comparator 57 compares the voltage VDd input to the input terminal, the reference voltage VHd input to one reference voltage input terminal, and the reference voltage VLd input to the other reference voltage input terminal. As shown in B), when VDd is in the range of VLd <VDd <VHd, B0 and B1 of the detection signal DET are set to “1” and “0”, respectively. When VDd is in the range of VDd ≦ VLd, B0 and B1 of the detection signal DET are set to “0” and “0”, respectively. When VDd is in the range of VHd ≦ VDd, B0 and B1 of the detection signal DET are set to “1” and “1”, respectively.

  The signal processing circuit 22 can determine the connection state of the active antenna 10 by referring to the two bits B0 and B1 of the detection signal DET supplied from the antenna state detection circuit 41. For example, when B0 and B1 of the detection signal DET are “1” and “0”, respectively, it is determined that the antenna is in the proper antenna current range and the antenna is normally connected. Further, when B0 and B1 of the detection signal DET are “0” and “0”, respectively, it is determined that the antenna current is too small and the antenna is open. When B0 and B1 of the detection signal DET are “1” and “1”, respectively, it is determined that the antenna current is excessive and the antenna is short-circuited. The determination result by the signal processing circuit 22 is displayed on a display unit as a human interface (not shown) so that the user can know the connection state of the active antenna 10. In addition, when the connection state of the active antenna 10 is not normal, the signal processing circuit 22 stops the operation of the power supply circuit 24 or the antenna power supply circuit 23, thereby damaging the power supply circuit 24 and the antenna power supply circuit 23. Can be prevented.

  When the signal processing circuit 22 determines that the connection state of the active antenna 10 is normal, the signal processing circuit 22 is captured by the antenna element 11 and amplified by the low noise amplifier 12, and the signal processing circuit 22 passes through the coaxial cable 30 and the antenna state detection circuit 41. Predetermined signal processing is performed on the supplied RF signal. Thereby, the information contained in the RF signal can be acquired.

  Incidentally, in the present embodiment, the antenna current I can be accurately detected while reducing the influence on the low noise amplifier 12 as compared with the conventional example shown in FIGS. That is, the current flowing from the antenna power supply circuit 23 to the low noise amplifier 12 passes through the transistor 60. However, the transistor 60 is in a diode-connected state with the base terminal and the collector terminal connected. For this reason, the voltage drop between the emitter terminal and the collector terminal of the transistor 60 is in the range of 0.6 to 0.7 V regardless of the value of the antenna current I. For this reason, even if the normal range of the antenna current I varies within the range of 20 mA to 50 mA, the voltage drop between the emitter terminal and the collector terminal of the transistor 60 is substantially constant (0.6 V to 0.7 V). Therefore, the power supply voltage supplied to the low noise amplifier 12 does not vary depending on the value of the antenna current I.

  The value of the antenna current I flowing through the transistor 60 is detected by the voltage VDd generated in the resistor 62 by the current Id flowing out from the collector terminal of the transistor 61. The value of the antenna current I is independent of the value of the resistor 62. It is. From this, since the resistor 62 having a desired resistance value can be used, the detection accuracy can be improved. More specifically, for example, when the resistor 62 having a resistance value of 50Ω is used, if the antenna current I is in the range of 20 mA to 50 mA as described above, the reference voltages VLd and VHd are 1.0 V ( = 20 mA × 50Ω) and 2.5 V (= 50 mA × 50Ω). Therefore, since the voltage range determined to be the normal range is 1.5 V (= 2.5 V−1.0 V), the antenna connection state can be accurately determined without being affected by noise or the like.

  Further, when the resistor 62 having a resistance value of 75Ω is used, if the antenna current I is in the range of 20 mA to 50 mA as described above, the reference voltages VLd and VHd are 1.5 V (= 20 mA × 75Ω), respectively. And 3.75 V (= 50 mA × 75Ω). Therefore, since the voltage range that is determined to be the normal range is 2.25V (= 3.75V-1.5V), the antenna connection state can be determined more accurately without being affected by noise or the like. .

  As described above, in the embodiment of the present invention, the antenna current is supplied to the active antenna 10 via one transistor 60 of the transistors 60 and 61 constituting the current mirror circuit and flows to the active antenna 10. The current is detected based on the current flowing through the transistor 61, and the connection state of the active antenna 10 is determined based on this current. For this reason, since the voltage drop in the transistor 60 is constant regardless of the value of the antenna current I, the power supply voltage supplied to the low noise amplifier 12 can be kept constant regardless of variations in the antenna current I.

  Further, in this embodiment, the antenna current I is detected based on the voltage generated when the collector current of the transistor 61 flows into the resistor 62. Since the collector current of the transistor 60 is irrelevant to the value of the resistor 62, by using the resistor 62 having a desired value, the voltage range can be set wide, and as a result, the influence of noise can be suppressed.

(C) Modified Embodiment The above-described embodiment is merely an aspect of the present invention, and it is needless to say that modifications and applications can be arbitrarily made within the scope of the present invention.
For example, in the above embodiment, the voltage VDd generated in the resistor 62 is converted into the 2-bit detection signal DET by comparing with the reference voltages VHd and VLd by the comparator 57. For example, as shown in FIG. As described above, the A / D (Analog to Digital) conversion circuit 70 (corresponding to the “determination circuit” in the claims) may be used to convert the detection signal DET into two bits. In the antenna state detection circuit 41 </ b> A shown in FIG. 3, the comparator 57 is replaced with the A / D conversion circuit 70 and the resistors 54 to 56 are excluded as compared with the case of FIG. 2. The input terminal of the A / D conversion circuit 70 is connected to one terminal of the resistor 62. The output terminal is connected to the signal processing circuit 22, and a 2-bit detection signal DET composed of B0d and B1d is supplied to the signal processing circuit 22. Further, power from the antenna power supply circuit 23 is supplied to the power supply terminal of the A / D conversion circuit 70. The operation of the embodiment shown in this figure is the same as that of FIG. 2 except for the A / D conversion circuit 70.

  In the example of FIG. 3, the A / D conversion circuit 70 compares the voltage VDd appearing at one terminal of the resistor 62 with a built-in reference voltage, thereby converting it into a 2-bit signal consisting of B0d and B1d. The 2-bit A / D conversion circuit 70 has three reference voltages VLe, VMe, and VHe, compares the voltage VDd input from the input terminal with these reference voltages, and (0, 0), (0, 1) One of (1, 0) and (1, 1) is output as an output signal. Therefore, VHe is made to correspond to VHd, VLe is made to correspond to VLd, outputs (0, 1) and (1, 0) are set to the normal state, (0, 0) is set to the antenna short-circuit state, and (1, 1 ) In the antenna open state. In this way, the detection signal DET can be obtained by using the A / D conversion circuit 70 as in the case described above. For simplicity of explanation, the A / D conversion circuit 70 is 2 bits here, but it can of course be 3 bits or more.

  In the above embodiment, a PNP bipolar transistor is used as the current mirror circuit. However, an NPN bipolar transistor or an FET (Field Effect Transistor) can be used. For example, when a MOS (Metal-Oxide Semiconductor) is used as an FET, the voltage between the source and the drain as the output terminal can be made lower than the above-mentioned 0.6V to 0.7V. The margin of the power supply voltage supplied to 12 can be kept higher.

  In the above embodiment, the power supply voltage and the RF signal are transmitted via the same coaxial cable 30, but they may be transmitted by different cables.

It is a block diagram which shows the structural example of embodiment of this invention. It is an example of a structure of the antenna state detection circuit shown in FIG. 3 is another configuration example of the antenna state detection circuit shown in FIG. 1. It is a figure which shows the structure of the conventional receiver. 5 is a configuration example of an antenna state circuit shown in FIG. It is a figure explaining operation | movement of the comparator shown to FIG. 1 and FIG.

Explanation of symbols

10 Active Antenna 20 Receiver 23 Antenna Feeder Circuit (Feeder Circuit)
54-56 Resistance (judgment circuit)
57 Comparator (judgment circuit)
60 transistors (reference side transistors)
61 transistor (output side transistor)
62 Resistance (detection circuit)
70 A / D conversion circuit (judgment circuit)

Claims (5)

A receiving device to which an active antenna is connected,
A current mirror circuit having a reference side transistor and an output side transistor;
A power feeding circuit that feeds power to the active antenna via the output terminal of the reference-side transistor;
A detection circuit for detecting a current fed from the power feeding circuit to the active antenna based on a current flowing through an output terminal of the output side transistor;
A determination circuit for determining a connection state of the active antenna to the own device based on the current detected by the detection circuit;
A receiving apparatus comprising: The receiving device according to claim 1,
The determination circuit determines that the active antenna is normally connected when the current detected by the detection circuit is within a predetermined range, and the active circuit when the current is larger than the predetermined range. It is determined that the antenna is in a short-circuited state, and when it is smaller than the predetermined range, it is determined that the active antenna is in an open state. The receiving device according to claim 2,
The determination circuit includes a comparator,
The comparator compares a voltage corresponding to the current detected by the detection circuit with a reference voltage corresponding to the predetermined range, and outputs a signal corresponding to the connection state of the active antenna. Receiver device. The receiving device according to claim 2,
The determination circuit includes an A / D conversion circuit,
The A / D conversion circuit compares a voltage corresponding to the current detected by the detection circuit with a reference voltage corresponding to the predetermined range, and outputs a signal corresponding to the connection state of the active antenna. A receiving device. A control method for a receiving apparatus to which an active antenna is connected,
Power is supplied to the active antenna via the output terminal of the reference transistor,
Detecting a current fed from the power feeding circuit to the active antenna based on a current flowing through an output terminal of an output side transistor constituting a current mirror circuit together with the reference side transistor;
Based on the detected current, the connection state of the active antenna to its own device is determined.
A control method for a receiving apparatus.

Images