JP2009099927A - Semiconductor device - Google Patents

Abstract

A semiconductor device (IPM) capable of reducing a plane area is provided.
An IPM includes a U-phase output unit, a V-phase output unit, a W-phase output unit, a control unit, and a boosting unit. The output units 2 to 4 and the boosting unit 6 that output different phases are stacked. Further, the output units 2 to 4 and the booster unit 6 are fixed at a predetermined interval with screws (not shown) in a state of being erected vertically to the control unit 5.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device that is an intelligent power module including a power device and a control circuit.

  2. Description of the Related Art Conventionally, there is known an IPM that is a power module in which an output unit including an IGBT or the like and capable of outputting a plurality of different phases and a control circuit for controlling an IGBT gate or the like are integrally provided.

Patent Document 1 discloses an IPM in which a power device (output unit) for outputting a U phase, a V phase, and a W phase is arranged on a single planar plate member.
JP 2005-142228 A

  However, in the IPM of Patent Document 1, since the power device is installed on one flat plate member, there is a problem that the plane area becomes large.

  The present invention has been made in order to solve the above-described problems, and an object of the present invention is to provide a semiconductor device capable of reducing the plane area.

  In order to achieve the above object, the invention according to claim 1 is arranged to be stacked on the first output unit that outputs the first phase and the first output unit, and has a phase different from that of the first phase. A semiconductor device comprising: a second output unit that outputs a second phase; and a control unit that controls the output unit. Here, “lamination” refers to a stacked state regardless of whether there is an interval between the first output unit and the second output unit.

  In the invention according to claim 2, the output unit includes a high voltage unit and a low voltage unit to which electric power having a voltage lower than that of the high voltage unit is supplied, and the high voltage unit and the low voltage unit are stacked. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device.

  The invention according to claim 3 is characterized in that the high-voltage part and the low-voltage part include semiconductor elements, and the high-voltage part and the low-pressure part are stacked so that the semiconductor elements face each other. The semiconductor device according to claim 2.

  According to a fourth aspect of the present invention, the high-voltage unit and the low-voltage unit include a wiring and a bus bar through which a current flows, and the current and the wiring and the bus bar of the high-voltage unit are opposite to the wiring and the bus bar of the high-voltage unit. 4. The semiconductor device according to claim 2, wherein any one of the low-voltage wiring and the bus bar that flows in the direction is arranged in parallel. 5.

  The invention according to claim 5 is characterized in that the first output unit and the second output unit are erected on the control unit. It is a semiconductor device as described in above.

  According to a sixth aspect of the present invention, the first output unit and the second output unit include a control bus bar for connecting to the control unit, and the control bus bar is connected to the control unit. The semiconductor device according to claim 5, wherein the semiconductor device is inserted into the formed hole.

  The invention according to claim 7 is characterized in that the first output unit and the second output unit include a heat radiating plate that conducts heat in a direction different from a direction in which the control unit is arranged. A semiconductor device according to any one of claims 1 to 6.

  According to an eighth aspect of the present invention, the output unit includes a plurality of semiconductor elements and a wiring board on which the semiconductor elements are provided, and the plurality of semiconductor elements are disposed on both sides of the substrate. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device.

  The invention according to claim 9 further includes a voltage adjusting unit that adjusts a voltage supplied from the outside, and each of the output units and the voltage adjusting unit has a switching device that can be switched on and off. Of the output units and the voltage adjusting unit, the one having the highest switching frequency of the switching device is disposed outside the stacking direction. It is a semiconductor device given in any 1 paragraph.

  The invention according to claim 10 is the semiconductor device according to claim 9, wherein the frequency of the voltage adjusting unit is larger than that of each of the output units.

  The invention according to claim 11 is the semiconductor device according to claim 10, wherein the voltage adjusting unit is arranged on the upstream side of the air from the output units.

  The voltage regulator may include a high voltage unit having a switching device, a low voltage unit having a switching device, to which a voltage lower than a voltage applied to the high voltage unit is applied. The switching frequency of the switching device of the low voltage part of the voltage regulator is higher than the switching frequency of the switching device of the high voltage part of the voltage regulator, and the low voltage part of the voltage regulator The semiconductor device according to claim 9, wherein the semiconductor device is disposed outside the stacking direction.

  The invention according to claim 13 is characterized in that the low-voltage part of the voltage regulator is arranged on the upstream side of the air flow with respect to the high-voltage part of the voltage regulator. This is a semiconductor device.

  According to the semiconductor device of the present invention, the plane area can be reduced by stacking output units that output different phases.

(First embodiment)
A first embodiment in which the present invention is applied to a three-phase intelligent power module (hereinafter, IPM) will be described below with reference to the drawings. FIG. 1 is an overall perspective view of an IPM according to the first embodiment. FIG. 2 is a cross-sectional view taken along the line II-II in FIG. FIG. 3 is a plan view of the U-phase output unit. 4 is a cross-sectional view taken along line IV-IV in FIG. FIG. 5 is a perspective view for explaining the switching device. FIG. 6 is a perspective view for explaining the diode. FIG. 7 is a schematic circuit diagram of the IPM. In the following description, the vertical direction shown in FIG.

  As shown in FIGS. 1 and 2, the IPM 1 according to the first embodiment includes a U-phase output unit 2, a V-phase output unit 3, a W-phase output unit 4, a control unit 5, and a boosting unit 6. ing. The output units 2 to 4 and the boosting unit 6 that output different phases are stacked. Further, the output units 2 to 4 and the booster unit 6 are fixed at a predetermined interval with screws (not shown) in a state of being erected vertically to the control unit 5.

  As shown in FIGS. 3 and 4, the U-phase output unit 2 includes a high voltage unit 11, a low voltage unit 12, a wiring board 13, a heat radiating plate 14, seven bus bars 15 to 21, and a plurality of Al wires 22. And a case 23.

  The high voltage unit 11 is supplied with DC power having a high voltage (positive voltage) from the P-side power supply unit. The high voltage unit 11 includes a switching device 32 made of an npn IGBT (Insulated Gate Bipolar Transistor) or a MOS (Metal Oxide Semiconductor) transistor, a backflow preventing commutation diode (hereinafter referred to as a diode) 33, and a wiring board 13. And an Al wiring 34 formed on the substrate.

  As shown in FIG. 5, a gate 32 g and a source 32 s are formed on the upper surface of the switching device 32. On the lower surface of the switching device 32, a drain 32d connected to the Al wiring 34 through solder is formed. In the following description, when the drains, gates, and sources of other switching devices are described, the numbers d, g, and s are assigned to the numbers of the switching devices. As shown in FIGS. 3 and 7, the drain 32 d of the switching device 32 is connected to the P-side power supply bus bar 16 via the Al wiring 34 and the Al wire 22. The source 32 s of the switching device 32 is connected to the U-phase output bus bar 15 via the Al wire 22. The source 32 s of the switching device 32 is also connected to the bus bar 19 for connecting to the booster 6 via the Al wire 22. The gate 32 g of the switching device 32 is connected to the bus bar 18 for connecting the gate driver via the Al wire 22.

  Moreover, the material which comprises the switching device 32 is not specifically limited, Si, SiC, GaN, AlN, a diamond, etc. can be suitably changed according to a use and the objective. For example, SiC and GaN are preferable when it is desired to suppress switching loss and power loss. Note that SiC is also effective when operated at a high temperature (about 300 ° C.). In addition, GaN is preferable when driving at a high frequency. When GaN is employed, the inductance component (L component) and the capacitance component (C component) can be further suppressed, and the size can be reduced. Moreover, AlN is preferable when it is desired to increase the dielectric breakdown coefficient and improve the breakdown voltage. In addition, when AlN is adopted and the wiring board 13 is made of the same AlN, the generation of thermal stress due to the difference in thermal expansion coefficient can be suppressed. In addition, when diamond is used, all the physical property values of the above-described materials are exceeded, so that the IPM 1 can be downsized and power loss and switching loss can be greatly reduced.

  The diode 33 is for preventing a current from flowing backward through the switching device 32. As shown in FIG. 6, an anode 33 a is formed on the upper surface of the diode 33. On the lower surface of the diode 33, a cathode 33k connected to the Al wiring 34 through solder is formed. In the following description, when the anodes and cathodes of other diodes are described, the numbers a and k are assigned to the diode numbers. As shown in FIGS. 3 and 7, the anode 33 a of the diode 33 is connected to the U-phase output bus bar 15 via the Al wire 22. The cathode 33 k of the diode 33 is connected to the P-side power supply bus bar 16 via the Al wiring 34 and the Al wire 22. That is, the diode 33 is connected such that the direction from the source 32 s to the drain 32 d of the switching device 32 is the forward direction. Moreover, the material which comprises the diode 33 is not specifically limited, Like the switching device 32, Si, SiC, GaN, AlN, a diamond, etc. can be suitably changed according to a use and the objective.

  The low-voltage unit 12 is supplied with DC power having a voltage (negative voltage) lower than the power supplied from the P-side power supply unit from the N-side power supply unit. The low-voltage unit 12 includes a switching device 36 made of an npn type IGBT or MOS (Metal Oxide Semiconductor) transistor, a backflow preventing commutation diode (hereinafter referred to as a diode) 37, and an Al wiring 38 formed on the wiring substrate 13. And.

  The drain 36 d of the switching device 36 is connected to the U-phase output bus bar 15 via the Al wiring 38 and the Al wire 22. The source 36 s of the switching device 36 is connected to the N-side power supply bus bar 17 via the Al wire 22. The source 36 s of the switching device 36 is also connected to the bus bar 20 for connecting to the booster 6 via the Al wire 22. The gate 36g of the switching device 36 is connected to the bus bar 21 for connecting the gate driver.

  The anode 37 a of the diode 37 is connected to the N-side power supply bus bar 17 via the Al wire 22. The cathode 37 k of the diode 37 is connected to the U-phase output bus bar 15 via the Al wiring 38 and the Al wire 22.

The wiring board 13 is made of insulating Al ₂ O ₃ , AlN, Si ₃ N ₄ or SiO ₂ . Al wirings 34 and 38 are formed on the upper surface of the wiring board 13 (DBA (Direct Brazed Aluminum)). Instead of the Al wirings 34 and 38, a Cu wiring may be formed (DBC (Direct Bonding Copper)). On the other hand, the heat sink 14 is bonded to the lower surface of the wiring board 13 by a bonding agent (not shown) made of a metal having good thermal conductivity (for example, Al or Cu).

  The heat radiating plate 14 is for radiating the heat generated from the high voltage part 11 and the low voltage part 12 conducted through the wiring board 13 to the outside. The heat sink 14 is insulated from the high voltage part 11 and the low voltage part 12 by an insulating wiring board 13. As shown in FIG. 2, the heat radiating plate 14 is made of a thermally conductive anisotropic material having a high thermal conductivity in a direction S1 perpendicular to the surface, that is, a direction S1 different from the direction in which the control unit 5 is disposed. ing. As the thermally conductive anisotropic material, for example, a material in which carbon fibers whose directions are aligned are embedded in aluminum can be applied. The outer peripheral part of the heat sink 14 is bonded to the lower surface of the case 23 with an adhesive.

  The bus bars 15 to 21 are fixed to the case 23 with a central portion embedded therein. Thus, one end of the bus bars 15 to 21 is disposed on the recessed portion 23 d side of the case 23 and the other end is disposed on the outside of the case 23. The bus bars 15 to 21 are formed in a plate shape from conductive Cu or Al. The bus bar 15 is for outputting the U phase. The bus bar 16 is for supplying P-side power. The bus bar 17 is for supplying N-side power. That is, a current in the direction opposite to that of the bus bar 17 flows through the bus bar 16. The bus bars 18 and 21 are connected to gate drives 43 and 44 of the control unit 5 described later. The bus bars 19 and 20 are connected to the booster 6 through gate drives 43 and 44.

  The case 23 is made of a synthetic resin and is formed in a rectangular plate shape. A window 23 a is formed at the center of the case 23. The wiring board 13 is fitted into the window 23a. The case 23 has a recess 23d that is slightly larger than the window 23a. The recess 23d is filled with a protective gel 24 for protecting and insulating the high-pressure part 11, the low-pressure part 12, and the like. The protective gel 24 is made of a soft silicone resin or epoxy resin that can withstand heat of about 180 ° C. Further, the upper surface of the protective gel 24 is covered with a lid 25 that prevents leakage of the protective gel 24 and suppresses heat conduction to the high-pressure part 11 and the low-pressure part 12.

  Since the V-phase output unit 3 and the W-phase output unit 4 have substantially the same configuration as the U-phase output unit 2, only differences will be described. The V-phase output unit 3 outputs a V-phase that is different in phase from the U-phase from the output bus bar 15. The W-phase output unit 4 outputs a V-phase that is different in phase from the U-phase and the V-phase from the output bus bar 15. The bus bars 18 and 21 of the V-phase output unit 3 are connected to the gate drives 45 and 46 of the control unit 5. The bus bars 19 and 20 of the V-phase output unit 3 are connected to the booster unit 6 through gate drives 45 and 46. The bus bars 18 and 21 of the W-phase output unit 4 are connected to the gate drives 47 and 48 of the control unit 5. Further, the bus bars 19 and 20 of the W-phase output unit 4 are connected to the boosting unit 6 via gate drives 47 and 48.

  The control unit 5 includes a heat insulating material 41, a wiring board 42, six gate drives 43 to 48, and an Al wiring 50. Only a part of the Al wiring 50 is shown. The heat insulating material 41 is for suppressing that the heat from each phase output part 2-4 is conducted to the gate drives 43-48 which are weak to heat. The heat insulating material 41 is made of an insulating polyimide resin that can withstand heat of about 350 ° C., and is disposed between the wiring substrate 42 and the phase output units 2 to 4. Holes 49 (see FIG. 10) for inserting the control bus bars 15 to 21 and the bus bars 55 to 60 are formed in the outer peripheral portions of the heat insulating material 41 and the wiring board 42. From each hole 49, Al wiring 50 for connecting the bus bars 18 to 21, the gate drives 43 to 48, and the bus bars 55 to 60 extends. The bus bars 18 to 21 and the bus bars 55 to 60 and the Al wiring 50 are connected by solder.

  Each of the gate drives 43 to 48 is provided on the wiring board 42. The gate drive 43 (44) is for controlling the gate 32g (36g) of the switching device 32 (36) provided in the U-phase output unit 2. The gate drive 45 (46) is for controlling the gate 32g (36g) of the switching device 32 (36) provided in the V-phase output unit 3. The gate drive 47 (48) is for controlling the gate 32g (36g) of the switching device 32 (36) provided in the W-phase output unit 4.

  As shown in FIG. 2, the boosting unit 6 includes a boosting circuit unit 51, an Al wiring 52, a wiring board 53, a heat sink 54, and six bus bars 55-60 connected to the gate drives 43-48, A case 23 is provided. The step-up unit 6 controls the voltages of the sources 32 s and 36 s of the switching devices 32 and 36 of the output units 2 to 4 connected through the gate drives 43 to 48, the bus bars 19 and 20, and the bus bars 55 to 60. Thereby, the voltage of the gates 32g and 36g of the switching devices 32 and 36 is stabilized, and it is suppressed that a high voltage is applied to the gates 32g and 36g.

  Next, the operation of the IPM 1 described above will be described.

  When power is supplied from the bus bar 16 for P-side power supply and the bus bar 17 for N-side power supply while the gates 32g and 36g of the switching devices 32 and 36 are controlled by the gate drives 43 to 48, The output units 2 to 4 output three-phase AC power having different phases. Further, during operation, heat is radiated in the direction S1 from the heat radiating plates 14 of the output units 2 to 4. And heat is discharged | emitted outside by the air which passes between each output parts 2-4.

  Next, the assembly process of the IPM 1 described above will be described. 8 to 10 are perspective views for explaining an IPM assembly process.

  First, as shown in FIG. 8, the case 23 is manufactured by injection molding in a state where the bus bars 15 to 21 are placed in a mold. Next, as shown in FIG. 9, the heat radiating plate 14 to which the high voltage section 11, the low voltage section 12 and the wiring board 13 are bonded is bonded to the case 23. Thereafter, as shown in FIG. 3, an Al wire 22 is laid. Next, as shown in FIG. 10, the bus bars 15 to 21 and the bus bars 55 to 60 are positioned so as to coincide with the holes 49 of the control unit 5. Then, the output parts 2-4 and the pressure | voltage rise part 6 are inserted in the control part 5, and it fixes with a screw | thread (illustration omitted). Thereafter, the bus bars 15 to 21 and the bus bars 55 to 60 and the Al wiring 50 are electrically connected by soldering. Thereby, IPM1 is completed.

  As described above, in the IPM 1 according to the first embodiment, the output units 2 to 4 and the booster unit 6 are stacked. Thereby, compared with the case where all are arrange | positioned on the same plane shape, the plane area in planar view can be made small. By stacking the output units 2 to 4 and the booster unit 6, even when a rectifier circuit or the like is newly provided, an increase in the planar area can be suppressed.

  In general, a gate drive is often formed on the output unit, and heat from the output unit is easily transferred to the gate drive. However, in the IPM 1, the output units 2 to 4 are set vertically with respect to the control unit 5. By providing, the transmission of the heat from the output parts 2-4 can be suppressed. Furthermore, heat transmission can be further suppressed by providing the heat insulating material 41 between the gate drives 43 to 48 and the output units 2 to 4. As a result, even if the output units 2 to 4 are operated at a high temperature (for example, about 200 ° C.), damage to the gate drives 43 to 48 that are vulnerable to heat can be suppressed. As a result, the life of the IPM 1 can be extended.

  Moreover, in IPM1, since it laminate | stacks so that a fixed space | interval may be made between the output parts 2-4 and the pressure | voltage rise part 6, air permeability is high. Thereby, since a cooling function can be improved, damage to the gate drives 43-48 which are weak to heat can be suppressed. Furthermore, since the heat transfer between the output units 2 to 4 can be suppressed by providing a certain interval, damage to the switching devices 32 and 36 and the diodes 33 and 37 of the output units 2 to 4 can be suppressed. As a result, the life of the IPM 1 can be extended. Furthermore, since the output units 2 to 4 and the booster unit 6 are stacked in the IPM 1, it is possible to reduce the adjacent of the switching devices 32 and 36 and the diodes 33 and 37, so that heat concentration can be suppressed.

  In addition, since the control bus bars 15 to 21 and the bus bars 55 to 60 are inserted into the holes 49 of the control unit 5 and connected to the Al wiring 50, positioning and connection can be easily performed.

(Second Embodiment)
Next, a second embodiment in which the first embodiment described above is partially changed will be described. In addition, the same code | symbol is attached | subjected to the structure similar to 1st Embodiment, and description is abbreviate | omitted. FIG. 11 is an equivalent view of the IPM according to the second embodiment shown in FIG. FIG. 12 is a plan view of the output section on the high voltage section side. FIG. 13 is a plan view of the output section on the low-pressure section side.

  As shown in FIG. 11, in IPM1A by 2nd Embodiment, the output parts 2A-4A which have the high voltage | pressure part 11, and the output parts 2B-4B which have the low voltage | pressure part 12 are comprised by the separate components. And it is fixed to 5 A of control parts so that the output parts 2A-4A by the side of the high voltage | pressure part 11 and the output parts 2B-4B by the side of the low voltage | pressure part 12 may be laminated | stacked.

  As shown in FIG. 12, the output unit 2 </ b> A has substantially the same configuration as that of the high-pressure unit 11 side in a portion obtained by dividing the output unit 2 according to the first embodiment in half. Moreover, as shown in FIG. 13, the output part 2B has a structure substantially the same as the low voltage | pressure part 12 side among the parts which divided | segmented the output part 2 by 1st Embodiment in half. As shown in FIGS. 12 and 13, the output unit 2A and the output unit 2B include an output bus bar 15A and a bus bar 15B, respectively. In addition, the bus bars 16 and the bus bars 17 on the opposite side in the direction of current flow are stacked in parallel. The output units 3A and 4A have the same configuration as the output unit 2A, and the output units 3B and 4B have the same configuration as the output unit 2B.

  In the IPM 1A according to the second embodiment, the output area 2A to 4A on the high voltage section 11 side and the output sections 2B to 2B on the low voltage section 12 side are separately configured and laminated, thereby reducing the plane area. it can. Further, the parasitic inductance generated in the bus bar 16 and the bus bar 17 can be offset by arranging the bus bar 16 and the bus bar 17 in parallel. Of the other bus bars and Al wires, it is more preferable to configure the bus bars and Al wires through which current flows in the opposite direction in parallel.

(Third embodiment)
Next, a third embodiment in which the second embodiment described above is partially changed will be described. In addition, the same code | symbol is attached | subjected to the structure similar to 1st and 2nd embodiment, and description is abbreviate | omitted. FIG. 14 is a diagram corresponding to FIG. 2 of the IPM according to the third embodiment.

  As shown in FIG. 14, in the IPM 1B according to the third embodiment, the output units 2A to 4A on the high voltage unit 11 side in the IPM 1A of the second embodiment are turned upside down and installed in the control unit 5A. The switching device 32 and the diode 33 of the part 11 and the switching device 36 and the diode 37 of the low voltage part 12 are arranged so as to face each other.

  With this configuration, the parasitic inductance that is canceled can be increased.

(Fourth embodiment)
Next, a description will be given of a fourth embodiment in which the first embodiment is partially changed. In addition, the same code | symbol is attached to the structure similar to embodiment mentioned above, and description is abbreviate | omitted. FIG. 15 is an overall perspective view of the IPM according to the fourth embodiment. FIG. 16 is a plan view of a boosting unit of an IPM according to the fourth embodiment. FIG. 17 is a schematic circuit diagram of an IPM according to the fourth embodiment. In addition, let the up-and-down direction shown in FIG. 15 be an up-down direction. Further, the same components as those in the above-described embodiment are denoted by the same reference numerals and description thereof is omitted.

  As shown in FIG. 15, the IPM 1C according to the fourth embodiment includes a U-phase output unit 2, a V-phase output unit 3, a W-phase output unit 4, a control unit 5C, and a booster (voltage adjustment according to claim 9). 6C). The output units 2 to 4 and the boosting unit 6C that output different phases are stacked. Further, the output units 2 to 4 and the boosting unit 6C are fixed at a predetermined interval with screws (not shown) in a state of being erected vertically to the control unit 5.

  The booster 6C boosts the voltage supplied from the external power source 200 to 200V to 600V. The boosting unit 6C is for supplying the boosted power to the output units 2 to 4 via the bus bars 16 and 17. The boosting unit 6C is arranged in the lowest layer (that is, outside in the stacking direction) in the stacking direction. Note that the voltage values described above can be changed as appropriate.

  As shown in FIG. 16, the booster 6C includes a high voltage unit 71, a low voltage unit 72, a coil 73, a capacitor 74, a substrate 75, a heat sink 76, four bus bars 77 to 81, and a plurality of Al. A wire 82, a case 83, and Al wirings 84 and 85 are provided.

  As shown in FIGS. 16 and 17, the high voltage unit 71 includes a switching device 92 formed of a transistor that can be switched on and off, a backflow prevention diode 93, and an Al wiring 94. The source 92 s of the switching device 92 is connected to the coil 73 via the Al wiring 84. The drain 92 d of the switching device 92 is connected to a P-side power supply bus bar 78 to which one end of a capacitor 74 is connected via an Al wiring 94. The gate 92g of the switching device 92 is connected to the gate driver 56 of the control unit 5C via the bus bar 80. The anode 93 a of the diode 93 is connected to one end of the coil 73 and the source 92 s of the switching device 92 via the Al wiring 84. The cathode 93 k of the diode 93 is connected to a bus bar 78 to which one end of a capacitor 74 is connected via an Al wiring 94.

  The low-voltage unit 72 includes a switching device 96 composed of a transistor that can be switched on and off, a diode 97 for preventing backflow, and an Al wiring 98. Note that a voltage lower than the voltage applied to the high voltage unit 71 is applied to the low voltage unit 72 by the external power source 200. The source 96 s of the switching device 96 is connected to the N-side power supply bus bar 79 connected to the negative electrode of the power source 200 and one end of the capacitor 74. The drain 96 d of the switching device 96 is connected to one end of the coil 73 via the Al wiring 98. The gate 96g of the switching device 96 is connected to the gate driver 57 of the control unit 5C via the bus bar 81. The anode 97a of the diode 97 is connected to the bus bar 79 for N-side power supply. The cathode 97 k of the diode 97 is connected to one end of the coil 73 via the Al wiring 98.

  One end of the coil 73 is connected to the source 92 s of the switching device 92, the anode 93 a of the diode 93, the drain 96 d of the switching device 96, and the cathode 97 k of the diode 97 via the Al wiring 84. The other end of the coil 73 is connected to the positive electrode of the power source 200 via the bus bar 77.

  One end of the capacitor 74 is connected to a bus bar 78 for supplying P-side power to the output units 2 to 4. The other end of the capacitor 74 is connected to a bus bar 79 for supplying N-side power to the output units 2 to 4 via an Al wiring 85.

  Next, the operation of the booster 6C will be described.

  When the switching device 96 of the low voltage section 72 is on, a current flows through the coil 73 and the switching device 96. From this state, when the switching device 96 of the low-voltage unit 72 is switched off, the current flowing in the coil 73 is cut off, and an electromotive force is generated. When the electromotive force is generated in the coil 73 and the switching device 92 of the high voltage unit 71 is turned off, electric charge is supplied from the coil 73 to the capacitor 74 via the high voltage unit 71. As a result, the capacitor 74 stores electric charges due to the voltage of the power source 200 and the electromotive force of the coil 73. As a result, the voltage of the power source 200 is boosted by the capacitor 74 and applied to the output units 2 to 4.

  Here, the on / off switching frequency of the switching devices 92, 96 of the boosting unit 6C is larger than the on / off switching frequency of the switching devices 32, 36 of the output units 2-4. Furthermore, the on / off switching frequency of the switching device 96 of the low voltage unit 72 of the boosting unit 6C is higher than the on / off switching frequency of the switching device 92 of the high voltage unit 71 of the boosting unit 6C.

  In other words, the booster 6C has a higher temperature than the output units 2-4. Furthermore, also in the boosting unit 6 </ b> C, the low pressure unit 72 has a higher temperature than the high pressure unit 71.

  As described above, in the IPM 1C according to the fourth embodiment, the booster 6C that is higher in temperature than the output units 2 to 4 is disposed so as to be an outer layer in the stacking direction. Thereby, the heat dissipation of 6 C of pressure | voltage rise parts can be improved. Furthermore, the booster 6C is positioned on the most upstream side of the air flow by setting the booster 6C to the lowest layer. Thereby, since the heat from each output part 2-4 does not act on the pressure | voltage rise part 6C, the high temperature of the pressure | voltage rise part 6C can be suppressed more.

  Conventionally, in order to suppress the increase in the temperature of the booster, a booster is provided for each output unit. However, in IPM1C, the increase in the temperature of the booster 6C can be suppressed. 2-4 can be shared. Thereby, size reduction of IPM1C can be promoted more.

(Fifth embodiment)
Next, a fifth embodiment in which the third embodiment described above is partially changed will be described. In addition, the same code | symbol is attached | subjected to the structure similar to embodiment mentioned above, and description is abbreviate | omitted. FIG. 18 is a cross-sectional view of an IPM according to the fifth embodiment.

  As shown in FIG. 18, in the IPM 1D according to the fifth embodiment, as in the third embodiment, the output units 2A to 4A having the high voltage unit 11 and the output units 2B to 4B having the low voltage unit 12 are made up of separate components. It is configured. And it is fixed to 5 A of control parts so that the output parts 2A-4A by the side of the high voltage | pressure part 11 and the output parts 2B-4B by the side of the low voltage | pressure part 12 may be laminated | stacked alternately.

  Furthermore, in the IPM 1D according to the fifth embodiment, the booster 6D having the high voltage unit 71 and the booster 6E having the low voltage unit 72 are configured by separate components. A boosting unit 6E having a low-pressure unit 72 is disposed in the lowest layer in the stacking direction. In addition, the boosting unit 6D having the high-pressure unit 71 is disposed in the uppermost layer in the stacking direction. Each of the output units 2 </ b> A to 4 </ b> A and 2 </ b> B to 4 </ b> B is stacked between a boosting unit 6 </ b> E having a low pressure unit 72 and a boosting unit 6 </ b> D having a high voltage unit 71. That is, the booster 6E and the booster 6D that are at a high temperature are arranged in the lowermost layer and the uppermost layer, which are the outermost sides in the stacking direction. Furthermore, considering that the air flows from the high temperature side to the low temperature side, the boosting unit 6E having the low pressure unit 72 is disposed on the most upstream side of the air flow.

  As described above, in the IPM 1D according to the fifth embodiment, the high voltage unit 71 of the boost unit 6D and the low voltage unit 72 of the boost unit 6E are arranged in the outermost layer in the stacking direction. The heat dissipation of the low pressure part 72 of the part 71 and the pressure | voltage rise part 6E can be improved. Furthermore, by arranging the low-pressure part 72 of the boosting part 6E at the most upstream of the air flow, the high temperature of the low-pressure part 72 of the boosting part 6E can be further suppressed.

  As mentioned above, although this invention was demonstrated in detail using embodiment, this invention is not limited to embodiment described in this specification. The scope of the present invention is determined by the description of the claims and the scope equivalent to the description of the claims. Hereinafter, modified embodiments in which the above-described embodiment is partially modified will be described.

  For example, in the above-described embodiment, an example in which the present invention is applied to a three-phase IPM has been described. However, the present invention may be applied to a two-phase or four-phase or higher IPM.

  In addition, the materials, numerical values, shapes, and the like applied in the above-described embodiments are examples, and can be changed as appropriate.

  In the above-described embodiment, the switching device and the diode, which are semiconductor elements of each output unit, are arranged on the same surface of the wiring board, but may be arranged on both the front and back surfaces of the wiring board. Thereby, a plane area can be reduced more.

  In the above-described embodiment, an example in which the output units are stacked with a certain interval between them is shown, but the interval between the output units may be omitted. In addition, when comprised in this way, it is preferable to make the hole for ventilation in a case.

  In the above-described embodiment, one switching device is provided in each of the high-voltage part and the low-voltage part of each output unit. However, a plurality of switching devices may be connected in parallel to the high-voltage part and the low-voltage part of each output unit. .

  In the above-described embodiment, the boosting unit is exemplified as an example of the voltage adjusting unit. However, the voltage adjusting unit may be applied to a unit capable of adjusting a voltage such as a step-down unit for reducing a voltage supplied from the outside.

1 is an overall perspective view of an IPM according to a first embodiment. It is sectional drawing along the II-II line in FIG. It is a top view of a U-phase output part. It is sectional drawing along the IV-IV line in FIG. It is a perspective view for demonstrating a switching device. It is a perspective view for demonstrating a diode. It is a schematic circuit diagram of IPM. It is a perspective view for demonstrating the assembly process of IPM. It is a perspective view for demonstrating the assembly process of IPM. It is a perspective view for demonstrating the assembly process of IPM. FIG. 3 is a diagram corresponding to FIG. 2 of an IPM according to a second embodiment. It is a top view of the output part by the side of a high voltage | pressure part. It is a top view of the output part by the side of a low voltage | pressure part. It is FIG. 2 equivalent figure of IPM by 3rd Embodiment. It is a whole perspective view of IPM by a 4th embodiment. It is a top view of the pressure | voltage rise part of IPM by 4th Embodiment. It is a schematic circuit diagram of IPM by 4th Embodiment. It is sectional drawing of IPM by 5th Embodiment.

Explanation of symbols

1, 1A, 1B IPM
2, 2A, 2B U phase output section 3, 3A, 3B V phase output section 4, 4A, 4B W phase output section 5, 5A Control section 6, 6C, 6E Boost section 11 High pressure section 12 Low pressure section 13 Wiring board 14 Heat dissipation Plates 15 to 21, 15A, 15B Bus bar 22 Al wire 23 Case 23a Window 23d Recess 24 Protective gel 25 Lid 32, 36 Switching device 32g, 36g Gate 32s, 36s Source 32d, 36d Drain 33, 37 Diode 33a, 37a Anode 33k, 37k Cathode 34, 38 Al wiring 41 Heat insulating material 42 Wiring board 43-48 Gate drive 49 Hole 50 Wiring 51 Boosting circuit part 52 Wiring 53 Wiring board 54 Heat sink 71 High voltage part 72 Low voltage part 73 Coil 74 Capacitor 75 Wiring board 76 Heat sink 77-81 Bus bar 82 Al wire 83 Case 84, 85 Al wiring 92, 96 Switching device 93, 97 Diode

Claims (13)

A first output unit for outputting the first phase;
A second output unit arranged to be stacked on the first output unit and outputting a second phase having a phase different from the first phase;
A semiconductor device comprising: a control unit that controls the output unit. The output unit includes a high voltage unit and a low voltage unit to which power having a lower voltage than the high voltage unit is supplied,
The semiconductor device according to claim 1, wherein the high-voltage unit and the low-voltage unit are stacked. The high pressure part and the low pressure part include a semiconductor element,
3. The semiconductor device according to claim 2, wherein the high-voltage part and the low-pressure part are stacked so that the semiconductor elements face each other. The high-voltage part and the low-voltage part are provided with wiring and bus bars through which current flows,
The wiring and bus bar of the high-voltage part and the wiring and bus bar of the low-voltage part in which current flows in the reverse direction of the wiring and bus bar of the high-voltage part are arranged in parallel. The semiconductor device according to claim 3.   The semiconductor device according to claim 1, wherein the first output unit and the second output unit are erected on the control unit. The first output unit and the second output unit include a control bus bar for connecting to the control unit,
The semiconductor device according to claim 5, wherein the control bus bar is inserted through a hole formed in the control unit.   The said 1st output part and the said 2nd output part are equipped with the heat sink which conducts a heat | fever in the direction different from the direction where the said control part is arrange | positioned, The any one of Claims 1-6 characterized by the above-mentioned. 2. The semiconductor device according to claim 1. The output unit includes a plurality of semiconductor elements and a wiring board on which the semiconductor elements are provided,
The semiconductor device according to claim 1, wherein the plurality of semiconductor elements are arranged on both surfaces of the substrate. A voltage adjusting unit for adjusting a voltage supplied from the outside;
Each of the output units and the voltage adjusting unit has a switching device that can be switched on and off,
9. The device according to claim 1, wherein, among each of the output units and the voltage adjusting unit, one having the largest switching frequency of the switching device is disposed outside in the stacking direction. 2. The semiconductor device according to claim 1.   The semiconductor device according to claim 9, wherein the frequency of the voltage adjusting unit is larger than that of each of the output units.   The semiconductor device according to claim 10, wherein the voltage adjusting unit is arranged on the upstream side of the air from each of the output units. The voltage adjusting unit includes a high voltage unit having a switching device, and a low voltage unit having a switching device, to which a voltage lower than a voltage applied to the high voltage unit is applied,
The switching frequency of the switching device of the low voltage part of the voltage regulator is larger than the switching frequency of the switching device of the high voltage part of the voltage regulator,
12. The semiconductor device according to claim 9, wherein the low voltage portion of the voltage adjusting unit is arranged outside in the stacking direction.   The semiconductor device according to claim 12, wherein the low-voltage part of the voltage adjusting unit is arranged on the upstream side of the air flow with respect to the high-voltage part of the voltage adjusting unit.

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