JP2009094604A - Integrated circuit for line correction, color copier and color scanner - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a color copier capable of rotating copy at the same speed as normal copying.
SOLUTION: The color copier 1 can be restored to image data by storing a scan result (line data group of each color) by a CCD 13 (3-line color CCD line sensor) at a specific position on a memory (RAM 33). A scanner LSI 12 that transmits to the color printer 30 as a block data group, and includes a scanner LSI 12 that is capable of transmitting each block data to the color printer 30 after being rotated. The color printer 30 includes a printer LSI 32 that causes the print engine 31 to perform printing based on the image data restored on the RAM 33 based on each block data from the color scanner 20 in both of the rotating copy and the normal copying. It is set as the apparatus comprised by these.
[Selection] Figure 1

Description

  The present invention relates to an integrated circuit for line-to-line correction for performing line-to-line correction on the output of a color line sensor, and a color copier and color scanner having a color line sensor.

  Currently, some commercially available color copiers have the configuration shown in FIG.

  The color copying machine 40 includes an operation panel 11, a 3-line color CCD line sensor 13 (CCD 13 in the figure), an AFE, a lamp, a motor, a sensor (a sensor for detecting opening / closing of the document table cover / ADF), a ROM, a RAM 14, a scanner This is a device in which a color scanner 50 composed of an LSI 52 for printing and a color printer 60 composed of a print engine 31, ROM, RAM 33, printer LSI 62, etc. are connected by a cable. Although not shown, the color printer 60 includes a plurality of paper trays on which sheets of various sizes up to A3 can be set, and the color scanner 50 includes originals up to A4. It is a device that can scan.

  The three-line color CCD line sensor 13 (hereinafter also referred to as CCD 13) in the color scanner 50 constituting the color copying machine 40 is an ordinary three-line color CCD line sensor [sensor array for R, G, B]. Sensors that cannot output R, G, B line data for the same line in a single operation with the lines arranged at intervals of several lines in the sub-scanning direction (direction perpendicular to the length direction of the sensor array) It is.

  The scanner LSI 52 in the color scanner 50 is an LSI (ASIC with built-in CPU) developed for the color scanner 50.

  The inter-line correction circuit 61 in the scanner LSI 52 is digitized by the line data [AFE (analog front end) of each color input from the gamma correction circuit, and the shading correction and gamma correction are performed by the shading correction circuit and the gamma correction circuit. The line data of each color made up of color data for W pixels] in the form shown in FIG. 9 (L latest line data is stored in the inter-line correction buffer for each color). As described above, this circuit writes data to the inter-line correction buffer for each color on the RAM 14. Note that W is a number determined by the document size and orientation (the number of read pixels in the main operation direction), and the interline correction buffer is a memory determined by the CPU / firmware to be used as an interline correction buffer. It is an area.

  Further, in parallel with the writing process as described above, the inter-line correction circuit 61 shifts the R line data, G line data, and B line data related to the same line (the sensor interval of the CCD 13 on each inter-line correction buffer). This is a circuit having a function of sequentially reading out the line data at the specified position from the RAM 14 and outputting it to the compression circuit 63 (a circuit for performing compression for general data).

  The printer I / F 64 in the scanner LSI 52, the scanner I / F 71 in the printer LSI 62, and the expansion circuit 72 expand the compression result of the line data of each color by the compression circuit 63, and then the page for each color on the RAM 33. This is a circuit capable of storing in a buffer (a storage area determined by the CPU / firmware to be used as a page buffer).

  When the copy that is instructed to execute is a copy that does not require rotation / enlargement / reduction of the image data (hereinafter referred to as a normal copy), the color copier 40 stores the copy on the page buffer for each color. The image data is processed by the image processing circuit in the printer LSI 62 to generate a copy, and the copy for which execution is instructed requires rotation / enlargement / reduction of the image data (hereinafter referred to as rotation / enlargement / reduction copy). ), The CPU 33 in the printer LSI 62 performs processing for preparing the data obtained by rotating / enlarging / reducing the data on the page buffer for each color on the RAM 33, and then processing the data by the image processing circuit. Thus, a copy is generated.

  As is apparent from the above description, the color copier 40 is a device in which processing for processing image data subjected to interline correction is performed by the CPU during rotation / enlargement / reduction copying. However, general color copiers have different hardware configurations and processing procedures, but image data that has undergone inter-line correction has been applied during rotation / enlargement / reduction copying. The processing is performed by a CPU.

  SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a color copier capable of rotating copy at the same speed as normal copying, an integrated circuit for interline correction and a color scanner capable of realizing such a color copier.

  In order to solve the above problems, an inter-line correction integrated circuit for performing inter-line correction on the output of a color line sensor that outputs R line data, G line data, and B line data according to the present invention includes: A line data writing circuit for writing the line data of each color output from the sensor onto a memory capable of burst reading of M pieces of data, and the latest fixed amount of line data is stored in the memory for each color. A line data writing circuit for determining a writing position of each line data, and a data output circuit for outputting image data subjected to inter-line correction based on the data on the memory, wherein the image is rotated. When it is instructed to do so, block data which is data relating to M × M pixel groups included in M line data relating to M consecutive lines. The data is read from the memory by repeating the burst read for an integer number of times, and the data obtained by rotating the read block data is output every time new M line data for each color is stored in the memory. And a data output circuit that repeats for all block data in the M line data.

  That is, the inter-line correction integrated circuit according to the present invention is a circuit capable of rotating image data when performing inter-line correction. In addition, the integrated circuit for line-to-line correction of the present invention is a circuit that performs burst read on the memory, and is a circuit that can be manufactured by improving an existing integrated circuit for performing line-to-line correction. Therefore, if the integrated circuit for line-to-line correction according to the present invention is used, a color copying machine (such as described in claim 5) capable of rotating copy at the same speed as normal copying, and a component of such a color copying machine. A usable color scanner (as defined in claim 6) can be realized without excessively increasing the manufacturing cost.

  The inter-line correction integrated circuit of the present invention is realized as a circuit (circuit that outputs line data) that functions in the same manner as an existing inter-line correction integrated circuit when the rotation angle is 0 degree. However, if the data output circuit is not instructed to rotate the image, data regarding M × M pixel groups included in M line data regarding M consecutive lines may be used. The process of reading out certain block data from the memory by repeating burst read an integer number of times and outputting the read block data as it is is performed every time new M line data for each color is stored in the memory. A circuit that repeats for all the block data in each line data (always output block data) ) It is also possible.

  Further, when the data output circuit is such a circuit, the compressed data of the data obtained by rotating the block data output by the data output circuit and the data output circuit output to the inter-line correction integrated circuit. A compression circuit that outputs the compressed data of the block data itself can be added.

  Further, when realizing (designing / manufacturing) the inter-line correction integrated circuit according to the present invention, the data output circuit may be provided with a function of outputting data obtained by expanding / reducing the read block data.

  Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the drawings.

  As shown in FIG. 1, a color copier 1 according to an embodiment of the present invention is an apparatus in which a color scanner 10 and a color printer 30 are connected by a cable.

  The color scanner 10 used in the color copier 1 is an apparatus in which the scanner LSI 52 in the color scanner 50 (FIG. 8) is replaced with the scanner LSI 12. The color printer 30 is an apparatus in which the printer LSI 72 in the color printer 60 (FIG. 8) is replaced with the printer LSI 32. Therefore, hereinafter, the configuration and operation of the color copier 1 according to the present embodiment will be described separately for the configuration of the scanner LSI 12, the configuration of the printer LSI 32, and the overall operation of the color copier 1. To do.

<< Scanner LSI 12 >>
First, the configuration of the scanner LSI 12 will be described focusing on the differences from the scanner LSI 52.

  A block SRAM 22 in the scanner LSI 12 is an SRAM capable of storing M × M color data (1-byte data indicating R and GorB gradation values of pixels). The use of the block SRAM 22 will be described later. M is the number of data (color data) (32 in this embodiment) that can be read from the RAM 14 as an SDRAM by one burst read (one access). That is. The RAM 14 can also burst read M / 2 and M / 4 data.

  Similarly to the inter-line correction circuit 61 (see FIGS. 8 and 9), the inter-line correction circuit 21 is the latest predetermined amount of X line data [data including X data for W pixels (X = R, G, B). ] Is a circuit that stores line data relating to each color from the gamma correction circuit on the RAM 14 (DMA burst write) so that it is stored on the X interline correction buffer on the RAM 14.

  However, the inter-line correction circuit 21 is a circuit that can set the rotation angle (any of 0, 90, 180, and 270 degrees) and the enlargement / reduction ratio (50, 70.7, 100, 141.4%, etc.) and 2M ′ (M ′ = 100 · M A circuit that stores the line data of each color on the RAM 14 so that the X-line data of (/ enlargement / reduction rate setting value) is stored on the inter-line correction buffer for X on the RAM 14 (to the set enlargement / reduction rate). Accordingly, the size of the inter-line correction buffer for X on the RAM 14 is changed).

  Further, the inter-line correction circuit 21 outputs 3M ′ line data relating to M ′ consecutive lines [M ′ R lines output from each sensor in the CCD 13 at different timing (timing according to the sensor interval). Each time data, M ′ G line data, and M ′ B line data] are stored in the RAM 14, the block data output process is executed.

  The block data output process executed by the inter-line correction circuit 21 is the same-size copy block data output process for M ′ = M (100% is set as the enlargement / reduction ratio), and M There is an enlargement / reduction copy block data output process for the case where ≠≠ M.

  The block data output process for the same size copy includes M ′ (in this case, M = M ′) line data to be processed for each color on the RAM 14 and N (= W / M ′) block data. It is a process handled as data. Here, as schematically shown in FIG. 2, “block data” means “color data group relating to M ′ × M ′ (M in the figure) pixels adjacent to each other” (“block data in the figure”). A data group of a portion indicated as “0” or the like).

  Then, the block copy data output process for the same size copy is performed for each of a total of 3N block data on the RAM 14 by “a process of reading block data from the RAM 14 by burst read and storing it in the block SRAM 22” (in block data The block compression circuit reads out the data in the block SRAM 22 in the order corresponding to the set rotation angle. "Process to supply to 23" is executed. The order corresponding to the set rotation angle is the order as shown by the arrows in FIG. 3 (the order shown is for the case where the rotation angle is 90 degrees). The interline correction circuit 21 performs one block data output process (block data output process for equal copy, block data output process for enlargement / reduction copy) within the time required for scanning the M ′ line by the CCD 13. The circuit is configured (designed / manufactured) to complete.

  In the enlargement / reduction copy block data output process, M ′ (however, in this case, M ≠ M ′) line data to be processed for each color on the RAM 14 is converted from N (= W / M ′) block data. Is handled as data. However, in the block data output process for expansion / contraction copy, “block data is read from the RAM 14 by burst read (and single read) for each of the 3N block data on the RAM 14 and scaled at the set expansion / contraction rate. The above-described process is a process for storing the data in the block SRAM 22 and a process for reading the data in the block SRAM 22 in the order corresponding to the set rotation angle and supplying the data to the block compression circuit 23. .

  The block compression circuit 23 (FIG. 1) in the scanner LSI 12 rotates each block data (the block data itself read from the RAM 14 or the block data read from the RAM 14) input from the interline correction circuit 21. (And / or scaled data) is a circuit that performs compression for image data (in this embodiment, JPEG compression).

  The printer I / F 24 uses a predetermined protocol to send data from the block compression circuit 23 (hereinafter referred to as compressed block data) and a command instructed by a CPU in the scanner LSI 12 (hereinafter also referred to as a scanner CPU). This is a circuit for transmitting to the printer 30 (scanner I / F 41) by (unique protocol).

<< Printer LSI 32 >>
Next, the configuration of the printer LSI 32 will be described focusing on the differences from the printer LSI 62.

  When receiving the compressed block data, the scanner I / F 41 in the printer LSI 32 supplies the compressed block data to the block decompression circuit 42. When receiving the command, the scanner I / F 41 receives the compressed block data from the CPU (hereinafter referred to as the CPU) in the printer LSI 32. This circuit is also referred to as a printer CPU.

  The block decompression circuit 42 is a circuit that can decompress the compressed block data (compressed block data received by the scanner I / F 41) transmitted from the scanner 50.

  The block expansion circuit 42 is a circuit that can set the main scanning direction block number Nx, the sub scanning direction block number Ny, the rotation angle, and the top address (address of the RAM 33) of each color page buffer.

  Then, when the compressed block data starts to be received by the scanner I / F 41, the block decompression circuit 42 decompresses each compressed block data, and the decompression results are schematically shown in FIGS. This is a circuit for starting the process of storing the data in the RAM 33 in such a form (a form in which the storage position is determined depending on the set information and the number of the processed compressed block data). . FIG. 4 is a diagram showing the operation contents of the block expansion circuit 42 when the rotation angle is set to 90 degrees, and FIGS. 5, 6, and 7 respectively show 0 degrees as the rotation angle. It is the figure which showed the operation | movement content of the block expansion circuit 42 in case 180 degree | times and 270 degree | times are set.

<< Overall Operation of Color Copier 1 >>
Hereinafter, the contents of processing executed by each CPU in the color copier 1 according to the present embodiment when the start of copying is instructed (when a predetermined push button switch of the operation panel 11 is pressed) will be described. .

  In this case, first, the scanner CPU (CPU in the scanner LSI 12), which has recognized that the start of copying has been instructed, sets the copy conditions (size and orientation of the original, the size of the paper on which the copy image is to be printed). Rotation direction to be applied to the document scan result (0 if no rotation processing is required), scaling to be performed on the document scan result. Process enlargement / reduction ratio (100% when enlargement / reduction processing is not required), main scanning direction block number (= N = W / M ′; M ′ = 100 · M / enlargement / reduction ratio setting value), sub-scanning direction block number , And a process of specifying a paper cassette used for copying is performed. Note that the number of blocks in the sub-scanning direction is the scan image size (number of pixels) / M ′ in the direction perpendicular to the main scanning direction (length direction of the CCD 13).

  Next, the scanner CPU sends the specified rotation angle, the number of blocks in the main scanning direction, the number of blocks in the sub scanning direction, and the paper cassette to the printer CPU (CPU in the printer LSI 32) via the printer I / F 64 and the scanner I / F 64. Process to notify to. The scanner CPU performs processing for setting the specified rotation angle and enlargement / reduction ratio and the start address of the inter-line interpolation buffer for each color in the inter-line correction circuit 12, and then the operation of the mechanical / lamp control circuit (the lamp (Movement control) is started.

  On the other hand, the printer CPU notified of the rotation angle and the like sets the notified rotation angle, the number of blocks in the main scanning direction and the number of blocks in the sub scanning direction, and the head address of the page buffer for each color in the block expansion circuit 42. I do. In this process, when the notified rotation angle is 0 degree or 180 degrees, the notified main scanning direction block number and sub scanning direction block number are respectively set to the main scanning direction block number Nx and the sub scanning direction block number. If the block expansion circuit 42 is set as the scanning direction block number Ny and the notified rotation angle is 90 degrees or 270 degrees, the notified main scanning direction block number and sub-scanning direction block number are respectively set. This is a process of setting the block expansion circuit 42 as the sub-scanning direction block number Ny and the main scanning direction block number Nx.

  In the color copier 1 according to the present embodiment, when storage of data for one page in the RAM 33 is completed, the data is directly subjected to rotation processing / enlargement / reduction processing under the control of the printer CPU. In other words, by being processed by the image processing circuit, printing is performed on the paper in the paper cassette notified from the scanner CPU to the printer CPU.

  As is apparent from the above description, the scanner LSI 12 included in the color scanner 10 according to the present embodiment is a block from which image data can be obtained by storing the scan result by the CCD 13 at a specific position on the memory (RAM 33). The data group is a circuit that transmits to the color printer 30. Further, the scanner LSI 12 is a circuit that can transmit each block data to the color printer 30 after performing rotation processing and reduction processing. The color printer 30 according to the present embodiment performs processing such as restoring each block data from the color scanner 20 to image data and processing the image processing circuit in both rotation / enlargement / reduction copying and normal copying. Therefore, the color copier 1 according to the present embodiment is a device that can perform rotation / enlargement / reduction copying at the same speed as normal copying.

  In addition, the scanner LSI 12 and the printer LSI 32 used in the color copier 1 according to the present embodiment are LSIs that perform access to the RAMs 14 and 33 by a burst access in principle, and also make corrections between lines of existing LSIs. The LSI can be manufactured by improving related circuits. For this reason, it can be said that the color copier 1 according to the present embodiment is an apparatus that can be manufactured in a form in which the manufacturing cost does not increase so much.

<Deformation>
The color copier 1 described above can be variously modified. For example, the color copier 1 can be transformed into an integrated color copier. When the color copier 1 is transformed into an integrated color copier, a function for storing block data on the memory in the form shown in FIGS. 4 to 7 is added to the scanner LSI 12. I can leave.

  Further, the scanner LSI 12 may be a circuit that transmits line data to the color printer 60 when the rotation angle is 0 degree. Further, it is necessary to mount more advanced printer I / F 24 and scanner I / F 41. From the scanner LSI 12 and the printer LSI 32, a block compression circuit 23 and a block expansion circuit 42 are provided. It can also be removed.

1 is a configuration diagram of a color copying machine including a color scanner and a color printer according to an embodiment. FIG. FIG. 3 is an explanatory diagram of functions of a scanner LSI (an inter-line correction circuit for a scanner LSI) used in the color scanner according to the embodiment. Explanatory drawing of the function of scanner LSI (scanner LSI inter-line correction circuit). FIG. 3 is an explanatory diagram of functions of a printer LSI used in the color printer according to the embodiment. FIG. 3 is an explanatory diagram of functions of a printer LSI used in the color printer according to the embodiment. FIG. 3 is an explanatory diagram of functions of a printer LSI used in the color printer according to the embodiment. FIG. 3 is an explanatory diagram of functions of a printer LSI used in the color printer according to the embodiment. 1 is a configuration diagram of an existing color copier that includes a color scanner and a color printer. Explanatory drawing of the function of the LSI for scanners used for the existing color scanner (inter-line correction circuit of the scanner LSI).

Explanation of symbols

1 color copier, 10 color scanner, 11 operation panel, 12 LSI for scanner
13 3-line color CCD line sensor 14, 33 RAM, 21 inter-line correction circuit, 22 block SRAM
30 Color printer, 32 Printer LSI
23 Block compression circuit, 24 Printer I / F
31 Print engine, 41 Scanner I / F, 42 Block expansion circuit

Claims (6)

In an inter-line correction integrated circuit for performing inter-line correction on the output of a color line sensor that outputs R line data, G line data, and B line data,
A line data writing circuit for writing line data of each color output from the line sensor onto a memory capable of burst reading of M pieces of data, and the latest fixed amount of line data on the memory for each color. A line data writing circuit for determining a writing position of each line data as stored;
A data output circuit that outputs image data that has been corrected between lines based on the data on the memory,
When it is instructed to rotate an image, burst reading is repeated an integer number of times for block data that is data relating to M × M pixel groups included in M line data relating to M consecutive lines. The process of reading out the memory and outputting the rotated block data is performed every time new M line data for each color is stored in the memory, all of the M line data for each color. An integrated circuit for interline correction, comprising: a data output circuit that repeats the block data. The data output circuit is
When it is not instructed to rotate the image, burst reading is repeated an integer number of times for block data that is data relating to M × M pixel groups included in M line data relating to M consecutive lines. Thus, every time new M line data for each color is stored in the memory, the process of reading the block data from the memory and outputting the read block data as it is is stored in all the M line data for each color. The integrated circuit for interline correction according to claim 1, further comprising: a circuit that repeats the block data. The compression circuit which outputs the compressed data of the data which rotated the block data which the said data output circuit output, and the compressed data of the block data itself which the said data output circuit output is further provided. The integrated circuit for line-to-line correction described. The data output circuit is
The integrated circuit for interline correction according to any one of claims 1 to 3, wherein the circuit also has a function of outputting data obtained by expanding and reducing the read block data. A print engine;
A color line sensor that outputs R line data, G line data, and B line data for each line for scanning an original;
An inter-line correction integrated circuit according to any one of claims 1 to 4,
When the execution of copying requiring image rotation is instructed, the data output circuit in the inter-line correction integrated circuit is instructed to rotate the image, and then the data output from the data output circuit And a control means for causing the print engine to generate a copy of the original document. A color line sensor that outputs R line data, G line data, and B line data for each line for scanning an original;
An inter-line correction integrated circuit according to any one of claims 1 to 4,
A color scanner capable of being connected to a printer having a function of performing printing based on data output from the data output circuit of the inter-line correction integrated circuit.

Images