JP2009081589A - Image decoding device, method and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To decode compressed image data coded by a progressive system in a short period of time by parallel processing. <P>SOLUTION: A data analysis part 21 rearranges a coded data group for each prescribed division coding unit constituting the compressed image data so as to be processed for each component. A decoding control part 22 causes a CPU sequentially to apply variable length decoding and inverse quantization to the coded data group rearranged by the data analysis part 21 and causes the coefficient data of frequency components to be output. Also, when the coded data group corresponding to one component is processed by the CPU, the decoding control part 22 supplies the output coefficient data to an accelerator (inverse DCT part 13), causes the accelerator to perform transformation processing to time components, and causes the CPU to execute the variable length decoding and the inverse quantization to the coded data group corresponding to the next component in parallel. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an image decoding apparatus, method, and program for decoding compressed image data encoded by a progressive method, and in particular, using a first arithmetic processing unit and a second arithmetic processing unit that can operate in parallel with each other. The present invention relates to an image decoding apparatus, a method, and a program that perform decoding processing.

  In recent years, the JPEG (Joint Photographic Experts Group) method has become widespread as an international standard method for compressing / decompressing still image data. In the JPEG system, in addition to the JPEG standard system (Baseline System), a JPEG extended system (Extended System) is defined.

FIG. 13 is a block diagram schematically showing a configuration of a decoding device in the JPEG standard system.
As shown in FIG. 13, the decoding device in the JPEG standard system includes a variable length decoding (VLD) unit 11, an inverse quantization (IQ) unit 12, and an inverse DCT (IDCT: Inverse Discrete Cosine). Transform) unit 13 and color conversion unit 14.

  The variable length decoding unit 11 performs variable length decoding processing on the JPEG data encoded by the encoding device, and outputs quantized data. The inverse quantization unit 12 inversely quantizes the quantized data obtained by the variable length decoding unit 11 based on the quantization table, and outputs a DCT coefficient. The inverse DCT unit 13 decompresses the DCT coefficient obtained by the inverse quantization unit 12 by inverse DCT processing, and outputs pixel data (YUV data). The color conversion unit 14 performs color conversion on the YUV data obtained by the inverse DCT unit 13 and outputs color information data (RGB image data).

FIG. 14 is a diagram for explaining a block configuration and scan order in JPEG data.
In the encoding device of the JPEG standard system, input image data is divided into blocks each consisting of 8 pixels × 8 pixels, and DCT calculation is performed in units of these blocks. Then, the obtained DCT coefficient is quantized independently by a DC (Direct Current) component and an AC (Alternate Current) component. As shown in FIG. 14, in JPEG data, each block is composed of 64 elements, and each element includes a plurality (8 bits or 12 bits) of a bit string representing image data in element units by frequency components.

  Further, in FIG. 14, the numbers shown for each element in the block indicate the scan order in the block, and these will be referred to as scan numbers in the following. In each block, the DC component is encoded as the first element (element of scan number 0), and the AC component is rearranged by zigzag scanning among the remaining elements (elements of scan numbers 1 to 63). Encoded.

  On the other hand, in the JPEG extended system, as an additional function to the JPEG standard system, a system (Sequential system) to which a sequential coding mode is applied, a system (Progressive system) to which a progressive coding mode is applied, and the like are defined. In sequential-encoded JPEG data, images are sequentially decoded from top to bottom and displayed. Also, with progressively encoded JPEG data, a low-resolution rough image is first decoded and displayed, and then a high-resolution fine image is gradually decoded and restored.

  Among these, in the latter progressive encoding mode, the following two encoding methods have been proposed. One is a frequency division type method in which a DCT coefficient is divided into a plurality of components having a low spatial frequency and encoded in order for each division unit. This is called a spectral selection method. The other is a method of improving the approximation accuracy by dividing a bit string of DCT coefficients into a plurality of MSBs (Most Significant Bits) to LSBs (Least Significant Bits) and sequentially encoding each division unit. Is called a Successive Approximation method. Also, it is possible to increase the number of division units to be encoded by combining these methods. An encoded data group for each division unit divided in multiple stages according to these methods is called a band.

  In the JPEG standard system, the 64 elements in the block described above are sequentially decoded. On the other hand, when decoding progressively encoded JPEG data, decoding is performed in units of bands divided in multiple stages by a spectrum selection method or a continuous approximation method. Hereinafter, a flow of decoding processing of progressively encoded JPEG data will be described in detail with an example of band division.

FIG. 15 is a diagram illustrating a configuration example of a band, and FIG. 16 is a diagram illustrating data processed for each band.
Here, as an example, as shown in FIG. 15, the DCT coefficient is divided into four bands. Progressive-encoded JPEG data is normally decoded in the order in which the bands in the stream are stored. That is, in this example, the decoding process is performed in the order of the first band, the second band, the third band, and the fourth band. The DCT coefficient of each element in the block is represented by 8-bit data.

  In the first band, data of all bits (from 0 to 7 bits) of the element of scan number 0 is encoded. This first band includes only the DC component of the DCT coefficient. In the decoding device, first, all the 8-bit data of the element indicated as “1st” in the upper left of FIG. 16 is variable-length decoded by the variable-length decoding unit 11, and thereafter, as in the case of the JPEG basic system, The obtained data is processed by the inverse quantization unit 12 and the inverse DCT unit 13 to generate YUV data.

  In the second band, data of 1 to 7 bits of the elements of scan numbers 1 to 5 among the AC components of the DCT coefficient is encoded. In the decoding device, after executing the processing of the first band, the data for the upper 7 bits of the element indicated as “2nd” in the upper right of FIG. 16 is variable-length decoded by the variable-length decoding unit 11, Processing is performed by the inverse quantization unit 12 and the inverse DCT unit 13.

  In the third band, data of 1 to 7 bits of elements of scan numbers 6 to 63 is encoded in the AC component of the DCT coefficient. In the decoding device, after executing the processing of the second band, the upper 7 bits of data indicated by “3rd” in the lower left of FIG. 16 are variable-length decoded by the variable-length decoding unit 11, Processing is performed by the inverse quantization unit 12 and the inverse DCT unit 13.

  In the fourth band, only the 0th bit data of the elements of scan numbers 1 to 63 among the AC components of the DCT coefficients is encoded. In the decoding device, after executing the processing of the third band, the variable-length decoding unit 11 performs variable-length decoding on the lower-order 1-bit data of the elements indicated as “4th” in the lower right of FIG. Further processing is performed by the inverse quantization unit 12 and the inverse DCT unit 13.

  As described above, for progressively encoded JPEG data, the variable length decoding, inverse quantization, and inverse DCT processes are sequentially executed for each band divided at the time of encoding, and the image is gradually restored. Go. However, since the inverse DCT operation has a very high processing load, if the inverse DCT operation is performed for each band, there arises a problem that the processing time becomes long. In view of this, first, a method has been proposed in which variable length decoding is performed on all bands, and when all variable length decoding is completed, inverse DCT operations are performed all at once and YUV data is output. Although this method cannot be gradually restored from a low-resolution screen and displayed, the calculation time of the entire decoding process can be shortened. This method is already implemented in decoder software called djpeg of IJG (Independent JPEG Group's).

  Furthermore, with the recent increase in resolution of digital cameras, there is an increasing demand for CODEC (Coder Decoder) of JPEG data so that high-resolution images can be displayed at higher speed. However, even if the calculation time is shortened using the above-described method implemented in djpeg, there is a case where the demand for high speed cannot be satisfied. Therefore, as one of the solutions, a CPU (Central Processing Unit) and an accelerator are used to cause the accelerator to execute high-load processing (that is, inverse DCT), and the CPU processing and the accelerator processing are performed in parallel. A method for speeding up the system has been proposed. Here, the accelerator refers to hardware that takes over the processing performed by the CPU in order to improve a specific function and processing capability, and is realized, for example, as LSI (Large Scale Integration).

  FIG. 17 is a block diagram schematically showing the configuration of a djpeg decoding device. In FIG. 17, functions equivalent to those in FIG. 13 are denoted by the same reference numerals, and description thereof is omitted.

  In djpeg, the variable length decoding unit 11 and the inverse quantization unit 12 perform processing for each band, and the obtained DCT coefficients are temporarily stored in the DCT coefficient buffer 15. Then, the inverse DCT unit 13 reads the DCT coefficient from the DCT coefficient buffer 15 and performs inverse DCT, and outputs the generated pixel data to the color conversion unit 14.

  Here, when such decoding processing is executed in parallel by the CPU and the accelerator, the processing of the variable length decoding unit 11 and the inverse quantization unit 12 is executed by the CPU, and the processing of the inverse DCT unit 13 is executed by the accelerator. Executed. In this case, the inverse DCT unit 13 can start the inverse DCT process by reading out the DCT coefficients when the DCT coefficient buffer 15 stores only the DCT coefficients necessary for the inverse DCT operation. Specifically, since the inverse DCT cannot be executed until the DCT coefficients for each component such as Y, Cb, and Cr are aligned, when the DCT coefficients corresponding to a predetermined component are aligned in the DCT coefficient buffer 15, The inverse DCT process can be started.

FIG. 18 is a flowchart illustrating the processing procedure of the CPU when the decoding process of the djpeg method is parallelized.
First, the CPU selects a band according to the storage order in the stream (step S101), performs variable-length decoding on the data of the band (step S102), and further performs inverse quantization (step S103) to obtain the band. The obtained DCT coefficient is stored in the DCT coefficient buffer 15. Here, it is determined whether or not the processing for all the bands corresponding to the predetermined component has been completed (step S104). If not, the process returns to step S101 to select the next band, and the variable length. Perform decoding and inverse quantization.

  If it is determined in step S104 that the processing for all the bands corresponding to the predetermined component has been completed, the DCT coefficient corresponding to the component is read from the DCT coefficient buffer 15 and output to the accelerator. The execution of reverse DCT is requested (step S105). Next, it is determined whether or not the processing for all the bands in the stream has been completed (step S106). If not, the process returns to step S101 to select the next band, and variable length decoding and reverse processing are performed. Perform quantization. If it has been completed, the decoding process ends.

  In the above processing, the accelerator starts execution of inverse DCT in response to the inverse DCT execution request in step S105, and then returns to step S101 to execute variable length decoding and inverse quantization for the next band by the CPU. As a result, variable length decoding and inverse quantization by the CPU and inverse DCT by the accelerator are executed in parallel, thereby shortening the processing time.

As a conventional technique for decoding progressively encoded JPEG data and displaying an image, when the progressive decoding is sequentially performed for each hierarchical data, the displayed image has a required resolution specified by the user. There is an image processing method in which the time required for decoding is shortened by stopping decoding of the hierarchical data after that (see, for example, Patent Document 1).
JP 2000-78576 A (paragraph numbers [0055] to [0059], FIG. 3)

  As described above, when decoding progressively encoded JPEG data using the time reduction method implemented in djpeg, variable length decoding and inverse quantization processing in the CPU and inverse DCT in the accelerator are performed. It was possible to shorten the processing time by parallelizing the. However, in this processing, until all the DCT coefficients corresponding to any one component are obtained by the variable length decoding and inverse quantization processing, and the inverse DCT for that component becomes feasible, the inverse DCT in the accelerator is performed. Is not executed. For this reason, it takes a long time to start parallel processing between the CPU and the accelerator, and the parallel processing execution period is shortened, resulting in low processing efficiency.

  The present invention has been made in view of these points, and provides an image decoding apparatus, method, and program capable of decoding compressed image data encoded by the progressive method in a shorter time by parallel processing. For the purpose.

  In the present invention, in order to solve the above-described problem, in an image decoding apparatus that decodes compressed image data encoded by a progressive method, an encoded data group for each predetermined divided encoding unit that constitutes the compressed image data. , A processing order determination unit that rearranges them to be processed for each component, and sequentially accepts the encoded data group rearranged by the processing order determination unit, performs variable length decoding and inverse quantization, A first arithmetic processing unit that outputs coefficient data; and a first arithmetic processing unit configured to be operable in parallel with the first arithmetic processing unit, and converting the coefficient data from the first arithmetic processing unit into data of a time component. When the encoded data group corresponding to one component is processed by the first arithmetic processing unit, the output coefficient data is included in the output coefficient data. The second arithmetic processing unit executes the conversion process of the time component to be performed, and the first arithmetic processing unit executes the processing for the encoded data group corresponding to the next component in parallel. Is provided.

  In such an image decoding apparatus, before decoding the compressed image data, first, the processing order determination unit determines the encoded data group for each predetermined divided encoding unit constituting the compressed image data for each component. Rearrange to be processed. Then, the encoded data group rearranged by the processing order determination unit is sequentially supplied to the first arithmetic processing unit, variable length decoding and inverse quantization are performed, and as a result, coefficient data of the frequency component is output. Is done. The second arithmetic processing unit is configured to be operable in parallel with the first arithmetic processing unit, and converts coefficient data from the first arithmetic processing unit into time component data. Here, when the encoded data group corresponding to one component is processed by the first arithmetic processing unit, the second arithmetic processing unit executes conversion processing of the output coefficient data into time component data. In addition, in the first arithmetic processing unit, processing for the encoded data group corresponding to the next component is executed in parallel.

  According to the image decoding apparatus of the present invention, before decoding the compressed image data, the encoded data group constituting the compressed image data is rearranged so as to be processed for each component. Then, the data are supplied to the first arithmetic processing unit in the rearranged order, and subjected to variable length decoding and inverse quantization. Further, when the encoded data group corresponding to one component is processed by the first arithmetic processing unit, the second arithmetic processing unit executes conversion processing of the output coefficient data into data of time components. At the same time, in the first arithmetic processing unit, processing for the encoded data group corresponding to the next component is executed in parallel. As a result, the execution start timing of the data conversion process by the second arithmetic processing unit is advanced, and the period in which the first arithmetic processing unit and the second arithmetic processing unit can operate in parallel is increased. The time required for decoding the entire compressed image data is shortened.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a block diagram schematically showing a hardware configuration of the image decoding apparatus according to the embodiment.

  The image decoding apparatus shown in FIG. 1 has a configuration in which a CPU 110, a main memory 120, an accelerator 130, and an external storage device 140 are connected to each other through a bus 150.

  The CPU 110 executes a predetermined process such as variable length decoding or inverse quantization described later by executing a program stored in an external storage device 140 or a ROM (Read Only Memory) (not shown). The main memory 120 is a RAM (Random Access Memory) used as a work area for the CPU 110.

  The accelerator 130 is a hardware circuit composed of an LSI or the like, and processes data received through the bus 150 with the CPU 110. The accelerator 130 is provided with an arithmetic unit 131 composed of an ALU (Arithmetic and Logic Unit) or a MAC (Multiplier and Accumulator), a local memory 132 that is a RAM dedicated to the accelerator 130, and the like.

  This accelerator 130 can be operated independently of the CPU 110. That is, while the CPU 110 is executing arithmetic processing, the accelerator 130 reads / writes data to / from the local memory 132 through the bus 150, or the arithmetic unit 131 performs processing different from the CPU 110 in the local memory 132. The data can be executed using the data, and parallel processing is realized.

  In the present embodiment, as will be described later, when decoding JPEG data, variable length decoding and inverse quantization processing are executed by the CPU 110, and inverse DCT calculation is executed by the accelerator 130.

  The external storage device 140 includes an HDD (Hard Disk Drive) or the like, and stores, for example, a program executed by the CPU 110, data necessary for the execution, JPEG data to be decoded, and the like. Note that the JPEG data to be decoded may be supplied from the outside through a communication interface (not shown), for example.

FIG. 2 is a block diagram illustrating functions of the image decoding apparatus.
As shown in FIG. 2, the image decoding apparatus according to the present embodiment includes a variable length decoding unit 11, an inverse quantization unit 12, an inverse DCT unit 13, a color conversion unit 14, a DCT coefficient buffer 15, a data analysis unit 21, and A decoding control unit 22 is provided. Among these functions, the inverse DCT unit 13 is realized by hardware processing of the accelerator 130, and other functions except for the DCT coefficient buffer 15 are functions realized by software processing of the CPU 110. Thereby, the process in the variable length decoding part 11 and the inverse quantization part 12, and the process in the inverse DCT part 13 can be performed in parallel. Further, the data analysis unit 21 receives the input of progressively encoded JPEG data, analyzes the header, the data amount, and the like, and processes the bands in such a manner that parallel processing can be executed most efficiently from the analysis result. Are listed and notified to the decoding control unit 22. The data analysis unit 21 includes a processing amount prediction unit 31 and a processing order conversion unit 32.

  The processing amount prediction unit 31 predicts the data processing amount for each component in the data included in the stream, and assigns a rank for each component in the order of the processing amount. The processing order conversion unit 32 converts the order given by the processing amount prediction unit 31 based on the priority order determined by the specification (processing capability) of the decoding processing function, and determines the final band processing order at the time of decoding. To do. Note that the information on the specifications of the decoding processing function referred to by the processing order conversion unit 32 is set in advance in the external storage device 140, for example.

  The decoding control unit 22 controls the processes of the variable length decoding unit 11, the inverse quantization unit 12, and the inverse DCT unit 13 according to the band processing order notified from the data analysis unit 21. For example, according to the notified processing order of the band, the band data in the stream is supplied to the variable length decoding unit 11 to execute the variable length decoding process. Further, when the inverse quantization processing for all the bands corresponding to the predetermined component is completed in the inverse quantization unit 12, the inverse DCT unit 13 is requested to execute the inverse DCT operation on the obtained DCT coefficient. At this time, when the inverse DCT unit 13 is in the process state (Busy state), the variable length decoding unit 11 performs the process of the next band and continues until the Busy state is canceled. By polling the unit 13, the inverse DCT unit 13 is caused to sequentially execute the following processing.

  The variable length decoding unit 11 sequentially performs variable length decoding processing on the band read under the control of the decoding control unit 22 and outputs quantized data. The inverse quantization unit 12 inversely quantizes the quantized data obtained for each band by the variable length decoding unit 11 based on the quantization table, and outputs a DCT coefficient.

  The DCT coefficient buffer 15 is a buffer that temporarily stores the DCT coefficient output from the inverse quantization unit 12, and is realized as a part of the storage area of the main memory 120. In the DCT coefficient buffer 15, when all the DCT coefficients corresponding to a predetermined component are stored under the control of the decoding control unit 22, these DCT coefficients are output to the inverse DCT unit 13.

  In response to a request from the decoding control unit 22, the inverse DCT unit 13 reads out DCT coefficients necessary for processing of a predetermined component from the DCT coefficient buffer 15, performs inverse DCT processing, and decompresses the pixel data (YUV data). Is output. The color conversion unit 14 performs color space conversion on the YUV data obtained by the inverse DCT unit 13 and outputs color information data (RGB image data).

  Next, with reference to an example of band division, a processing procedure for decoding progressively encoded JPEG data in the present embodiment will be specifically described. FIG. 3 is a diagram illustrating an example of band division applied in the embodiment.

  In FIG. 3, the numbers surrounded by circles indicate the storage order of the bands in the JPEG data stream. That is, each block of JPEG data exemplified here is composed of 12 bands from 1st to 12th.

  As in the prior art, the JPEG data processed here is encoded in units of blocks of 8 pixels × 8 pixels, and the scan order (scan number) of the elements in the block is shown in FIG. Street. The original image data to be encoded is generally data (YUV data) in which the sampling ratio of the luminance component (Y) and the color difference components (Cb, Cr) is expressed as “4: 2: 2”. The encoded data of each element in the block is configured as an 8-bit bit string from 0 to 7 bits for each of Y, Cb, and Cr.

In the first band, 1 to 7 bits of the bit string of each DCT coefficient (DC component) of Y, Cb, and Cr included in the element of scan number 0 are encoded.
In the second band, 2 bits to 7 bits of the bit string of Y DCT coefficients (AC components) included in the elements of scan numbers 1 to 5 are encoded.

  In the third and fourth bands, 1 to 7 bits of the bit string of DCT coefficients (AC components) included in the elements of scan numbers 1 to 5 are encoded. In the third band, the Cb DCT coefficients are encoded, and in the fourth band, the Cr DCT coefficients are encoded.

  In the fifth and sixth bands, 1 to 7 bits of the bit string of DCT coefficients (AC components) included in the elements of scan numbers 6 to 63 are encoded. In the fifth band, Cb DCT coefficients are encoded, and in the sixth band, Cr DCT coefficients are encoded.

In the seventh band, 2 bits to 7 bits are encoded in a bit string of Y DCT coefficients (AC components) included in elements of scan numbers 6 to 63.
In the eighth band, only the first bit of the bit string of Y DCT coefficients (AC components) included in the elements of scan numbers 1 to 63 is encoded.

In the ninth band, only the 0th bit is encoded in the bit string of each DCT coefficient (DC component) of Y, Cb, and Cr included in the element of scan number 0.
In the 10th to 12th bands, only the 0th bit of the bit string of the DCT coefficient (AC component) included in the elements of the scan numbers 1 to 63 is encoded. In the tenth band, Y DCT coefficients are encoded, in the eleventh band Cb DCT coefficients are encoded, and in the twelfth band Cr DCT coefficients are encoded.

Next, the decoding process in the present embodiment will be specifically described.
FIG. 4 is a flowchart showing the processing procedure of the CPU during the decoding process.
First, when receiving the input of progressively encoded JPEG data, the data analysis unit 21 analyzes the header, data amount, etc. of the entire stream and determines the processing order of the bands (step S11). At this time, the data analysis unit 21 rearranges the bands so that they can be sequentially processed for each component, and lists their processing order. This processing order determination processing will be described in detail later with reference to FIG.

  Next, the decoding control unit 22 starts the decoding process while referring to the band processing order list created by the data analysis unit 21. First, the component to be processed next is selected in accordance with the component processing order determined by the data analysis unit 21 (step S12). Next, the band to be processed next is selected according to the processing order of the band corresponding to the selected component (step S13).

  The variable length decoding unit 11 reads the encoded data of the band selected in step S13 and executes variable length decoding processing (step S14). Further, the inverse quantization unit 12 inversely quantizes the quantized data obtained by variable length decoding, and stores the obtained DCT coefficient in the DCT coefficient buffer 15 (step S15).

  Here, the decoding control unit 22 determines whether or not the processing of all the bands corresponding to the component selected in step S12 has been completed (step S16), and if not, returns to step S13. Next, the band to be processed is selected. As a result, the encoded data of the selected band is processed by the variable length decoding unit 11 and the inverse quantization unit 12.

  When all the bands corresponding to the selected component are processed and the obtained DCT coefficients are stored in the DCT coefficient buffer 15, the decoding control unit 22 sends them to the accelerator 130 (inverse DCT unit 13). Processing for requesting execution of inverse DCT for the DCT coefficients is performed (step S17). In this process, the decoding control unit 22 first inquires whether or not the inverse DCT unit 13 is processing, and if it is in the Busy state, the decoding control unit 22 applies to the inverse DCT unit 13 until the Busy state is canceled. Repeat polling. Then, when the Busy state is released, it requests execution of inverse DCT for the next component.

  When the reverse DCT execution request process is performed, the decoding control unit 22 determines whether or not the processing for all the bands in the stream has been completed (step S18). The process in step S18 is executed in parallel with the subsequent polling when the inverse DCT unit 13 is in the busy state in step S17.

  If all the bands in the stream have not been processed, the process returns to step S12, and the next component to be processed is selected. As a result, the band corresponding to the selected component is sequentially processed by the variable length decoding unit 11 and the inverse quantization unit 12. When all the bands in the stream have been processed, the decoding process ends.

FIG. 5 is a diagram showing a processing sequence between the CPU and the accelerator during the decoding process.
First, at timing T <b> 21, the CPU 110 performs data analysis processing by the data analysis unit 21. This processing corresponds to step S11 in FIG. 4, and the processing order of the bands is determined so that the processing is sequentially performed for each component as described above.

  In the present embodiment, as shown in FIG. 3, there are three types of components Y, Cb, and Cr. Therefore, the CPU 110 repeats the processing from steps S12 to S18 shown in FIG. 4 three times. . Accordingly, the variable-length decoding and inverse quantization processing periods after data analysis by the CPU 110 include the first VLD & IQ period (timing T22 to T23), the second VLD & IQ period (timing T23 to T24), and the first corresponding to each component. Can be divided into three VLD & IQ periods (timing T24 to T27). Also, the inverse DCT processing period by the accelerator 130 includes a first IDCT period (from timing T23 to immediately before timing T25), a second IDCT period (from timing T26 to immediately before timing T27) corresponding to each component, It can be divided into three IDCT periods (timing T28 to T29).

  At timing T22 after the data analysis processing, the CPU 110 selects a component to be processed first, and executes variable length decoding and inverse quantization processing for a band corresponding to this component.

  Next, when these processes are completed and all the DCT coefficients necessary for performing the inverse DCT for the component are stored in the DCT coefficient buffer 15 at the timing T23, the CPU 110 performs the inverse operation on the accelerator 130. An inquiry is made as to whether DCT is being processed. At this time, since the accelerator 130 is not processing, the CPU 110 requests the accelerator to execute inverse DCT after the response from the accelerator 130, and the accelerator 130 receives the DCT coefficient from the DCT coefficient buffer 15 in response to the request. Is read and the inverse DCT operation is executed. Since the inverse DCT of the accelerator 130 is not executed before the first IDCT period, as shown in FIG. 5, at time T23, the accelerator 130 is requested to execute the inverse DCT without making an inquiry. May be.

  In addition, the CPU 110 issues an inverse DCT execution request at timing T23, selects a component to be processed next, and executes variable length decoding and inverse quantization processing for a band corresponding to this component. That is, in this period, variable length decoding and inverse quantization processing by the CPU 110 and inverse DCT processing by the accelerator 130 are executed in parallel.

  When these processes are completed at timing T24, the CPU 110 inquires of the accelerator 130 whether or not reverse DCT is being processed. In the example of FIG. 5, at timing T <b> 24, the accelerator 130 has not finished the inverse DCT processing for the first selected component, and the accelerator 130 returns a Busy signal to the CPU 110. When the CPU 110 receives the Busy signal, the CPU 110 selects a component to be processed next, starts variable-length decoding and inverse quantization, and polls the accelerator 130 to inquire whether the processing is being performed at regular intervals. repeat.

  In the example of FIG. 5, the reverse DCT at the accelerator 130 is completed at the time of polling at the timing T <b> 25, so the CPU 110 performs the following to the accelerator 130 at the timing T <b> 26 after receiving a response from the accelerator 130. Request to perform inverse DCT on the other components. Therefore, even in the period from here, the variable length decoding and inverse quantization processes in the CPU 110 and the inverse DCT process in the accelerator 130 are executed in parallel.

Next, when the CPU 110 finishes variable length decoding and inverse quantization processing for all bands corresponding to the last component at timing T27, the CPU 110 is in the process of performing inverse DCT on the accelerator 130. Queries whether there is. In the example of FIG. 5, since the inverse DCT process for the previous component in the accelerator 130 is completed at the timing T24, the CPU 110 causes the accelerator 130 to respond to the accelerator 130 at the timing T28 after receiving a response from the accelerator 130. Request to perform inverse DCT on the next component. In response to this request, the accelerator 130 executes inverse DCT for the last component, and ends this processing at timing T29.

  Meanwhile, in the accelerator 130, the inverse DCT calculation is performed for each component in each of the first, second, and third IDCT periods. From this, it can be said that each of the first, second, and third VLD & IQ periods in the CPU 110 is a period for extracting only the DCT coefficients necessary for executing the inverse DCT for one component.

  On the other hand, bands are stored in the input JPEG data stream in an order basically not related to the components. For this reason, when variable-length decoding and inverse quantization are executed in the band storage order in accordance with the conventional djpeg method, processing for bands corresponding to unnecessary components may be executed in the first VLD & IQ period. As a result, the first VLD & IQ period becomes longer, and the processing period of the CPU 110 after the second VLD & IQ period becomes shorter.

Here, FIG. 6 is a diagram showing the processing order of the bands when the decoding process is performed by the conventional djpeg method.
In the djpeg method, processing is performed in the order in which the bands in the stream are stored. Therefore, the variable length decoding and inverse quantization processing by the CPU 110 is executed in the band order shown in FIG. Here, assuming that the inverse DCT in the accelerator 130 is executed in the order of components of Y, Cb, and Cr, when the variable length decoding and inverse quantization processing for the tenth band is finished by the CPU 110, Y All the DCT coefficients necessary for the inverse DCT with respect to are obtained, and the computation of the inverse DCT by the accelerator 130 can be started.

  Therefore, the variable length decoding and inverse quantization processing periods for the first to tenth bands correspond to the first VLD & IQ period described above, and this period is necessary for the inverse DCT for Y. Since the processing for the non-existing bands (third to sixth bands) is also executed, this period becomes longer than necessary, and the start timing of the first IDCT period is delayed. Further, after the inverse DCT in the accelerator 130 is started, the CPU 110 executes processing for the remaining bands, but some bands corresponding to Cb and Cr have already been processed in the first VLD & IQ period. Therefore, both the period for obtaining the DCT coefficient corresponding to Cb (corresponding to the second VLD & IQ period) and the period for obtaining the DCT coefficient corresponding to Cr (corresponding to the third VLD & IQ period) are shortened. . As a result, the period during which the processing at the CPU 110 and the processing at the accelerator 130 are executed in parallel is shortened, and conversely, the period during which the processing is not performed in parallel after the second VLD & IQ period is increased. It will be long.

  In contrast, in the present embodiment, the processing order of the bands is performed so that the variable length decoding and the inverse quantization process are also processed for each component by the data analysis process before starting the variable length decoding and the inverse quantization. By rearranging, the first VLD & IQ period is shortened as much as possible, and the period in which the processing in the CPU 110 and the processing in the accelerator 130 are executed in parallel is lengthened to shorten the entire processing time.

FIG. 7 is a flowchart showing the procedure of the data analysis process in step S11 of FIG.
In the data analysis unit 21, first, the processing amount prediction unit 31 analyzes the header of the stream, identifies the color space of the encoded data, and predicts the processing amount for each component based on this (step S31). ). From the header of the stream, it is possible to recognize the types of components constituting the encoded data, the block size for each component in the MCU (Minimum Coded Unit), etc., but these values are different for each color space. . The processing amount prediction unit 31 identifies the type of component from these pieces of information, and predicts the data amount for each component. That is, it is estimated that the larger the block size, the larger the amount of data to be processed. Note that the types of color spaces include those represented by using sampling ratios such as “4: 2: 2”, “4: 1: 1”, and “4: 2: 0”.

  Note that the processing amount prediction processing in step S31 is not limited to the above. For example, the number of bands for each component, the number of divided bits for each band, the state of coefficient division, mode setting, etc. Properties and characteristics (that is, attributes) peculiar to each band may be obtained by analyzing a stream header, and may be executed based on the information. Further, the rank of the predicted processing amount may be determined based on a plurality of elements. For example, the larger the number of bits of the DCT coefficient allocated for each band, the larger the data amount can be predicted.

  Next, the processing order conversion unit 32 determines whether or not the processing amount order of all components can be determined by the prediction processing of the processing amount prediction unit 31 (step S32). Here, if the prediction processing amount for each component (that is, the block size for each component) is different, all of them can be ranked, and the process proceeds to step S34. On the other hand, if there are components with the same predicted processing amount, the stream is analyzed, and the actual data amount for each band is detected based on the position of the head pointer of the band, thereby calculating the data amount for each component (step) S33).

  In the case of the example of FIG. 3, when the actual data amount is detected in the above step S33, the data amount for the Y component is detected by the first, second, seventh to tenth bands. The data amount for the Cb component is detected by the first, third, fifth, ninth, and eleventh bands, and the data for the Cr component by the first, fourth, sixth, ninth, and twelfth bands. The amount only needs to be detected.

Next, the processing order conversion unit 32 assigns ranks to the respective components in descending order of the amount of data obtained by the processing of Step S31 and Step S33 (Step S34).
Next, the processing order conversion unit 32 determines the processing performance of each of the CPU 110 and the accelerator 130. Specifically, it is determined which of the variable length decoding and inverse quantization processes in the CPU 110 and the inverse DCT process in the accelerator 130 is the bottleneck process (that is, which is the slower process) ( Step S35). Here, the setting information indicating which is the bottleneck is recorded in advance in the external storage device 140 or the like at the time of product shipment, for example, and the processing order conversion unit 32 determines based on this setting information.

  When the variable length decoding and inverse quantization processing in the CPU 110 becomes a bottleneck, the processing order conversion unit 32 sets the processing amount order of the components assigned in step S34 to the head with the processing amount of the smallest amount. Convert as follows. In this example, the processing order of components is converted in the order of third, first, and second. Then, the converted order is set as the component processing order, and the band processing order is determined in accordance with this processing order and is listed (step S36).

  On the other hand, when the inverse DCT processing in the accelerator 130 becomes a bottleneck, the processing order conversion unit 32 sets the processing amount rank of the components assigned in step S34 to the last one, and the remaining processing amount is the processing amount. Convert them in ascending order. In this example, the processing order of components is converted in the order of second, first, and third. Then, the converted order is set as the component processing order, and the band processing order is determined in accordance with this processing order and is listed (step S37).

FIG. 8 is a diagram illustrating the processing order of bands when variable length decoding and inverse quantization processing in the CPU becomes a bottleneck.
In the present embodiment, as an example, it is assumed that the prediction processing amount ranks such that Y is first, Cr is second, and Cb is third in the data amount prediction processing in steps S31 and S33. . At this time, when the variable length decoding and inverse quantization processing in the CPU 110 becomes a bottleneck, the final processing order for each component is determined in the order of Cb, Y, Cr by the processing of FIG.

  First, in the first VLD & IQ period, the first, third, fifth, ninth, and eleventh bands including the data of the Cb component are sequentially processed in the variable length decoding unit 11 and the inverse quantization unit 12, DCT coefficients are output. By using the DCT coefficients obtained from these bands, the accelerator 130 can perform inverse DCT on the Cb component.

  In addition, the inverse DCT for the Cb component in the accelerator 130 is started, and the second VLD & IQ period is started. During this period, the second, seventh, eighth, and tenth bands including the Y component data are displayed. The variable length decoding unit 11 and the inverse quantization unit 12 sequentially process. The accelerator 130 that has finished processing the Cb component uses the DCT coefficients obtained by the processing of these bands and the DCT coefficients already obtained from the first and ninth bands in the first VLD & IQ period. , The inverse DCT for the Y component can be executed.

  In addition, the inverse DCT for the Y component in the accelerator 130 is started, and the third VLD & IQ period is started. In this period, the fourth, sixth, and twelfth bands including the Cr component data are variable length. Processing is sequentially performed in the decoding unit 11 and the inverse quantization unit 12. The accelerator 130 that has finished processing the Y component uses the DCT coefficients obtained by the processing of these bands and the DCT coefficients already obtained from the first and ninth bands in the first VLD & IQ period. , The inverse DCT on the Cr component can be executed.

FIG. 9 is a diagram illustrating the processing order of the bands when the inverse DCT processing in the accelerator becomes a bottleneck.
As described above, in this embodiment, the order of the predicted processing amount for each component is in the order of Y, Cr, and Cb. Therefore, when the inverse DCT processing in the accelerator 130 becomes a bottleneck, The final processing order of components is determined in the order of Cr, Y, Cb by the processing of FIG.

  First, in the first VLD & IQ period, the first, fourth, sixth, ninth, and twelfth bands including Cr component data are sequentially processed in the variable length decoding unit 11 and the inverse quantization unit 12, DCT coefficients are output. By using the DCT coefficients obtained from these bands, the accelerator 130 can perform inverse DCT on the Cr component.

  In addition, the inverse DCT for the Cr component in the accelerator 130 is started, and the second VLD & IQ period is started. In this period, the second, seventh, eighth, and tenth bands including the Y component data are displayed. The variable length decoding unit 11 and the inverse quantization unit 12 sequentially process. In the accelerator 130 that has finished the processing of the Cr component, the DCT coefficients obtained by the processing of these bands and the DCT coefficients already obtained from the first and ninth bands in the first VLD & IQ period are used. , The inverse DCT for the Y component can be executed.

  Further, the inverse DCT for the Y component in the accelerator 130 is started, and the third VLD & IQ period is started. In this period, the third, fifth, and eleventh bands including the data of the Cb component are variable length. Processing is sequentially performed in the decoding unit 11 and the inverse quantization unit 12. The accelerator 130 that has finished processing the Y component uses the DCT coefficients obtained by the processing of these bands and the DCT coefficients already obtained from the first and ninth bands in the first VLD & IQ period. , Cb component can be subjected to inverse DCT.

  According to the above processing, in each of the first, second, and third VLD & IQ periods, the band processing order is set so that the minimum band necessary for performing inverse DCT for one component is processed. As a result of the replacement, the timing at which the inverse DCT process is started in the accelerator 130 is advanced, and each process of the CPU 110 and the accelerator 130 can be parallelized (that is, the third VLD & IQ period from the start of the second VLD & IQ period). (Period until the end of the process) can be lengthened, and as a result, the time required for the entire process is shortened.

  In addition, when variable length decoding and inverse quantization processing in the CPU 110 becomes a bottleneck, the processing order of the bands is determined so that the component with the smallest prediction processing amount is processed first. The processing amount in the first VLD & IQ period in which only the CPU 110 operates alone becomes smaller, and the processing amount in the second and third VLD & IQ periods, which are periods that can be parallelized, becomes larger. As a result, the first VLD & IQ period is shortened, the inverse DCT processing start timing can be further advanced, and the parallelizable period can be lengthened. As a result, the time required for the entire processing can be further increased. It becomes possible to shorten.

  In the above example, the order of the predicted processing amount of the component is converted into the third, first, and second positions, and the final band processing order is determined. You may convert with 2nd place and 1st place. When the third, first, and second rank processes are performed, the third IDCT period in which the accelerator 130 operates independently can be shortened, but on the other hand, the processing amount in the second VLD & IQ period is increased. The end timing of the first IDCT period is earlier than the end timing of the second VLD & IQ period, and there is a high possibility that a period in which the accelerator 130 is in a standby state will occur. On the other hand, when processing is performed in the third, second, and first order, the accelerator 130 is less likely to be in a standby state after the first IDCT period, so that the overall processing time may be further shortened. However, on the other hand, the third IDCT period in which the accelerator 130 operates alone becomes long.

  In addition, when the inverse DCT processing in the accelerator 130 becomes a bottleneck, the relatively low-speed accelerator 130 is determined by determining the band processing order so that the component with the smallest predicted processing amount is processed last. The processing amount in the third IDCT period that operates independently becomes smaller, and this period can be shortened. In addition, by setting the processing order of components other than the last to the order of decreasing processing amount, the processing amount of the first VLD & IQ period can be reduced, and the start timing of the inverse DCT processing by the accelerator 130 can be advanced. As a result, the time required for the entire process can be further shortened.

  Next, the time shortening effect by the above process will be described more specifically. In the following description, the processing unit time d is used as an example, the processing time required for data analysis by the data analysis unit 21 is 1d, the processing time for one band by the variable length decoding unit 11 and the inverse quantization unit 12 is 1d, The processing time for one component by the inverse DCT unit 13 is assumed to be 4d. The JPEG data stream to be processed is composed of three components Y, Cb, and Cr, and bands are stored in this stream in the order shown in FIG.

FIG. 10 is a diagram for explaining processing time when parallel processing is performed using the djpeg method.
In the djpeg method, the bands are processed in the order in which they are stored in the stream. Therefore, the CPU 110 sequentially selects the bands in the same order as in FIG. 3, and executes variable length decoding and inverse quantization. For this reason, variable length decoding and inverse quantization for 10 bands from 1 to 10 are necessary until the DCT coefficients necessary for inverse DCT for one component (here, Y) are obtained. It takes 10d before the accelerator 130 starts reverse DCT. Furthermore, after the start of inverse DCT, the period during which variable length decoding and inverse quantization in CPU 110 and inverse DCT in accelerator 130 are executed in parallel is only 2d, and the efficiency of parallelization is low. In this case, the time required to complete the decoding of the entire stream is 22d.

FIG. 11 is a diagram for explaining the processing time when the processing order of the bands is changed based on the predicted processing amount for each component.
The example of FIG. 11 shows processing when the processing order of the bands is changed by the processing of steps S31 to S34 in FIG. Here, it is assumed that the predicted processing amounts are large in the order of Y, Cr, and Cb, and are ranked in this order by the above processing.

  In this case, after the data analysis processing in steps S31 to S34, the CPU 110 sequentially changes the first, second, seventh, eighth, ninth, and tenth bands as shown in FIG. By performing the long decoding and inverse quantization processes, all DCT coefficients necessary for performing the inverse DCT of the Y component can be obtained. Therefore, the time from the start of the decoding process to the start of the inverse DCT process in the accelerator 130 is shortened to 7d including the data analysis processing time. Furthermore, the parallel processing period of the CPU 110 and the accelerator 130 is extended to 6d. As described above, the efficiency of the processing reduces the overall processing time to 19d.

FIG. 12 is a diagram for explaining the processing time when the processing order of the bands is changed based on the predicted processing amount and the processing performance.
In the example of FIG. 12, the rank of the predicted processing amount given in steps S <b> 31 to S <b> 34 in FIG. 7 is further converted by the processing of steps S <b> 35 to S <b> 37 in consideration of the processing performance of the CPU 110 and the accelerator 130. Processing is shown. Here, assuming that variable length decoding and inverse quantization processing in CPU 110 becomes a bottleneck, the case where the order of prediction processing amounts is converted in the order of third, first, and second is shown. That is, assume that the component processing order is Cb, Y, Cr, and the bands are processed in the order shown in FIG.

  In this case, as described above, the number of bands subjected to variable length decoding and inverse quantization processing before the inverse DCT is started by the accelerator 130 decreases, and the amount of data to be processed decreases. For this reason, the time from the start of the decoding process to the start of the inverse DCT is shortened to 6d. Furthermore, the parallel processing period of the CPU 110 and the accelerator 130 extends to 7d. As a result, the total processing time is 18d, which is shortened by 4d as compared with the conventional processing example of FIG. 10, and is also shortened by 1d when compared with the processing example of FIG.

  In the above description, the time required for the data analysis process (that is, the band processing order determination process based on the stream analysis result shown in FIG. 7) is the processing unit time d. The condition that it is shorter than the time reduction in the entire decoding process (that is, the time from the start of variable length decoding for the first band to the end of the inverse DCT for the last component minus the total processing time in FIG. 10) When the above is established, the effect of shortening the processing time according to the above embodiment is exhibited.

  In the above embodiment, the DCT operation is used to convert the time component and the frequency component of the image data in the encoding and decoding processes. However, the present invention is not limited to this, and other conversions such as a wavelet transform are used. The present invention can also be applied to a compression encoding system using a method.

  Furthermore, in the above embodiment, encoding / decoding is performed using a so-called YUV color space. However, the present invention is not limited to this. For example, other color spaces such as a CMYK system and a YCCK system are used. In addition, the present invention can be applied.

  In addition, the functions of data analysis and decoding processing in the above-described embodiment, and further, processing functions of variable length decoding and inverse quantization can be realized by a computer. In this case, a program describing the processing contents of these functions is provided, and the processing functions are realized on the computer by executing the program on the computer. The program describing the processing contents can be recorded on a computer-readable recording medium. Examples of the computer-readable recording medium include a magnetic recording medium such as a magnetic tape and a hard disk, an optical disk, a magneto-optical recording medium, and a semiconductor memory.

  When the program is distributed, for example, a portable recording medium such as an optical disk on which the program is recorded is sold. It is also possible to store the program in a storage device of a server computer and transfer the program from the server computer to another computer via a network.

  The computer that executes the program stores, for example, the program recorded on the portable recording medium or the program transferred from the server computer in a storage device connected to the own computer. Then, the computer reads the program from the storage device and executes processing according to the program. The computer can also read the program directly from the portable recording medium and execute processing according to the program. Further, each time the program is transferred from the server computer, the computer can sequentially execute processing according to the received program.

  Further, in the above embodiment, the inverse DCT process is executed by dedicated hardware (accelerator) different from the CPU. However, for example, a plurality of CPUs operable in parallel are used, The above processing procedure can also be applied to a configuration in which variable length decoding and inverse quantization are performed by one CPU and inverse DCT is performed by the other CPU. In this case, the functions of the decoding device including the inverse DCT function can also be realized by software processing on a computer.

It is a block diagram which shows roughly the hardware constitutions of the image decoding apparatus which concerns on embodiment. It is a block diagram which shows the function with which an image decoding apparatus is provided. It is a figure which shows the example of a division | segmentation of the band applied in embodiment. It is a flowchart which shows the process sequence of CPU at the time of a decoding process. It is a figure which shows the process sequence between CPU and an accelerator at the time of a decoding process. It is a figure which shows the processing order of the band at the time of performing a decoding process by the conventional djpeg system. It is a flowchart which shows the procedure of the data analysis process of FIG.4 S11. It is a figure which shows the processing order of a band when the variable-length decoding in CPU and the process of inverse quantization become a bottleneck. It is a figure which shows the processing order of a band when the process of reverse DCT in an accelerator becomes a bottleneck. It is a figure for demonstrating the processing time at the time of performing parallel processing using a djpeg system. It is a figure for demonstrating the processing time at the time of changing the process order of a band based on the prediction processing amount for every component. It is a figure for demonstrating the processing time at the time of changing the process order of a band based on prediction processing amount and processing performance. It is a block diagram which shows roughly the structure of the decoding apparatus in a JPEG standard system. It is a figure for demonstrating the structure of a block and scanning order in JPEG data. It is a figure which shows the structural example of a band. It is a figure which shows the data processed for every band. It is a block diagram which shows roughly the structure of the decoding apparatus of a djpeg system. It is a flowchart which shows the process sequence of CPU in the case of parallelizing the decoding process of a djpeg system.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... Variable length decoding part, 12 ... Inverse quantization part, 13 ... Inverse DCT part, 14 ... Color conversion part, 15 ... DCT coefficient buffer, 21 ... Data analysis part, 22 ... Decoding control part , 31... Processing amount prediction unit, 32... Processing order conversion unit, 110... CPU, 120... Main memory, 130 ... accelerator, 131 ... computing unit, 132 ... local memory, 140. Equipment, 150 ... Bus

Claims (13)

In an image decoding apparatus for decoding compressed image data encoded by a progressive method,
A processing order determination unit that rearranges the encoded data group for each predetermined divided encoding unit that constitutes the compressed image data so as to be processed for each component;
A first arithmetic processing unit that sequentially receives the encoded data groups rearranged by the processing order determination unit, performs variable-length decoding and inverse quantization, and outputs coefficient data of frequency components;
A second arithmetic processing unit configured to be operable in parallel with the first arithmetic processing unit, and converting the coefficient data from the first arithmetic processing unit into data of a time component;
Have
When the encoded data group corresponding to one component is processed by the first arithmetic processing unit, the second arithmetic processing unit executes conversion processing of the output coefficient data into time component data. In addition, the first arithmetic processing unit executes processing for the encoded data group corresponding to the next component in parallel.   The image decoding apparatus according to claim 1, wherein the processing order determination unit rearranges the encoded data group based on a data amount of the encoded data group for each component.   The image decoding apparatus according to claim 2, wherein the processing order determination unit predicts the data amount for each component by analyzing a header of the compressed image data.   The said processing order determination part predicts the said data amount for every component based on the block size for every component in the minimum encoding unit obtained from the analysis result of the said header. Image decoding apparatus.   The processing order determination unit predicts the data amount for each component based on an attribute of the encoded data group corresponding to each component obtained from an analysis result of the header. 3. The image decoding device according to 3.   The said processing order determination part detects the actual data amount of the said encoding data group for every component about the component which cannot discriminate | determine the difference of the said data amount from the analysis result of the said header. Image decoding device.   The processing order determination unit assigns processing orders to components in descending order of the data amount, and further determines the processing orders based on the processing performances of the first arithmetic processing unit and the second arithmetic processing unit. The image decoding apparatus according to claim 2, wherein the encoded data group is rearranged so that each component is processed according to the processing order after replacement. The processing order determination unit
When the processing of the first arithmetic processing unit becomes a bottleneck with respect to the processing of the second arithmetic processing unit, the processing order of the component having the smallest data amount is placed at the top,
When the processing of the second arithmetic processing unit becomes a bottleneck with respect to the processing of the first arithmetic processing unit, the processing order of the component having the smallest data amount is set last, and the remaining components 8. The image decoding apparatus according to claim 7, wherein the processing order is set such that the data amount is in ascending order.   The encoded data group is a data group obtained by encoding the coefficient data using at least one of a spatial frequency component or a component obtained by dividing a bit string as the divided coding unit. Image decoding device.   The image decoding apparatus according to claim 1, wherein the coefficient data is a DCT coefficient, and the second arithmetic processing unit performs inverse DCT on the coefficient data.   The image decoding apparatus according to claim 1, wherein the compressed image data is image data compressed and encoded by a JPEG method. In an image decoding method for decoding compressed image data encoded by a progressive method using a first arithmetic processing unit and a second arithmetic processing unit operable in parallel with each other,
The processing order determination unit rearranges the encoded data group for each predetermined divided encoding unit constituting the compressed image data so as to be processed for each component,
The decoding control unit sequentially supplies the encoded data group rearranged by the processing order determination unit to the first arithmetic processing unit, executes variable length decoding and inverse quantization, and performs coefficients of frequency components. Output data,
When the encoded data group corresponding to one component is processed by the first arithmetic processing unit, the decoding control unit supplies the output coefficient data to the second arithmetic processing unit, Causing the first arithmetic processing unit to execute variable length decoding and inverse quantization on the encoded data group corresponding to the next component in parallel, while performing conversion processing to a time component;
An image decoding method characterized by the above. In an image decoding program for decoding compressed image data encoded by a progressive method using a first arithmetic processing unit and a second arithmetic processing unit operable in parallel with each other,
Computer
A processing order determination unit that rearranges the encoded data group for each predetermined divided encoding unit constituting the compressed image data so as to be processed for each component,
The encoded data group rearranged by the processing order determination unit is sequentially supplied to the first arithmetic processing unit, variable length decoding and inverse quantization are executed, and coefficient data of frequency components is output, When the encoded data group corresponding to one component is processed by the first arithmetic processing unit, the output coefficient data is supplied to the second arithmetic processing unit, and conversion processing into a time component is performed. A decoding control unit that causes the first arithmetic processing unit to execute variable length decoding and inverse quantization on the encoded data group corresponding to the next component in parallel,
An image decoding program that is made to function as:

Images