JP2009081168A - Semiconductor device and method of measuring electric field strength inside the semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technique capable of detecting potentials at predetermined depths inside a semiconductor device. <P>SOLUTION: This is embodied as a semiconductor device. The semiconductor device has a potential measuring trench extending from the surface of the substrate in a depth direction. In the potential measuring trench, an insulating film is formed on its side surface and an insulating film is not formed partly or entirely on a bottom surface. The semiconductor device includes a potential measuring electrode for detecting the potential of the bottom surface of the potential measuring trench. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a technique for measuring the distribution of electric potential and electric field strength inside a semiconductor device.

  Development of power semiconductor devices such as IGBTs and MOSFETs has been actively conducted. In a power semiconductor device, destruction of elements when a load short circuit occurs becomes a problem. When the load is short-circuited and the power supply voltage is directly applied, an excessive current flows inside the semiconductor device, causing destruction of the element. In this specification, a state in which a power supply voltage is directly applied to the semiconductor device due to a short circuit of the load is referred to as a short circuit state, and a state in which the power supply voltage is applied to each of the semiconductor device and the load without a short circuit of the load Is called normal state.

  A technology for protecting a power semiconductor device when the power semiconductor device is short-circuited has been developed. In Patent Document 1, an overcurrent is detected by a current detection cell. In the technique of Patent Document 1, when an overcurrent is detected, the supply of power to the semiconductor device is stopped to prevent the semiconductor device from being destroyed.

Japanese Patent Laid-Open No. 10-326897

  It is known that when the IGBT is short-circuited, electric field concentration occurs near the boundary between the drift region and the buffer region. In particular, this tendency appears remarkably in the thin plate type IGBT. FIG. 8 shows the depth direction distribution of the electric field strength inside the thin plate type IGBT. In FIG. 8, the dotted line indicates the distribution of electric field strength when the semiconductor device is operating in the normal state, and the solid line indicates the distribution of electric field strength when the semiconductor device is operating in the short-circuit state. As shown in FIG. 8, when the semiconductor device is operating in a normal state, the electric field strength has a distribution that gently changes from the drift region to the buffer region, and local electric field concentration does not occur. However, when the semiconductor device enters a short circuit state, a strong electric field concentration occurs near the boundary between the drift region and the buffer region. Such electric field concentration in the thin plate type IGBT is such that the collector region on the back side of the IGBT is thin, so that the amount of holes supplied to the buffer region is small and electrons are excessively present in the buffer region. It is thought to be the cause.

  In the prior art, the electric field concentration inside the semiconductor device could not be actually detected. Although the potential distribution inside the semiconductor device can be estimated by simulation or the like, it does not necessarily match the actual potential distribution. There is a need for a technique that can detect an electric field concentration by measuring an actual potential distribution inside an operating semiconductor device.

  The present invention solves the above problems. The present invention provides a technique capable of detecting a potential at a desired depth inside a semiconductor device. In addition, a technique capable of detecting abnormal electric field concentration inside the semiconductor device is provided.

  The present invention is embodied as a semiconductor device. In the semiconductor device, a potential measuring trench extending in the depth direction from the surface of the semiconductor substrate is formed. In the potential measurement trench, an insulating film is formed on a side surface, and an insulating film is not formed on a part or all of the bottom surface. The semiconductor device includes a potential measurement electrode that detects the potential of the bottom surface of the potential measurement trench.

  According to the semiconductor device described above, the internal potential of the semiconductor device at the depth of the bottom surface of the potential measurement trench can be detected by measuring the potential through the potential measurement electrode. To detect the potential of the bottom surface of the potential measurement trench, for example, the side surface of the potential measurement trench is insulated, a low resistance layer is embedded inside the trench, and a potential measurement electrode is formed at the upper end of the buried low resistance layer In addition, a potential measurement wire may be connected to the potential measurement electrode. Alternatively, the side surface of the potential measurement trench may be insulated, and a potential measurement electrode may be directly formed at the bottom of the trench, and a potential measurement wire may be connected to the potential measurement electrode. By detecting the potential from the potential measurement wire, the actual potential at a desired depth inside the semiconductor device can be measured.

  In the semiconductor device, it is preferable that a plurality of potential measurement trenches having different bottom depths are formed, and each potential measurement trench includes a potential measurement electrode.

  According to the above semiconductor device, the potentials at two points having different depths can be measured inside the semiconductor device. The potential distribution in the depth direction inside the semiconductor device can be measured. If the potential distribution in the depth direction inside the semiconductor device can be measured, the electric field strength inside the semiconductor device can be calculated therefrom. The presence or absence of electric field concentration can be detected.

  The present invention is also embodied as a method for measuring the electric field strength inside the semiconductor device. The method includes a step of measuring potentials of two or more potential measurement electrodes, a potential measured with one potential measurement electrode, a potential measured with one other potential measurement electrode, The electric field strength is calculated based on the difference between the depth of the bottom surface of the potential measurement trench corresponding to one potential measurement electrode and the depth of the bottom portion of the potential measurement trench corresponding to the one other potential measurement electrode. It has a process.

  The electric field strength can be calculated by calculating the potential difference between the two potential measurement trenches having different bottom surface depths and dividing the potential difference by the bottom surface depth difference. By comparing this electric field strength with the allowable electric field strength of the semiconductor material, it can be determined whether or not the semiconductor device is destroyed due to abnormal electric field concentration.

  According to the present invention, a potential at a desired depth inside a semiconductor device can be detected. In addition, abnormal electric field concentration inside the semiconductor device can be detected.

The main features of the embodiments described below are listed.
(Mode 1) The semiconductor device includes a punch-through IGBT.

An embodiment of a semiconductor device embodying the present invention will be described with reference to FIGS.
FIG. 1 is a plan view of the semiconductor device 2 as viewed from above. The semiconductor device 2 includes a plurality of driving units 4 including punch-through IGBTs and a potential measuring unit 6 provided in the vicinity of the driving unit 4. Although the semiconductor device 2 uses silicon as a semiconductor material, other semiconductor materials or different types of semiconductor materials may be used in combination. An emitter electrode 32 and a small signal input pad 29 which will be described later are exposed on the surface of the drive unit 4 of the semiconductor device 2. A potential measurement pad 38 is exposed on the surface of the potential measurement unit 6 of the semiconductor device 2.

  FIG. 2 schematically shows a longitudinal section of the drive unit 4 of the semiconductor device 2, and corresponds to a sectional view taken along the line II-II in FIG. The drive unit 4 includes a collector electrode 12 made of aluminum. A p + -type collector region 14 containing boron at a high concentration is formed on the collector electrode 12. The collector electrode 12 and the collector region 14 are electrically connected. An n + type buffer region 16 containing phosphorus at a high concentration is formed on the collector region 14. An n − type drift region 18 containing phosphorus is formed on the buffer region 16. The drift region 18 is separated from the collector region 14 by the buffer region 16. A p − type body region 20 containing boron is formed on drift region 18. Body region 20 is separated from buffer region 16 by drift region 18. An n + -type emitter region 24 containing phosphorus at a high concentration and a p + -type body contact region 22 containing boron at a high concentration are selectively formed on the surface of the body region 20. The emitter region 24 and the body contact region 22 are separated from the drift region 18 by the body region 20. The emitter region 24 and the body contact region 22 are connected to the emitter electrode 32. The emitter electrode 32 is made of aluminum. A gate electrode trench is formed in the body region 20 that separates the emitter region 24 and the drift region 18, and a gate insulating film 30 and a gate electrode 28 are formed inside the gate electrode trench. The gate insulating film 30 is made of silicon oxide and covers both side surfaces and the bottom surface of the gate electrode 28. The gate electrode 28 is formed of n ++ type polysilicon containing phosphorus at a high concentration. The gate electrode 28 contains a very high concentration of phosphorus and can be equivalently regarded as a conductor. The upper surface of the gate electrode 28 is insulated from the emitter electrode 32 by the interlayer insulating film 26. The gate electrode 28 is electrically connected to a part of the small signal input pads 29 shown in FIG.

  FIG. 3 schematically shows a longitudinal section of the potential measuring section 6 of the semiconductor device 2 of FIG. 1, and corresponds to a sectional view taken along the section III-III of FIG. As shown in FIG. 3, the potential measuring unit 6 is provided at a position where the collector electrode 12, the collector region 14, the buffer region 16, the drift region 18 and the body region 20 are stacked. Unlike the drive unit 4 in FIG. 2, the potential measurement unit 6 in FIG. 3 has neither the trench gate electrode 28 nor the emitter electrode 32, and neither the emitter region 24 nor the body contact region 22.

  A potential measuring trench is formed in the potential measuring unit 6, and a potential measuring insulating film 34 and a potential measuring electrode 36 are formed inside the potential measuring trench. The potential measurement trench extends in the depth direction from the surface side of the substrate. The potential measurement insulating film 34 is formed of silicon oxide and covers only both side surfaces of the potential measurement electrode 36. The potential measuring electrode 36 is made of n ++ type polysilicon containing phosphorus at a high concentration. The potential measuring electrode 36 contains a very high concentration of phosphorus and can be regarded as a conductor equivalently. A potential measurement pad 38 made of aluminum is formed on the potential measurement electrode 36. The potential measurement electrode 36 is in contact with the collector region 14, the buffer region 16, the drift region 18, or the body region 20 at the bottom surface, and the potential of the semiconductor device 2 at the depth where the bottom surface is located 38. The potential measurement pad 38 is insulated from the body region 20 by the interlayer insulating film 40.

  FIG. 3 illustrates two potential measurement trenches having different bottom depths, a potential measurement insulating film 34, a potential measurement electrode 36, and a potential measurement pad 38 corresponding to the potential measurement trenches. However, the potential measurement unit 6 includes a large number of potential measurement trenches formed at various depths, a large number of potential measurement insulating films 34 corresponding to these potential measurement trenches, a potential measurement electrode 36, and a potential measurement. Pad 38 is provided. By measuring the potential via each potential measurement pad 38, the depth direction distribution of the internal potential of the semiconductor device 2 can be known.

Here, a method for manufacturing the semiconductor device 2 will be briefly described. First, a semiconductor substrate to be the collector region 14 is prepared, and a buffer region 16 and a drift region 18 are formed on the semiconductor substrate by epitaxial growth in order. Next, the body region 20 is formed using an ion implantation technique and thermal diffusion. Next, an emitter region 24 and a body contact region 22 are selectively formed on the surface portion of the body region 20 using an ion implantation technique.
Next, after forming the gate electrode trench and the potential measurement trench in a predetermined positional relationship, the side walls of these trenches are thermally oxidized to form the gate insulating film 30 and the potential measurement insulating film 34. Then, only the oxide film formed at the bottom of the potential measurement trench is selectively removed.
Next, the gate electrode trench and the potential measurement trench are filled with polysilicon, respectively, and the gate electrode 28 and the potential measurement electrode 36 are formed by an ion implantation technique. Thereafter, the emitter electrode 32, the small signal input pad 29, and the potential measurement pad 38 are formed by forming aluminum on the surface of the body region 26, and aluminum is deposited on the back surface of the semiconductor substrate (collector region 14). A collector electrode 12 is formed. The semiconductor device 2 can be obtained through these procedures.

In the semiconductor device 2, when a positive voltage is applied to the gate electrode 28 while the emitter electrode 32 is grounded and a positive voltage is applied to the collector electrode 12, an n channel is formed in the body region 20 on the side of the gate electrode 28. Thus, the collector / emitter is equivalent to a pn junction diode. The pn junction diode is turned on by the voltage between the collector and the emitter, and a large current flows in the depth direction of the semiconductor device 2.
At this time, in the semiconductor device 2, electrons from the emitter region 24 and holes from the collector region 14 are injected into the drift region 18, and conductivity modulation occurs in the drift region 18. This reduces the resistance of the drift region 18 and suppresses the on-voltage.

  In the semiconductor device 2, the potential from the ground potential can be measured by connecting the potential measuring pad 38 to the electrometer via a wire. Since the potential measuring trench is formed at various depths, the internal potential distribution in the depth direction of the element can be measured.

  FIG. 4 exemplifies the depth direction distribution of the internal potential measured when the semiconductor device 2 is operated in the normal state. In this case, it can be seen that the potential gradually changes from the drift region 18 to the buffer region 16.

  FIG. 5 illustrates a depth direction distribution of the internal potential measured when the semiconductor device 2 is operated in a short circuit state. In this case, the potential does not change much near the upper portion of the drift region 18, but the potential changes rapidly near the lower end of the drift region 18, that is, near the boundary between the drift region 18 and the buffer region 16. I understand.

When the depth distribution of the internal potential as shown in FIGS. 4 and 5 is obtained, the electric field strength inside the semiconductor device 2 can be calculated. FIG. 6 schematically shows how the electric field strength inside the semiconductor device 2 is calculated from the distribution of the internal potential in the depth direction. The potential measured in the potential measuring trench A is VA, the potential measured in the potential measuring trench B is VB, the interval between the potential measuring trench A and the potential measuring trench B is L, the potential measuring trench A and the potential measuring. The difference in the depth of the bottom surface of the trench B for use is represented by Δh. If the distance L is not greatly separated, the electric field strength EBA in a region between the depth of the bottom surface of the potential measurement trench A and the depth of the bottom surface of the potential measurement trench B can be calculated by the following equation.
EBA = α × (VB−VA) / Δh
Here, α is a predetermined coefficient, which is acquired in advance. By comparing this electric field strength EBA with the allowable electric field strength of the semiconductor material, it can be determined whether or not the semiconductor device 2 is destroyed due to abnormal electric field concentration.

  As described above, the semiconductor device 2 of the present embodiment includes the potential measurement trench formed at a desired depth, and can measure the internal potential of the semiconductor device 2 at the desired depth. By forming two or more potential measuring trenches having different depths, the distribution of the internal potential of the semiconductor device 2 in the depth direction can be measured. From the distribution of the internal potential of the semiconductor device 2 in the depth direction, the electric field strength inside the semiconductor device 2 can be calculated, and abnormal electric field concentration inside the semiconductor device 2 can be detected.

  The potential measurement trenches in the semiconductor device 2 are arranged in a line at equal intervals in the center of the element in FIG. 1, but any other arrangement method may be used. For example, the potential measurement trenches may be arranged at the peripheral portion of the element, the potential measurement trenches may be arranged so as not to be equally spaced from each other, or the potential measurement trenches may be arranged not to be in a line. May be.

  Further, in FIG. 3, the potential measurement pad 38 is disposed immediately above the potential measurement electrode 36 formed inside the potential measurement trench, but other than this, for example, any potential of the semiconductor device 2 may be provided. A configuration may be adopted in which the potential measurement pad 38 is disposed at a place, and the wiring is extended from the upper portion of the potential measurement electrode 36 to be connected to the potential measurement pad 38.

  As shown in FIG. 7, when the potential measurement trench can be formed wide, the potential measurement electrode 36 is not formed by filling the trench with n ++ type polysilicon as shown in FIG. The potential measurement pad 38 may be directly formed at the bottom of the trench. In this case, it should be noted that the width of the potential measurement trench should be such that the wire W can be connected to the potential measurement pad 38 formed at the bottom.

In this embodiment, the case where the present invention is applied to a trench gate type IGBT has been described. However, the present invention can also be applied to a planar gate type IGBT.
Further, the present invention is not limited to IGBTs, and can be applied to all power semiconductor devices that allow current to flow in the depth direction of semiconductor devices such as MOSFETs.
In these power semiconductor devices, since a current flows in the depth direction, the potential distribution in the depth direction has a great influence when entering a short circuit state. Therefore, by measuring the potential distribution in the depth direction by the potential measurement method of the present invention, it is possible to detect the electric field concentration directly connected to the element breakdown.

Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
In addition, the technical elements described in the present specification or drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology illustrated in the present specification or the drawings achieves a plurality of objects at the same time, and has technical utility by achieving one of the objects.

FIG. 3 is a plan view of the semiconductor device 2 as viewed from above. 3 is a cross-sectional view of a drive unit 4 of a semiconductor device 2. FIG. 3 is a cross-sectional view of a potential measurement unit 6 of a semiconductor device 2. FIG. It is a figure which illustrates the depth direction distribution of the internal potential measured when the semiconductor device 2 is operated in a normal state. It is a figure which illustrates the depth direction distribution of the internal potential measured when the semiconductor device 2 is operated in a short circuit state. FIG. 3 is a diagram schematically showing how electric field strength inside a semiconductor device 2 is calculated from the depth direction distribution of the internal potential of the semiconductor device 2. FIG. 6 is a cross-sectional view of the potential measurement unit 6 of the semiconductor device 2 when the potential measurement pad 38 is directly formed at the bottom of the potential measurement trench. It is a figure which shows the depth direction distribution of the electric field strength inside a thin-plate-type IGBT.

Explanation of symbols

2: Semiconductor device 4: Driving unit 6: Potential measuring unit 12: Collector electrode 14: Collector region 16: Buffer region 18: Drift region 20: Body region 22: Body contact region 24: Emitter region 26: Interlayer insulating film 28: Gate Electrode 29: Small signal input pad 30: Gate insulating film 32: Emitter electrode 34: Potential measuring insulating film 36: Potential measuring electrode 38: Potential measuring pad 40: Interlayer insulating film

Claims (3)

A semiconductor device,
A potential measurement trench extending in the depth direction from the surface of the semiconductor substrate is formed,
In the potential measurement trench, an insulating film is formed on the side surface, and an insulating film is not formed on a part or all of the bottom surface.
A semiconductor device comprising a potential measurement electrode for detecting the potential of the bottom surface of the potential measurement trench. A plurality of potential measurement trenches having different bottom depths are formed,
The semiconductor device according to claim 1, wherein each potential measuring trench includes a potential measuring electrode. A method for measuring electric field strength inside a semiconductor device according to claim 2, comprising:
Measuring each potential of two or more potential measurement electrodes;
The potential measured by one potential measurement electrode, the potential measured by another potential measurement electrode, the depth of the bottom surface of the potential measurement trench corresponding to the one potential measurement electrode, and the other An electric field strength measurement method comprising a step of calculating electric field strength based on a difference in depth of a bottom portion of a potential measurement trench corresponding to one potential measurement electrode.

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