JP2009065079A - Method for holding semiconductor wafer and supporting member used therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique capable of firmly holding a semiconductor wafer when holding the semiconductor wafer in order to process the back side of the semiconductor wafer having a protective member such as a BG tape attached on the front side. .
The present invention is embodied as a method of holding a semiconductor wafer in order to process the back side of the semiconductor wafer having a protective member attached to the front side. The method includes a step of attaching a semiconductor wafer to a support member having a conductive needle so that the needle penetrates the protective member and comes into contact with the surface of the semiconductor wafer, and a back surface on a stage having an internal electrode. A step of placing the semiconductor wafer with the side facing upward, and a step of applying a voltage between the internal electrode of the stage and the needle of the support member.
[Selection] Figure 7

Description

  The present invention relates to a technique for holding a semiconductor wafer. Specifically, the present invention relates to a technique for holding semiconductor wear in order to process the back side of a semiconductor wafer having a protective member attached to the front side.

  The manufacturing process of the semiconductor device is generally as follows. First, as a pre-process, various processes such as a film formation process, a lithography process, and an impurity addition process are performed on the surface side of the semiconductor wafer to form semiconductor structures and wirings on the surface side. Thereafter, the semiconductor wafer is polished (back grind) from the back surface side so as to have a desired thickness, and the surface layer portion on the back surface side damaged by the polishing is removed by etching. If necessary, further processing such as film formation, lithography, and impurity addition is performed on the back side. Thereafter, as a post-process, the semiconductor wafer is diced into individual semiconductor chips and enclosed in a package.

  When polishing the back side of the semiconductor wafer, a back grind tape (BG tape) is applied to protect the front side of the semiconductor wafer that has already been processed. The BG tape plays a role of absorbing the impact applied at the time of polishing the back surface side to prevent damage on the front surface side and protecting the front surface side from a gas used during etching on the back surface side. The BG tape also has a role of ensuring the rigidity of a thinly polished semiconductor wafer. With recent high performance and miniaturization of semiconductor devices, semiconductor wafers are extremely thinly polished by back grinding. In addition, for the purpose of improving the production efficiency, the diameter of the semiconductor wafer itself is increasing. For this reason, the semiconductor wafer after back grinding has a thin and large-diameter disk shape, has extremely low rigidity, and is difficult to handle as it is. If the BG tape is pasted on the front surface side, the rigidity of the semiconductor wafer is ensured, and the handling becomes easy in the subsequent processing.

  Patent Document 1 discloses a technique for holding a semiconductor wafer in a state in which a BG tape is attached to the front surface side when plasma etching is performed on the back surface side of the semiconductor wafer. When plasma etching the back side of the semiconductor wafer, the semiconductor wafer is held by adsorbing the front side of the semiconductor wafer with an electrostatic chuck. At this time, when the BG tape is interposed between the electrostatic chuck and the semiconductor wafer, the attracting force of the electrostatic chuck is weakened. In order to hold the semiconductor wear firmly, it is necessary to increase the electrostatic force of the electrostatic chuck, but if a strong electrostatic force is applied, the BG tape may be twisted. In the technique of Patent Document 1, the BG tape is prevented from being twisted by gradually increasing the electrostatic force of the electrostatic chuck.

JP 2004-55703 A

  In the technique of Patent Document 1, a decrease in the adsorption force due to the intervening BG tape is covered by a stronger electrostatic force, and a malfunction caused by increasing the electrostatic force is prevented by gradually increasing the electrostatic force. Yes. In such a configuration, a large electrostatic force is required to hold the semiconductor wafer, and there is a problem that a large amount of power is consumed.

  Further, when plasma etching the back side of the semiconductor wafer, it is necessary to hold the semiconductor wafer in a vacuum environment. When the semiconductor wafer with the BG tape attached is held in a vacuum environment, the air remaining between the surface of the semiconductor wafer and the adhesive of the BG tape, the gas originally contained in the adhesive of the BG tape, and the like expand. As a result, the semiconductor wafer is locally pushed up. The back surface of the semiconductor wafer to be processed by plasma etching rises locally and affects the processing accuracy of plasma etching.

  The present invention solves the above problems. The present invention provides a technique capable of firmly holding a semiconductor wafer when holding the semiconductor wafer in order to process the back side of the semiconductor wafer having a protective member such as a BG tape attached to the front side. To do.

  The present invention is embodied as a method for holding a semiconductor wafer in order to process the back side of the semiconductor wafer having a protective member attached to the front side. The method includes a step of attaching a semiconductor wafer to a support member having a conductive needle so that the needle penetrates the protective member and comes into contact with the surface of the semiconductor wafer, and a back surface on a stage having an internal electrode. A step of placing the semiconductor wafer with the side facing upward, and a step of applying a voltage between the internal electrode of the stage and the needle of the support member.

  In this method, first, a support member is attached to a semiconductor wafer having a protective member such as a BG tape attached to the front side. The support member includes a conductive needle. When the support member is attached, the needle penetrates the protective member and contacts the surface of the semiconductor wafer. Then, a semiconductor wafer is mounted on the stage for electrostatic attraction, and a voltage is applied between the internal electrode of the stage and the needle of the support member. Thereby, the semiconductor wafer is electrostatically attracted to the stage.

  According to this method, since a protective member is not interposed between the stage and the support member, a strong adsorption force can be obtained even with a small electric power. Further, since the support member and the semiconductor wafer are electrically connected by the conductive needle, a strong adsorption force can be obtained.

  Further, according to this method, since a through hole is formed in the protective member by penetrating the needle, even if air remains between the protective member and the semiconductor wafer, the air is removed by placing it in a vacuum environment. can do. When plasma etching the back side of the semiconductor wafer, the back side of the semiconductor wafer does not rise locally.

  In the above method, it is preferable to attach the semiconductor wafer to the support member so that the needles of the support member are in contact with the surface of the semiconductor wafer only on the dicing line formed on the surface side of the semiconductor wafer.

  There may be a slight scratch on the surface of the semiconductor wafer due to the contact of the needle with the portion of the support member that contacts the needle. However, the semiconductor structure and wiring formed on the surface side of the semiconductor wafer are damaged by making the needles of the support member contact only at the dicing line formed on the surface side of the semiconductor wafer as described above. There is nothing.

  The present invention can also be embodied in a support member used to hold a semiconductor wafer when processing the back side of the semiconductor wafer having a protective member attached to the front side. The support member includes a conductive needle that penetrates the protective member and contacts the surface of the semiconductor wafer.

  According to the present invention, a semiconductor wafer can be securely held when the semiconductor wafer is held to process the back side of the semiconductor wafer having a protective member such as a BG tape attached to the front side.

The main features of the embodiments described below are listed.
(Embodiment 1) In the present invention, a semiconductor wafer that has been subjected to a polishing process from the back side is held for a plasma etching process while a protective member is attached to the front side.

(First embodiment)
The semiconductor wafer processing method according to the first embodiment will be described with reference to FIGS.
The semiconductor wafer W shown in FIG. 1 has already been subjected to processing such as film formation processing, lithography processing, and impurity addition processing on the surface side, and a plurality of circuits C are formed on the surface side. The circuit C here is composed of a semiconductor structure built in the substrate of the semiconductor wafer W, a conductive film formed on the surface of the semiconductor wafer W, and an insulating film. The circuit C formed on the front surface side of the semiconductor wafer W is partitioned by dicing lines D, and individual semiconductor chips are obtained by separating the dicing lines D after performing processing on the back surface side. The dicing lines D are formed in a lattice shape on the surface of the semiconductor wafer W. In the present embodiment, a process of polishing the semiconductor wafer W of FIG. 1 from the back side until a desired thickness is obtained and removing the surface layer portion on the back side damaged by the polishing by plasma etching will be described.

  First, as shown in FIG. 2, the semiconductor wafer W is placed on the table 10 with the surface side facing upward, and a back grind tape (BG tape) 12 is attached to the surface side of the semiconductor wafer W. The BG tape 12 is affixed to the surface of the semiconductor wafer W, and protects the surface of the semiconductor wafer W during the back surface polishing process (back grind process) and the subsequent plasma etching process. The BG tape 12 also serves to secure the rigidity of the semiconductor wafer W thinned by the back grinding process and facilitate subsequent handling. The BG tape 12 includes a base material 14 and an adhesive 16, and is adhered to the surface of the semiconductor wafer W by causing the adhesive 16 to adhere to the surface of the semiconductor wafer W. The adhesive 16 has a characteristic that the adhesive strength rapidly decreases when irradiated with ultraviolet rays, and the BG tape 12 can be easily removed by irradiating ultraviolet rays after the processing on the back surface side of the semiconductor wafer W is completed. it can. Since the surface of the semiconductor wafer W is uneven particularly in the vicinity of the dicing line D, the adhesive 16 does not completely adhere to the semiconductor wafer W when the BG tape 12 is applied, and the air is slightly air. May remain. In the present embodiment, the air remaining between the surface of the semiconductor wafer W and the adhesive 16 of the BG tape 12 can be removed in a later step.

  After the BG tape 12 is attached to the semiconductor wafer W, the back grinding process of the semiconductor wafer W is performed. As shown in FIG. 3, the semiconductor wafer W is placed on the chuck table 20 so that the back surface side faces upward, and is polished from the back surface side by the grinder 22. The chuck table 20 has a vacuum exhaust hole 24 opened on the surface on which the semiconductor wafer W is placed. The semiconductor wafer W is placed on the chuck table 20 so that the BG tape 12 is on the lower side. By sucking air from the vacuum exhaust holes 24, the chuck table 20 holds the semiconductor wafer W by vacuum suction through the BG tape 12. After the polishing by the grinder 22 is completed, a large number of fine cracks are formed in the surface layer portion on the back surface side of the semiconductor wafer W. The presence of such fine cracks causes a decrease in the bending strength of the semiconductor chip. Therefore, it is necessary to remove the surface layer portion on the back surface side of the semiconductor wafer W subjected to the back grinding process by plasma etching.

After the back grinding process of the semiconductor wafer W is completed, the support plate 30 is attached to the semiconductor wafer W as shown in FIG. The support plate 30 has a disk shape with the same diameter as that of the semiconductor wafer W, and includes a large number of conductive needles 32 on one surface. The entire support plate 30 including the conductive needle 32 is integrally formed of a conductive material. The semiconductor wafer W is placed on the stage 34 with the front side (that is, the side on which the BG tape 12 is attached) facing upward, and is held on the stage 34 by vacuum suction. The support plate 30 is held by the suction pad 36 by vacuum suction with the surface provided with the conductive needle 32 facing downward. After the transfer pad 36 is moved and the support plate 30 is aligned with the semiconductor wafer W, the support plate 30 is passed until the conductive needle 32 of the support plate 30 penetrates the BG tape 12 and contacts the surface of the semiconductor wafer W. Is pressed from above to below to attach the support plate 30 to the semiconductor wafer W. The support plate 30 is attached to the semiconductor wafer W in a state in which the conductive needle 32 penetrating the BG tape 12 is aligned with a relative position in contact with the dicing line D of the semiconductor wafer W. The support plate 30 is fixed to the semiconductor wafer W via the BG tape 12 by inserting a large number of conductive needles 32 into the BG tape 12. In this embodiment, the conductive needle 32 of the support plate 30 is in contact with the dicing line D of the semiconductor wafer W, and does not come into contact with the plurality of circuits C formed on the surface side of the semiconductor wafer W. Therefore, even if the tip of the conductive needle 32 comes into contact with the surface of the semiconductor wafer W, the individual semiconductor chips after dicing are not affected.
What is being performed in this step can be that the support plate 30 is attached to the semiconductor wafer W, or that the semiconductor wafer W is attached to the support plate 30.

  After attaching the support plate 30 to the semiconductor wafer W, a weak current is passed between the support plate 30 and the semiconductor wafer W to measure the potential difference between them, and whether or not the support plate 30 is properly conducted to the semiconductor wafer W. To check. When the conduction between the support plate 30 and the semiconductor wafer W is poor, it is considered that the contact between the conduction needle 32 and the surface of the semiconductor wafer W is insufficient, so that the support plate 30 is strongly pressed into the semiconductor wafer W and is conducted again. Confirm.

  When conduction between the support plate 30 and the semiconductor wafer W is confirmed, the semiconductor wafer W is carried into the load lock chamber 40 as shown in FIG. The load lock chamber 40 is partitioned from a processing chamber 44 for performing a plasma etching process on the semiconductor wafer W via a gate valve 46. If the gate valve 46 is closed, the processing chamber 44 is maintained at a high vacuum. The load lock chamber 40 can be opened to the atmosphere alone, or can be in a high vacuum state similar to the processing chamber 44. In this embodiment, with the gate valve 46 closed, the atmosphere release valve 48 is opened, and the semiconductor wafer W is loaded into the load lock chamber 40 and placed on the stage 42. After placing the semiconductor wafer W on the stage 42, the load lock chamber 40 is evacuated. When the semiconductor wafer W is placed in a vacuum environment, slight air remaining between the surface of the semiconductor wafer W and the adhesive 16 of the BG tape 12, gas originally contained in the adhesive 16, etc. Is removed through the through-hole formed in the BG tape 12 by the penetration of the conductive needle 32. The conductive needle 32 penetrates the BG tape 12 so as to be in contact with the dicing line D of the semiconductor wafer W, and the air remaining in the vicinity of the dicing line D on the surface of the semiconductor wafer W is effectively discharged. Thereby, the adhesion between the semiconductor wafer W and the BG tape 12 is improved. In addition, when the plasma etching process is performed on the back surface side of the semiconductor wafer W, a part of the semiconductor wafer W does not rise.

  When the load lock chamber 40 reaches a predetermined degree of vacuum by evacuation, the gate valve 46 is opened and the semiconductor wafer W is transferred from the load lock chamber 40 to the processing chamber 44 as shown in FIG. The semiconductor wafer W is placed on the support rod 52 with the back side where the plasma etching process is performed facing upward. The support rod 52 extends so as to penetrate through a plurality of through holes 58 provided in the electrostatic adsorption stage 50 and can relatively move up and down without contacting the electrostatic adsorption stage 50. The support bar 52 is maintained at the ground potential, and the support plate 30 and the semiconductor wafer W are also maintained at the ground potential by placing the semiconductor wafer W on the support bar 52 so that the support plate 30 contacts the support bar 52. Is done.

  After the semiconductor wafer W is placed on the support bar 52, the support bar 52 is lowered with respect to the electrostatic suction stage 50 as shown in FIG. Place. The stage for electrostatic attraction 50 includes an internal electrode 54, and electrostatically adsorbs the support plate 30 and the semiconductor wafer W maintained at the ground potential by applying a predetermined voltage to the internal electrode 54. Thereafter, the gate valve 46 is closed, a gas for plasma etching is introduced into the processing chamber 44, a high frequency voltage is applied to the upper electrode 56, and the back side of the semiconductor wafer W maintained at the ground potential is applied. Plasma etching is performed. A gas flow path (not shown) is formed inside the upper electrode 56, and gas introduction into the processing chamber 44 is performed via the upper electrode 56. By this plasma etching process, the surface layer part on the back surface side of the semiconductor wafer W damaged by the back grinding process is removed.

  After the plasma etching process is completed, voltage application to the internal electrode 54 of the electrostatic adsorption stage 50 is terminated, and electrostatic adsorption by the electrostatic adsorption stage 50 is released. The gate valve 46 is opened, and the semiconductor wafer W is unloaded from the processing chamber 44 to the load lock chamber 40. The gate valve 46 is closed, the air release valve 48 is opened, and the semiconductor wafer W is unloaded from the load lock chamber 40. Thereafter, the BG tape 12 and the support plate 30 are removed from the semiconductor wafer W by ultraviolet irradiation, and the semiconductor wafer W is diced into individual chips and enclosed in a package.

  In this embodiment, when the semiconductor wafer W subjected to the back grinding process is subjected to the plasma etching process, the conductive support plate 30 is attached to the semiconductor wafer W from the outside of the BG tape 12, and then the static in the processing chamber 44 is set. It is electrostatically attracted and held by the electroadsorption stage 50. Even if the BG tape 12 is stuck on the surface side of the semiconductor wafer W, the suction force by the electrostatic suction stage 50 does not decrease. The semiconductor wafer W can be firmly held with a small electrostatic force.

  In this embodiment, the support plate 30 is attached to the semiconductor wafer W so that the conductive needle 32 of the support plate 30 penetrates the BG tape 12 and contacts the surface of the semiconductor wafer W. By placing the semiconductor wafer W in a vacuum environment in the load lock chamber 40, the air remaining between the surface of the semiconductor wafer W and the adhesive 16 of the BG tape 12, the gas originally contained in the adhesive 16, etc. Is removed through a through hole formed by the penetration of the conductive needle 32. It is possible to suppress a decrease in processing accuracy due to a part of the semiconductor wafer W locally rising during the plasma etching process in the processing chamber 44.

(Second embodiment)
Hereinafter, processing of the semiconductor wafer W according to the second embodiment will be described. The first embodiment is performed until the BG tape 12 is applied to the semiconductor wafer W which has been subjected to the processing on the front side as shown in FIG. 1 and the back grinding process is applied as shown in FIG. It is the same.

In this embodiment, after the back grinding process is performed on the semiconductor wafer W, the semiconductor wafer W is loaded into the load lock chamber 40 and placed on the portable stage 142 as shown in FIG. The portable stage 142 is formed with a through hole 134 through which a conductive needle 132 of an electrostatic chucking electrode 130 described later passes, and the semiconductor wafer W is aligned with the through hole 134 of the portable stage 142. It is mounted on the portable stage 142 in a state. The semiconductor wafer W is placed on the portable stage 142 with the front side (that is, the side on which the BG tape 12 is attached) facing downward, and is held on the portable stage 142 by vacuum suction. Below the portable stage 142, an electrostatic chucking electrode 130 is provided. The electrostatic chucking electrode 130 includes a large number of conductive needles 132 on one surface, and the whole including the conductive needles 132 is integrally formed of a conductive material. When the electrostatic chucking electrode 130 is pushed upward in a state where the portable stage 142 vacuum-sucks the semiconductor wafer W, the conductive needle 132 of the electrostatic chucking electrode 130 passes through the through hole 134 of the portable stage 142. To contact the BG tape 12. Further, by pushing up the electrostatic chucking electrode 130, the conductive needle 132 of the electrostatic chucking electrode 130 penetrates the BG tape 12 and comes into contact with the surface of the semiconductor wafer W. The semiconductor wafer W is placed on the portable stage 142 in a state in which the conductive needle 132 penetrating the BG tape 12 is aligned with the dicing line D of the semiconductor wafer W. When a large number of conductive needles 132 are inserted into the BG tape 12, the electrostatic chucking electrode 130 is fixed to the semiconductor wafer W via the BG tape 12 with the portable stage 142 interposed therebetween.
Also in this embodiment, the conductive needle 132 of the electrostatic attraction electrode 130 is in contact with the dicing line D of the semiconductor wafer W, and does not come into contact with the plurality of circuits C formed on the surface side of the semiconductor wafer W. Therefore, even if the tip of the conductive needle 132 comes into contact with the surface of the semiconductor wafer W, the individual semiconductor chips after dicing are not affected.

  After the electrostatic chucking electrode 130 is attached to the semiconductor wafer W, a weak current is passed between the electrostatic chucking electrode 130 and the semiconductor wafer W to measure the potential difference between them, and the electrostatic chucking electrode 130 is a semiconductor. It is confirmed whether or not the wafer W is properly conducted. When the conduction between the electrostatic attraction electrode 130 and the semiconductor wafer W is poor, it is considered that the contact between the conduction needle 132 and the surface of the semiconductor wafer W is insufficient, so that the electrostatic attraction electrode 130 is attached to the semiconductor wafer W. Push in firmly and check the continuity again.

  When conduction between the electrostatic chucking electrode 130 and the semiconductor wafer W is confirmed, a predetermined voltage is applied between the internal electrode 146 of the portable stage 142 and the electrostatic chucking electrode 130 as shown in FIG. Then, the semiconductor wafer W and the electrostatic chucking electrode 130 are electrostatically attracted to the portable stage 142. Thereafter, the atmosphere release valve 48 is closed and the load lock chamber 40 is evacuated. As a result, slight air remaining between the surface of the semiconductor wafer W and the adhesive 16 of the BG tape 12 or gas originally contained in the adhesive 16 is formed by the penetration of the conductive needle 132. It is removed through the through hole. Since the conductive needle 132 penetrates the BG tape 12 so as to be in contact with the dicing line D of the semiconductor wafer W, the air remaining in the vicinity of the dicing line D on the surface of the semiconductor wafer W is effectively discharged. Thereby, the adhesion between the semiconductor wafer W and the BG tape 12 is improved. In addition, when the plasma etching process is performed on the back surface side of the semiconductor wafer W, a part of the semiconductor wafer W does not rise.

  When the load lock chamber 40 reaches a predetermined degree of vacuum by evacuation, as shown in FIG. 10, the gate valve 46 is opened to load the semiconductor wafer W together with the portable stage 142 and the electrostatic chucking electrode 130 into the load lock chamber. It is transferred from 40 to the processing chamber 44. The electrostatic chucking electrode 130 is placed in alignment with the mount 144 in the processing chamber 44. The mount 144 is maintained at the ground potential, and the electrostatic chucking electrode 130 and the semiconductor wafer W are also maintained at the ground potential by placing the electrostatic chucking electrode 130 on the mount 144.

  Thereafter, the gate valve 46 is closed, a gas for plasma etching is introduced into the processing chamber 44, a high frequency voltage is applied to the upper electrode 56, and the back side of the semiconductor wafer W maintained at the ground potential is applied. Plasma etching is performed. By this plasma etching process, the surface layer part on the back surface side of the semiconductor wafer W damaged by the back grinding process is removed. Also during this plasma etching process, a voltage is continuously applied between the internal electrode 146 of the portable stage 142 and the electrostatic chucking electrode 130, and the semiconductor wafer W and the electrostatic chucking electrode 130 are connected to the portable stage. 142 is electrostatically adsorbed.

  After the plasma etching process is completed, the gate valve 46 is opened, and the semiconductor wafer W is transferred from the processing chamber 44 to the load lock chamber 40 together with the portable stage 142 and the electrostatic chucking electrode 130. The gate valve 46 is closed, the voltage application between the portable stage 142 and the electrostatic chucking electrode 130 is finished, the atmosphere release valve 48 is opened, and only the semiconductor wafer W is unloaded from the load lock chamber 40. Thereafter, the BG tape 12 is removed from the semiconductor wafer W by ultraviolet irradiation, and the semiconductor wafer W is diced into individual chips and enclosed in a package.

  In this embodiment, when the semiconductor wafer W subjected to the back grinding process is subjected to the plasma etching process, the semiconductor wafer W is maintained at the ground potential via the conductive needle 132 that penetrates the BG tape 12. As a result, even when the BG tape 12 is stuck on the surface side of the semiconductor wafer W, the semiconductor wafer W is held on the portable stage 142 with a strong suction force. The semiconductor wafer W can be firmly held with a small electrostatic force.

  In this embodiment, the electrostatic chucking electrode 130 is attached to the semiconductor wafer W so that the conductive needle 132 of the electrostatic chucking electrode 130 penetrates the BG tape 12 and contacts the surface of the semiconductor wafer W. By placing the semiconductor wafer W in a vacuum environment in the load lock chamber 40, the air remaining between the surface of the semiconductor wafer W and the adhesive 16 of the BG tape 12, the gas originally contained in the adhesive 16, etc. Is removed through a through hole formed by the penetration of the conductive needle 132. It is possible to suppress a decrease in processing accuracy due to a part of the semiconductor wafer W locally rising during the plasma etching process in the processing chamber 44.

Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
In addition, the technical elements described in the present specification or drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology illustrated in the present specification or the drawings achieves a plurality of objects at the same time, and has technical utility by achieving one of the objects.

It is a figure which illustrates semiconductor wafer W in which processing on the surface side was performed. It is a figure which shows the semiconductor wafer W with which BG tape 12 was affixed. It is a figure which shows the mode of the back grinding process of the semiconductor wafer. It is a figure which shows a mode that the support plate 30 is attached to the semiconductor wafer W (1st Example). It is a figure which shows a mode that the load lock chamber 40 which accommodated the semiconductor wafer W is evacuated (1st Example). It is a figure which shows a mode that the semiconductor wafer W is conveyed from the load lock chamber 40 to the process chamber 44 (1st Example). It is a figure which shows the mode of the plasma etching process of the semiconductor wafer W (1st Example). It is a figure which shows a mode that the semiconductor wafer W is carried in into the load lock chamber 40 (2nd Example). It is a figure which shows a mode that the electrode for electrostatic attraction 130 is attached to the semiconductor wafer W (2nd Example). It is a figure which shows the mode of the plasma etching process of the semiconductor wafer W (2nd Example).

Explanation of symbols

10: Table 12: BG tape 14: Base material 16: Adhesive 20: Chuck table 22: Grinder 24: Vacuum exhaust hole 30: Support plate 32: Conductive needle 34: Stage 36: Transfer pad 40: Load lock chamber 42: Stage 44: Processing chamber 46: Gate valve 48: Atmospheric release valve 50: Electrostatic adsorption stage 52: Support bar 54: Internal electrode 56: Upper electrode 58: Through hole 130: Electrostatic adsorption electrode 132: Conductive needle 134: Through-hole 142: Portable stage 144: Mount 146: Internal electrode

Claims (3)

A method of holding a semiconductor wafer in order to process the back side of a semiconductor wafer having a protective member attached to the front surface side,
Attaching the semiconductor wafer to the support member including the conductive needle so that the needle penetrates the protective member and contacts the surface of the semiconductor wafer; and
Placing the semiconductor wafer with the back side facing up on a stage with internal electrodes;
Applying the voltage between the internal electrode of the stage and the needle of the support member.   The method according to claim 1, wherein the semiconductor wafer is attached to the support member so that the needle of the support member is in a positional relationship in contact with the surface of the semiconductor wafer only at the dicing line formed on the surface side of the semiconductor wafer. A support member used to hold a semiconductor wafer when processing the back side of the semiconductor wafer having a protective member attached to the front side,
A support member comprising a conductive needle that penetrates the protective member and contacts the surface of the semiconductor wafer.

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