JP2009054209A - Disk drive device having nonvolatile semiconductor memory device and method of storing data in nonvolatile semiconductor memory device in the disk drive device - Google Patents

Abstract

Efficient ring buffer control is performed in a disk drive device having a nonvolatile semiconductor memory device.
In one form of the present invention, an HDD includes a flash memory device. The HDD 1 uses a ring buffer 241 as a sector buffer. The flash memory device has a recording unit having a specific data size, and writes user data in a memory area for each recording unit. The flash memory device collectively writes a plurality of data blocks grouped together in a recording unit into a memory area. Thereby, processing efficiency can be improved. Effective ring buffer control is performed by effectively controlling the sector buffer pointer.
[Selection] Figure 3

Description

  The present invention relates to a disk drive device having a disk for storing user data and a nonvolatile semiconductor memory device, and a method for storing data in the nonvolatile semiconductor memory device in the disk drive device.

  As data storage devices, devices using various types of media such as optical disks, magneto-optical disks, and flexible magnetic disks are known. Among them, hard disk drives (HDDs) are used as computer storage devices. It has become widespread and has become one of the storage devices that are indispensable in current computer systems. Furthermore, applications of HDDs such as moving image recording / playback apparatuses, car navigation systems, and mobile phones are expanding more and more due to their excellent characteristics.

  The HDD rotates the magnetic disk and moves the head slider to the target data sector for access (reading or writing) to the magnetic disk. For this reason, the power consumption of the HDD is larger than that of the semiconductor memory, and the access speed is slower than that of the semiconductor memory. In particular, the spin-up time of the spindle motor requires more time than other operations. For this reason, a large amount of processing time is required when the HDD is started or when returning from the power save mode for power saving.

  For this reason, it has been proposed to mount a flash memory device, which is one of nonvolatile semiconductor memory devices, on the HDD (see, for example, Patent Document 1). Since the flash memory device is a semiconductor memory device, the access speed is faster and the power consumption is smaller than that of the magnetic disk. Further, since the flash memory device is a non-volatile memory device, data can be stored even when the power is off.

  The capacity of the flash memory device mounted on the HDD is limited from the viewpoint of cost. Thus, typically, the HDD stores only specific user data in the flash memory device and other user data on the magnetic disk. For example, by storing data necessary for host startup and data frequently accessed by the host in a flash memory device, shortening the host startup time, improving HDD performance, or rotating the spindle motor The power consumption can be reduced by the power save mode in which the number is reduced.

The flash memory device writes data in a data unit having a specific size to the cell array. Therefore, it is preferable not to write data for each small data block corresponding to one command, but to combine a plurality of data blocks within the data unit and write them simultaneously to the array cell of the flash memory device. . Since data writing to the cell array requires a corresponding processing time, the processing time can be shortened and the performance can be improved (see, for example, Patent Document 2).
JP 2006-114206 A JP 2006-236304 A

  Write data from the host is temporarily stored in a buffer and then stored in a magnetic disk or a flash memory device. Several buffering methods are known, but a ring buffer is adopted in many HDDs because of simple control processing and high processing efficiency. The ring buffer stores data sequentially in the direction from the first address to the last address. Further, the start address and the end address are continuous, and the ring buffer has a ring-shaped buffer structure.

  When realizing batch writing of a plurality of data blocks by the flash memory device, the processing includes data transfer (write) from the ring buffer to the magnetic disk or data writing processing for each data block of the flash memory device. It is preferable to share functionality. As a result, the batch write processing can be easily implemented in the HDD with flash memory, and the control circuit configuration can be simplified. Also, since the batch writing process is different from other processes, it is important to implement a function specific to it.

  A disk drive device according to an aspect of the present invention includes a ring buffer for storing data from a host, a disk for storing data transferred from the ring buffer, and a transfer pointer for the ring buffer. And a buffer control unit for setting a transfer completion pointer and a transfer interruption pointer, transfer data from the ring buffer for each data block according to the transfer pointer, interrupt data transfer according to the transfer interruption pointer, and complete the transfer A transfer processing unit that completes data transfer according to a pointer; and a nonvolatile semiconductor memory device that stores data transferred from the ring buffer in a cell array. The buffer control unit sets a transfer pointer and a transfer interruption pointer corresponding to each of one or a plurality of data blocks, and further sets a transfer pointer and a transfer completion pointer corresponding to the last data block. The transfer processing unit sequentially transfers the one or more data blocks to the non-volatile semiconductor memory device according to the corresponding transfer pointer and transfer interrupt pointer, and then the last according to the transfer pointer and the transfer completion pointer. The data block is transferred to the nonvolatile semiconductor memory device. When the nonvolatile semiconductor memory device receives the last data block, the nonvolatile semiconductor memory device collectively stores the received one or more data blocks and the last data block in the cell array. With the above-described configuration, it is possible to perform batch write processing of a plurality of data blocks in the nonvolatile memory device by using a pointer required for normal ring buffer control.

  Preferably, the transfer processing unit notifies the buffer control unit of the transfer interruption for each transfer interruption pointer, and when the buffer control unit receives the interruption notification, the pointer corresponding to the next data block Set up. Thus, by using the function of the transfer interruption pointer, it is possible to control with one transfer interruption pointer.

  Preferably, the transfer interruption pointer corresponds to a position where write data to be transferred next from the host is stored, and the nonvolatile semiconductor memory stores only one data block in the cell array. When the transfer data address catches up with the corresponding transfer interrupt pointer during the transfer of the one data block, the transfer processing unit interrupts the transfer. As a result, transfer of a plurality of data blocks and transfer of only one data block can be controlled using the same pointer.

  While the transfer processing unit transfers the plurality of data blocks and the last data block, the position of the transfer interrupt pointer is preferably controlled independently of a write command. As a result, it is possible to prevent the data transfer of a plurality of data blocks from being hindered by the write command.

  The transfer processing unit preferably interrupts the transfer when the address of the transfer data catches up with the interrupt pointer during data transfer to the disk. As a result, the same pointer can be used for data transfer to the disk and data transfer to the nonvolatile memory device.

  Another aspect of the present invention is a method of storing data in a cell array of a nonvolatile semiconductor memory device in a disk drive device having a disk for storing data and the nonvolatile semiconductor memory device. This method sets a transfer pointer and a transfer interruption pointer corresponding to the first data block transferred from the ring buffer. The first data block is transferred to the nonvolatile semiconductor memory device according to the transfer pointer, and the data transfer to the nonvolatile semiconductor memory device is interrupted according to the transfer interruption pointer. A transfer pointer and a transfer completion pointer corresponding to the second data block transferred from the ring buffer are set. The second data block is transferred to the nonvolatile semiconductor memory device according to the transfer pointer, and the data transfer to the nonvolatile semiconductor memory device is completed according to the transfer completion pointer. After the transfer of the second data block, the first and second data blocks are collectively stored in the cell array. By the above method, it is possible to perform batch write processing of a plurality of data blocks in the nonvolatile memory device using a pointer required for normal ring buffer control.

  According to the present invention, in a disk drive device having a nonvolatile semiconductor memory device, when a plurality of data blocks are collectively written in the cell array of the nonvolatile semiconductor memory device, efficient ring buffer control can be performed. it can.

  Hereinafter, embodiments to which the present invention can be applied will be described. For clarity of explanation, the following description and drawings are omitted and simplified as appropriate. Moreover, in each drawing, the same code | symbol is attached | subjected to the same element and the duplication description is abbreviate | omitted as needed. In the following, a hard disk drive (HDD) that is an example of a disk drive device will be described.

  The HDD of this embodiment has a flash memory device in addition to the magnetic disk area in order to store user data. The flash memory device is a non-volatile semiconductor memory device. The HDD of this embodiment uses a ring buffer as a sector buffer. The flash memory device of this embodiment has a recording unit of a specific data size, and writes data in the memory area for each recording unit. The flash memory device combines a plurality of data blocks from the sector buffer into one in a recording unit. The flash memory device further writes a plurality of data blocks combined into one into the memory area. Thus, the processing efficiency can be improved by collecting a plurality of data blocks from the sector buffer in the recording unit and simultaneously writing them in the memory area. The present embodiment is characterized in the sector buffer pointer control in the write processing.

  First, the entire configuration of the HDD of this embodiment will be described with reference to the block diagram of FIG. The HDD 1 includes a circuit board 20 that is fixed to the outside of the enclosure 10. On the circuit board 20, a read / write channel (RW channel) 21, a motor driver unit 22, a hard disk controller (HDC) and a microprocessor unit (MPU) integrated circuit (HDC / MPU) 23, Each circuit includes a RAM 24 that is a volatile semiconductor memory and a flash memory device 25 that is a nonvolatile semiconductor memory device.

  Within the enclosure 10, a spindle motor (SPM) 14 rotates the magnetic disk 11 at a predetermined angular velocity. The magnetic disk 11 is a non-volatile disk memory that stores data. Each head slider 12 includes a slider that floats on the magnetic disk, and a head element unit that is fixed to the slider and performs conversion (data read / write) between a magnetic signal and an electric signal. Each head slider 12 is fixed to the tip of the actuator 16. The actuator 16 is connected to a voice coil motor (VCM) 15, and moves in the radial direction on the magnetic disk 11 that rotates the head slider 12 by rotating about a rotation axis. The motor driver unit 22 drives the SPM 14 and the VCM 15 according to control data from the HDC / MPU 23.

  An arm electronic circuit (AE: Arm Electronics) 13 selects a head slider 12 that accesses (reads or writes) the magnetic disk 11 from a plurality of head element units 12 according to control data from the HDC / MPU 23, and Amplifies the write signal. In the read process, the RW channel 21 extracts servo data and user data from the read signal acquired from the AE 13 and performs a decoding process. The decoded data is supplied to the HDC / MPU 23. In the write process, the RW channel 21 code-modulates the write data supplied from the HDC / MPU 23, converts the code-modulated data into a write signal, and supplies the write signal to the AE 13.

  In the HDC / MPU 23, the HDC is a logic circuit, and the MPU operates according to the firmware loaded in the RAM 24. As the HDD 1 starts up, data required for control and data processing is loaded into the RAM 24 from the magnetic disk 11 or the flash memory device 25. The HDC / MPU 23 performs overall control of the HDD 1 in addition to necessary processing relating to data processing such as head positioning control, interface control, and defect management.

  User data (write data) from the host 51 is temporarily stored in a sector buffer in the RAM 24 and then stored in the magnetic disk 11 and / or the flash memory device 25. Data stored in the flash memory device 25 can be specified by the LBA of the magnetic disk 11. When the HDC / MPU 23 receives a preset write command to the LBA, the HDC / MPU 23 stores the user data in the flash memory device 25. The HDC / MPU 23 can set the LBA of the user data stored in the flash memory device 25 by itself, and stores the user data of the LBA designated by the host 51 in the flash memory device 25.

  The HDD 1 of this embodiment uses a ring buffer as a write data sector buffer. The ring buffer stores data sequentially in the direction from the first address to the last address. Further, the start address and the end address are continuous, and the ring buffer has a ring-shaped buffer structure. Specifically, after storing data at the last address, the ring buffer sequentially stores data from the first address.

  Writing data to the ring buffer and reading data from the ring buffer are controlled by pointers. FIG. 2 is a block diagram schematically showing data transfer from the ring buffer 241 to the flash memory device 25. A data block stored in a continuous area from the address indicated by the transfer pointer to the address indicated by the transfer completion pointer is transferred to the flash memory device 25. The transfer pointer sequentially moves toward the transfer completion pointer according to the data transfer.

  The flash memory device 25 has an internal buffer 251 and a cell array 252. The internal buffer 251 can be configured by a RAM. The cell array 252 is composed of a semiconductor logic circuit, and its storage area is a nonvolatile semiconductor memory area. The flash memory device 25 temporarily stores the data block from the ring buffer 241 in the internal buffer 251 and then stores it in the cell array 252. When the flash memory device 25 acquires the data block indicated by the transfer completion pointer, it stores the data in the buffer 251 in the cell array 252. The flash memory device 25 writes data to the cell array 252 for each specific writing unit. For example, the size of the writing unit is 32 KB. In data rewriting, the flash memory device 25 erases data in a write unit area, and then writes data in the write unit in the write unit.

  FIG. 3 is a block diagram schematically showing a process in which the flash memory device 25 writes a plurality of data blocks into the cell array 252 all at once. In the example of FIG. 3, the data block 3 in the ring buffer 241 is first transferred to the flash memory device 25 [1]. Thereafter, data block 1 is transferred to flash memory device 25 [2], and finally data block 2 is transferred to flash memory device 25 [3]. Data blocks 1 to 3 are stored in the internal buffer 251 of the flash memory device 25.

  The total data size of the data blocks 1 to 3 is smaller than the unit of writing to the cell array 252. The flash memory device 25 writes the data blocks 1 to 3 in the internal buffer 251 collectively to the cell array 252 [4]. By writing multiple data blocks together, the number of data writes can be reduced and performance can be improved.

  Next, pointer control of the ring buffer 241 in the processing shown in FIG. 3 will be described with reference to FIGS. 4 (a) to 4 (c). The following buffer control uses a transfer interruption pointer in addition to the transfer completion pointer. The data block transfer order is the same as the order in FIG. First, as shown in FIG. 4A, a transfer pointer and a transfer interruption pointer are set for the data block 3. The data block 3 is transferred from the ring buffer 241 to the flash memory device 25 [1]. The flash memory device 25 holds the data block 3 specified by the transfer interruption pointer in the buffer 251 without writing it to the cell array 252.

  Next, as shown in FIG. 4B, a transfer pointer and a transfer interruption pointer are set for the data block 1. Data block 1 is transferred from ring buffer 241 to flash memory device 25 [2]. The flash memory device 25 holds the data block 1 specified by the transfer interruption pointer in the buffer 241 without writing it to the cell array 252.

  Finally, as shown in FIG. 4C, the transfer pointer and the transfer completion pointer are set for the data block 2. Data block 2 is transferred from ring buffer 241 to flash memory device 25 [3]. The flash memory device 25 stores the data block 2 specified by the transfer completion pointer in the buffer 251. Since the transfer completion pointer is used to specify the data block 2, the flash memory device 25 uses the cell array 252 to process the three data blocks 1 to 3 stored in the internal buffer 251 at a time. Write to.

  FIG. 5 is a block diagram schematically showing functional components related to data transfer from the ring buffer 241 to the flash memory device 25 and data storage processing in the flash memory device 25. With reference to the block diagram of FIG. 5, the operation of each component in the processing shown in FIG. 4 will be described. First, the MPU 231 sets a transfer pointer and a transfer interruption pointer in the register group 321 in the HDC 232. The memory manager 322 acquires the data block 3 from the ring buffer 241 according to the transfer pointer and the transfer interruption pointer, and transfers it to the flash memory device 25. The flash controller 253 in the flash memory device 25 stores the transfer data block 3 from the memory manager 322 in the buffer 251.

  When the transfer of the data block 3 indicated by the transfer interruption pointer is completed, the memory manager 322 notifies the MPU 231 of this by an interrupt. In response to the notification, the MPU 231 resets the transfer pointer and the transfer interruption pointer in the register group 321. These pointers indicate the data block 1. The memory manager 322 acquires the data block 1 from the ring buffer 241 according to the transfer pointer and the transfer interruption pointer, and transfers it to the flash memory device 25. The flash controller 253 in the flash memory device 25 stores the transfer data block 1 from the memory manager 322 in the buffer 251.

  When the transfer of the data block 1 indicated by the transfer interruption pointer is completed, the memory manager 322 notifies the MPU 231 of the completion. In response to the notification, the MPU 231 sets a transfer pointer and a transfer completion pointer. These pointers indicate the data block 2. The memory manager 322 acquires the data block 1 from the ring buffer 241 according to the transfer pointer and the transfer completion pointer, and transfers it to the flash memory device 25. The flash controller 253 in the flash memory device 25 stores the transfer data block 1 from the memory manager 322 in the buffer 251.

  When the transfer of the data block 2 of the transfer completion pointer is completed, the memory manager 322 instructs the flash controller 253 to write data to the cell array 253. The flash controller 253 collectively writes the data blocks 1 to 3 stored in the buffer 521 to the cell array 252 in accordance with an instruction from the flash controller 253.

  The ring buffer 241 overwrites old data with new data in a specific storage area. Therefore, a pointer that prohibits transfer of data already transferred from the ring buffer 241 again is required. Thus, the transfer interruption pointer is used as a pointer for preventing the transferred data from being re-transferred by mistake. By using this transfer interruption pointer, it is possible to realize batch writing of a plurality of data blocks in the flash memory device 25 without defining a new pointer.

  In the following, a more specific example of ring buffer control according to the present invention will be described. The HDD 1 stores data from the host 51 in the ring buffer 241 and transfers the stored data to the flash memory device 25 and the magnetic disk 11. Further, the flash memory device 25 writes one data block into the cell array 252 or writes a plurality of data blocks at a time according to the control of the HDC / MPU 23.

  First, processing for storing data from the host 51 in the ring buffer 241 will be described with reference to FIGS. 6 (a) to 6 (c). As shown in FIG. 6A, when the memory manager 322 acquires a write command from the host 51, it sets a pointer HPAGE for storing write data in the register group 321. The pointer HPAGE indicates the storage position of data from the host 51. As shown in FIG. 6B, as the data is stored in the ring buffer 241, the memory manager 322 increments the pointer HPAGE. As shown in FIG. 6C, at the timing when the storage of the data block in the ring buffer 241 is completed, the pointer HPAGE indicates an address for storing the next data.

  When the storage of the data block in the ring buffer 241 is completed, the memory manager 322 sets HCPAGE indicating the start position of the newly stored data block in the register group 321. The pointer HCPAGE is a pointer that prohibits overwriting of data from the host 51. When the pointer HPAGE arrives at HCPAGE, the memory manager 322 stops storing data in the ring buffer 241 and notifies the MPU 231 of this. The MPU 231 executes processing corresponding to the notification.

  The memory manager 322 further sets a pointer DCPAGE corresponding to the pointer HPAGE in the register group 321. The memory manager 322 increments the pointer DCPAGE in the same manner as the pointer HPPAGE. The pointer DCPAGE is used in data transfer from the ring buffer 241 to the magnetic disk 11. Next, a process of writing a data block from the ring buffer 241 to the magnetic disk 11 will be described with reference to FIGS. 7 (a) and 7 (b).

  As shown in FIG. 7A, the MPU 231 sets a pointer DPAGE for designating a data block in the ring buffer 241 in the register group 321. The MPU 231 also sets data indicating the data length to be transferred in the register group 321. As shown in FIG. 7B, the memory manager 322 starts transfer from the data indicated by the pointer DPAGE, and increments the pointer DPAGE according to the data transfer.

  The memory manager 322 increments the pointer HCPAGE similarly to the pointer DPAGE. Since the pointer DPAGE indicates an address to which data has been transferred, the pointer HCPAGE that prohibits overwriting by data from the host 51 also moves accordingly. If the pointer DPAGE catches up with the pointer DCPAGE during data transfer, the memory manager 322 interrupts the transfer and notifies the MPU 231 of the interruption. In the example of FIG. 7B, the data transfer of the data block is completed without the pointer DPAGE catching up with the pointer DCPAGE.

  Next, referring to FIGS. 8A to 8C, the plurality of data blocks in the ring buffer 241 are transferred to the magnetic disk 11 in an order different from the address order in the ring buffer 241. An example of processing will be described. Since the LBA order of the data blocks and the storage order in the ring buffer do not necessarily match, writing time can be shortened by transferring data in accordance with the order of writing processing to the magnetic disk 11. . In this example, the HDC / MPU 23 transfers data block 1 to data block 3 to the magnetic disk 11. The transfer order is data block 3 first, data block 1 next, and data block 2 last. The storage order in the ring buffer 241 is the order of data block 1, data block 2, and data block 3.

  In this process, the pointer HCPAGE is set independently of the pointer DPAGE. When the pointer HCPAGE is linked to the pointer DPAGE, a problem occurs when data from the host 51 is stored in the ring buffer 241 during this process. That is, when data from the host 51 is stored immediately after the transfer of the data block 3, if the pointer HCPAGE indicates the same value as the pointer DPAGE, the data block 1 or the data block 2 is overwritten with new data. There is a possibility. Therefore, the MPU 231 sets the pointer HCPAGE to the start position of the data block 1, and the pointer HCPAGE is maintained at that position.

  The MPU 231 writes data blocks 1 to 3 to the magnetic disk 11 using a sequential writing function (hereinafter referred to as a list write function) to the magnetic disk 11 of the HDC 232. Hereinafter, this process will be specifically described. The MPU 231 sets the pointer DPAGE corresponding to the data block 3, the data length, and the target LBA in the list write table of the register group 321. Similarly, the MPU 231 sequentially sets the pointer DPAGE, the data length, and the target LBA corresponding to the data block 1 and the data block 2 in the list write table of the register group 321. In parallel with this processing, the actuator 16 moves the head slider 12 to the target track.

  When there is a list write instruction from the MPU 23, the memory manager 322 fetches the data blocks 1 to 3 registered in the list write table from the ring buffer 251 in the specified order. These are sequentially transferred to the RW channel 21 (magnetic disk 11). That is, the memory manager 322 writes the data blocks to the magnetic disk 11 in the order of the data block 3, the data block 1, and the data block 2. When these processes are completed, the HDC 232 notifies the MPU 231 of the completion. During the transfer process, the pointer HPPAGE and the pointer DCPAGE are maintained at the next address of the data block 3 stored last.

  Next, pointer control in data transfer from the ring buffer 241 to the flash memory device 25 will be described with reference to FIG. FIG. 9 shows an example in which one data block is transferred to the flash memory device 25. The data block is stored in a continuous area in the ring buffer 241 and is also continuous in the LBA on the magnetic disk 11. Even if the data is stored in the continuous area of the ring buffer 241, the data with non-continuous LBA is processed as a different data block.

  The pointers HCPAGE and HPAGE are the same as those in the above example. The pointer DPAGE is also used for data transfer to the flash memory device 25. A pointer CPLBA (Complete LBA) indicates the final LBA of the data block to be transferred. The pointer NVPAGE indicates the storage start address of the data block in the cell array 252. DLBA is data indicating the LBA on the magnetic disk 11 in the data block.

  The MPU 231 sets pointers DPAGE and CPLBA in the register group 321. The MPU 231 further sets DLBA in the register group 321. The memory manager 322 starts data block transfer according to an instruction from the MPU 231. The data to be transferred is a data block and a DLBA. According to the data transfer of the data block, the memory manager 322 increments the pointer DPAGE. The flash memory device 25 stores the data transferred to the address indicated by the pointer NVPAGE. When the pointer DPAGE catches up with the pointer CPLBA, the memory manager 322 completes the data transfer and notifies the MPU 231 of the data transfer.

  The above description is the pointer control of the data transfer process from the ring buffer 241 to the magnetic disk 11 and the process of transferring one data block from the ring buffer 241 to the flash memory device 25. The HDC / MPU 23 of this example uses these pointers to control batch write processing of a plurality of data blocks in the flash memory device 25.

  Referring to FIGS. 10A to 10C, pointer control in transfer processing of a plurality of data blocks to the flash memory device 25 and batch write processing of the plurality of data blocks to the cell array 252 is described. explain. This pointer control follows the pointer control described with reference to FIGS. 4 (a) to 4 (c). The pointer DPAGE is an example of a transfer pointer, the pointer CPLBA is an example of a transfer completion pointer, and the pointer DCPAGE is an example of a transfer interruption pointer.

  First, as shown in FIG. 10A, the MPU 231 sets the pointers DPAGE and DCPAGE corresponding to the data block 3 in the register group 321. The pointer CPLBA is set at a position corresponding to the data block 2. The memory manager 322 starts data transfer of the data block 3. In accordance with the data transfer of data block 3, the memory manager 322 increments the pointer DPAGE. When the pointer DPAGE catches up with the pointer DCPAGE, the memory manager 322 interrupts the data transfer and notifies the MPU 231 of the interruption.

  Upon receiving the notification, the MPU 231 sets the pointers DPAGE and DCPAGE corresponding to the data block 1 in the register group 321. The memory manager 322 starts data transfer of the data block 1. When the pointer DPAGE catches up with the pointer DCPAGE, the memory manager 322 interrupts the data transfer and notifies the MPU 231 of the interruption. Receiving the notification, the MPU 231 sets the pointer DPAGE corresponding to the data block 2 in the register group 321.

  The memory manager 322 starts data transfer of the data block 2. When the pointer DPAGE catches up with the pointer CPLBA, the transfer processing of the data blocks 1 to 3 is completed. The memory manager 322 notifies the flash controller 253 of the transfer completion. The flash controller 253 saves the three data blocks 1 to 3 stored in the buffer 251 in the cell array 252 by a single write process.

  As described above, by using the pointer DPAGE indicating the start of transfer, the instruction pointer DCPAGE indicating the transfer interruption, and the pointer CPLBA indicating the transfer completion, the plurality of data blocks 1 to 3 are transferred from the ring buffer 241. These data blocks 1 to 3 can be written together into the cell array 252 of the flash memory device 25.

  In addition, as described above, the process of reordering and transferring the data blocks 1 to 3 is performed when the LBAs of the data blocks 1 to 3 are continuous in the reordered order and can be handled as one segment. It is effective for. In other words, for example, the LBAs of the data blocks 1, 2, and 3 are 110h-11fh, 120h-12Fh, and 100h-10Fh, respectively. In this case, the three data blocks can be handled as one segment by reordering in the order of the data blocks 3, 1, 2 as described above.

  As described with reference to FIG. 6A, when the host 51 issues a write command, the memory manager 322 automatically sets the pointer HPAGE. The memory manager 322 further sets a pointer DCPAGE corresponding to the pointer HPAGE. If a write command is issued during transfer of multiple data blocks to the flash memory device 25 and the pointer DCPAGE is set accordingly, the exact point at which the data transfer is interrupted is lost and an error occurs in the data transfer. It is thought that it occurs.

  Therefore, before starting the transfer of a plurality of data blocks to the flash memory device 25, the MPU 231 does not link the pointer DCPAGE to the write command but sets it to change independently of it. Specifically, the MPU 231 sets a flag indicating the register group 321. The memory manager 322 refers to the register in which this flag is stored. When the flag is set, the memory manager 322 does not change the pointer DCPAGE even when a write command is received from the host 51. When the transfer process is completed, the MPU 231 releases the flag. With this processing, even when a write command is received during transfer of a plurality of data blocks to the flash memory device 25, the data block can be transferred to the flash memory device 25 safely and accurately.

  Next, an example in which the data blocks 1 to 3 are transferred to the flash memory device 25 in the order of the data blocks 1, 2, and 3 without reordering will be described. Since data blocks are transferred to the flash memory device 25 in accordance with the buffer storage order, the transfer process can be simplified. This processing will be specifically described with reference to FIGS.

  First, as illustrated in FIG. 11A, the MPU 231 sets the pointers DPAGE and DCPAGE corresponding to the data block 1 in the register group 321. The pointer CPLBA is set at a position corresponding to the pointer HPAGE. The memory manager 322 starts data transfer of the data block 1. In accordance with the data transfer of data block 1, the memory manager 322 increments the pointer DPAGE. When the pointer DPAGE catches up with the pointer DCPAGE, the memory manager 322 interrupts the data transfer and notifies the MPU 231 of the interruption.

  Receiving the notification, the MPU 231 sets the pointers DPAGE and DCPAGE corresponding to the data block 2 in the register group 321. The memory manager 322 starts data transfer of the data block 2. When the pointer DPAGE catches up with the pointer DCPAGE, the memory manager 322 interrupts the data transfer and notifies the MPU 231 of the interruption. Receiving the notification, the MPU 231 sets the pointer DPAGE corresponding to the data block 3 in the register group 321.

  The memory manager 322 starts data transfer of the data block 3. When the pointer DPAGE catches up with the pointer CPLBA, the transfer processing of the data blocks 1 to 3 is completed. The memory manager 322 notifies the flash controller 253 of the transfer completion. The flash controller 253 saves the three data blocks 1 to 3 stored in the buffer 251 in the cell array 252 by a single write process.

  As described above, by using the pointer DPAGE indicating the start of transfer, the instruction pointer DCPAGE indicating the transfer interruption, and the pointer CPLBA indicating the transfer completion, the plurality of data blocks 1 to 3 are transferred from the ring buffer 241. These data blocks 1 to 3 can be written together into the cell array 252 of the flash memory device 25.

  Although the present invention has been described using preferred embodiments, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. Of course. For example, in the above-described embodiment, the HDD has been described as an example. However, the present invention may be applied to a disk drive device using another disk such as an optical disk or a magneto-optical disk.

  The data block means a unit transferred from the ring buffer to the flash memory device, and is not limited to the above data block. As the nonvolatile semiconductor memory device, a memory device other than a flash memory device may be used. Further, a memory area of the nonvolatile semiconductor memory device may be formed using a plurality of ICs. The flash memory device may specify the batch write timing by referring to CPLBA (transfer completion pointer) by itself instead of an instruction from the memory manager. CPLBA (transfer completion pointer) may be set at any timing during transfer of a plurality of data blocks.

1 is a block diagram schematically showing an overall configuration of a hard disk drive according to an embodiment. FIG. 3 is a block diagram schematically showing data transfer from a ring buffer to a flash memory device in the present embodiment. FIG. 3 is a block diagram schematically showing a process in which a flash memory device writes a plurality of data blocks all at once into a cell array in the present embodiment. FIG. 4 is a diagram for explaining ring buffer pointer control in the processing shown in FIG. 3 in the present embodiment; FIG. 5 is a block diagram schematically showing functional components related to data transfer from a ring buffer to a flash memory device and data storage processing in the flash memory device in the present embodiment. In this Embodiment, it is a figure which shows typically the process which stores the data from a host in a ring buffer. FIG. 6 is a diagram for explaining processing for writing data blocks from a ring buffer to a magnetic disk in the present embodiment. In this embodiment, it is a figure explaining the example of the process which transfers the some data block in a ring buffer to a magnetic disk in the order different from the address order in a ring buffer. FIG. 10 is a diagram for explaining pointer control in data transfer from the ring buffer to the flash memory device 25 in the present embodiment. FIG. 4 is a diagram for explaining pointer control in transfer processing of a plurality of data blocks to a flash memory device and batch write processing of the plurality of data blocks to a cell array in the present embodiment. FIG. 10 is a diagram for explaining another example of pointer control in transfer processing of a plurality of data blocks to a flash memory device and batch write processing of the plurality of data blocks to a cell array in the present embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Hard disk drive, 10 Enclosure, 11 Magnetic disk 12 Head slider, 13 Arm electronics, 14 Spindle motor 15 Voice coil motor, 16 Actuator, 20 Circuit board 21 Read / write channel, 22 Motor driver Unit 23 Hard disk controller / micro processor unit 24 Random access memory, 25 Flash memory device 231 Micro processor unit, 232 Hard disk controller 321 Register group, 322 Memory manager 241 Ring buffer, 251 Flash memory Buffer 252 in memory device Cell array of flash memory device, 253 Flash controller

Claims (10)

A ring buffer to store data from the host;
A disk for storing data transferred from the ring buffer;
A buffer control unit for setting a transfer pointer, a transfer completion pointer, and a transfer interruption pointer for the ring buffer;
A transfer processing unit that transfers data from the ring buffer for each data block according to the transfer pointer, interrupts data transfer according to the transfer interrupt pointer, and completes data transfer according to the transfer completion pointer;
A nonvolatile semiconductor memory device for storing data transferred from the ring buffer in a cell array,
The buffer control unit sets a transfer pointer and a transfer interruption pointer corresponding to each of one or a plurality of data blocks, and further sets a transfer pointer and a transfer completion pointer corresponding to the last data block,
The transfer processing unit sequentially transfers the one or more data blocks to the non-volatile semiconductor memory device according to the corresponding transfer pointer and transfer interrupt pointer, and then the last according to the transfer pointer and the transfer completion pointer. Transferring data blocks to the non-volatile semiconductor memory device;
When the non-volatile semiconductor memory device receives the last data block, the non-volatile semiconductor memory device collectively stores the received one or more data blocks and the last data block in the cell array.
Disk drive device. The transfer processing unit notifies the buffer control unit of the transfer interruption for each transfer interruption pointer,
When the buffer control unit receives the interruption notification, the buffer control unit sets a pointer corresponding to the next data block.
The disk drive device according to claim 1. The transfer interruption pointer corresponds to a position where write data to be transferred next from the host is stored,
In the case where the nonvolatile semiconductor memory stores only one data block in the cell array, the transfer processing unit uses a transfer interrupt pointer corresponding to a transfer data address during transfer of the one data block. If it catches up, interrupt the transfer,
The disk drive device according to claim 1. While the transfer processing unit transfers the plurality of data blocks and the last data block, the position of the transfer interruption pointer is controlled independently of a write command.
The disk drive device according to claim 3. The transfer processing unit interrupts the transfer when the address of the transfer data catches up with the interrupt pointer during data transfer to the disk,
The disk drive device according to claim 3. In a disk drive device having a disk for storing data and a nonvolatile semiconductor memory device, a method for storing data in a cell array of the nonvolatile semiconductor memory device,
Set the transfer pointer and transfer interrupt pointer corresponding to the first data block transferred from the ring buffer,
Transferring the first data block to the non-volatile semiconductor memory device according to the transfer pointer, interrupting data transfer to the non-volatile semiconductor memory device according to the transfer interrupt pointer;
A transfer pointer and a transfer completion pointer corresponding to the second data block transferred from the ring buffer are set;
Transferring the second data block to the nonvolatile semiconductor memory device according to the transfer pointer, completing data transfer to the nonvolatile semiconductor memory device according to the transfer completion pointer;
A method of storing the first and second data blocks together in the cell array after transferring the second data block. Transferring a third data block to the nonvolatile semiconductor memory device between the first data block and the second data block;
After the transfer of the first data block, a transfer pointer and a transfer interruption pointer corresponding to the third data block are set.
The method of claim 5. The transfer interruption pointer corresponds to a position where write data to be transferred next from the host is stored,
In the case where only one data block is stored in the cell array, if the transfer data address catches up with the corresponding transfer interrupt pointer during the transfer of the one data block, the transfer is interrupted.
The disk drive device according to claim 1. While transferring the first and second data blocks, the position of the transfer interrupt pointer is controlled independently of a write command.
The disk drive device according to claim 8. If the transfer data address catches up with the interrupt pointer during data transfer to the disk, the transfer is interrupted.
The disk drive device according to claim 8.

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