JP2009043850A - Variable resistance element, and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable resistance element in which the area of an electrically contributing region of a variable resistance element is made smaller, and to provide a manufacturing method thereof. <P>SOLUTION: The variable resistance element includes: a first electrode which is in a plate shape parallel to a substrate surface of a semiconductor substrate 10 and has a first opening portion in a first direction perpendicular to the substrate surface; an annular variable resistance element 13 whose outer side surface comes in contact with an inner wall surface of the first opening portion of the first electrode 11; a first interlayer insulating film 14 which has a second opening portion penetrating the film 14 in the first direction on the first opening portion formed on the first electrode; an annular second interlayer insulating film 15 formed in a side wall shape on the variable resistance element whose outer side surface comes in contact with an inner wall surface of the second opening portion of the first interlayer insulating film 14; and a second electrode 12 formed in contact with a top surface of the first interlayer insulating film 14, an inner side surface of the second interlayer insulating film 15, and an inner side surface of the variable resistance element 13. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  In the present invention, a variable resistor is sandwiched between the first electrode and the second electrode, and a pulse voltage is applied between the first electrode and the second electrode, whereby the electric resistance between the two electrodes changes. The present invention relates to a variable resistance element and a manufacturing method thereof.

  In recent years, various devices such as FeRAM (Ferroelectric RAM), MRAM (Magnetic RAM), PRAM (Phase Change RAM), etc. as next-generation non-volatile random access memory (NVRAM) capable of high-speed operation instead of flash memory A structure has been proposed, and intense development competition has been conducted from the viewpoint of high performance, high reliability, low cost, and process consistency. However, each of these current memory devices has advantages and disadvantages, and it is still far from the ideal realization of a “universal memory” having the advantages of SRAM, DRAM, and flash memory.

  In contrast to these existing technologies, a resistive non-volatile memory RRAM (Resistive Random Access Memory) (registered trademark) using a variable resistance element whose electric resistance reversibly changes by applying a voltage pulse has been proposed. This configuration is shown in FIG.

  As shown in FIG. 14, a conventional variable resistance element 90 has a first electrode 11 formed at the bottom, a variable resistor 13, and a second electrode 12 formed at the top stacked in this order. The structure is such that by applying a pulse voltage between the first electrode 11 and the second electrode 12, the resistance value between the two electrodes can be reversibly changed. A novel nonvolatile semiconductor memory device can be realized by reading a resistance value that changes by this reversible resistance change operation (hereinafter referred to as “switching operation”).

  In this nonvolatile semiconductor memory device, a plurality of memory cells including variable resistance elements are arranged in a matrix in the row direction and the column direction to form a memory cell array, and data is written to each memory cell in the memory cell array. Peripheral circuits for controlling erase and read operations are arranged. This memory cell is composed of only one variable resistance element R (referred to as “1R type”) or a single select transistor T because of the difference in its constituent elements. And one variable resistance element R (referred to as “1T / 1R type”).

  FIG. 15 is an equivalent circuit diagram showing a configuration example of a 1R type memory cell. Each memory cell includes only the variable resistance element 90, and one electrode of the variable resistance element 90 is connected to the word lines (WL1 to WLn), and the other electrode is connected to the bit lines (BL1 to BLm). . Furthermore, each word line WL1 to WLn is connected to a word line decoder 62, and each bit line BL1 to BLm is connected to a bit line decoder 61. A specific bit line and word line for writing, erasing and reading operations to a specific memory cell in the memory cell array 60 are selected according to an address input (not shown).

  FIG. 16 is a schematic perspective view showing an example of a memory cell constituting the memory cell array 60 in FIG. As shown in FIG. 16, the first electrode 11 formed by extending a plurality of wiring layers in the same direction in the lower layer, and the plurality of wiring layers in a direction different from the extending direction of the first electrode 11 in the upper layer. The extended second electrodes 12 are arranged so as to cross each other, one of which forms a bit line and the other forms a word line. In addition, the variable resistor 13 is arranged at the intersection (usually called “cross point”) of each electrode. A portion that contributes electrically to the switching operation of the variable resistor 13 is a cross-point region where the first electrode 11 and the second electrode 12 intersect.

Here, Shangquing Liu, Alex Ignatiev, etc. of Houston University in the United States disclosed that it is possible to reversibly change the electrical resistance by applying a perovskite material voltage pulse known as the giant magnetoresistance effect. (See Patent Document 1 and Non-Patent Document 1 below), and the variable resistor 13 can be configured using the material. Although this method uses a perovskite material known for its giant magnetoresistive effect, this method is extremely epoch-making in that a resistance change of several orders of magnitude appears even at room temperature without applying a magnetic field. In Patent Document 1, a crystalline praseodymium / calcium / manganese oxide Pr _1-X Ca _X MnO ₃ (PCMO) film, which is a perovskite oxide, is used as a variable resistor material.

Other variable resistor materials include oxides of transition metal elements such as titanium oxide (TiO ₂ ) films, nickel oxide (NiO) films, zinc oxide (ZnO) films, and niobium oxide (Nb ₂ O ₅ ) films. Also, the following non-patent document 2 and patent document 2 disclose that reversible resistance change is exhibited. Among these, the phenomenon of the switching operation using NiO is reported in detail in Non-Patent Document 3.

US Pat. No. 6,204,139 JP 2002-537627 A Liu, S.Q. et al., “Electric-pulse-induced reversible resistance change effect in magnetoresistive films”, Applied Physics Letter, Vol.76, pp.2749-2751,2000 H. Pagnia et al., “Bistable Switching in Electroformed Metal-Insulator-Metal Devices”, Phys. Stat. Sol. (A), vol. 108, pp. 11-65, 1988. Baek, I.G., et al., “Highly Scalable Non-volatile Resistive Memory using Simple Binary Oxide Driven by Asymmetric Unipolar Voltage Pulses”, IEDM 04, pp. 587-590, 2004

By the way, during the above-described information rewriting operation of the nonvolatile memory device, that is, by applying a pulse voltage between the first electrode 11 and the second electrode 12, the resistance of the variable resistor 13 reaches a predetermined resistance value. In the meantime, a transient current flows through the variable resistance element 90. This current is referred to as a write current or an erase current depending on the direction of resistance change. For example, when an oxide of a transition metal element is used as the variable resistor material, in Non-Patent Document 3 using NiO, the write current and the erase current are 1 mA with an electrode area of 0.3 × 0.7 μm ^2. Is reported to be Since the amount of this current depends on the area of the electrically contributing region of the variable resistor 13, if the area is reduced, the write current and the erase current can be suppressed, and the consumption as a nonvolatile memory device can be suppressed. Current can be suppressed.

  In general, if the crystallinity of the variable resistor 13 is good, a memory element with a stable switching operation can be achieved with good reproducibility, but this improvement in crystallinity relatively lowers the resistance value of the variable resistor. Since the resistance value of the variable resistor 13 is inversely proportional to the area of the electrically contributing region of the variable resistor 13, the resistance of the variable resistor element 90 is reduced when the area is large. In this case, in the 1R type memory cell, the parasitic current flowing through the non-selected cell connected to the selected bit line or word line increases, and the voltage supplied to the wiring becomes insufficient, so that writing is not performed. A similar problem occurs.

  Therefore, if the area of the electrically contributing region of the variable resistor can be reduced, it is possible to suppress the current consumption and to create a memory element with a stable switching operation that is unlikely to be in a writable state with high reproducibility. . However, in the conventional memory cell described above, the area of the electrically contributing region of the variable resistor 90 is equal to the wiring of the first electrode 11 and the second electrode 12 in the 1R type memory cell as shown in FIG. It is defined by the area of the cross-point region where the wiring intersects. Since the area of the cross-point region is restricted by the minimum processing dimension that indicates the processing capability of the electrode or the insulating film during the process, there is a limit in reducing the area of the cross-point region under the structure of FIG. There is.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a variable resistance element capable of further reducing the area of the electrically contributing region of the variable resistor and a method for manufacturing the same. To do.

  In order to achieve the above object, a variable resistance element according to the present invention has a plate-like shape parallel to a substrate surface, a first electrode having a first opening penetrating in a first direction perpendicular to the substrate surface, and the first electrode. An annular variable resistor whose outer surface is in contact with an inner wall surface of the first opening of one electrode, and a second opening penetrating in the first direction on the first opening formed on the first electrode First interlayer insulating film having a portion, and an annular second interlayer insulating film formed in a sidewall shape on the variable resistor whose outer surface is in contact with the inner wall surface of the second opening of the first interlayer insulating film And an upper surface of the first interlayer insulating film, an inner surface of the second interlayer insulating film, and an inner surface of the variable resistor, and a second electrode formed in contact with the first electrode. The electrical resistance between the first and second electrodes is changed by applying a voltage between the first and second electrodes. The first feature to be.

  According to the first characteristic configuration of the variable resistance element according to the present invention, the variable resistor formed in an annular shape on the inner surface of the first opening contacts the first electrode on the outer peripheral surface of the variable resistor. The inner peripheral surface is in contact with the second electrode. That is, the contact area between the variable resistor and the first electrode corresponds to the side area of the outer portion of the variable resistor formed in an annular shape, and the contact area between the variable resistor and the second electrode is the variable resistor. It corresponds to the side area of the inner part of the. Therefore, the area of the electrically contributing portion can be greatly reduced as compared with the conventional cross-point variable resistance element in which the area of the electrically contributing portion depends on the minimum processing size. Thereby, it is possible to realize a memory element capable of performing a stable switching operation in which current consumption is suppressed and a writing impossible state is unlikely to occur, compared to a variable resistance element having a conventional configuration.

  In the variable resistance element according to the present invention, in addition to the first characteristic configuration, the first interlayer insulating film has a sidewall shape on a partial region of the first electrode on the second opening side. A second feature is that the side surface of the second interlayer insulating film is in contact with the sidewall-shaped side surface of the first interlayer insulating film.

  According to the second characteristic configuration of the variable resistance element according to the present invention, the inner diameter of the annular variable resistor can be reduced. Therefore, the area of the inner surface of the variable resistor can be reduced as compared with the first characteristic configuration, and thereby the contact area between the variable resistor and the second electrode is reduced. That is, the area of the electrically contributing region can be further reduced.

  The variable resistance element according to the present invention includes a first electrode formed in a plate shape parallel to the substrate surface, and an outer surface of the first electrode parallel to a first direction perpendicular to the substrate surface. One of the variable resistor that is in contact with the side surface, the first interlayer insulating film formed on the first electrode, and the outer wall surface of the first interlayer insulating film parallel to the first direction on the variable resistor. A second interlayer insulating film formed in a sidewall shape in contact with the surface, an upper surface of the first interlayer insulating film, a side surface of the second interlayer insulating film, and the first interlayer insulating film via the second interlayer insulating film A second electrode formed in contact with the other side surface facing the interlayer insulating film and the other side surface not in contact with the first electrode of the variable resistor. By applying a voltage between the second electrodes, the electrical resistance between the first and second electrodes changes. The the third feature.

  According to the third characteristic configuration of the variable resistance element according to the present invention, the variable resistor is in contact with the side surface of the first electrode on one side surface and on the side surface opposite to the surface in contact with the first electrode. In this configuration, the inner surface of the second electrode comes into contact. In other words, the contact area between the variable resistor and both electrodes depends on the area of the side surface of the variable resistor, and the area that contributes electrically is greatly reduced compared to the conventional cross-point variable resistor. Can be made. Thereby, it is possible to realize a memory element capable of performing a stable switching operation in which current consumption is suppressed and a writing impossible state is unlikely to occur, compared to a variable resistance element having a conventional configuration.

  In addition to the third feature configuration, the variable resistance element according to the present invention includes two first electrodes extending in the same direction that are spaced apart from each other and are in the opposing relationship. The first interlayer insulating film and the second interlayer insulating film, which are configured to have one set or a plurality of sets of electrodes, and are formed adjacent to the first electrodes in correspondence with the first electrodes in an opposing relationship. And the variable resistors are spaced apart from each other and the second electrode is in contact with all of the pair of the first interlayer insulating film, the second interlayer insulating film, and the variable resistor in a facing relationship. The fourth feature is that it is formed as described above.

  Further, in the variable resistance element according to the present invention, in addition to any one of the first to fourth characteristic configurations, the variable resistor is configured by an oxide of a transition metal element or an oxynitride of a transition metal. This is a fifth feature.

  In addition to the fifth characteristic configuration, the variable resistance element according to the present invention is characterized in that the variable resistor is formed by oxidizing a part of the first electrode. It is characterized by.

  In addition to the fifth or sixth characteristic configuration, the variable resistance element according to the present invention has a seventh characteristic that the variable resistor is titanium oxide or titanium oxynitride.

  A variable resistance element manufacturing method according to the present invention for achieving the above object is the method for manufacturing a variable resistance element according to any one of the first to seventh aspects, wherein the first electrode is formed on a substrate. A first step of depositing and processing a first electrode material film as a material, and after completion of the first step, depositing a first insulating material film as a material of the first interlayer insulating film on the entire surface, A second step of opening the predetermined region of the first insulating material film deposited on the electrode material film until a part of the first electrode material film is exposed to form the first interlayer insulating film; After completion of the second step, the exposed first electrode material film is oxidized from above the opening region, and oxidation is performed at least in the direction perpendicular to the substrate by the thickness of the first electrode. And a third step of forming the variable resistor film and the first electrode, and after the completion of the third step A second insulating material film is deposited in a sidewall shape on a part of the variable resistor film along the side wall of the first interlayer insulating film in the opening region where the variable resistor film is formed on the bottom surface. Then, after the fourth step of forming the second interlayer insulating film and after the completion of the fourth step, an anisotropic etching process is performed on the variable resistor film using the second interlayer insulating film as a mask, A fifth step of forming the variable resistor with the side surface exposed under the interlayer insulating film; and after the fifth step, a second electrode material film is formed on the entire surface so as to be in contact with at least the exposed side surface of the variable resistor. A first feature is to have a sixth step of forming the second electrode by processing after being deposited.

  According to the first feature of the method of manufacturing a variable resistance element according to the present invention, in the third step, the exposed first electrode material film is oxidized from above to form a variable resistor film. In the step, the variable resistor is formed by removing the variable resistor film while leaving the variable resistor film formed below the sidewall-like second interlayer insulating film. At this time, if the opening region is circular or rectangular (hereinafter simply referred to as “annular” in the description of this feature), the opening region is sufficient in the outer peripheral portion and in one extending direction parallel to the substrate surface. When configured to be long (for example, between opposite sides of the substrate), the variable resistor is formed on the opposite side surfaces formed in the extending direction and deposited in the center of the opening region. The film is removed in the fifth step. Then, one side surface of the variable resistor formed on the outer peripheral portion of the opening region or on the opposite side surfaces (the outer surface when it is formed in an annular shape) is in contact with the first electrode and the other side surface (formed in an annular shape). When it is done, its inner surface) is exposed. Thereafter, a second electrode material film is deposited in the sixth step, thereby forming a variable resistor whose other side surface is in contact with the second electrode.

  That is, according to the present method, the annular variable resistor is in contact with the first electrode on the outer surface and the second electrode on the inner surface, or the first electrode on one side and the second electrode on the other side. A rectangular variable resistor extending in one direction different from the normal direction of the contact surface with both electrodes is formed. Accordingly, the area of the electrically contributing region can be reduced as compared with the conventional cross-point variable resistance element.

  According to the method of the present invention, the variable resistor is formed by the etching process according to the fifth step, and the size of the variable resistor is that of the second interlayer insulating film serving as a mask during the etching process. Depends on film thickness. The size of the variable resistor corresponds to a difference value between the inner diameter and the outer diameter of the variable resistor when the variable resistor is formed in an annular shape, and is variable when formed in a rectangular shape. This corresponds to the distance between one side surface in contact with the first electrode and the other side surface in contact with the second electrode among the surfaces formed by the resistor. In the former case, by adjusting the size of the variable resistor, it is possible to adjust the resistance value of the variable resistor itself and the contact area with the second electrode in contact with the inner surface. In the latter case, the resistance value of the variable resistor itself can be adjusted by adjusting the size of the variable resistor. Here, since the size of the variable resistor depends on the film thickness of the second interlayer insulating film serving as a mask at the time of the etching process according to the fifth process, the second interlayer deposited in a sidewall shape in the fourth process. By appropriately adjusting the thickness of the insulating film, the size of the variable resistor can be adjusted. That is, by adjusting the film thickness of the second interlayer insulating film, the resistance value of the variable resistor and the contact area with the electrode can be adjusted.

  In the case of a conventional cross-point configuration, the contact area between the first electrode and the second electrode and the variable resistor depends on the minimum processing dimension, and only in a range larger than the contact area determined by the minimum processing dimension. The configuration can be adjusted. That is, the variable resistance element to be manufactured is in a state where the resistance value is the largest when it is configured with the minimum contact area determined by the minimum processing dimension, and can be adjusted in the direction of decreasing the resistance value. On the other hand, it was practically impossible to adjust in the direction of increasing the resistance value.

  However, according to the present invention, the contact area between the two electrodes and the variable resistor can be significantly reduced as compared with the area of the cross-point region determined by the minimum processing dimension, and the second interlayer insulating film By adjusting the film thickness, the resistance value of the variable resistance element can be adjusted within the range of the resistance value that is larger than the maximum resistance value realized by the conventional variable resistance element. That is, it becomes possible to manufacture a variable resistance element that achieves a desired resistance value within a range of resistance values larger than that of the conventional one. As a result, by providing a plurality of variable resistance elements manufactured by such a method, a stable nonvolatile semiconductor memory device in which current consumption is suppressed and a non-writable state hardly occurs is realized.

  In the variable resistance element manufacturing method according to the present invention, in addition to the first feature, the first step includes a step of patterning the first electrode material film in a predetermined stretching direction. Two steps are steps of opening the first insulating material film in a circular shape or a rectangular shape in a predetermined region excluding an upper region of an edge portion of the first electrode material film formed in the first step, The fourth step is a step of forming the second interlayer insulating film in a ring shape or a rectangular ring shape on the inner side wall of the opening region, and the fifth step is a step of forming the variable resistor on the inner side wall of the lower region of the opening region. The second feature is that the step is formed in a ring shape or a rectangular shape.

  According to the second feature of the method of manufacturing a variable resistance element according to the present invention, since the variable resistor is formed in an annular shape or a rectangular shape, the film thickness of the second interlayer insulating film is adjusted as described above. The contact area with the second electrode can be adjusted. Therefore, the resistance value of the variable resistance element can be flexibly adjusted within the range of the resistance value that cannot be realized by the conventional variable resistance element.

  In the variable resistance element according to the present invention, in addition to the first feature, the first step includes a step of patterning the first electrode material film in a predetermined extending direction, and the second step includes Forming one or a plurality of voids in a direction parallel to the stretching direction so as to connect both ends of two sides perpendicular to the stretching direction of the first electrode material film in a predetermined region of the first insulating material film. The fourth step is a step of forming the second interlayer insulating film extending in the extending direction on the inner wall in the extended gap, and the fifth step is a lower portion in the gap. A third feature is a step of forming the variable resistor extending in the extending direction on the inner wall of the region.

  According to the third feature of the method of manufacturing a variable resistance element according to the present invention, the variable resistor is formed on the inner wall in the gap. The variable resistor is in contact with the first electrode on one side and the second electrode on the other side. In the case of such a configuration, as described above, the size of the variable resistor itself can be adjusted by adjusting the film thickness of the second interlayer insulating film, so that the resistance value range is larger than that of the conventional variable resistance element. The resistance value can be flexibly adjusted.

  Further, in the case of this method, the first electrode and the variable resistor come into contact with the side surface of the patterned first electrode. That is, since it is not necessary to form an opening region for forming the variable resistor in the manufactured first electrode, the first patterning width defined by the minimum processing dimension is used in the patterning process according to the first step. The electrode material film can be patterned. Therefore, compared with the manufacturing method according to the second feature in which the opening region for forming the variable resistor is required to be formed on the first electrode, there is an effect that the degree of integration can be further increased.

  In the variable resistance element manufacturing method according to the present invention, in addition to any one of the first to third features, the second step includes depositing the first insulating material film, and the first electrode. After opening a predetermined region until a part of the material film is exposed, a third insulating material film is deposited in a sidewall shape along the side wall of the first insulating material film in the opening region. A fourth feature is a step of forming the first interlayer insulating film made of the third insulating material film.

  According to the fourth feature of the variable resistance element according to the present invention, the exposed area of the first electrode material film exposed in the opening region before the oxidation process according to the variable resistor film forming step of the third step. Can be further reduced. That is, as compared with the variable resistance element manufacturing method according to the first to third features, the size of the variable resistor can be further reduced, thereby further increasing the resistance value of the variable resistance element. It becomes possible.

  In particular, when the variable resistor is formed in an annular shape, not only the thickness of the second interlayer insulating film but also the thickness of the first interlayer insulating film (thickness of the third insulating material film) and the first In addition, the contact area with the second electrode can be adjusted. Even in the case of the manufacturing method according to the first to third characteristics, it is possible to shorten the inner diameter of the annular variable resistor by setting the film thickness of the second interlayer insulating film large. However, since the outer diameter of the variable resistor is determined by the opening region forming step according to the second step, the outer diameter of the variable resistor is determined by adjusting the size of the opening region when forming the opening region. It cannot be shortened. However, according to this method, the outer diameter of the variable resistor can be shortened by adjusting the deposited film thickness for depositing the third insulating material film, so that the contact between the variable resistor and the first electrode can be reduced. The area can be adjusted as appropriate, which makes it possible to adjust the resistance value more flexibly than the first to third methods while realizing a resistance value larger than that of the conventional configuration.

  According to the configuration of the present invention, a variable resistance element that can reduce the area of the electrically contributing region of the variable resistor is realized. In addition, with such a variable resistance element, it is possible to realize a memory element capable of performing a stable switching operation in which current consumption is suppressed and a write-impossible state is unlikely to occur compared to a variable resistance element having a conventional configuration.

  Hereinafter, each embodiment of a variable resistance element according to the present invention (hereinafter referred to as “the present invention element” as appropriate) and a manufacturing method thereof (hereinafter referred to as “the present invention method” as appropriate) will be described with reference to the drawings. To do.

[First Embodiment]
A first embodiment (hereinafter referred to as “this embodiment” as appropriate) of the element of the present invention and the method of the present invention will be described with reference to the following FIGS. In addition, the same code | symbol is attached | subjected and demonstrated about the same component as each figure of FIGS. 14-16 mentioned above.

  FIG. 1 is a schematic sectional view showing the structure of the element of the present invention according to the present embodiment. As shown in FIG. 1, the element 1 of the present invention has a first electrode 11, a second electrode 12, a variable resistor 13, a first interlayer insulating film 14, a first electrode on a semiconductor substrate 10 on which a base insulating film 16 is formed. A two-layer insulating film 15 and a protective insulating film 17 are provided. Note that each schematic configuration diagram including FIG. 1 is merely schematically shown, and the scale of the actual structure does not necessarily match the scale of the drawing.

  The first electrode 11 is formed on the base insulating film 16, and in a partial region, in a direction perpendicular to the substrate surface (hereinafter referred to as “first direction” where appropriate), an annular opening (hereinafter referred to as “ Referred to as a “first opening”). A first interlayer insulating film 14 is formed on the first electrode 11. The first interlayer insulating film 14 has an annular opening (hereinafter, referred to as “second opening” as appropriate) in the first direction on the first opening. That is, the first electrode 11 and the first interlayer insulating film 14 form a laminated structure having an opening in a partial region (hereinafter referred to as “laminated structure 30”).

  The variable resistor 13 is formed on the base insulating film 16 in a ring shape whose outer surface is in contact with the inner wall surface of the first opening. On the variable resistor 13, a second interlayer insulating film 15 is formed in an annular shape so that the outer surface is in contact with the inner wall surface of the second opening. The second interlayer insulating film 15 is formed in a sidewall shape on the side wall of the first interlayer insulating film 14 inside the second opening. As shown in FIG. 1, when the upper surface position of the variable resistor 13 is formed closer to the substrate surface than the upper surface position of the first electrode 11, a part of the second interlayer insulating film 15 is the first electrode. 11 is formed so as to be in contact with the inner wall surface.

  The second electrode 12 is in contact with the upper surface of the first interlayer insulating film 14, the inner side surface (side surface on the opening side) of the second interlayer insulating film, and the inner side surface (side surface on the opening side) of the variable resistor 13. Is formed. Note that the second electrode 12 is formed so as not to completely fill the opening formed by the laminated structure 30 and to have an opening region on the upper surface. A protective insulating film 17 is formed on the upper surface of the second electrode 12. With this protective insulating film 17, the opening formed inside the laminated structure 30 is completely filled.

  When configured in this way, the variable resistor 13 is in contact with the second electrode 12 on the side surface on the opening side (inner side) formed by the laminated structure 30 (13b in FIG. 1), and on the side opposite to the opening ( It contacts the first electrode 11 on the outer side surface (13a in FIG. 1). In other words, similarly to the conventional configuration shown in FIG. 14, in the element 1 of the present invention, a configuration in which the variable resistor 13 is sandwiched between the first electrode 11 and the second electrode 12 is realized. . However, as will be described later, with the configuration shown in FIG. 1, the area of the electrically contributing region of the variable resistor 13 compared to the conventional variable resistance element 90 (hereinafter referred to as “contribution area” as appropriate). Can be greatly reduced.

  As shown in FIG. 1, since the second electrode 12 is formed in a part above the interlayer insulating film 14 formed on the first electrode 11, a part of the second electrode 12 is formed as a 1R type memory cell. 2 is a schematic plan view of the memory cell array as shown in FIG. 2 for convenience. That is, a plurality of electrode wirings constituting the first electrode 11 are formed extending in the same direction, and another electrode wiring constituting the second electrode 12 is formed in the upper region of the first electrode 11. A plurality of stretches are formed in different directions.

  In the following, after first describing the manufacturing method of the element 1 of the present invention, the contribution areas of the conventional variable resistance element 90 and the element 1 of the present invention are compared. In describing the manufacturing method, a schematic cross-sectional structure diagram cut along the electrode wiring constituting the first electrode 11 (along line X1-X2 in FIG. 2) and the electrode constituting the second electrode 12 A schematic cross-sectional structure diagram cut along the wiring (along the line Y1-Y2 in FIG. 2) will be described for each step.

  3 and 4 schematically show a schematic cross-sectional structure diagram in each process when the element 1 of the present invention is manufactured using the method of the present invention, and FIGS. 3A to 3D are shown for each process. ) And FIGS. 4A to 4C (divided into two drawings for the sake of space). FIG. 5 is a flowchart showing the manufacturing process of the method of the present invention, and each step (steps # 1 to # 10) in the following sentence represents each step of the flowchart shown in FIG.

  First, as shown in FIG. 3A, after depositing a base insulating film 16 on the semiconductor substrate 10 (step # 1), an electrode material film (hereinafter, no confusion) that becomes the material of the first electrode 11 is formed. (Described as “first electrode material film 11”) in a range, and processed into a shape extending a plurality of times parallel to the X1-X2 direction (step # 2). In step # 2, as an example of the deposition method, a TiN (titanium nitride) film is deposited by sputtering to a thickness of about 50 nm. Further, as a processing method, processing is performed by a photolithography method and an etching method.

Next, as shown in FIG. 3B, after depositing an insulating material film (hereinafter referred to as “first insulating material film 14” within a range that does not cause confusion) as a material of the first interlayer insulating film 14 ( Step # 3), in a partial region on the first electrode material film 11, an opening 21 is formed on the upper surface so that the first electrode material film 11 is exposed (step # 4). In step # 3, as an example of the deposition method, an SiO ₂ (silicon oxide) film is deposited by a CVD (Chemical Vapor Deposition) method to a thickness of about 300 nm. The opening 21 is formed by a photolithography method and an etching method, and is formed in a cylindrical shape having a diameter of about 400 nm as an example.

  Next, as shown in FIG. 3C, the first electrode material film 11 formed on the bottom surface of the opening 21 is thermally oxidized in an atmosphere containing oxygen at about 250 ° C. to 450 ° C. Then, a thermal oxidation process is performed to form a variable resistor film (hereinafter referred to as “variable resistor film 13” within a range where no confusion occurs) (step # 5). As described above, when a TiN film is formed as the first electrode material film 11, a TiON (titanium oxynitride) film is formed by this step # 5.

  In step # 5, the first electrode material film 11 formed on the bottom surface of the opening 21 is at least as thick as the first electrode material film 11 in the direction perpendicular to the substrate surface of the substrate 10 (see FIG. It is assumed that the oxidation of FIG. 3B (corresponding to d1) is performed. That is, by step # 5, the unoxidized first electrode material film 11 does not exist on the bottom surface of the opening 21, and the variable resistor film 13 is formed in the region. As a result, the first electrode 11 is formed in the lower layer of the first interlayer insulating film 14 outside the opening 21. In FIG. 3C, the first electrode material film 11 formed in the outer region of the opening 21 is illustrated as not undergoing oxidation treatment at all. Even if the oxidation treatment is in progress for the electrode material film 11 in the part, it does not affect the function of the element 1 of the present invention after completion.

  Next, as shown in FIG. 3D, an insulating material film (hereinafter referred to as “second insulating material film 15” in a range that does not cause confusion) is deposited on the entire surface as a material of the second interlayer insulating film 15. Thereafter, etch back is performed to form the second interlayer insulating film 15 in a sidewall shape on the inner surface of the opening 21 on the variable resistor film 13 (step # 6). By this step # 6, the second interlayer insulating film 15 is formed in an annular shape on the variable resistor film 13 on the inner surface of the opening 21, and the first interlayer insulating film is formed on the outer surface opposite to the opening 21. 14 and the first electrode 11 are brought into contact with each other.

As an example of this step # 6, a SiO ₂ film is deposited on the entire surface of about 170 nm by the CVD method, and then etched back on the entire surface to leave about 10 nm on the inner surface of the opening 21. A two-layer insulating film 15 can be formed. Even after the completion of Step # 6, a part of the variable resistor film 13 is exposed inside the second interlayer insulating film 15.

  Next, as shown in FIG. 4A, the exposed variable resistor film 13 is etched using the second interlayer insulating film 15 as a mask, and the opening inner side than the second interlayer insulating film 15 is etched. The variable resistor film 13 formed in step S7 is removed (step # 7). By this step, the variable resistor 13 is formed in the lower layer of the second interlayer insulating film 15 in contact with the first electrode 11 outside the opening and the inside exposed.

  In step # 7, the etching is performed so that at least the inner surface of the variable resistor 13 is exposed. That is, as shown in FIG. 4A, the opening 22 formed in this step # 7 has the base insulating film 16 formed on the bottom surface, and the annular variable resistor 13 and the upper layer on the inner side surface thereof. In addition, a second interlayer insulating film 15 having a ring shape and a sidewall shape is formed, and a part of the base insulating film 16 formed under the variable resistor 13 is exposed at the lowermost layer position on the inner side surface of the opening.

  Next, as shown in FIG. 4B, an electrode material film (hereinafter referred to as “second electrode material film 12” in a range that does not cause confusion) is deposited on the entire surface as a material of the second electrode 12. (Step # 8). As an example of the deposition method in this step, a TiN film is deposited to a thickness of about 150 nm by sputtering. As a result, the film is formed with a thickness of about 20 nm on the second interlayer insulating film 15 formed in a sidewall shape. By this step, the upper surface of the first interlayer insulating film 14, the side surface (inner side surface) on the opening 22 side of the second interlayer insulating film 15, and the side surface (inner side surface) on the opening 22 side of the variable resistor 13 are in contact with each other. A second electrode material film 15 is deposited.

Next, as shown in FIG. 4 (c), the second electrode material film 12 is processed into a shape extending in a plurality of directions different from the first electrode 11 (Y1-Y2 direction), and the second electrode 12 is processed. After the formation (step # 9), a protective insulating film 17 is deposited on the entire surface (step # 10). The second electrode material film 12 is processed by photolithography and etching as in the case of the first electrode material film according to Step # 2. As an example of the method for depositing the protective insulating film 17 in Step # 10, an SiO ₂ film is deposited to a thickness of about 500 nm by the CVD method.

  After step # 10 is completed, a contact plug for making electrical contact with the first electrode 11 and the second electrode 12 is formed in a predetermined region of the protective insulating film 17 by a known contact plug formation process, and then a known wiring is formed. A wiring layer is formed on the protective insulating film 17 by a process. In the case of multilayer wiring, this plug formation process and wiring process are appropriately performed a plurality of times. The cross-sectional structure diagram shown in FIG. 1 shows a part of the X1-X2 cross-sectional structure diagram after step # 10.

  According to the configuration of the present embodiment, the variable resistor 13 is formed in the lower layer of the sidewall-like second interlayer insulating film 15, and when viewed from the opening, the first electrode 11 in the outer region and the second electrode in the inner region. 12 is in contact with each other. That is, the contact area between the variable resistor 13 and both electrodes can be adjusted by the film thickness of the second interlayer insulating film 15 formed in the upper layer. According to the above method, since the second interlayer insulating film 15 is formed by a self-aligned process, the deposited film thickness at the time of depositing the second insulating material film 15 in step # 6 and the etching back are left. By adjusting the film thickness, the film thickness of the second interlayer insulating film 15 can be adjusted, thereby adjusting the contact area between the variable resistor 13 and the first electrode 11 and the second electrode 12. Can do.

  The element 1 of the present invention formed in this way can reduce the contact area between the variable resistor 13 and both electrodes as compared with the conventional configuration. This point will be described with reference to FIG.

  FIG. 6 is a conceptual diagram comparing the contribution areas of the element 1 of the present invention and the conventional variable resistance element 90. 6A shows the case of the conventional variable resistance element 90, and FIG. 6B shows the case of the element 1 of the present invention. In the following, for the sake of convenience, the conventional variable resistance element 90 will also be described as having a configuration in which the first electrode 11 extends in the X1-X2 direction and the second electrode 12 extends in the Y1-Y2 direction, as in FIG. .

As described above with reference to FIG. 16, in the case of the conventional variable resistance element 90, the variable resistor 13 is formed in the cross point region of the first electrode 11 and the second electrode 12. This is also illustrated in FIG. That is, since the variable resistor 13 is formed in a region where the first electrode 11 extending in the X1-X2 direction in the lower layer and the second electrode 12 extending in the Y1-Y2 direction in the upper layer intersect, The contribution area corresponds to this intersection area. That is, when forming both electrodes 11 and 12 in the minimum processing dimension F, the contribution area is described in F ^2.

  On the other hand, in the case of the element 1 of the present invention, as shown in FIG. 1, the variable resistor 13 is a ring formed on the first electrode 11 in a region where the first electrode 11 and the second electrode 12 intersect. Is formed in a ring shape below the second interlayer insulating film 15 deposited with a predetermined film thickness on the inner wall of the opening. In the annular variable resistor 13, as shown in FIG. 6B, the lower first electrode 11 is in contact with the outer side of the opening, and the upper second electrode 12 is in contact with the inner side of the opening. That is, the contact area between the variable resistor 13 and the first electrode 11 corresponds to the side area of the outer portion of the variable resistor 13 formed in an annular shape, while the contact area with the second electrode 12 is variable resistance. It corresponds to the side area of the inner part of the body 13. That is, according to the element 1 of the present invention, the contribution area can be greatly reduced as compared with the conventional variable resistance element 90 shown in FIG. Furthermore, as described above, the contact area between the variable resistor 13 and the first electrode 11 and the second electrode 12 can be adjusted by the film thickness of the second interlayer insulating film 15, and the second insulating material according to step # 6. The thickness can be reduced as appropriate by adjusting the thickness of the film 15 deposited and the thickness of the film remaining at the time of etch back.

  According to the element 1 of the present invention, the contribution area can be reduced as compared with the conventional variable resistance element 90. Therefore, by configuring the nonvolatile semiconductor memory device as shown in FIG. 15 using the element 1 of the present invention, the parasitic current flowing through the non-selected memory cells can be reduced, and the consumption current is suppressed. Thus, it is possible to realize a nonvolatile semiconductor memory device capable of a stable switching operation in which an unwritable state hardly occurs.

[Second Embodiment]
A second embodiment (hereinafter referred to as “this embodiment” as appropriate) of the element of the present invention and the method of the present invention will be described with reference to the following FIGS. In addition, the same code | symbol is attached | subjected about the component same as 1st Embodiment, and the description is simplified.

  FIG. 7 is a schematic sectional view showing the structure of the element of the present invention according to this embodiment. As shown in FIG. 7, the inventive element 1 a includes the first electrode 11, the second electrode 12, and the like on the semiconductor substrate 10 on which the base insulating film 16 is formed, like the inventive element 1 according to the first embodiment. The variable resistor 13, the first interlayer insulating film 14, the second interlayer insulating film 15, and the protective insulating film 17 are configured.

  In addition, the element 1a of the present invention is a part in which a part of the first interlayer insulating film 14 formed on the first electrode 11 is formed in a sidewall shape, as compared with the element 1 of the present invention of the first embodiment. 14b is different. Hereinafter, the first interlayer insulating film 14 in the region having no sidewall shape on the first electrode 11 will be referred to as “first interlayer insulating film 14a”, and the portion configured in the sidewall shape is referred to as “first interlayer insulating film 14a”. Insulating film 14b ".

  That is, the first interlayer insulating film 14 includes a first interlayer insulating film 14a having an annular opening and a sidewall-shaped first interlayer insulating film 14b formed in an annular shape on the inner wall of the opening. . Then, the second interlayer insulating film 15 is formed in an annular shape so that the outer surface is in contact with the inner wall surface on the opening side of the first interlayer insulating film 14b.

  As in the case of the first embodiment, the variable resistor 13 is formed in an annular shape in the lower layer of the second interlayer insulating film 15, and the outer surface is in contact with the opening side surface of the first electrode 11. The second electrode 12 is in contact with the upper surface of the first interlayer insulating film 14, the inner side surface (side surface on the opening side) of the second interlayer insulating film, and the inner side surface (side surface on the opening side) of the variable resistor 13. Is formed.

  When configured in this manner, the variable resistor 13 is the second on the side surface on the opening side (inside) formed by the stacked structure 30 of the first electrode 11 and the first interlayer insulating film 14 as in the first embodiment. It contacts the electrode 12 (13b in FIG. 1) and contacts the first electrode 11 on the side surface (outside) opposite to the opening (13a in FIG. 1). That is, the variable resistive element 1a according to the present embodiment realizes a configuration in which the variable resistor 13 is sandwiched between the first electrode 11 and the second electrode 12, as in the inventive element 1 of the first embodiment. Will be. In the case of this embodiment, as will be described later, the contribution area can be greatly reduced as compared with the conventional variable resistance element 90, and the contribution area can be further reduced as compared with the variable resistance element 1 of the first embodiment. be able to.

  In the following, the manufacturing method of the element 1a of the present invention will be described first, and then the contribution areas of the conventional variable resistance element 90 and the element 1a of the present invention will be compared. In the description of the manufacturing method, as in the case of the first embodiment, a schematic cross-sectional structure diagram cut along the electrode wiring constituting the first electrode 11 (along the X1-X2 line in FIG. 2). A schematic cross-sectional structure diagram cut along the electrode wiring constituting the second electrode 12 (along the line Y1-Y2 in FIG. 2) is illustrated and described for each process.

  8 and 9 schematically show schematic cross-sectional structure diagrams in each process when the element 1 of the present invention is manufactured using the method of the present invention, and FIGS. 8A to 8D are shown for each process. ) And FIGS. 9A to 9C (divided into two drawings for the sake of space). FIG. 10 is a flowchart showing the manufacturing process of the method of the present invention, and each step (steps # 11 to # 22) in the following sentence represents each step of the flowchart shown in FIG. Moreover, about the process which overlaps with the process (step # 1-# 10) demonstrated in 1st Embodiment, that effect is described and description is simplified.

  First, as shown in FIG. 8A, after the base insulating film 16 is deposited on the semiconductor substrate 10 (step # 11) as in step # 1, the first electrode material film 11 is formed as in step # 2. Are processed into a shape that extends in parallel with the X1-X2 direction (step # 12).

  Next, as shown in FIG. 8B, as in step # 3, an insulating material film as a material of the first interlayer insulating film 14a (hereinafter referred to as “first insulating material film 14a” within a range where no confusion occurs). After the deposition (step # 13), in the same manner as in step # 4, an opening 21 is formed in a partial region on the first electrode material film 11 so that the first electrode material film 11 is exposed on the upper surface. (Step # 14).

Next, as shown in FIG. 8C, an insulating material film (hereinafter referred to as “third insulating material film 14b” in a range that does not cause confusion) is deposited on the entire surface as a material of the first interlayer insulating film 14b. After (step # 15), by performing etch back, the first interlayer insulating film 14b is formed in a sidewall shape on the inner surface of the opening 21 on the first electrode material film 11 (step # 16). By this step # 16, the first interlayer insulating film 14 composed of the first interlayer insulating film 14a having the opening 21 and the first interlayer insulating film 14b formed in the opening 21 in a ring shape and in a side wall shape. Is formed. As an example of steps # 15 and # 16, an SiO ₂ film as the third insulating material film 14b is deposited on the entire surface of about 170 nm by the CVD method, and then etched back on the entire surface to thereby form the inside of the opening 21. The first interlayer insulating film 14b can be formed with a film thickness of about 10 nm remaining on the side surface. By this step, the area of the opening is reduced by the thickness of the first interlayer insulating film 14b (opening 21a).

  Next, as shown in FIG. 8D, the first formed on the bottom surface of the opening 21a is thermally oxidized in an atmosphere containing oxygen at about 250 ° C. to 450 ° C. as in Step # 5. A thermal oxidation process is performed on the electrode material film 11 to form the variable resistor film 13 (step # 17). Also in this step, as in step # 5, the film of the first electrode material film 11 is at least perpendicular to the substrate surface of the substrate 10 with respect to the first electrode material film 11 formed on the bottom surface of the opening 21a. It is assumed that the thickness (equivalent to d2 in FIG. 8C) is oxidized. As a result, the first electrode 11 is formed under the first interlayer insulating film 14a outside the opening 21a.

  Next, as shown in FIG. 9A, as in step # 6, the second insulating material film 15 is deposited on the entire surface, and then etched back, so that the inside of the opening 21a on the variable resistor film 13 is obtained. A second interlayer insulating film 15 is formed on the side surface in a sidewall shape (step # 18). By this step # 18, the second interlayer insulating film 15 is formed in an annular shape on the variable resistor film 13 on the inner surface of the opening 21a, and on the outer surface opposite to the opening 21, the first interlayer insulating film. 14 (14b) and the first electrode 11 are brought into contact with each other.

As an example of this step # 18, an SiO ₂ film is deposited on the entire surface of about 85 nm by the CVD method, and then etched back on the entire surface to leave about 5 nm on the inner surface of the opening 21. A two-layer insulating film 15 can be formed.

  Next, as shown in FIG. 9B, as in step # 7, the exposed variable resistor film 13 is etched using the second interlayer insulating film 15 as a mask, and the second interlayer insulating film is etched. The variable resistor film 13 formed on the inner side of the opening than 15 is removed (step # 19). By this step, in the lower layer of the second interlayer insulating film 15, the variable resistor 13 is formed in contact with the first electrode 11 outside the opening (opening 22a) and exposed inside.

  Next, as shown in FIG. 9C, the second electrode material film 12 is deposited on the entire surface as in Step # 8 (Step # 20). By this step, the upper surface of the first interlayer insulating film 14, the side surface (inner side surface) of the second interlayer insulating film 15 on the opening 22 side, and the side surface (inner side surface) of the variable resistor 13 on the opening 22 a side are brought into contact with each other. A second electrode material film 15 is deposited.

  Next, as shown in FIG. 9D, after the second electrode material film 12 is processed to form the second electrode 12 (step # 21), similarly to step # 9, the same as step # 10. Then, a protective insulating film 17 is deposited on the entire surface (step # 22). Thereafter, a known contact plug formation process and wiring process are performed. The cross-sectional structure diagram shown in FIG. 7 shows a part of the X1-X2 cross-sectional structure diagram after step # 22.

  Also in the case of the configuration of the present embodiment, the variable resistor 13 is formed in the lower layer of the second interlayer insulating film 15 in the side wall shape, and the first electrode 11 is formed in the outer region when viewed from the opening, as in the first embodiment. In the inner region, the second electrode 12 is brought into contact with each other. That is, the contact area between the variable resistor 13 and both electrodes can be adjusted by the film thickness of the second interlayer insulating film 15 formed in the upper layer.

  The element 1a of the present invention formed in this way can reduce the contact area between the variable resistor 13 and both electrodes as compared with the conventional configuration. This point will be described with reference to FIG.

  FIG. 11 is a conceptual diagram comparing the contribution areas of the element 1a of the present invention and the conventional variable resistance element 90, as in FIG. FIG. 11A shows the case of the conventional variable resistance element 90, and FIG. 11B shows the case of the element 1a of the present invention.

  In the case of the element 1a of the present invention, as shown in FIG. 7, the variable resistor 13 has an annular opening formed on the first electrode 11 in a region where the first electrode 11 and the second electrode 12 intersect. In the part, it is formed in a ring shape below the second interlayer insulating film 15 formed further inside the first interlayer insulating film 14b formed on the inner side wall. Then, as shown in FIG. 11B, the outer surface of the annular variable resistor 13 is in contact with the first electrode 11 formed in the lower layer, and the inner surface is in contact with the second electrode 12 in the upper layer. Therefore, also in the case of the element 1a of the present invention, the contribution area can be greatly reduced as compared with the conventional variable resistance element 90, similarly to the element 1 of the present invention according to the first embodiment. Furthermore, the contact area between the variable resistor 13 and the first electrode 11 and the second electrode 12 can be adjusted by the film thickness of the second interlayer insulating film 15 as described above, and the second insulating material according to step # 18. The thickness can be reduced as appropriate by adjusting the thickness of the film 15 deposited and the thickness of the film remaining at the time of etch back.

  In the case of this embodiment, the area of the variable resistor film exposed immediately before the etching of the variable resistor film 13 according to step # 19 is also adjusted by the film thickness of the first interlayer insulating film 14b. Can do. That is, the first electrode material film exposed at the time of FIG. 8C is formed by sufficiently leaving the film thickness of the first interlayer insulating film 14b in advance before the thermal oxidation process according to Step # 17. 11 area is reduced. Thereby, the length (thickness) in the substrate surface direction of the variable resistor film 13 generated by the thermal oxidation process according to Step # 17 can be reduced. Accordingly, the inner diameter (inner surface diameter) and the outer diameter (outer surface diameter) of the annular variable resistor 13 formed by the etching process according to step # 19 can be shortened. It is possible to further reduce the contact area.

  Also in the case of the first embodiment, by setting the film thickness of the second interlayer insulating film 15 formed in step # 6 to be large, the inner diameter of the variable resistor 13 formed in a ring shape after step # 7 is shortened. It is possible to do. However, since the outer diameter of the variable resistor 13 cannot be shortened, the contact area between the variable resistor 13 and the first electrode 11 cannot be reduced as in the second embodiment. Further, in order to reduce the contact area between the second electrode 12 and the variable resistor 13, it is necessary to increase the film thickness of the second interlayer insulating film 15, but the film thickness of the second interlayer insulating film 15 is increased. In this case, the length of the variable resistor 13 formed in the lower layer of the second insulating film 15 in the substrate surface direction (the thickness of the variable resistor 13 formed in an annular shape) becomes large. That is, since the resistance value of the variable resistor 13 depends on the thickness of the second interlayer insulating film 15, there are restrictions on the film thickness of the second interlayer insulating film 15 when realizing a predetermined resistance value. It will be. Therefore, under such restrictions, it may be assumed that the thickness of the second interlayer insulating film 15 cannot be increased beyond a certain level. In such a case, although the contribution area can be reduced as compared with the conventional configuration. Therefore, it cannot be further reduced.

  In the case of the present embodiment, the outer diameter of the variable resistor 13 formed in an annular shape can be adjusted by the film thickness of the first interlayer insulating film 14b, so the length (thickness) of the variable resistor 13 in the substrate surface direction. The contribution area can be reduced without sufficiently increasing the film thickness of the second interlayer insulating film 15 which affects the above. Further, since the film thickness of the second interlayer insulating film 15 can be adjusted according to the desired resistance value of the variable resistor 13 included in the manufactured variable resistor element 1a, the adjustment of the resistance value of the variable resistor 13; It is possible to achieve both reduction of the contribution area.

  According to the element 1a of the present invention, the contribution area can be reduced as compared with the conventional variable resistance element 90. For this reason, by configuring the nonvolatile semiconductor memory device as shown in FIG. 15 using the element 1a of the present invention, the parasitic current flowing through the non-selected memory cells can be reduced, and the consumption current is suppressed. Thus, it is possible to realize a nonvolatile semiconductor memory device capable of a stable switching operation in which an unwritable state hardly occurs.

[Another embodiment]
Hereinafter, another embodiment will be described.

  <1> In each of the embodiments described above, the variable resistor 13 is formed in an annular shape by opening a predetermined region on the first electrode 11 extending in the first direction. This can also be realized by providing a gap in the same direction as the first direction. Hereinafter, the case of the first embodiment will be described as an example, but the same can be realized in the case of the second embodiment.

  FIG. 12 shows a schematic plan view after completion of the processing according to Step # 2 in comparison with a plan view after completion. FIG. 12A shows a plan view after the end of step # 2, and FIG. 12B shows a plan view after completion (same as FIG. 2).

  In Step # 2, after depositing the first electrode material film 11, it is processed into a shape that extends a plurality of times parallel to the X1-X2 direction. At this time, in the above-described embodiment, the patterning process is performed with the same width as that of the completed first electrode 11, whereas in this embodiment, the length between both outer sides of the two adjacent first electrodes 11 ( 12) (corresponding to d3 in FIG. 12) is processed into a shape extending a plurality of times in the X1-X2 direction as a patterning width.

  Hereinafter, description will be made with reference to the plan views of FIGS. Each cross-sectional structure diagram in the X1-X2 direction and the Y1-Y2 direction has the same configuration as that illustrated in FIGS. In each plan view shown in FIG. 13, a part of the formed interlayer insulating film is not shown for convenience of explanation.

  FIG. 13A is a plan view after step # 4. By this step # 4, a void portion 21 extending in the same direction is formed in the partial region on the first electrode material film 11 extending in the X1-X2 direction with the width d3 with respect to the first interlayer insulating film 14. .

  FIG. 13B is a plan view after step # 5. By this step # 5, the first electrode material film 11 exposed on the bottom surface of the gap 21 is oxidized and the variable resistor film 13 extending in the X1-X2 direction is formed. In addition, by this step, the first electrode 11 extending a plurality of times in the X1-X2 direction is formed.

  FIG. 13C is a plan view after step # 6. By this step # 6, the second interlayer insulating film 15 extending in the X1-X2 direction is formed in a sidewall shape on the inner wall portion of the cavity 21 on the variable resistor film 13.

  FIG. 13D is a plan view after step # 7. By this step # 7, portions other than the variable resistor film 13 under the second interlayer insulating film 15 are removed by etching, and the base insulating film 16 extends in the X1-X2 direction inside the second interlayer insulating film 15. Exposed to. In addition, the two variable resistor films 13 formed under the adjacent second interlayer insulating film 15 expose their opposing surfaces.

  FIG. 13E is a plan view after step # 9. In FIG. 13D, the exposed exposed surface of the opposing variable resistor film 13 is in contact with the second electrode 12 extending in the Y1-Y2 direction. That is, the variable resistor film 13 formed in the lower layer position of the second interlayer insulating film 15 has a configuration in which one side surface is in contact with the second electrode 12 and the other side surface is in contact with the first electrode 11. The variable resistance element manufactured through this process has a cross-sectional structure similar to that shown in FIG. That is, also in the variable resistance element manufactured by such a process, the contribution area can be reduced as in the first embodiment. In particular, by this step, it is not necessary to form an opening on the first electrode material film 11 as compared with the case of the first embodiment, so the width of the first electrode 11 (the direction orthogonal to the stretching direction). Can be formed with a minimum processing dimension, and the degree of integration can be increased.

  <2> In another embodiment according to the above <1>, in step # 1, the length d3 between the two outer sides of the two adjacent first electrodes 11 is used as a patterning width, and a plurality of shapes are stretched in the X1-X2 direction. However, it is also possible to use a method in which the gap 21 is formed between the adjacent first electrodes 11 in step # 4 without performing the processing in step # 1. In this case, since the patterning step can be omitted, the number of steps can be reduced.

  In the method described in <1> above, the first electrode 11 that contacts the variable resistor 13 on the Y1 side surface and the first electrode 11 that contacts the variable resistor 13 on the Y2 side surface alternately. It becomes the structure formed. For this reason, between the adjacent first electrodes 11, the positions of the side surfaces in contact with the variable resistor 13 are different from each other, and therefore the configuration is not completely the same considering the formation position of the variable resistor 13 in contact. Accordingly, if the symmetry in the Y1-Y2 direction is lost during the manufacturing process, there may be a difference in the contact area of the variable resistor 13 between the adjacent first electrodes 11 in some cases.

  However, according to this process, since each 1st electrode 11 is the structure which contacts the variable resistor 13 in the both sides | surfaces of Y1 side and Y2 side, when compared with said <1>, a contact area increases. However, the uniformity of the contact area between each first electrode 11 and variable resistor 13 can be ensured. Needless to say, this process can also reduce the contribution area (the area of the electrically contributing region of the variable resistor 13) as compared with the conventional configuration.

  <3> In each of the above-described embodiments, the shape of each interlayer insulating film (14, 14b, 15) and variable resistor 13 formed on the inner wall of the opening (21, 21a, 22, 22a) is described as annular. However, when the shape of the opening is on a rectangular cylinder, the shape of the interlayer insulating film and the variable resistor 13 is naturally a rectangular ring. That is, the shape of the interlayer insulating film and the variable resistor is not limited to the annular shape, but is a shape corresponding to the shape of the opening, and the shape of the opening is not limited to the cylindrical shape, but is a rectangular tube. It may be configured by a shape or a shape formed by another normal opening process.

1 is a schematic cross-sectional view of a variable resistance element according to a first embodiment of the present invention. Schematic plan view of a memory cell array composed of variable resistance elements according to the present invention Schematic cross-sectional structure diagram (1) for each step when manufacturing the element of the present invention using the manufacturing method of the first embodiment of the present invention Schematic cross-sectional structure diagram (2) for each step when the element of the present invention is manufactured using the manufacturing method of the first embodiment of the present invention. The flowchart which shows the process of the manufacturing method of 1st Embodiment of this invention. The conceptual diagram which compared the area which contributes electrically by the variable resistive element which concerns on 1st Embodiment of this invention, and the conventional variable resistive element Schematic structural sectional view of a variable resistance element according to a second embodiment of the present invention. Schematic cross-sectional structure diagram for each step when manufacturing the element of the present invention using the manufacturing method of the second embodiment of the present invention (1) Schematic cross-sectional structure diagram for each process when manufacturing the element of the present invention using the manufacturing method of the second embodiment of the present invention (2) The flowchart which shows the process of the manufacturing method of 1st Embodiment of this invention. The conceptual diagram which compared the area which electrically contributes with the variable resistive element which concerns on 2nd Embodiment of this invention, and the conventional variable resistive element A schematic plan view of a variable resistance element according to another embodiment of the present invention when compared with a conventional variable resistance element. Plane schematic diagram for each process when manufacturing the element of the present invention using the manufacturing method of another embodiment of the present invention. Schematic showing the basic structure of a conventional variable resistance element Equivalent circuit diagram showing one configuration example of 1R type memory cell Schematic perspective view showing an example of a memory cell

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 1a: Variable resistance element of 1st Embodiment which concerns on this invention 10: Semiconductor substrate 11: 1st electrode 12: 2nd electrode 13: Variable resistor 14: 1st interlayer insulation film 15: 2nd interlayer insulation film 16 : Underlying insulating film 17: Protective insulating film 30: Laminated structure of first electrode and first interlayer insulating film 60: Memory cell array 61: Bit line decoder 62: Word line decoder 90: Conventional variable resistance element

Claims (11)

A first electrode having a plate-like shape parallel to the substrate surface and having a first opening penetrating in a first direction perpendicular to the substrate surface;
An annular variable resistor whose outer surface is in contact with the inner wall surface of the first opening of the first electrode;
A first interlayer insulating film having a second opening penetrating in the first direction on the first opening formed on the first electrode;
An annular second interlayer insulating film formed in a sidewall shape on the variable resistor whose outer surface is in contact with the inner wall surface of the second opening of the first interlayer insulating film;
A second electrode formed so as to be in contact with the upper surface of the first interlayer insulating film, the inner surface of the second interlayer insulating film, and the inner surface of the variable resistor;
A variable resistance element in which an electrical resistance between the first and second electrodes changes when a voltage is applied between the first and second electrodes.   The first interlayer insulating film is formed in a sidewall shape on a partial region of the first electrode on the second opening side, and the second interlayer insulating film is formed on the sidewall-shaped side surface of the first interlayer insulating film. The variable resistance element according to claim 1, wherein the side surfaces of the interlayer insulating film are in contact with each other. A first electrode formed in a plate shape parallel to the substrate surface;
A variable resistor having one side surface in contact with an outer surface of the first electrode parallel to a first direction perpendicular to the substrate surface;
A first interlayer insulating film formed on the first electrode;
A second interlayer insulating film formed on the variable resistor in a sidewall shape with one side in contact with an outer wall surface of the first interlayer insulating film parallel to the first direction;
The upper surface of the first interlayer insulating film, the side surface of the second interlayer insulating film, the other side surface facing the outer wall surface of the first interlayer insulating film via the second interlayer insulating film, and the variable resistor A second electrode formed in contact with the other side surface not in contact with the first electrode, and
A variable resistance element in which an electrical resistance between the first and second electrodes changes when a voltage is applied between the first and second electrodes. The two first electrodes extending in the same direction are spaced apart and face each other, and the two first electrodes that are in the facing relationship have one set or a plurality of sets.
The first interlayer insulating film, the second interlayer insulating film, and the variable resistor, which are formed in proximity to the first electrodes, are opposed to each other, corresponding to the first electrodes in an opposing relationship. ,
4. The second electrode is formed so as to be in contact with all of the pair of the first interlayer insulating film, the second interlayer insulating film, and the variable resistor that are in an opposing relationship. The variable resistance element described in 1.   5. The variable resistance element according to claim 1, wherein the variable resistor includes an oxide of a transition metal element or an oxynitride of a transition metal.   6. The variable resistance element according to claim 5, wherein the variable resistor is formed by oxidizing a part of the first electrode.   The variable resistance element according to claim 5, wherein the variable resistor is titanium oxide or titanium oxynitride. It is a manufacturing method of the variable resistance element according to any one of claims 1 to 7,
A first step of processing after depositing a first electrode material film as a material of the first electrode on a substrate;
After completion of the first step, a first insulating material film as a material of the first interlayer insulating film is deposited on the entire surface, and a predetermined region of the first insulating material film deposited on the first electrode material film is formed on the entire surface. A second step of forming the first interlayer insulating film by opening until a part of the first electrode material film is exposed;
After completion of the second step, the exposed first electrode material film is oxidized from above the opening region, and the oxidation of the film thickness of the first electrode proceeds at least in the direction perpendicular to the substrate. A third step of forming the variable resistor film and the first electrode,
After the third step, a second insulating material film is formed on a part of the variable resistor film along the side wall of the first interlayer insulating film in the opening region where the variable resistor film is formed on the bottom surface. A fourth step of forming the second interlayer insulating film by depositing in a sidewall shape;
After completion of the fourth step, anisotropic etching is performed on the variable resistor film using the second interlayer insulating film as a mask to form the variable resistor having a side surface exposed under the second interlayer insulating film. And a fifth step to
A sixth step of forming the second electrode by processing after depositing a second electrode material film over the entire surface so as to be in contact with at least the exposed side surface of the variable resistor after completion of the fifth step; A variable resistance element manufacturing method comprising: The first step includes a step of patterning the first electrode material film in a predetermined stretching direction;
The second step is a step of opening the first insulating material film in a circular shape or a rectangular shape in a predetermined region excluding an upper region of an edge portion of the first electrode material film formed in the first step. Yes,
The fourth step is a step of forming the second interlayer insulating film in an annular shape or a rectangular shape on the inner wall of the opening region,
9. The method of manufacturing a variable resistance element according to claim 8, wherein the fifth step is a step of forming the variable resistor in an annular shape or a rectangular shape on an inner wall of a lower region of the opening region. The first step includes a step of patterning the first electrode material film in a predetermined stretching direction;
In the predetermined region of the first insulating material film, the second step includes one or more in a direction parallel to the stretching direction so as to connect both ends of the two sides perpendicular to the stretching direction of the first electrode material film. A step of forming voids,
The fourth step is a step of forming the second interlayer insulating film extending in the extending direction on the inner wall in the extended gap.
9. The variable resistance element manufacturing method according to claim 8, wherein the fifth step is a step of forming the variable resistor extending in the extending direction on an inner wall of the lower region in the gap. Method.   In the second step, after depositing the first insulating material film and opening a predetermined region until a part of the first electrode material film is exposed, along the side wall of the first insulating material film in the opening region. 11. The step of forming the first interlayer insulating film made of the first and third insulating material films by depositing a third insulating material film in a sidewall shape. The manufacturing method of the variable resistance element of any one of Claims 1.

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