JP2009021534A - Vapor growth apparatus and vapor growth method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a vapor-phase growth apparatus and a growth method which shorten a temperature decrease time of a wafer substrate after an epitaxial growth step to make it easy to realize a high throughput in film formation of an epitaxial layer. <P>SOLUTION: The vapor-phase growth apparatus includes a gas supply port 12 formed in a top portion of a reactor 11, a gas distribution plate 13 arranged in the reactor, a discharge port 14 formed in a bottom portion of the reactor, an annular holder 15 on which a semiconductor wafer W is placed to face the gas distribution plate 13, a rotary unit 16 which rotates the annular holder 15, and a heater 17 which heats the semiconductor wafer W. The rotary unit 16 is united with a hollow rotary shaft 16a, and the heater 17 is fixed on a support base 19 of a support shaft 18 penetrating the rotary shaft 16a. A separation distance between the gas distribution plate 13 and the annular holder 15 is set such that a cooling gas for temperature decreasing which flows downward from the gas supply port 12 through the gas distribution plate 13 is in a laminar flow state on a surface of the semiconductor wafer W or a surface of the annular holder 15. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a vapor phase growth apparatus and a vapor phase growth method, and more particularly to a vapor phase growth apparatus and a growth method that facilitate high throughput in the deposition of a vapor phase growth layer of a semiconductor substrate.

For example, in the manufacture of semiconductor devices in which ultra-high speed bipolar elements, ultra-high speed CMOS elements, power MOS transistors, etc. are formed, the epitaxial growth technology for single crystal layers with controlled impurity concentration, film thickness, crystal defects, etc. It is indispensable for improvement.
Batch processing that can process a large number of wafers at once in an epitaxial growth apparatus that manufactures epitaxial wafers that are used as semiconductor device substrates by growing single crystal thin films on the surface of semiconductor substrates such as silicon wafers and compound semiconductor wafers There are molds and single wafer molds that process wafers one by one. Here, since the batch processing type epitaxial growth apparatus can process a large number of wafers at a time, it has a high throughput and has an advantage in reducing the manufacturing cost of the epitaxial wafer. On the other hand, the single wafer type epitaxial growth apparatus is easy to cope with an increase in the diameter of the wafer, and has an advantage in film thickness control including uniformity of the epitaxial growth layer.

  In recent years, the use of silicon epitaxial wafers has been expanded due to high integration, high performance, and multi-functionalization of semiconductor devices using silicon wafers. For example, in the manufacture of a semiconductor device equipped with a memory circuit composed of CMOS elements, the memory capacity becomes, for example, a gigabit level, and the crystallinity is superior to that of a bulk wafer, for example, about 10 μm, in order to secure the manufacturing yield. An epitaxial wafer having a silicon epitaxial layer is frequently used. Further, it is expected that a so-called strained silicon epitaxial layer having a silicon-germanium alloy layer, for example, which facilitates ultra-high-speed CMOS devices along with miniaturization of the devices, will be put to practical use. Alternatively, in a semiconductor device having a high breakdown voltage element such as a power MOS transistor, an epitaxial wafer having a high resistivity silicon epitaxial layer with a film thickness of about 50 to 100 μm, for example, is used.

Under such circumstances, the wafer diameter is increased to 300 mmφ, for example, and the film thickness of the epitaxial growth layer needs to be controlled uniformly and with high precision over the wafer surface, and the specific gravity of the single wafer epitaxial growth apparatus is increased. ing. However, as described above, since the single wafer type epitaxial growth apparatus cannot perform batch processing of wafers, in general, the throughput is lower than that of the batch processing type epitaxial growth apparatus, and it is difficult to reduce the manufacturing cost of the epitaxial wafer. . Heretofore, epitaxial growth apparatuses having various structures that increase the epitaxial growth rate have been disclosed as single-wafer epitaxial growth apparatuses (see, for example, Patent Document 1).
JP-A-11-67675

The single-wafer epitaxial growth apparatus disclosed in Patent Document 1 can increase the growth rate of a silicon epitaxial layer to about 10 μm / min, for example. By the way, in the growth of this silicon epitaxial layer, it is necessary to increase the wafer temperature to 1000 to 1100 ° C. In order to increase the throughput in manufacturing the epitaxial wafer, the temperature rise / It is extremely important to shorten the temperature reduction processing time. Moreover, since the epitaxial layer is a single crystal layer, it is required to prevent the occurrence of crystal defects.
However, in the conventional single wafer type epitaxial growth apparatus, it is difficult to shorten the processing time required for lowering the temperature of the wafer after growth, particularly in the epitaxial layer, and there is a problem that this temperature reduction processing becomes a big bottleneck for high throughput in epitaxial wafer manufacturing. It was.
Accordingly, an object of the present invention is to provide a vapor phase growth apparatus and a growth method that can shorten the temperature lowering time after the vapor phase growth step and facilitate high throughput in the deposition of the vapor phase growth layer.

  In order to achieve the above object, a vapor phase growth apparatus according to the present invention includes a gas supply port at an upper part of a cylindrical reactor, an exhaust port at a lower part thereof, a wafer holding member for placing a wafer therein, and a wafer holding member. In a single wafer epitaxial growth apparatus equipped with a gas rectifying plate between a member and a gas supply port, the separation distance between the gas rectifying plate and the wafer holding member is such that the cooling gas for cooling the wafer is on the wafer surface or the wafer holding It is set so that it may become a rectification | straightening state on a member surface.

  In the present invention, in a preferred embodiment, it is desirable that H / D ≦ 1/5 is satisfied, where H is the separation distance between the gas rectifying plate and the wafer holding member and D is the diameter of the wafer holding member.

  In the present invention, it is desirable that a handling arm for taking a wafer in and out of the reactor can be inserted between the lower surface of the gas rectifying plate and the upper surface of the wafer holding member.

  In the present invention, the gas rectifying plate is preferably configured to be movable up and down.

  Further, it is desirable that the vertical movement of the gas rectifying plate is connected to a mechanism for detaching from the wafer holding member for taking in and out the wafer.

  Furthermore, it is desirable that the distance between the lower surface of the gas rectifying plate and the upper surface of the wafer holding member can be adjusted to 1 mm or more and 60 mm or less.

On the other hand, a vapor phase growth method according to the present invention comprises a gas supply port at the upper part of a cylindrical reactor, an exhaust port at the lower part, a wafer holding member for placing a wafer therein, the wafer holding member and the gas supply port, A gas flow rectifying plate is provided between them, and a film growth gas is allowed to flow down from the gas supply port through the gas flow rectifying plate through the reaction furnace to deposit a vapor phase growth layer on the wafer. In the vapor phase growth method, the temperature of the wafer substrate is lowered by causing the working gas to flow down from the gas supply port through the gas rectifying plate through the reaction furnace.
The distance between the gas rectifying plate and the wafer holding member is set so that the cooling gas is in a rectifying state on the wafer surface or on the wafer holding member surface.

  In the growth method of the present invention, a handling arm for taking a wafer substrate into and out of the reaction furnace is provided between the lower surface of the gas rectifying plate and the upper surface of the wafer holding member, and the wafer is moved into and out of the reaction furnace by moving the handling arm. It is desirable to be able to take in and out.

  In the growth method of the present invention, when the film is formed on the wafer, the current plate and the wafer are close to each other. When the wafer is taken in and out, the distance between the current plate and the wafer is increased so that the wafer can be taken in and out. It is desirable to do.

  Furthermore, in the growth method of the present invention, it is desirable that the current plate is movable up and down and interlocked with the loading and unloading of the wafer.

In the present invention, not only epitaxial growth but also general vapor phase growth such as MOCVD may be used, and it may not be a single wafer type.
Further, the gas supply port of the present invention may be provided not at the top surface of the reaction furnace but at the upper part of the whole reaction furnace, for example, at the side surface of the reaction furnace. Further, the gas exhaust port may be provided not at the bottom surface of the reaction furnace but at the lower part of the entire reaction furnace, and may be, for example, the side surface of the reaction furnace.
The wafer holding member used in the present invention is not limited to the annular holder but may be a susceptor generally called. In the case of an annular holder (having an opening in the middle), a removable flat plate is arranged in the opening, and for example, the flat plate is lifted so that wafers can be taken in and out of the reactor with a handling arm. good.

  According to the present invention, there is provided a vapor phase growth apparatus and a growth method that enable uniform cooling in the temperature drop of a wafer after the vapor phase growth step, shorten the temperature drop time, and facilitate high throughput in vapor phase layer deposition. Can be provided.

  Preferred embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows the configuration of a single wafer epitaxial growth apparatus according to an embodiment of the present invention. As shown in FIG. 1, the epitaxial growth apparatus includes, for example, a stainless steel cylindrical hollow body processing furnace 11, a gas supply port 12 for introducing a film forming gas into the processing furnace from its top, and a gas supply port 12. A gas rectifying plate 13 is provided for rectifying the deposited film forming gas and causing it to flow, for example, as a laminar flow to the semiconductor wafer W disposed below. And the gas exhaust port 14 which discharges | emits the reaction product after reacting on the semiconductor wafer W surface etc. and some film-forming gas from the bottom part to the processing furnace 11 is provided. Here, the gas discharge port 14 is connected to a vacuum pump (not shown).

  Further, in the processing furnace described above, an annular holder 15 of a wafer holding member for placing and holding the semiconductor wafer 17 is disposed on the upper surface thereof, and a rotating unit 16 that rotates, and the semiconductor wafer W placed on the annular holder 15 are placed. A heater 17 for heating by radiant heat is provided. Here, the rotating body unit 16 is connected to a rotating device (not shown) whose rotating shaft 16a is positioned below, and is attached so as to be capable of high-speed rotation. The cylindrical rotating shaft 16 a may be connected to a vacuum pump for exhausting the hollow rotating body unit 16, and the semiconductor wafer W may be vacuum-sucked to the annular holder 15 by this suction. In addition, the rotating shaft 16a is rotatably inserted in the bottom part of the processing furnace 11 via the vacuum seal member.

  The heater 17 is fixed on a support base 19 of a support shaft 18 that penetrates the rotary shaft 16a. A so-called push-up pin (not shown) for detaching the semiconductor wafer W from the annular holder 15 is formed on the support base 19. In addition, as the wafer holding member, a member having a structure in contact with almost the entire back surface of the semiconductor wafer W may be used instead of the annular holder. Here, since this wafer holding member normally mounts a disk-shaped wafer substrate, the planar shape of the edge thereof is circular, and it is preferable that the wafer holding member is formed of a material that does not block the radiant heat of the heater 17. It is.

  In the single-wafer epitaxial growth apparatus described above, the gas rectifying plate 13 is a disc body made of, for example, quartz glass, and a large number of porous gas discharge ports are formed. As shown in FIG. 1, the distance between the upper surface of the annular holder 15 and the lower surface of the gas rectifying plate 13 facing each other substantially in parallel is defined as H, the outer diameter of the annular holder 15 is defined as D, and H / D ≦ It is preferable that 1/5 is satisfied. Here, since the counterbore process is performed on the inner peripheral side of the annular holder 15 and the back surface of the semiconductor wafer W is in contact with the counterbore surface, the main surface of the semiconductor wafer W is the main surface of the annular holder 15. It is almost the same height as the surface.

  As shown in FIG. 1, a wafer entrance / exit 20 and a gate valve 21 for taking in and out a semiconductor wafer are provided on the side wall of the processing furnace 11. The semiconductor wafer W can be transported to and from the furnace 11 by a handling arm. Here, for example, the handling arm made of synthetic quartz is inserted into the space between the gas rectifying plate 13 and the annular holder 15 as the wafer holding member, so that the separation distance H can secure the insertion space of the handling arm. Must be larger than the dimensions.

Hereinafter, specific examples of the separation distance H will be described. When the semiconductor wafer W is a silicon wafer having a diameter of 200 mmφ, the outer peripheral diameter D of the annular holder 15 is set to 300 mmφ. And the insertion space required for the conveyance operation by the handling arm is set to about 10 mm, for example, and the preferable separation distance H is in the range of 20 mm to 60 mm.
Here, when the gas rectifying plate 13 can be moved up and down as will be described later (see FIG. 5), the distance between the surface of the semiconductor wafer W and the lower surface of the gas rectifying plate 13 during vapor phase growth is about 1 mm. If the gas rectifying plate 13 is moved upward to about 10 mm after completion of vapor phase growth, the wafer W can be transferred by the handling arm. In this case, if the distance between the surface of the semiconductor wafer W and the lower surface of the gas rectifying plate 13 is less than 1 mm, the film thickness of the vapor phase growth varies or a defect occurs. The distance from the lower surface of the plate 13 is 1 mm.

  Next, a method for forming an epitaxial layer in the single-wafer epitaxial growth apparatus, its operation, and effects in this embodiment will be described with reference to FIGS. FIG. 2 is an explanatory diagram showing an outline of a process sequence in forming an epitaxial layer. In FIG. 2, the horizontal axis represents the processing time in the film forming cycle, and the vertical axis represents the wafer temperature of the semiconductor wafer W. FIG. 3 is a longitudinal sectional view of the single wafer epitaxial growth apparatus showing a state in which the semiconductor wafer W is taken in and out of the processing furnace 11.

First, the processing time t ₀ shown in FIG. 2, the wafer inlet and outlet of the semiconductor wafer W in the load lock chamber in the vacuum state at room temperature T _0, the gate valve 20 as shown in FIG. 3, and placed on the handling arm 22 20 is inserted into the processing furnace 11. Here, the inside of the processing furnace 11 is in a reduced pressure state of, for example, a nitrogen (N ₂ ) gas atmosphere, but the pressure is set to be a positive pressure from the load lock chamber. In this way, contamination of the processing furnace 11 such as particles from the load lock chamber is prevented. Then, the semiconductor wafer W is placed on the annular holder 15 via a push-up pin (not shown), for example, the handling arm 22 is returned to the load lock chamber, and the gate valve 21 is closed.

Then, the semiconductor wafer W placed on the annular holder 15 is heated by a heater 17 which is heated waiting to the temperature T ₁ for preheating, holding the process time t ₁ to stabilize. During this preheating, the N ₂ gas is replaced with hydrogen (H ₂ ) gas, and the inside of the processing furnace 11 is evacuated to a predetermined degree of vacuum.

Then, temperature is raised to heat the semiconductor wafer W by raising the heating power of the heater 17 to the temperature T ₂ second is an epitaxial growth temperature. When the semiconductor wafer W is stabilized to a second temperature T ₂ at the processing time t _2, while rotating the rotating unit 16 at a predetermined speed, for supplying a predetermined deposition gas from the gas supply port 12, a predetermined until the process time t ₃ in the vacuum growing an epitaxial layer on a semiconductor wafer W surface.

For example, when growing a silicon epitaxial layer, first temperature _{T 1} is set to a desired temperature in the range of 500 to 900 ° C., the desired temperature the temperature _{T 2} of the second in the range of 1000 to 1200 ° C. Set to Then, as the source gas of silicon as the _SiH 4, _SiH 2 Cl ₂ or SiHCl ₃ and the dopant _{gas,, B 2 H 6, PH} 3 or AsH ₃ is used. Further, H ₂ is usually used as a carrier gas. These gases are film forming gases.
The inside of the processing furnace 11 during the growth of the silicon epitaxial layer is set to a desired pressure in a range of about 2 × 10 ³ Pa (15 Torr) to about 9.3 × 10 ⁴ Pa (700 Torr). The rotation of the rotating body unit 16 is set to a desired number of rotations, for example, in the range of 900 to 1500 rpm.

Then, the processing time t ₃ when the epitaxial growth is completed, start the cooling of the semiconductor wafer W that is formed in the epitaxial layer. Here, the supply of the film-forming gas and the rotation of the rotating unit 16 are stopped, and the semiconductor wafer W on which the epitaxial layer is formed is placed on the annular holder 15, and the heating output of the heater 17 is first applied. automatically adjusted to return becomes the first temperature T _1.

At almost the same time, as shown in FIG. 1, a cooling gas 23 is caused to flow into the processing furnace 11 from the gas supply port 12, and the semiconductor wafer W is gas-cooled by the cooling gas 23 rectified by the gas rectifying plate 13. . Here, the cooling gas 23 may be, for example, the same H ₂ gas as the film forming gas carrier gas, or may be a rare gas such as argon or helium, or an N ₂ gas. Further, the pressure in the processing furnace 11 into which the cooling gas 23 has flowed is set to the same level as the pressure during the growth of the epitaxial layer.

  As described above, the gas rectifying plate 13 and the annular holder 15 according to the present embodiment are such that the distance H between them is H / D ≦ 1/5 in relation to the outer peripheral diameter D of the annular holder 15 as described above. It is arranged to satisfy. For this reason, in the flow of the cooling gas 23 shown in FIG. 1, as will be described later, there is almost no vortex generation on the semiconductor wafer W, and cooling with high uniformity can be performed in the surface of the semiconductor wafer W. Become. Since the thermal stress generated in the semiconductor wafer W during the cooling is reduced and the generation of crystal defects such as slips on the semiconductor wafer W is suppressed even when the forced cooling rate by the cooling gas 23 is increased, epitaxial growth is performed. The time required for the subsequent temperature drop of the semiconductor wafer W can be shortened.

For example, after the processing time t ₃ when shown in FIG. 2, the time interval of the semiconductor wafer W from the second temperature T ₂ of the epitaxial growth temperature until reduced to a first temperature T ₁ of the preheating temperature stability, FIG. This can be shortened to about 1/2 to 2/3 of the prior art shown by the dotted line in FIG.

Next, after the semiconductor wafer W is stabilized at the _first temperature T1, the back surface of the semiconductor wafer W is pushed up by, for example, a push-up pin and is detached from the annular holder 15. In order to detach the semiconductor wafer W from the annular holder 15, an electrostatic bonding method may be used instead of a push-up pin, or a Bernoulli chuck method for floating the semiconductor wafer W itself may be used. Then, as shown in FIG. 3 again, the gate valve 21 is opened, the handling arm 22 is inserted between the gas rectifying plate 13 and the annular holder 15, and the semiconductor wafer W is placed thereon. Thereafter, the push-up pin is lowered, and the handling arm 22 is held at the insertion position until the processing time t _{4 at} which the temperature of the semiconductor wafer W becomes a _third temperature T ₃ lower than the first temperature T ₁ and stabilizes. .

Thereafter, the handling arm 22 on which the semiconductor wafer W is placed is returned to the load lock chamber, and the gate valve 21 is closed. Then, the temperature of the semiconductor wafer W is returned to room temperature T ₀ in the load lock chamber. Here, as described at the processing time t ₀ , for example, the inside of the processing furnace 11 that is in a decompressed state of an N ₂ gas atmosphere is at a positive pressure from the load lock chamber.

  As described above, the epitaxial layer deposition cycle for one semiconductor wafer is completed, and subsequently deposition for another semiconductor wafer is performed according to the same process sequence as described above.

The semiconductor wafer W is subjected to gas cooling by the cooling gas 23 on the handling arm 22 until the first temperature T ₁ is stabilized to the third temperature T ₃ . The time interval from the semiconductor wafer W is first temperature T ₁ to be stably reduced to a third temperature T ₃ is shortened can be about 1/2 of the prior art shown in dotted lines in FIG. 2 Become. The processing time t ₅ that noted in Figure 2, the temperature of the semiconductor wafer in the prior art is exemplified as the time for a stable lowered from the temperature T ₁ to the third temperature T _3.

  Next, with reference to the schematic diagram of FIG. 4, the effect | action of the structure of the said embodiment in the gas cooling of the semiconductor wafer after epitaxial layer growth is demonstrated. FIG. 4 is a schematic diagram showing a gas flow of the cooling gas 23 between the gas rectifying plate 13 of the single wafer epitaxial growth apparatus and the annular holder 15 holding the semiconductor wafer W. Here, FIG. 4A shows a case where the above-mentioned separation distance H satisfies H / D ≦ 1/5 in relation to the outer peripheral diameter D of the annular holder 15 (the diameter of the wafer holding member). (B) is an example in the case where the separation distance H is H / D> 1/5.

The cooling gas 23 in the processing furnace 11 is a viscous flow, and is introduced from the gas supply port 12 and rectified and flows down, for example, as a laminar flow through the porous gas discharge port of the gas rectifying plate 13. Here, in the configuration as shown in FIG. 4A, the cooling gas 23 that has flowed down hits the main surfaces of the semiconductor wafer W and the annular holder 15, and then horizontally along these main surfaces. It bends and flows while maintaining the rectified state. Further, no turbulent flow is generated at the outer peripheral end of the annular holder 15.
For this reason, in the semiconductor wafer W, the cooling gas 23 comes into contact at a uniform temperature and flow rate within the surface, and heat radiation by heat exchange with the cooling gas 23 is performed uniformly. Further, there is no disturbance of heat dissipation due to the generation of turbulent flow at the outer peripheral end of the annular holder 15, and the heat dissipation uniformity is maintained. Then, when the temperature of the semiconductor wafer W is lowered, the in-plane temperature is kept uniform. Note that the heat radiation from the surface of the semiconductor wafer W by heat radiation is uniform in the surface.

On the other hand, in the configuration as shown in FIG. 4B, the cooling gas 23 that flows down tends to collapse due to the rectification state being disturbed on the main surfaces of the semiconductor wafer W and the annular holder 15. And after that, it hits these main surfaces and bends and flows in the horizontal direction. Also, turbulence is likely to occur at the outer peripheral end of the annular holder 15 from the beginning. For these reasons, the cooling gas 23 flowing down due to the turbulence in the rectifying state generates the vortex 24 very easily on the outer peripheral side of the semiconductor wafer W or on the annular holder 15. As the H / D value increases, the vortex 24 is generated on the inner periphery of the semiconductor wafer W.
Due to the generation of such a vortex 24, the semiconductor wafer W is non-uniformly dissipated by heat exchange with the cooling gas 23 in the plane thereof. And in the temperature fall of the semiconductor wafer W, the uniformity of the temperature in the surface is impaired.

In the present embodiment from the above, the time required for cooling the semiconductor wafer until unloaded outside the treatment furnace after completion of growth of the epitaxial layer, i.e. the time interval between treatment time t ₄ from the processing time t ₃ when shown in FIG. 2 but it becomes possible to greatly reduced compared to the time interval of the processing time t ₅ from the treatment time t ₃ in the prior art. And it becomes easy to improve the throughput in forming the epitaxial layer. Here, as the growth time (t ₃ -t ₂ ) of the epitaxial layer becomes shorter, the ratio of the temperature drop time (t ₄ -t ₃ ) of the semiconductor wafer after the epitaxial growth to the film formation cycle increases. The effect of shortening the temperature drop time is increased.
For example, in the formation of a silicon epitaxial layer having a thickness of about 10 μm, the throughput increases by about 20%. When the required thickness of the epitaxial layer is reduced, the rate of increase in throughput is further increased when the growth rate of the epitaxial layer is increased.

  Furthermore, in this embodiment, the temperature drop of the semiconductor wafer after growing the epitaxial layer is more stable than in the conventional technique, and the cooling variation of the semiconductor wafer is reduced. For this reason, the frequency of occurrence of wafer cracking when the semiconductor wafer is carried out to the load lock chamber by the handling arm 22 is greatly reduced. In addition to the above-described effect of reducing crystal defects such as slip in the semiconductor wafer, the manufacturing yield in the formation of the epitaxial layer is improved.

In the above-described embodiment, as shown in FIG. 5, a member 51 is provided that can move the gas rectifying plate 13 up and down (arrow in the figure), that is, the inner wall of the reaction furnace 11 can slide, and the opposite surface is driven by an air cylinder or the like. The connecting member 52a from the mechanism 52 is coupled. A bellows 52b is provided at an upper portion between the connecting member 52a and the drive mechanism.
Here, the distance between the gas rectifying plate 13 and the semiconductor wafer W can be adjusted from 1 mm to 60 mm by the driving mechanism 52, and growth is possible even when very close to 1 mm during growth. Further, when the semiconductor wafer W is taken in and out, the distance between the gas rectifying plate 13 and the semiconductor wafer W is preferably about 20 mm, but can be about 10 mm.

In the case of the embodiment of FIG. 5, the distance between the gas rectifying plate 13 and the semiconductor wafer W at the time of growth is ideally narrow, but practically it is about 1 mm.
Thus, when adjusting to about 1 mm, the susceptor 15 holding the wafer and the heater 17 can be connected and moved.

  Although the preferred embodiments of the present invention have been described above, the above-described embodiments do not limit the present invention. Those skilled in the art can make various modifications and changes in specific embodiments without departing from the technical idea and technical scope of the present invention.

  For example, in the above embodiment, the single-wafer epitaxial growth apparatus may be connected to the transfer chamber of the cluster tool, for example, by the gate valve 21.

  The wafer holding member may be a susceptor that has a heating mechanism and contacts the entire back surface of the semiconductor wafer.

  The present invention is similarly applied to a single wafer epitaxial growth apparatus having a structure in which a semiconductor wafer to be epitaxially grown is placed on a wafer holding member fixed in a non-rotating manner.

  The wafer substrate to be formed is typically a silicon wafer, but a semiconductor substrate other than silicon, such as a silicon carbide substrate, can also be used. The thin film formed on the wafer substrate is most commonly a silicon film or a single crystal silicon film containing boron, phosphorus, arsenic, or the like as an impurity, but single crystal silicon partially including a polysilicon film. A film or other thin film, for example, a compound semiconductor such as a GaAs film or a GaAlAs film can be applied without any problem.

It is a longitudinal cross-sectional view which shows one structure of the single wafer type epitaxial growth apparatus concerning embodiment of this invention. It is explanatory drawing which shows the outline of the film-forming process sequence of the epitaxial layer using the single wafer type epitaxial growth apparatus in embodiment of this invention. It is a longitudinal cross-sectional view of the single-wafer | sheet-fed epitaxial growth apparatus for providing description of the epitaxial layer film-forming in embodiment of this invention. It is a schematic diagram which shows the gas flow of the gas for cooling between the gas baffle plate of a single wafer type epitaxial growth apparatus, and the wafer holding member holding the semiconductor wafer. It is a longitudinal cross-sectional view of the single wafer type epitaxial growth apparatus for demonstrating other embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Processing furnace 12 Gas supply port 13 Current plate 14 Gas exhaust port 15 Annular holder 16 Rotating body unit 16a Rotating shaft 17 Heater 18 Support shaft 19 Support stand 20 Wafer inlet / outlet 21 Gate valve 22 Handling arm 23 Cooling gas 24 Eddy current

Claims (10)

A gas supply port at the top of the cylindrical reactor, an exhaust port at the bottom, a wafer holding member for placing a wafer therein, and a gas phase with a gas rectifying plate between the wafer holding member and the gas supply port In the growth equipment,
The separation distance between the gas rectifying plate and the wafer holding member is set such that a cooling gas for cooling the wafer is in a rectifying state on the wafer surface or the wafer holding member surface. A vapor phase growth apparatus.   2. The vapor phase growth according to claim 1, wherein a separation distance between the gas rectifying plate and the wafer holding member is H, and a diameter of the wafer holding member is D, and H / D ≦ 1/5 is satisfied. apparatus.   The handling arm for taking in and out the wafer into and out of the reaction furnace can be inserted between the lower surface of the gas rectifying plate and the upper surface of the wafer holding member. Vapor growth equipment.   4. The vapor phase growth apparatus according to claim 3, wherein the gas rectifying plate is configured to be movable up and down.   5. The vapor phase growth apparatus according to claim 4, wherein the vertical movement of the gas rectifying plate is connected to a mechanism that separates from the wafer holding member for taking in and out the wafer.   2. The vapor phase growth apparatus according to claim 1, wherein a distance between the lower surface of the gas rectifying plate and the upper surface of the wafer holding member can be adjusted to 1 mm or more and 60 mm or less. A gas supply port in the upper part of the cylindrical reactor, an exhaust port in the lower part, a wafer holding member for placing a wafer therein, a gas rectifying plate between the wafer holding member and the gas supply port, and film formation A gas for gas is allowed to flow from the gas supply port through the gas rectifying plate through the reactor to deposit a vapor phase growth layer on the wafer, and after depositing the vapor phase growth layer, a gas for cooling is supplied to the gas. In the vapor phase growth method of lowering the temperature of the wafer by flowing down the reactor through the gas rectifying plate from the mouth,
The separation distance between the gas rectifying plate and the wafer holding member is set so that the cooling gas is in a rectifying state on the wafer surface or the wafer holding member surface. .   Between the lower surface of the gas rectifying plate and the upper surface of the wafer holding member, a handling arm for taking the wafer substrate in and out of the reaction furnace is provided, and the wafer substrate is moved into and out of the reaction furnace by the movement of the handling arm. The vapor phase growth method according to claim 4, wherein the vapor deposition is performed.   When the film is formed on the wafer, the current plate and the wafer are close to each other. When the wafer is taken in and out, the distance between the current plate and the wafer is increased so that the wafer can be taken in and out. The vapor phase growth method according to claim 8. 10. The vapor phase growth method according to claim 9, wherein the baffle plate is movable up and down and is interlocked with the loading and unloading of the wafer.

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