JP2008236907A - Gate control circuit and method of power conversion apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a gate control circuit and a gate control method of a power conversion apparatus for surely protecting short-circuit in the power conversion apparatus, using a voltage-driven type semiconductor element. <P>SOLUTION: Arms of the power conversion apparatus are constituted of the voltage driving-type semiconductor elements 1A and 1B and fly wheel diodes 2A and 2B connected to them in antiparallel. The gate control circuit includes a gate control means 5, which is installed in common to the respective arms and outputs gate reference signals of the voltage driving-type semiconductor elements 1A and 1B and gate drive means 10A and 10B which are electrically insulated from the gate control means 5 and supply gate pulses to the voltage drive-type semiconductor elements 1A and 1B from the gate reference signals. When arm current of the voltage drive-type semiconductor elements 1A and 1B exceeds a prescribed value, the gate drive means 10A and 10B turn off the gate pulses, which the gate drive means 10A and 10B output by a local processing in the gate drive means 10A and 10B. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a gate control circuit and a gate control method for a power converter, and more particularly, to a gate control circuit and a gate control method for a power converter having an improved short circuit protection function.

  In recent years, power converters have been increased in capacity, and one of them is to increase the voltage of the converter. In order to realize a high voltage, for example, a plurality of IGBTs (Insulated Gate Bipolar Transistors), which are typical voltage-type semiconductor elements, are connected in series to form a conversion device.

In order to protect power converters in the event of an arm short circuit, a fuse was inserted into each arm to protect the converter from excessive short circuit currents. Recently, a short circuit protection method using gate control has also been devised. Has been. According to this method, a short-circuit current flows when the IGBT is turned on, and the IGBT collector voltage rises when the IGBT reaches a saturation current value. Therefore, when the IGBT is turned on, an increase in the collector voltage is detected and the short-circuit current is applied to the IGBT. It determines that it is flowing, and transmits a short-circuit occurrence signal to a gate control device that generates an on / off gate of the IGBT in the power conversion device, and this gate control device gives an IGBT off command. In addition, a technique for reliably detecting the short circuit as described above has been proposed regardless of the magnitude of the DC voltage (see, for example, Patent Document 1).
JP 2006-14402 (page 3-5, FIG. 1)

  The short-circuit protection method based on gate control disclosed in Patent Document 1 has a configuration in which the gate control circuit has a short-circuit protection function, so that it is greatly reduced in size and cost of the conversion device compared to the case where a fuse is applied. It will be advantageous.

  However, in the conventional short circuit protection by gate control, the variation of the saturation current value of the IGBT is large. For example, when the IGBTs are configured in series, the element with the lowest saturation current value reaches saturation first and bears the voltage. Therefore, excessive loss is applied to the element and causes damage. In addition, there is a delay of several microseconds from the detection of the short-circuit current until the gate control device issues an OFF command until the IGBT is actually turned off. During this time, the state in which the short-circuit current flows with the IGBT collector voltage rising continues. Therefore, an excessive loss occurs in the IGBT, which causes element damage. Furthermore, since the gate control is performed at an excessive current value, the reliability is low and damage to the power converter is inevitable.

  SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object thereof is to provide a gate control circuit for a power conversion device that can reliably perform short-circuit protection in a power conversion device using a voltage-driven semiconductor element, and It is to provide a gate control method.

  To achieve the above object, a gate control circuit and a gate control method for a power conversion device according to a first invention of the present invention are configured by a voltage-driven semiconductor element and a fly-hole diode connected in reverse parallel thereto. A gate control circuit and a gate control method for a power conversion device, wherein a gate reference signal of each voltage-driven semiconductor element is output from a gate control means provided in common to each arm, and based on the gate reference signal, A gate pulse is supplied to each of the voltage driven semiconductor elements from a gate driving means electrically isolated from the gate control device, and an arm current of the voltage driven semiconductor element driven by the gate driving means is a predetermined value. The gate pulse output by the gate drive means is directly turned off by local processing in the gate drive means It is characterized in that was.

  According to a second aspect of the present invention, there is provided a gate control circuit and a gate control method for a voltage-driven semiconductor element, wherein the arm is constituted by a voltage-driven semiconductor element and a fly-hole diode connected in reverse parallel thereto. A gate control method for a conversion device, wherein a gate reference signal of each voltage-driven semiconductor element is output from a gate control means provided in common to each arm, and based on the gate reference signal, the gate control device is electrically When a gate pulse is supplied to each voltage-driven semiconductor element from the electrically insulated gate driving means, and the arm current of the voltage-driven semiconductor element driven by the gate driving means exceeds a predetermined value, the gate The gate control means reduces the output voltage of the gate drive means by local processing in the drive means, and the gate control means It is characterized in that so as to turn off the gate reference signal to be supplied to all the voltage-driven semiconductor element over arm.

  ADVANTAGE OF THE INVENTION According to this invention, the gate control circuit and gate control method of a power converter device which can perform short circuit protection reliably in the power converter device using a voltage drive type semiconductor element can be provided.

  Embodiments of the present invention will be described below with reference to the drawings.

  1 is a circuit configuration diagram of a gate control circuit of a power conversion device according to a first embodiment of the present invention.

  IGBTs 1A and 1B, which are voltage-driven semiconductor elements, are connected in series with fly-hole diodes 2A and 2B connected in reverse parallel, respectively, constituting a positive arm and a negative arm for one phase of the power converter. ing. A DC voltage from the DC power source 3 is applied to both ends of the series circuit of the IGBTs 1A and 1B, and an AC output is obtained from an intermediate point between the IGBTs 1A and 1B. The above is an explanation when the power converter is operating as an inverter. In the case of converter operation, the input and output of alternating current and direct current are reversed.

  In order to realize the inverter or converter operation of the power converter described above, the gates of the IGBTs 1A and 1B are given ON / OFF signals from the gate drive circuits 10A and 10B, respectively. This on / off signal is generated based on a gate reference signal by the gate control device 5 provided in common. The gate reference signal by the gate controller 5 is given to the gate drive circuits 10A and 10B via the optical fibers 6A and 6B, respectively.

  The current of the positive arm is detected by the current detector 4A, and the current of the negative arm is detected by the current detector 4B. The detection signals are supplied to the gate drive circuits 10A and 10B, respectively.

  Hereinafter, the internal configuration of the gate drive circuit 10A will be described. Since the internal configuration of the gate drive circuit 10B is basically the same as that of the gate drive circuit 10A, description thereof is omitted.

  The detection signal of the positive arm current detected by the current detector 4A is compared with a predetermined current set value by the comparator 11A. When the current signal of the positive arm exceeds the current set value, the comparator 11A 0 is output. The output of the comparator 11A becomes one input of the AND circuit 12A. Here, for example, a Rogowski coil or the like is used for the current detector 4A. In this case, the level comparison in the comparator 11A may be performed by comparing the voltage across the Rogowski coil with the set voltage.

  The gate reference signal supplied from the gate control device 5 via the optical fiber 6A is converted into a photoelectric signal and then becomes the other input of the AND circuit 12A. The output of the AND circuit 12A is amplified by the drive circuit 13A, and the output of the drive circuit 13A drives the gate of the IGBT 1A on and off.

  In the above, the low breakdown voltage gate control device 5 and the high breakdown voltage gate drive circuit 10A need to be insulated. Therefore, although not shown, the control power supply for the gate control device 5 and the control power supply for the gate drive circuit 10A are provided separately.

  In the above configuration, when the output of the gate control device 5 is ‘1’, the IGBT 1 </ b> A is on, and when the output is ‘0’, the IGBT 1 </ b> A is off. Further, when the comparator 11A determines that the current signal detected by the current detector 4A is a short-circuit current, the output of the comparator 11A is “0”, and “1” when the short-circuit current is not detected. Therefore, when the short circuit current is detected, the output of the AND circuit 12A becomes “0”, and the input of the drive circuit 13A becomes an off command to turn off the IGBT 1A. Here, the current setting value for determining the short-circuit current is preferably set to be about several times the rated current value of the IGBT 1A at which the IGBT 1A does not reach saturation.

  As described above, since the current detector 4A detects the short-circuit current when the IGBT 1A is in the ON state at high speed, and immediately after detecting the short-circuit current, the IGBT 1A is turned off by local processing in the gate drive circuit 10A. It is possible to suppress an increase in the short-circuit current from and prevent the IGBT 1A from being damaged and interrupt the short-circuit current.

  FIG. 2 is a circuit configuration diagram of a gate control circuit of the power conversion apparatus according to the second embodiment of the present invention. In the second embodiment, the same parts as those in the circuit configuration diagram of the gate control circuit of the power conversion device according to the first embodiment of the present invention shown in FIG. The second embodiment is different from the first embodiment in that the outputs of the comparators 11A and 11B are supplied to the gate control device 5A as gate block signals via the optical fibers 7A and 7B, respectively.

  With the above configuration, the short circuit detection signal in the gate drive circuits 4A and 4B is transmitted to the gate control device 5A, and the gate control device 5A operates the power converter due to the short circuit failure by the short circuit detection signal from the gate drive circuits 4A and 4B. An off command is issued to the gate drive circuits of all IGBTs, including other phase IGBTs (not shown) for stopping, and all the IGBTs are turned off.

  As described above, according to the second embodiment, it is possible to stop the power conversion device by detecting the short-circuit current, and it is possible to prevent the accident from spreading.

  Hereinafter, the gate control circuit and the control method of the power conversion apparatus according to the third embodiment of the present invention will be described with reference to FIGS. 3 and 4.

  FIG. 3 is a circuit configuration diagram of a gate control circuit of the power conversion apparatus according to the third embodiment of the present invention. In the third embodiment, the same parts as those in the circuit configuration diagram of the gate control circuit of the power converter according to the second embodiment of the present invention shown in FIG. The third embodiment is different from the second embodiment in that the AND circuits 12A and 12B are omitted, and the gate reference signals converted from the optical signals 6A and 6B are directly supplied to the drive circuits 13A and 13B, respectively. The gate voltage reduction circuits 14A and 14B are provided, and the output voltages of the drive circuits 13A and 13B are reduced by the short-circuit current detection signals from the comparators 11A and 11B, respectively.

  The operation of this embodiment will be described below with reference to the operation time chart of FIG. FIG. 4 shows the operation when the comparator 11A detects a short-circuit current, but the same operation is performed even when the comparator 11B detects it.

  In FIG. 4, it is assumed that the comparator 11A detects a short-circuit current at time T1 when the IGBT 1A is on. At this time, the gate voltage reduction circuit 14A operates to instantaneously reduce the output voltage of the drive circuit 13A to a gate voltage level lower than the normal on-gate voltage level at which the IGBT 1A can be kept on. The gate voltage level is preferably a gate voltage level at which the IGBT 1A reaches saturation at a current value that is several times the rated current value of the IGBT 1A that can be cut off by the IGBT 1A. In the above, since the operation of the gate voltage reduction circuit 14A is performed by local processing in the gate drive circuit 10A, no operation delay occurs.

  On the other hand, as described in the second embodiment, the signal that the comparator 11A detects the short-circuit current is transmitted to the gate control device 5A through the optical fiber 7A, and the gate control device 5A turns off all the IGBTs at time T2. To do. The time from T1 to T2 is usually on the order of 10 μS. At this time T2, since the gate voltage of the IGBT 1A is reduced as shown in FIG. 4, the saturation current value of the IGBT 1A decreases, and the short-circuit current is suppressed to a current value that is several times the rated current value of the IGBT 1A. ing. Therefore, the IGBT 1A can be safely turned off even if there is a delay from the time T1 to the time T2. Here, the operation of the gate voltage reduction circuit 14A is canceled after a predetermined margin time, for example, when the off command is given.

  As described above, according to the third embodiment, the short-circuit current is interrupted after the current of the voltage-driven semiconductor element in which the short-circuit current has occurred is suppressed to a current value that can be interrupted. High short-circuit protection is possible.

  FIG. 5 is a circuit configuration diagram of the gate control circuit of the power conversion device according to the fourth embodiment of the present invention. In the fourth embodiment, the same parts as those in the circuit configuration diagram of the gate control circuit of the power conversion device according to the first embodiment of the present invention shown in FIG. The fourth embodiment is different from the first embodiment in that IGBTs 1C and 1D in which flywheel diodes 1C and 1D are connected in reverse parallel are inserted into the positive arm and the negative arm, respectively, so that two power converter arms are configured in series. In connection with this, the gate control device 5B controls the IGBTs 1C and 1D on and off via the optical fibers 6C and 6D, the AND circuits 12C and 12D, and the drive circuits 13C and 13D, respectively. The other input of the circuits 12C and 12D is that the outputs of the comparator diagrams 11A and 11B are provided in parallel, respectively.

  In FIG. 5, the comparator 11A is separated from the gate drive circuit 10A, but may be included in the gate drive circuit 10A. Further, the comparator 11A may be included in the gate drive circuit 10C. Furthermore, since the current detector 4A detects the positive side arm current as a representative, it may be inserted between the IGBT 1A and the IGBT 1C, for example.

  In such a configuration, for example, when the comparator 11A detects a short-circuit current, the other inputs of the AND circuits 12A and 12C are both “0”, and the IGBTs 1A and 1C are simultaneously cut off at high speed.

  Therefore, also in the fourth embodiment, as in the first embodiment, the current detector 4A detects the short-circuit current when the IGBTs 1A and 1C are in the ON state at high speed, and immediately after the short-circuit current is detected, the IGBT 1A is immediately generated in the gate drive circuits 10A and 10C. Since local processing for turning off 1C is performed, an increase in the short-circuit current from the short-circuit current detection value can be suppressed, and damage to the IGBTs 1A and 1C can be prevented and the short-circuit current can be cut off.

  Further, in the fourth embodiment, the case where the one-side arm has a two-series main circuit configuration has been described, but it is apparent that the present invention can be applied even to a power converter having a main circuit configuration of three or more series. Further, the present invention can be similarly applied even to a multi-level power converter having a main circuit configuration of 3 levels or more. The same applies to the fifth embodiment and later described below.

  FIG. 6 is a circuit configuration diagram of a gate control circuit of a power conversion device according to Embodiment 5 of the present invention. In the fifth embodiment, the same parts as those in the circuit configuration diagram of the gate control circuit of the power conversion device according to the fourth embodiment of the present invention shown in FIG. The fifth embodiment differs from the fourth embodiment in that the outputs of the comparators 11A and 11B are provided to the gate control device 5A as gate block signals via the optical fibers 7A and 7B, respectively.

  With the above configuration, the short circuit detection signal from the comparators 11A and 11B is transmitted to the gate control device 5C, and the gate control device 5C uses the short circuit detection signal from the comparators 11A and 11B to stop the main circuit operation due to a short circuit failure. The off command is issued to the gate drive circuits of all the IGBTs including the IGBTs of other phases not shown in the figure to turn off all the IGBTs.

  As described above, according to the fifth embodiment, as in the second embodiment, it is possible to stop the power conversion device by detecting the short-circuit current, and it is possible to prevent an accident from spreading.

  FIG. 7 is a circuit configuration diagram of the gate control circuit of the power conversion device according to the sixth embodiment of the present invention. In the sixth embodiment, the same parts as those in the circuit configuration diagram of the gate control circuit of the power conversion device according to the fifth embodiment of the present invention shown in FIG. The sixth embodiment differs from the fifth embodiment in that the AND circuits 12A, 12C, 12B and 12D are omitted, and the gate signals obtained by converting the optical signals from the optical fibers 6A, 6C, 6B and 6D are directly connected to the drive circuits 13A and 13C. , 13B and 13D are provided, and gate voltage reduction circuits 14A, 14C, 14B and 14D are provided. Outputs of the drive circuits 13A, 13C, 13B and 13D are provided by short-circuit current detection signals from the comparators 11A and 11B, respectively. It is the point which comprised so that a voltage might be reduced.

  According to the sixth embodiment, as described in the third embodiment, the IGBT gate voltage belonging to the arm that has detected the short-circuit current is reduced, and the current value of the IGBT that belongs to the arm that has detected the short-circuit current can be cut off. Since the short-circuit current is interrupted after the suppression, a more reliable short-circuit protection is possible.

  FIG. 8 is a circuit configuration diagram of the gate control circuit of the power conversion device according to the seventh embodiment of the present invention. In the seventh embodiment, the same parts as those in the circuit configuration diagram of the gate control circuit of the power conversion device according to the fourth embodiment of the present invention shown in FIG. The seventh embodiment is different from the fourth embodiment in that current detectors 4C and 4D for detecting the currents of the IGBTs 1C and 1D are provided, and this detection signal is sent to the comparators 11C and 11D in the gate drive circuits 10C and 10D. This is the point that the outputs of the comparators 11C and 11D are input to the AND circuits 12C and 12D, respectively. The current detectors 4A and 4B are provided close to the IGBTs 1A and 1B, respectively, and the comparators 11A and 11B are included in the gate drive circuits 10A and 10B, respectively.

  According to the seventh embodiment, each current of the multi-series voltage driven semiconductor elements is detected, and when the current exceeds a predetermined value, the short circuit current is detected by the local processing of each gate drive circuit. The drive type semiconductor element can be shut off at high speed. Therefore, it is possible to perform short-circuit protection with higher reliability as compared with the fourth embodiment in which a common current detector and comparator are collectively provided for each arm.

  In addition, it is good also as a structure which turns off all the voltage drive type semiconductor elements by giving a short circuit current detection signal to a gate control apparatus combining this Example 7 and Example 5, and also combining this Example 7 and Example 6, Since it is obvious that the gate voltage of the voltage-driven semiconductor element that has detected the short-circuit current may be cut off by a collective OFF command from the gate control device, description thereof will be omitted.

The circuit block diagram of the gate control circuit of the power converter device which concerns on Example 1 of this invention. The circuit block diagram of the gate control circuit of the power converter device which concerns on Example 2 of this invention. The circuit block diagram of the gate control circuit of the power converter device which concerns on Example 3 of this invention. Operation | movement explanatory drawing of the gate control circuit of the power converter device which concerns on Example 3 of this invention. The circuit block diagram of the gate control circuit of the power converter device which concerns on Example 4 of this invention. The circuit block diagram of the gate control circuit of the power converter device which concerns on Example 5 of this invention. The circuit block diagram of the gate control circuit of the power converter device which concerns on Example 6 of this invention. The circuit block diagram of the gate control circuit of the power converter device which concerns on Example 7 of this invention.

Explanation of symbols

1A, 1B, 1C, 1D IGBT
2A, 2B, 2C, 2D Flywheel diode 3 DC power supply 4A, 4B, 4C, 4D Current detector 5, 5A, 5B, 5C Gate controller 6A, 6B, 6C, 6D Optical fiber 7A, 7B Optical fiber

10A, 10B, 10C, 10D Gate drive circuits 11A, 11B, 11C, 11D Comparators 12A, 12B, 12C, 12D AND circuits 13A, 13B, 13C, 13D Drive circuits 14A, 14B, 14C, 14D Gate voltage reduction circuits

Claims (8)

A gate control circuit of a power conversion device in which an arm is constituted by a voltage-driven semiconductor element and a fly-hole diode connected in reverse parallel thereto,
Gate control means provided in common to each arm and outputting a gate reference signal of each voltage-driven semiconductor element;
A gate driving means for supplying a gate pulse to each of the voltage-driven semiconductor elements based on the gate reference signal, being electrically insulated from the gate control device;
The gate driving means, when the arm current of the voltage driven semiconductor element driven by the gate driving means exceeds a predetermined value,
A gate control circuit for a power converter, wherein a gate pulse output from the gate drive means is directly turned off by local processing in the gate drive means. When the arm current of any of the power converters exceeds a predetermined value,
2. The gate control circuit for a power converter according to claim 1, wherein the gate control means turns off the gate reference signal applied to all voltage-driven semiconductor elements of all arms of the power converter. . A gate control circuit of a power conversion device in which an arm is constituted by a voltage-driven semiconductor element and a fly-hole diode connected in reverse parallel thereto,
Gate control means provided in common to each arm and outputting a gate reference signal of each voltage-driven semiconductor element;
A gate driving means that is electrically insulated from the gate control device, and that can change the output voltage for supplying a gate pulse to each of the voltage-driven semiconductor elements based on the gate reference signal;
The gate driving means, when the arm current of the voltage driven semiconductor element driven by the gate driving means exceeds a predetermined value,
The output voltage of the gate driving means is reduced by local processing in the gate driving means, and
The gate control means includes
A gate control circuit for a power converter, wherein the gate reference signal applied to all voltage-driven semiconductor elements of all arms of the power converter is turned off.   4. The voltage-driven semiconductor device according to claim 1, wherein a plurality of the voltage-driven semiconductor elements are connected in series to one arm, and the arm current is detected by a current detector provided for each arm unit. The gate control circuit of the power converter device of any one of Claims.   A plurality of the voltage-driven semiconductor elements are connected in series to one arm, and the arm current is detected for each voltage-driven semiconductor element by a current detector provided adjacent to the voltage-driven semiconductor element. The gate control circuit of the power converter according to any one of claims 1 to 3, wherein the gate control circuit is configured as described above. A gate control method for a power conversion device in which an arm is constituted by a voltage-driven semiconductor element and a fly-hole diode connected in reverse parallel thereto,
Output the gate reference signal of each voltage driven semiconductor element from the gate control means provided in common to each arm,
Based on the gate reference signal, a gate pulse is supplied to each of the voltage-driven semiconductor elements from a gate driving means electrically insulated from the gate control device,
When the arm current of the voltage driven semiconductor element driven by the gate driving means exceeds a predetermined value,
A gate control method for a power converter, wherein a gate pulse output from the gate driving means is directly turned off by local processing in the gate driving means. When the arm current of the voltage driven semiconductor element driven by the gate driving means exceeds a predetermined value,
7. The gate control method for a power conversion device according to claim 6, wherein the gate control means turns off the gate reference signal applied to all voltage-driven semiconductor elements of all arms of the power conversion device. . A gate control method for a power conversion device in which an arm is constituted by a voltage-driven semiconductor element and a fly-hole diode connected in reverse parallel thereto,
Output the gate reference signal of each voltage driven semiconductor element from the gate control means provided in common to each arm,
Based on the gate reference signal, a gate pulse is supplied to each of the voltage-driven semiconductor elements from a gate driving means electrically insulated from the gate control device,
When the arm current of the voltage driven semiconductor element driven by the gate driving means exceeds a predetermined value,
While reducing the output voltage of the gate drive means by local processing in the gate drive means,
The gate control means includes
A gate control method for a power converter, wherein the gate reference signal applied to all voltage-driven semiconductor elements of all arms of the power converter is turned off.

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