JP2008172040A - Semiconductor light emitting device, method for manufacturing semiconductor light emitting device, backlight, display, and electronic device - Google Patents

Abstract

A semiconductor light emitting device capable of reducing operating voltage by reducing contact resistance of an electrode and greatly improving light emitting efficiency by improving light extraction efficiency, and manufacturing thereof easily Provide a method.
A light emitting layer 13 is sandwiched between first semiconductor layers 11 and 12 of a first conductivity type and a second semiconductor layer 14 of a second conductivity type, and the first semiconductor In the semiconductor light emitting device in which the metal electrode 17 is in contact with the layer 11, the metal electrode 17 is embedded in the first semiconductor layer 12. The surface of the metal electrode 17 that is not embedded in the first semiconductor layer 11 and the main surface of the first semiconductor layer 11 are substantially coplanar.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor light emitting device, a method for manufacturing a semiconductor light emitting device, a backlight, a display, and an electronic device. For example, a light emitting diode using a nitride III-V compound semiconductor and various devices using the light emitting diode Or it is a thing suitable for applying to an apparatus.

  A GaN-based light emitting diode is usually a GaN-based semiconductor layer that forms a light-emitting diode structure on a sapphire substrate, specifically an n-type GaN layer, an InGaN-based light-emitting layer (active layer), a p-type GaN layer, etc. Manufactured by growing. In this case, the p-side electrode can be formed on the p-type GaN layer, but the n-side electrode cannot be formed on the back side of the substrate because the sapphire substrate has no conductivity. For this reason, conventionally, after the growth of the GaN-based semiconductor layer forming the light emitting diode structure, the p-type GaN layer, the active layer, and the upper layer of the n-type GaN layer are patterned into a predetermined mesa shape. In general, a p-side electrode is formed on the GaN layer, and an n-side electrode is formed on the n-type GaN layer adjacent to the mesa portion. However, in this light emitting diode, it is difficult to sufficiently increase the light extraction efficiency. Therefore, in recent years, from the viewpoint of improving the light extraction efficiency of the light emitting diode, after the growth of the GaN-based semiconductor layer forming the light emitting diode structure, the sapphire substrate is peeled off by a laser peeling method or the like, and the back surface of the n-type GaN layer is In many cases, the n-side electrode is formed on the exposed surface by using a lithography technique and a film forming technique such as vacuum deposition.

In the method for growing a nitride III-V compound semiconductor, a growth mask is formed on the substrate, and a nitride III-V compound semiconductor is selectively grown on the substrate using the growth mask. As a growth mask, it has been proposed to use a multilayer film having at least the outermost surface made of nitride (silicon nitride or titanium nitride) (see Patent Document 1), but Patent Document 1 embeds a metal electrode in a semiconductor layer. Nothing is disclosed about this.
JP 2000-164988 A

  However, in the above-described conventional method in which the n-side electrode is formed on the back surface of the n-type GaN layer after the sapphire substrate is peeled off after the growth of the GaN-based semiconductor layer forming the light emitting diode structure, the height of the n-side electrode is considerably high. In order to reduce the height of the n-side electrode, the n-type GaN layer is partially etched from the back side by a reactive ion etching (RIE) method or the like to form a recess. When the electrode is formed, the contact resistance of the n-side electrode increases, making it difficult to obtain a good contact.

Therefore, the problem to be solved by the present invention is that the operating voltage can be reduced by reducing the contact resistance of the electrode, and the luminous efficiency can be greatly improved by improving the light extraction efficiency. It is an object of the present invention to provide a semiconductor light emitting device and a method for manufacturing the same.
Another problem to be solved by the present invention is to provide a backlight, a display, and an electronic apparatus using the excellent semiconductor light emitting element as described above.
The above and other problems will become apparent from the description of this specification with reference to the accompanying drawings.

In order to solve the above problem, the first invention is:
A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the semiconductor light emitting device
The metal electrode is embedded in the first semiconductor layer.

  The semiconductor layer forming the light-emitting element structure may include a layer other than the first semiconductor layer, the light-emitting layer, and the second semiconductor layer as necessary. The metal electrode is formed prior to the growth of the first semiconductor layer. The metal electrode is embedded in the first semiconductor layer by growing the first semiconductor layer so as to cover the metal electrode. The embedding of the metal electrode is generally performed by utilizing the lateral growth of the first semiconductor layer. The width in one direction of the metal electrode is preferably 2 μm or less from the viewpoint of satisfactorily embedding the metal electrode and obtaining a semiconductor layer with good crystallinity, and the contact resistance does not become too high. From the viewpoint of doing so, for example, it is about 1 to 2 μm. Preferably, the surface of the metal electrode not embedded in the first semiconductor layer and the main surface of the first semiconductor layer are substantially coplanar, but the present invention is not limited to this. . If necessary, a dielectric film that reflects light generated from the light emitting layer may be provided between the surface of the metal electrode embedded in the first semiconductor layer and the first semiconductor layer.

The surface of the metal electrode embedded in the first semiconductor layer is inclined with respect to the main surface of the first semiconductor layer on the side having the metal electrode, or the first surface of the metal electrode is covered with the first semiconductor layer. The embedded surface may be inclined with respect to the surface of the metal electrode not embedded in the first semiconductor layer. In this case, the main surface is typically a light extraction surface.
From the viewpoint of improving light extraction efficiency and ease of mounting, the semiconductor layer forming the light emitting element structure has a metal electrode as a first electrode and a second electrode on the light extraction surface and the opposite surface, respectively. However, the present invention is not limited to this, and the first electrode and the second electrode may be provided on one side.

When a metal electrode is provided on the light extraction surface, this metal electrode is a buried electrode, so that the light from the light emitting layer is easily changed in direction upon hitting the metal electrode. Since the metal electrode itself can be a highly reflective electrode, a so-called ODR electrode, or the surface on which the metal electrode is embedded can be inclined to make the metal electrode suitable for improving light extraction efficiency. This metal electrode can be formed without necessarily reducing the area.
The metal electrode may have an arbitrary planar shape, but typically, a metal electrode having a geometrical planar shape such as an arc shape, a rectangular shape, a circular shape, a polygonal shape, a ring shape, or the like is used. A predetermined repetitive pattern of a geometric pattern, specifically, a mesh shape or a plurality of dots arranged in a grid at equal intervals may be used.

  As a material for the metal electrode, a material having a high reflectivity with respect to light from the light emitting layer is preferably used from the viewpoint of making good contact with the first semiconductor layer and improving light extraction efficiency. Here, the reason why a material having a high reflectance with respect to light from the light emitting layer is used is as follows. That is, when the metal electrode is provided on the light extraction surface of the semiconductor layer forming the light emitting element structure, the light extraction surface is shielded by the metal electrode. The light is reflected when it hits, and further reflected inside the semiconductor light emitting element, so that it can be efficiently taken out from the light extraction surface. In this case, it is possible to extract desired light by further providing a reflective portion in the semiconductor light emitting element. Specifically, for example, Rh is most preferable as a material for such a metal electrode. Rh has an extremely high melting point of 1963 ° C., does not melt even at a high temperature of about 1000 ° C. when growing a nitride III-V compound semiconductor, and has a high reflectance of 77 to 80% for visible light. . However, metals other than Rh, such as Ni, W, Ti, etc. may be used. These metals are all refractory metals and do not melt even at the temperature at which the nitride III-V compound semiconductor is grown. Further, the metal electrode may be composed of a multilayer film of the metal described above.

Various semiconductors can be used as materials for the semiconductor layer forming the light-emitting element structure, specifically, the first semiconductor layer, the active layer, the second semiconductor layer, and the third semiconductor layer described later. Examples thereof include nitride III-V compound semiconductors. Nitride III-V compound semiconductor comprises Al, B, Ga, at least one selected from the group consisting of In and Tl as group III elements, in general, Al _X B _y Ga _{1- xyz In z As u N 1-} uv P v ( However, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1,0 ≦ u ≦ 1,0 ≦ v ≦ 1,0 ≦ x + y + z <1, 0 ≦ u + v consists <1), more _{specifically, Al X B y Ga 1-} xyz in z N ( However, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1,0 ≦ x + y + z <1), typically Al _x Ga _{1 -xz} In _z N (where 0 ≦ x ≦ 1, 0 ≦ z ≦ 1). Specific examples of the nitride III-V compound semiconductor include GaN, InN, AlN, AlGaN, InGaN, and AlGaInN. In addition to these, Tl _x In _y Al _z Ga _1-xyz N (where 0 <x ≦ 1, 0 ≦ y <1, 0 ≦ z <1, 0 <x + y + z <1) may be used. The first conductivity type is typically n-type, but may be p-type, and the second conductivity type is accordingly p-type or n-type.
When the first semiconductor layer, the active layer, and the second semiconductor layer are made of a nitride-based III-V group compound semiconductor, the metal electrode has a C + surface of the first semiconductor layer from the viewpoint of obtaining good ohmic contact characteristics. It is desirable to contact the C-plane rather than. This is because when the first semiconductor layer is grown so as to cover the metal electrode, the C-plane of the first semiconductor layer is in contact with the metal electrode at the growth temperature. This is because alloying easily occurs at the interface with the electrode.

  The maximum dimension of the semiconductor light-emitting element can be determined as necessary, but is generally 1 mm or less, for example 300 μm or less, or for example 100 μm or less, preferably 50 μm or less, typically 30 μm or less, more typically Is 25 μm or less. The semiconductor light emitting device is typically a light emitting diode, but is not limited thereto.

The light emitting layer typically has a multiple quantum well (MQW) structure in which well layers and barrier layers are alternately stacked. Although the well layer density in the light emitting layer having the MQW structure may be constant in the thickness direction, it suppresses a large shift in the emission wavelength accompanying an increase in the operating current density of the semiconductor light emitting device, and further, a wider range of luminance. From the viewpoint of enabling control, when the first semiconductor layer is n-type and the second semiconductor layer is p-type, the density of the well layer on the first semiconductor layer side of the light-emitting layer is defined as d. ₁ , where the well layer density on the second semiconductor layer side is d ₂ , the well layers in the light emitting layer are arranged so as to satisfy d ₁ <d ₂ . In order to vary the well layer density in the light emitting layer in this manner, for example, the thickness of the well layer is made constant and the thickness of the barrier layer is made different (specifically, the second semiconductor layer side in the light emitting layer). The thickness of the barrier layer of the first semiconductor layer is preferably smaller than the thickness of the barrier layer on the first semiconductor layer side), but is not limited to this. The thickness may be made different (specifically, the thickness of the well layer on the second semiconductor layer side in the light emitting layer is made larger than the thickness of the well layer on the first semiconductor layer side), Both the thickness of the well layer and the thickness of the barrier layer may be different.

Here, the well layer density d ₁ and the well layer density d ₂ are defined as follows. That is, when the light emitting layer having the total thickness t ₀ is divided into two in the thickness direction, the thickness of the first region, which is the region of the light emitting layer on the first semiconductor layer side, is t ₁ , and the second semiconductor layer side The thickness of the second region which is the region of the light emitting layer is t ₂ . However, t ₀ = t ₁ + t ₂ . In addition, the number of well layers included in the first region is WL ₁ (positive number, not limited to an integer), and the number of well layers included in the second region is WL ₂ (positive number, which is an integer) Without limitation, the total number of well layers is WL = WL ₁ + WL ₂ ). When one well layer (thickness t _IF ) exists across the first region and the second region, the number of well layers included only in the first region is WL ′ ₁ , WL ′ ₂ is the number of well layers included only in the two regions, and the thickness included in the first region in the well layer straddling the first region and the second region is the thickness t _IF-1 , When the thickness included in the two regions is the thickness t _IF-2 (t _IF = t _IF-1 + t _IF-2 )
WL ₁ = WL ′ ₁ + ΔWL ₁
WL ₂ = WL ′ ₂ + ΔWL ₂
It is. However,
ΔWL ₁ + ΔWL ₂ = 1
And
WL = WL ₁ + WL ₂
= WL ' ₁ + WL' ₂ +1
ΔWL ₁ = t _IF-1 / t _IF
ΔWL ₂ = t _IF-2 / t _IF
It is.

The well layer density d ₁ and the well layer density d ₂ can be obtained from the following equations. However, k≡ (t ₀ / WL).
d ₁ = (WL ₁ / WL) / (t ₁ / t ₀ )
_{= K (WL 1 / t 1} ) (1)
d ₂ = (WL ₂ / WL) / (t ₂ / t ₀ )
_{= K (WL 2 / t 2} ) (2)

The thickness from the interface of the first semiconductor layer side of the light-emitting layer of (2t _0/3) d ₁ of the well layer density of the first region to the thickness from the interface of the second semiconductor layer side (t _(0/3 ) where the well layer density in the second region is d ₂ , the well layer in the light emitting layer may be arranged so as to satisfy d ₁ <d ₂ , or the thickness from the interface of the first semiconductor layer side of the light-emitting layer (t _0/2) of the well layer density in the first area to d _1, the thickness from the interface of the second semiconductor layer side (t _0/2 ) Where the well layer density in the second region is d ₂ , the well layer in the light emitting layer can be arranged so as to satisfy d ₁ <d ₂ , or in the light emitting layer the first semiconductor layer side of the thick from the interface (t _0/3) the well layer density in the first area to d _1, the second semiconductor layer side When the well layer density of the second region to a thickness from the surface (2t _0/3) was d _2, a structure in which well layers in the light emitting layer is arranged so as to satisfy the d ₁ <d ₂ be able to. In the light emitting layer, 1 <d ₂ / d ₁ ≦ 20, preferably 1.2 ≦ d ₂ / d ₁ ≦ 10, more preferably 1.5 ≦ d ₂ / d ₁ ≦ 5 is satisfied. It is desirable that a well layer is disposed. The number of well layers (WL) in the light emitting layer is 2 or more, preferably 4 or more.

In the semiconductor light emitting device having the light emitting layer as described above, when the operating current density is 30 A / cm ² , the emission wavelength of the light emitting layer is λ ₂ (nm) and the operating current density is 300 A / cm ^2. When the emission wavelength of the light emitting layer is λ ₃ (nm),
500 (nm) ≦ λ ₂ ≦ 550 (nm)
0 ≦ | λ ₂ −λ ₃ | ≦ 5 (nm)
It is desirable to satisfy the or an emission wavelength of the light emitting layer when the operating current density _{^{1A / cm 2 λ 1 (nm}} ), emission wavelength of the light emitting layer when the operating current density was 30A / cm ² Is λ ₂ (nm), and the emission wavelength of the light emitting layer when the operating current density is 300 A / cm ² is λ ₃ (nm),
500 (nm) ≦ λ ₂ ≦ 550 (nm)
0 ≦ | λ ₁ −λ ₂ | ≦ 10 (nm)
0 ≦ | λ ₂ −λ ₃ | ≦ 5 (nm)
It is desirable to satisfy The operating current density of the semiconductor light emitting element is a value obtained by dividing the operating current value by the area of the light emitting layer (area of the junction region).

Alternatively, in the semiconductor light emitting device having the light emitting layer as described above, when the operating current density is 30 A / cm ² , the emission wavelength of the light emitting layer is λ ₂ (nm) and the operating current density is 300 A / cm ^2. When the emission wavelength of the light emitting layer is λ ₃ (nm),
430 (nm) ≦ λ ₂ ≦ 480 (nm)
0 ≦ | λ ₂ −λ ₃ | ≦ 2 (nm)
It is desirable to satisfy the or an emission wavelength of the light emitting layer when the operating current density _{^{1A / cm 2 λ 1 (nm}} ), emission wavelength of the light emitting layer when the operating current density was 30A / cm ² Is λ ₂ (nm), and the emission wavelength of the light emitting layer when the operating current density is 300 A / cm ² is λ ₃ (nm),
430 (nm) ≦ λ ₂ ≦ 480 (nm)
0 ≦ | λ ₁ −λ ₂ | ≦ 5 (nm)
0 ≦ | λ ₂ −λ ₃ | ≦ 2 (nm)
It is desirable to satisfy
The semiconductor light emitting device according to the first invention can be used in various devices or devices (backlight, display, illumination device, electronic device, etc.).

The second invention is
A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the method for manufacturing a semiconductor light emitting device,
Growing a third semiconductor layer of a first conductivity type on a substrate;
Forming the metal electrode on the third semiconductor layer;
Growing the first semiconductor layer so as to cover the metal electrode;
A step of sequentially growing the light emitting layer and the second semiconductor layer on the first semiconductor layer.

Typically, the method includes a step of exposing the metal electrode by peeling or peeling the substrate from the third semiconductor layer and then etching or polishing the third semiconductor layer from the back surface side, but is not limited thereto. . Also, for example, when growing the first semiconductor layer, the first semiconductor layer is grown at the first growth temperature to cover the metal electrode, and then the second growth temperature higher than the first growth temperature. Thus, the first semiconductor layer may be grown. A dielectric film and a metal electrode may be sequentially formed on the third semiconductor layer, and the first semiconductor layer may be grown on the dielectric film and the metal electrode. The first dielectric film, the first electrode may be formed on the third semiconductor layer. One electrode and a second dielectric film may be sequentially formed, and a first semiconductor layer may be grown thereon. In this case, the light from the light emitting layer can be reflected by the dielectric film between the first semiconductor layer and the metal electrode. In addition, since the first dielectric film between the third semiconductor layer and the metal electrode can prevent the third semiconductor layer and the metal electrode from coming into direct contact, During the growth, the third semiconductor layer underlying the metal electrode can be prevented from being scraped by vapor phase etching due to the catalytic effect. As these dielectric films, for example, a SiO ₂ film or a SiN film can be used. The first dielectric film is removed by etching or the like in the step of exposing the first electrode from the back side of the substrate.

Various substrates can be used. Specifically, for example, sapphire (including C-plane, A-plane, R-plane, etc., including planes off from these planes), SiC (6H 4H, 3C), Si, ZnS, ZnO, LiMgO, GaAs, spinel (MgAl ₂ O ₄ , ScAlMgO ₄ ), garnet, CrN (eg, CrN (111)), etc. can be used, Preferably, a hexagonal or cubic substrate made of these materials, more preferably a hexagonal substrate is used.
Examples of the growth method of the first to third semiconductor layers and the active layer include metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxial growth, halide vapor phase epitaxial growth (HVPE), and molecular beam epitaxy (MBE). Various epitaxial growth methods can be used, but are not limited thereto.
In the second invention, what has been described in relation to the first invention is valid as far as it is not contrary to the nature thereof.

The third invention is
In a backlight in which a plurality of red light emitting semiconductor light emitting elements, green light emitting semiconductor light emitting elements and blue light emitting semiconductor light emitting elements are arranged,
At least one of the red light emitting semiconductor light emitting element, the green light emitting semiconductor light emitting element, and the blue light emitting semiconductor light emitting element,
A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the semiconductor light emitting device
The metal electrode is embedded in the first semiconductor layer.

The fourth invention is:
In a display in which a plurality of red light emitting semiconductor light emitting elements, green light emitting semiconductor light emitting elements and blue light emitting semiconductor light emitting elements are arranged,
At least one of the red light emitting semiconductor light emitting element, the green light emitting semiconductor light emitting element, and the blue light emitting semiconductor light emitting element,
At least one of the red light emitting semiconductor light emitting element, the green light emitting semiconductor light emitting element, and the blue light emitting semiconductor light emitting element,
A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the semiconductor light emitting device
The metal electrode is embedded in the first semiconductor layer.

The fifth invention is:
In an electronic device having one or more semiconductor light emitting elements,
At least one of the semiconductor light emitting elements is
A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the semiconductor light emitting device
The metal electrode is embedded in the first semiconductor layer.
In the third to fifth inventions, for example, those using a nitride III-V compound semiconductor are used as the red light emitting semiconductor light emitting device, the green light emitting semiconductor light emitting device, and the blue light emitting semiconductor light emitting device. be able to. As the semiconductor light emitting element emitting red light, for example, an element using an AlGaInP-based semiconductor can be used.

The electronic device may be basically any device as long as it has at least one semiconductor light emitting element (such as a light emitting diode) for the purpose of backlight, display, illumination and the like of a liquid crystal display. Including both portable and stationary types, specific examples include mobile phones, mobile devices, robots, personal computers, in-vehicle devices, and various household electric appliances.
In the third to sixth inventions, what has been described in relation to the first invention and the second invention holds true for matters other than those described above, unless they are contrary to the nature thereof.

  In the first to fifth inventions configured as described above, since the metal electrode is embedded in the first semiconductor layer forming the light emitting element structure, the light emitting element structure is etched or polished as in the conventional case. The metal electrode can be satisfactorily brought into contact with the first semiconductor layer without deteriorating the contact characteristics of the semiconductor layer to be formed. Therefore, the contact resistance of the metal electrode can be reduced, and the metal electrode has high light extraction efficiency. Therefore, it is possible to eliminate the step caused by the metal electrode.

  According to the present invention, the operating voltage can be reduced by reducing the contact resistance of the metal electrode to the first semiconductor layer, the luminous efficiency can be greatly improved by improving the light extraction efficiency, A semiconductor light-emitting device that can be easily manufactured can be obtained, and a high-performance backlight, display, electronic device, etc. are realized using the semiconductor light-emitting device that has a low operating voltage, high luminous efficiency, and is easy to manufacture. can do.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, in FIGS. 1-15 of 1st-6th embodiment, the same code | symbol is attached | subjected to the same or corresponding part.
First, a first embodiment of the present invention will be described.
1 and 2 show a GaN-based light emitting diode according to the first embodiment. Here, FIG. 1 is a sectional view of the GaN-based light emitting diode, and FIG. 2 is a bottom view of the GaN-based light emitting diode.
As shown in FIGS. 1 and 2, in this GaN-based light emitting diode, an n-type GaN layer 11, an n-type GaN layer 12 thereon, a light-emitting layer 13 having a multiple quantum well (MQW) structure, for example, and the like The upper p-type GaN layer 14 forms a light emitting diode structure. The n-type GaN layer 11 and the n-type GaN layer 12 are doped with, for example, Si as an n-type impurity. The p-type GaN layer 14 is doped with, for example, Mg as a p-type impurity. These n-type GaN layer 11, n-type GaN layer 12, light emitting layer 13 and p-type GaN layer 14 as a whole have, for example, a circular planar shape. In this case, the n-type GaN layer 12, the light emitting layer 13, and the p-type GaN layer 14 have a cylindrical shape. The n-type GaN layer 11 has a tapered shape, and its end face (side face) 15 is inclined with respect to the back face (light extraction face) of the n-type GaN layer 11 so that light can be easily taken out to the outside. For example, a circular p-side electrode 16 is formed on the p-type GaN layer 14. On the back side of the n-type GaN layer 11, an n-side electrode 17 made of a metal electrode embedded in the n-type GaN layer 11 is formed. The surface of the n-side electrode 17 not embedded in the n-type GaN layer 11 and the back surface of the n-type GaN layer 11 are substantially on the same plane. In order to improve the light extraction efficiency, the n-side electrode 17 is formed at a position close to the outer peripheral portion of the back surface of the n-type GaN layer 11. In a typical example, the n-type GaN layer 11, the n-type GaN layer 12, the light emitting layer 13, and the p-type GaN layer 14 are C-axis oriented, and the n-side electrode 17 is connected to the C-plane of the n-type GaN layer 11. I'm in contact.

  As will be described later, the n-side electrode 17 is embedded in the n-type GaN layer 11 by forming the n-side electrode 17 in advance on the substrate and growing and covering the n-type GaN layer 11 thereon. Can do. The n-side electrode 17 is preferably formed of, for example, Rh (melting point: 1963 ° C.), which is a refractory metal, so as to withstand the high growth temperature (about 1000 ° C.) of the GaN-based semiconductor layer. Rh has a high reflectance with respect to visible light of 77 to 80%. Therefore, the n-side electrode 17 can be configured as a highly reflective electrode. The n-side electrode 17 preferably has a unidirectional width of, for example, 2 μm or less so that good crystallinity can be obtained when the n-type GaN layer 11 is grown, but is not limited thereto. . In this case, the n-side electrode 17 has an arcuate planar shape having a width of 2 μm and a length of 5 μm, for example. However, the planar shape of the n-side electrode 17 is not limited to an arc shape, and may be another shape, for example, a rectangle.

Although the light extraction surface is partially shielded by the n-side electrode 17, in this GaN-based light emitting diode, the n-side electrode 17 itself is configured as a highly reflective electrode in addition to the embedded electrode. As a result, the light from the light emitting layer 13 is reflected by the n-side electrode 17 to change its direction, and further reflected by the end face 15 to be extracted outside. Therefore, the n-side electrode 17 can be formed without necessarily reducing the area. For example, the n-side electrode 17 having a planar shape having a repetitive pattern as shown in FIGS. .
FIG. 3A shows an n-side electrode 17 having a ring-like planar shape. The width of the n-side electrode 17 is, for example, about 1 to 2 μm, but is not limited thereto.
FIG. 3B shows the mesh-shaped n-side electrode 17. The n-side electrode 17 includes a plurality of ring-shaped portions arranged concentrically at substantially equal intervals, and a plurality of linear portions arranged radially so as to connect these ring-shaped portions. A mesh is constructed. The width of each part of the n-side electrode 17 is, for example, about 1 to 2 μm, but is not limited thereto.
FIG. 3C shows the dot-shaped n-side electrode 17. In the n-side electrode 17, a plurality of dot-shaped (circular) electrodes are arranged in a grid at substantially equal intervals. In this case, the n-side electrode 17 is formed over almost the entire back surface of the n-type GaN layer 11. The diameter of each n-side electrode 17 is, for example, about 1 to 2 μm, but is not limited thereto.
In the n-side electrode 17 shown in FIGS. 3A to 3C, current injection can be performed almost uniformly without impairing the light extraction efficiency.

  Specific examples of dimensions, materials, etc. of each part of the GaN-based light emitting diode are as follows. The thickness of the n-type GaN layer 11 is, for example, 5 μm, the thickness of the n-type GaN layer 13 is, for example, 200 nm, the thickness of the light emitting layer 12 is, for example, 200 nm, and the thickness of the p-type GaN layer 13 is, for example, 200 nm. The light emitting layer 12 has, for example, an MQW structure composed of an InGaN well layer and a GaN barrier layer. The In composition of the InGaN well layer is, for example, 0.17 when the GaN-based light emitting diode emits blue light, and green light emission. For example, it is 0.25. Instead of the n-type GaN layer 11, for example, a laminated structure in which an n-type InGaN layer, an n-type AlGaN layer, and an n-type GaN layer are appropriately combined may be used. Further, instead of the p-type GaN layer 13, for example, a p-type InGaN layer, a p-type AlGaN layer, and a p-type GaN layer may be appropriately combined, and in this case, a p-side electrode is preferably used. A portion in contact with 16 is a p-type GaN layer or a p-type InGaN layer. The maximum diameter of the light emitting diode structure (the maximum diameter of the back surface of the n-type GaN layer 11) is, for example, about 20 μm. The p-side electrode 16 is made of, for example, a metal multilayer film having a Ni / Ag / Au structure. The Ni film has a thickness of 50 nm, the Ag film has a thickness of 50 nm, and the Au film has a thickness of 2000 nm, for example. The p-side electrode 16 may be made of a Ni / Au film, an Ag / Au film, or the like. The n-side electrode 17 is made of, for example, an Rh film and has a thickness of, for example, 0.2 μm.

  In this GaN-based light emitting diode, light generated from the light emitting layer 13 during operation is reflected by the end face 15 and taken out from the back surface of the n-type GaN layer 11 or sequentially reflected by the n-side electrode 17 and the end face 15. Then, it is taken out to the outside or directly taken out to the back surface of the n-type GaN layer 11 as it is. In this case, as described above, since the n-side electrode 17 is a buried electrode and is a highly reflective electrode, the light extraction efficiency is improved. Therefore, the amount of light extracted from the GaN-based light emitting diode can be reduced. Can be bigger.

Next, a method for manufacturing this GaN-based light emitting diode will be described.
As shown in FIG. 4A, first, for example, a sapphire substrate 18 whose principal surface is a C-plane is prepared, and its surface is cleaned by performing thermal cleaning or the like. For example, a GaN buffer layer (not shown) is first grown at a low temperature of, for example, about 500 ° C. by a phase growth (MOCVD) method, and then heated to about 1000 ° C. for crystallization, and then an n-type impurity is formed thereon. For example, an n-type GaN layer 19 doped with Si is grown. The thickness of the n-type GaN layer 19 is not particularly limited, but is about 2 μm, for example. This n-type GaN layer 19 can be grown to have a flat surface.

  Next, a resist pattern (not shown) having a predetermined shape is formed on the n-type GaN layer 19 by lithography, and further, an Rh film is formed on the entire surface of the substrate by, for example, a vacuum deposition method or a sputtering method. Are removed together with the Rh film formed thereon (lift-off). Thereby, the n-side electrode 17 made of Rh is formed on the n-type GaN layer 19.

  Next, as shown in FIG. 4B, an n-type GaN layer 11 doped with Si as an n-type impurity is grown on the n-type GaN layer 19 on which the n-side electrode 17 is formed, for example, by MOCVD. At this time, the n-type GaN layer 11 is not directly grown on the n-side electrode 17, but the n-type GaN layer 11 grows by the n-type electrode 17 being used as a growth mask and laterally growing. As a result, the n-side electrode 17 starts to be covered, and eventually, the n-side electrode 17 is completely covered to form a continuous film. For example, when the width of the n-side electrode 17 is 2 μm, the n-side electrode 17 can be completely covered by growing the n-type GaN layer 11 with a thickness of about 5 μm, for example. In this case, in a typical example, the n-type GaN layer 11 is grown in the C-axis direction so that the C-plane of the n-type GaN layer 11 is in contact with the n-side electrode 17. By doing so, alloying is likely to occur at the interface between the n-type GaN layer 11 and the n-side electrode 17 at this growth temperature, and good ohmic contact characteristics of the n-side electrode 17 can be obtained.

  Thus, after completely covering the n-side electrode 17 with the n-type GaN layer 11, as shown in FIG. 4C, the n-type GaN layer 12, the light emitting layer 13 and the p-type doped with, for example, Si as an n-type impurity are subsequently obtained. A p-type GaN layer 14 doped with, for example, Mg as an impurity is sequentially grown. Here, the n-type GaN layer 11 and the n-type GaN layer 12 are grown at a temperature of, for example, about 1020 ° C., the light-emitting layer 13 is grown at a temperature of, for example, about 600 to 800 ° C., and the p-type GaN layer 14 is, for example, 800 to The growth is performed at a temperature of about 900 ° C., but is not limited thereto. The n-type GaN layer 11 and the n-type GaN layer 12 are grown in, for example, a hydrogen gas atmosphere, the light emitting layer 13 is grown in, for example, a nitrogen gas atmosphere, and the p-type GaN layer 14 is grown in, for example, a hydrogen gas atmosphere. However, the present invention is not limited to this.

For example, trimethylgallium ((CH ₃ ) ₃ Ga, TMG) is used as a raw material for Ga, and trimethylaluminum ((CH ₃ ) ₃ Al, TMA) is used as a raw material for Al. As a raw material, trimethylindium ((CH ₃ ) ₃ In, TMI) is used, and as a raw material of N, ammonia (NH ₃ ) is used. As for the dopant, for example, silane (SiH ₄ ) is used as the n-type dopant, and bis (methylcyclopentadienyl) magnesium ((CH ₃ C ₅ H ₄ ) ₂ Mg) or bis (cyclopentadi) is used as the p-type dopant. Enyl) magnesium ((C ₅ H ₅ ) ₂ Mg) is used.

Next, the sapphire substrate 18 on which the GaN-based semiconductor layer is grown as described above is taken out from the MOCVD apparatus.
Next, a predetermined circular resist pattern (not shown) is formed on the surface of the substrate by lithography. Further, for example, a Ni film, an Ag film, and an Au film are sequentially formed on the entire surface of the substrate by, for example, a vacuum deposition method. Are removed together with the Ni film, Ag film and Au film formed thereon (lift-off). Thus, as shown in FIG. 5, a circular p-side electrode 16 having a Ni / Ag / Au structure is formed on the p-type GaN layer 14.

Next, as shown in FIG. 5B, a circular resist pattern 20 that covers the surface of a predetermined region of the p-type GaN layer 14 including the p-side electrode 16 is formed.
Next, etching is performed using the resist pattern 20 as a mask, for example, by RIE using a chlorine-based gas as an etching gas until the n-type GaN layer 11 is reached under the condition that etching is performed perpendicular to the substrate surface. Subsequently, after the etching is performed until the n-type GaN layer 19 is reached under the condition where the taper etching is performed, the resist pattern 20 is removed. Thus, as shown in FIG. 6C, the n-type GaN layer 12, the light emitting layer 13, and the p-type GaN layer 14 are patterned into a cylindrical shape, and the n-type GaN layer 11 has an end face 15 inclined at a predetermined angle with respect to its lower surface. It is patterned into a tapered shape having

  Next, for example, another substrate is prepared, and the p-side electrode 16 is bonded to the substrate, and then a laser beam such as an excimer laser is irradiated from the back side of the sapphire substrate 18 to form the n-type sapphire substrate 18. By ablating the interface with the GaN layer 19, the sapphire substrate 18 is peeled off from the n-type GaN layer 19 (laser peeling). Next, after removing Ga droplets adhering to the peeled surface with an acid or alkali solution such as hydrochloric acid, aqua regia, KOH, NaOH, etc., the entire peeled surface is etched by the RIE method. The GaN buffer layer and the type GaN layer 19 are removed, and finally the n-side electrode 17 is exposed on the back surface of the n-type GaN layer 11 and the surface is flattened. At this point, the GaN light emitting diodes are separated.

  If necessary, the light extraction efficiency can be improved by slightly roughening the back surface of the n-type GaN layer 11. For example, minute irregularities (not shown) capable of efficiently scattering light from the light emitting layer 13 are formed on the back surface of the n-type GaN layer 11 by etching using lithography and RIE. The size and spacing of the unevenness is, for example, about 0.1 to 1 μm. At this time, in the prior art, since the n-side electrode is formed after the formation of the unevenness, there arises a problem that the contact resistance becomes high. However, in this GaN-based light emitting diode, the n-side electrode 17 is already formed. Therefore, the contact characteristics are not impaired.

Thereafter, the substrate on which the p-side electrode 16 side is bonded is removed to separate each GaN-based light emitting diode.
As a result, the target GaN-based light emitting diode is completed as shown in FIG. The GaN-based light-emitting diode manufactured in this way may be used as a single element depending on the application, and can be bonded to another substrate, transferred, or connected to a wiring.
6A and 6B show an example of mounting this GaN-based light emitting diode. As shown in FIG. 6A, for example, a submount 21 (for example, a highly reflective submount such as silver-plated copper or alumina with good heat dissipation) having a conductive layer of a predetermined shape formed on the surface is prepared. The p-side electrode 16 of the GaN-based light emitting diode shown in FIG. 1 is bonded to the layer. Then, as shown in FIG. 6B, for example, the submount 21 is placed on a wiring board (not shown) so that the back surface of the n-type GaN layer 11 serving as the light extraction surface faces upward. The n-side electrode 17 of the GaN-based light emitting diode and an electrode (not shown) provided on the wiring substrate are bonded with the wire 22 and provided on the submount 21, and the p-side electrode 16 of the GaN-based light-emitting diode is connected to the p-side electrode 16. An electrically connected pad (not shown) and another electrode (not shown) provided on the wiring board are bonded with a wire (not shown). Then, the entire GaN-based light emitting diode is molded with a transparent resin 23 (only the outline is shown).

  FIG. 7 shows an example in which this GaN-based light emitting diode is formed into a resin package and connected by wiring. As shown in FIG. 7, the side surface of the GaN-based light emitting diode is covered with a resin 24, and bumps 25 are formed on the corresponding portions on the p-side electrode 16. A transparent electrode 26 such as ITO (indium-tin oxide) is formed on the lower surface of the package so as to be connected to the n-side electrode 17. The transparent electrode 26 is formed, for example, by applying ITO ink and drying it. After the GaN-based light emitting diodes thus packaged are regularly arranged, for example, in the plane of the wiring board, the wiring 27 connected to the bumps 25 formed on the p-side electrode 16 and the n-side electrode 17 are arranged. A plurality of GaN-based light emitting diodes can be connected using the transparent wiring 26 formed so as to cover.

  As described above, according to the first embodiment, since the n-side electrode 17 is embedded in the n-type GaN layer 11 grown thereon, the n-side electrode 17 with respect to the n-type GaN layer 11 is used. The contact resistance of the GaN-based light emitting diode can be reduced because the contact resistance of the GaN-based light emitting diode can be reduced. Further, since the n-side electrode 17 is a buried electrode and a highly reflective electrode, the light extraction efficiency can be improved and the light emission efficiency can be improved.

Next explained is the second embodiment of the invention.
FIG. 8 is a cross-sectional view for explaining a GaN-based light emitting diode manufacturing method according to the second embodiment.
In the second embodiment, the process up to the growth of the n-type GaN layer 19 on the sapphire substrate 18 is performed in the same manner as in the first embodiment, and then the n-type GaN layer 19 is formed on the n-type GaN layer 19 by, for example, the CVD method. An SiO ₂ film is formed. The thickness of this SiO ₂ film is about 100 nm, for example. Next, a resist pattern (not shown) having a predetermined shape is formed on the SiO ₂ film by lithography. Further, for example, an Rh film is formed on the entire surface of the substrate by, for example, vacuum deposition, and then the resist pattern is formed thereon. The removed Rh film is removed (lift-off). As a result, as shown in FIG. 8A, an n-side electrode 17 made of an Rh film is formed. Next, using this n-side electrode 17 as a mask, the underlying SiO ₂ film is etched to be patterned into the same shape as this n-side electrode 17. An SiN film may be formed instead of the SiO ₂ film 28. Next, as in the first embodiment, the n-type GaN layer 11 is grown so as to cover the n-side electrode 17 using the n-side electrode 17 and the SiO ₂ film 28 as a growth mask. At this time, since the SiO ₂ film 28 is inserted between the n-type GaN layer 19 and the n-side electrode 17 and the n-type GaN layer 19 and the n-side electrode 17 are not in direct contact, the n-type GaN layer 11, the underlying n-type GaN layer 19 can be prevented from being etched by vapor phase etching due to the catalytic effect of Rh constituting the n-side electrode 17.

Thereafter, as in the first embodiment, the n-type GaN layer 12, the light emitting layer 13 and the p-type GaN layer 14 are grown, the sapphire substrate 18 is peeled off, and the Ga droplets adhering to the peeled surface are removed. After that, the GaN buffer layer and the n-type GaN layer 19 on the release surface are removed, and if necessary, wet etching using, for example, a hydrofluoric acid-based etchant is performed to remove the SiO ₂ film 28 and finally the n-type GaN. The n-side electrode 17 is exposed on the lower surface of the layer 11 and the surface is flattened. This state is shown in FIG. 8D.
Other than the above are the same as in the first embodiment.
According to the second embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is the third embodiment of the invention.
FIG. 9 is a cross-sectional view for explaining a GaN-based light emitting diode manufacturing method according to the third embodiment.
In the third embodiment, the process up to the step shown in FIG. 4A is performed in the same manner as the first embodiment, and then the entire surface of the n-type GaN layer 19 on which the n-side electrode 17 is formed as shown in FIG. 9A. First, the n-type GaN layer 11 is grown to a thickness of about 50 nm, for example, at a low temperature of about 600 ° C., for example. At this time, a polycrystalline n-type GaN layer 29 is grown on the n-side electrode 17. In this way, the n-type GaN layer 29 completely covers the n-side electrode 17. Subsequently, the growth temperature is raised to, for example, 1020 ° C. to further grow the n-type GaN layer 11. At this time, the polycrystalline n-type GaN layer 29 extends upward, but the n-type GaN layer 29 is covered with the n-type GaN layer 11 grown laterally from the periphery. By growing to a thickness of about 10 μm, the n-type GaN layer 29 on the n-side electrode 17 can be completely covered, and the n-type GaN layer 11 becomes a continuous film with good crystallinity. By growing the n-type GaN layer 11 in this way, it is possible to prevent voids from being formed above the n-side electrode 17. Further, the n-type GaN layer 29 grown on the n-side electrode 17 is polycrystalline, but since the conductivity type is n-type, the contact resistance can be sufficiently lowered.
Thereafter, as shown in FIG. 9B to FIG. 9D, the target GaN-based light emitting diode is manufactured through the same process as in the first embodiment.
According to the third embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is the fourth embodiment of the invention.
FIG. 10 shows a GaN-based light emitting diode according to the fourth embodiment.
As shown in FIG. 10, in this GaN-based light emitting diode, the surface 30 of the n-side electrode 17 on the side embedded in the n-type GaN layer 11 has the back surface (light extraction surface) of the n-type GaN layer 11 and the n-side electrode. The structure is the same as that of the GaN-based light emitting diode according to the first embodiment except that the electrode 17 is inclined with respect to the exposed surface (surface). In this case, the n-side electrode 17 has a triangular cross section having a high central portion and low peripheral portions on both sides thereof. When the surface of the n-side electrode 17 on the side embedded in the n-type GaN layer 11 is parallel to the light extraction surface (in this case, the back surface of the n-type GaN layer 11), the light propagating through the inside is externally transmitted. However, in this n-side electrode 17, the surface parallel to the light extraction surface is only the surface surface, and the surface 30 embedded in the n-type GaN layer 11 is inclined with respect to the light extraction surface. In addition, by reflecting the light on the surface 30, it becomes easy to extract the light propagating inside to the outside, so that the light extraction efficiency can be increased.

In order to manufacture this GaN-based light emitting diode, the process is performed up to the step of forming the n-side electrode 17 having a rectangular cross section as shown in FIG. 4A in the same manner as in the first embodiment. By reflowing the resist, the central portion of the portion where the n-side electrode 17 is formed is raised and the peripheral portion is lowered. Next, by etching the entire surface by, for example, the RIE method, an n-side electrode 17 having a triangular cross section can be formed as shown in FIG. 11A.
Thereafter, as shown in FIGS. 11B, 11C, and 10, the process proceeds in the same manner as in the first embodiment to manufacture the target GaN-based light emitting diode.
According to the fourth embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is the fifth embodiment of the invention.
FIG. 12 shows a GaN-based light emitting diode according to the fifth embodiment.
As shown in FIG. 12, in this GaN-based light emitting diode, as a dielectric film for reflecting light from the active layer 13 between the upper surface of the n-side electrode 17 and the n-type GaN layer 11, for example, a SiO ₂ film Except that 32 is provided, it has the same structure as the GaN-based light emitting diode according to the first embodiment. The thickness of the SiO ₂ film 32 is 100 nm, for example. In this case, the n-side electrode 17 is not in contact with the n-type GaN layer 11 on the upper surface, and is in contact with the n-type GaN layer 11 only on both sides, so that the contact resistance of the n-side electrode 17 is lowered and good contact is obtained. From the viewpoint of enabling this, the thickness of the n-side electrode 17 is, for example, about 0.2 to 2 μm.
In this GaN-based light emitting diode, since the SiO ₂ film 32 is provided between the upper surface of the n-side electrode 17 and the n-type GaN layer 11, the n-side electrode 17 and the n-type GaN layer 11 are in direct contact with each other. Since the interface between the active layer 13 and the SiO ₂ film 32 is totally reflected, the n-side electrode 17 becomes a so-called ODR electrode, and the light extraction efficiency can be greatly improved. .

In order to manufacture this GaN-based light emitting diode, after the process up to the growth of the n-type GaN layer 19 on the sapphire substrate 18 is performed as in the first embodiment, the CVD is performed on the n-type GaN layer 19, for example. A SiO ₂ film is formed by the method. The thickness of this SiO ₂ film is about 100 nm, for example. Next, an Rh film is formed on the SiO ₂ film by, for example, vacuum evaporation or sputtering. Next, an SiO ₂ film is formed on the Rh film by, eg, CVD. Next, after a resist pattern (not shown) having a predetermined shape is formed by lithography, the SiO ₂ film, Rh film and SiO ₂ film are sequentially etched using the resist pattern as a mask. Thereby, as shown in FIG. 13A, a laminated structure of the SiO ₂ film 28, the n-side electrode 17 and the SiO ₂ film 32 is formed. At this time, since the SiO ₂ film 28 is inserted between the n-type GaN layer 19 and the n-side electrode 17 and the n-type GaN layer 19 and the n-side electrode 17 are not in direct contact, the n-type GaN layer 11, the underlying n-type GaN layer 19 can be prevented from being etched by vapor phase etching due to the catalytic effect of Rh constituting the n-side electrode 17.

Next, as shown in FIG. 13B, similarly to the first embodiment, the n-type GaN is formed so as to cover the SiO ₂ film 32 using the SiO ₂ film 28, the n-side electrode 17 and the SiO ₂ film 32 as a growth mask. Layer 11 is grown.
Thereafter, the process proceeds in the same manner as in the second embodiment, and the target GaN-based light emitting diode shown in FIG. 12 is manufactured.
According to the fifth embodiment, the same advantages as those of the first and second embodiments can be obtained.

Next, a sixth embodiment of the present invention will be described.
14A to 14D are cross-sectional views for explaining a method for manufacturing a GaN-based light emitting diode according to the sixth embodiment.
In this method of manufacturing a GaN-based light emitting diode, as shown in FIG. 14A, the steps up to the step shown in FIG. 4A are performed in the same manner as in the first embodiment. At this time, the n-side electrode 17 is formed by sequentially laminating, for example, an Rh film and an Ni film. Next, after a resist pattern having a predetermined shape is formed on the p-type GaN layer 14, etching is performed using the resist pattern as a mask until the sapphire substrate 18 is exposed by, for example, RIE. Thereby, as shown to FIG. 14B, it will be in the state from which each GaN-type light emitting diode was isolate | separated.

Next, as shown in FIG. 14C, a p-side electrode 16 having, for example, a Ni / Au / Ag structure is formed at a predetermined portion on the p-type GaN layer 14 by, for example, lift-off. Next, using the p-side electrode 16 as a mask, etching is performed, for example, by RIE until the n-side electrode 17 is exposed. At this time, since the outermost surface of the n-side electrode 17 is a Ni film that is difficult to be etched by the RIE method, the etching can be stopped without the n-side electrode 17 being excessively etched.
Thus, the target GaN-based light emitting diode is manufactured.

FIG. 15 shows an example in which this GaN-based light emitting diode is flip-chip mounted. As shown in FIG. 15, a high-reflection submount 33 and a submount 34 made of, for example, silver-plated copper having good heat dissipation or alumina are attached to the p-side electrode 16 and the n-side electrode 17, respectively. The electrode is taken out by attaching it to a package with a step so that is on the upper side.
The sapphire substrate 18 may remain attached, but if necessary, the sapphire substrate 18 may be peeled from the n-type GaN layer 19 by irradiating a laser beam from the back surface side of the sapphire substrate 18. In this case, from the viewpoint of improving the light extraction efficiency, the lower surface of the n-type GaN layer 19 is wet-etched or etched by lithography, RIE, or the like to efficiently scatter light having an emission wavelength. Minute unevenness (not shown) that can be formed may be formed.

  According to the sixth embodiment, the n-side electrode 17 is formed in advance on the substrate, the GaN-based semiconductor layer forming the light emitting diode structure is grown so as to embed the n-side electrode 17, and then the growth is performed. Since the n-side electrode 17 is exposed by etching a part of the GaN-based semiconductor layer forming the light-emitting diode structure from the surface side, the GaN-based light emission having the p-side electrode 16 and the n-side electrode 17 on one surface. The diode can be easily manufactured.

Next explained is the seventh embodiment of the invention.
In the seventh embodiment, the configuration of the light emitting layer 13 is different from that of the first embodiment. Specifically, the light emitting layer 13 has an MQW structure including a plurality of well layers, and the well layer density on the n-type GaN layer 12 side of the light emitting layer 13 is d ₁ and the well layer density on the p-type GaN layer 14 side. the when the d _2, the well layer in the light-emitting layer 13 so as to satisfy d ₁ <d ₂ is disposed. In order to vary the well layer density in the light emitting layer 13 in this manner, for example, the thickness of the well layer is made constant and the thickness of the barrier layer is made different (specifically, the p-type GaN layer in the light emitting layer 13). The thickness of the barrier layer on the 14 side is preferably made smaller than the thickness of the barrier layer on the n-type GaN layer 12 side, but the present invention is not limited to this. The layer thickness is made different (specifically, the thickness of the well layer on the p-type GaN layer 14 side in the light emitting layer 13 is made larger than the thickness of the well layer on the n-type GaN layer 12 side). Alternatively, both the thickness of the well layer and the thickness of the barrier layer may be different. Here, the light-emitting layer 13 satisfies 1 <d ₂ / d ₁ ≦ 20, preferably 1.2 ≦ d ₂ / d ₁ ≦ 10, more preferably 1.5 ≦ d ₂ / d ₁ ≦ 5. A well layer at is arranged.

A green light emitting GaN-based light-emitting diode having an MQW structure in which the light-emitting layer 13 is composed of nine well layers and eight barrier layers is manufactured, and each well layer of the light-emitting layer 13 when the GaN-based light-emitting diode emits light. An experiment was conducted to visualize the light emission ratio from In this GaN-based light emitting diode, the n-type GaN layer 12 has a thickness of 3 μm, the p-type GaN layer 14 has a thickness of 120 nm, and between the n-type GaN layer 12 and the light-emitting layer 13 and the p-type GaN layer 14. An undoped GaN layer having a thickness of 5 nm is provided between the light emitting layer 13 and the light emitting layer 13. The well layer in the light emitting layer 13 is an In _0.23 Ga _0.77 N layer having a thickness of 3 nm, and the barrier layer is a GaN layer having a thickness of 15 nm. In this GaN-based light emitting diode (Sample 1), the emission peak wavelength at an operating current density of 60 A / cm ² was 515 nm, and the light emission efficiency was 180 mW / A.

Next, the GaN-based light-emitting diode has a layer structure similar to that of the GaN-based light-emitting diode of Sample 1, but only a specific one of the nine well layers in the light-emitting layer 13 is an In _0.15 Ga _0.85 N layer having a thickness of 3 nm. A light emitting diode was produced. Sample 2 is a GaN-based light emitting diode whose first well layer is an In _0.15 Ga _0.85 N layer from the n-type GaN layer 12 side, and a GaN-based light emitting diode whose third well layer is an In _0.15 Ga _0.85 N layer. sample 3, the fifth well layer is an in _0.15 Ga _0.85 GaN-based light emitting diode sample 4 is N layer, the seventh well layer is an in _0.15 Ga _0.85 sample 5 the GaN-based light emitting diode is a N layer, the A GaN-based light emitting diode in which the ninth well layer is an In _0.15 Ga _0.85 N layer is referred to as Sample 6. In the GaN-based light emitting diodes of Samples 2 to 6, the other well layer is composed of an In _0.23 Ga _0.77 N layer having a thickness of 3 nm as described above. In these GaN light emitting diodes of Samples 2 to 6, the emission peak wavelength at an operating current density of 60 A / cm ² was 515 nm, and the luminous efficiency was 180 mW / A. However, in some samples, in addition to green light emission (emission wavelength of about 515 nm), the blue emission region (emission wavelength of about 450 nm) is small due to the presence of a well layer composed of an In _0.15 Ga _0.85 N layer. An emission peak was observed. The ratio of the blue emission peak component to the whole is plotted in FIG. The first layer, the third layer,... On the horizontal axis in FIG. 16 indicate the positions of the well layer made of the In _0.15 Ga _0.85 N layer from the n-type GaN layer 12 side. The ratio of the blue light emission peak component corresponding to the Nth layer (N = 1, 3, 5, 7, 9) on the horizontal axis in FIG. layer indicates the operating current density per data percentage of total of blue emission peak component in GaN-based light emitting diode made of in _0.15 Ga _0.85 N layer.

As is apparent from FIG. 16, light emission is biased to a region of about 2/3 of the light emitting layer 13 in the thickness direction of the light emitting layer 13 in the light emitting layer 13 having the MQW structure at any operating current density. Further, 80% of the light emission is occupied by the light emission from the region up to 1/2 the thickness direction of the light emitting layer 13 on the p-type GaN layer 14 side. The reason why the light emission is significantly biased in this way is the difference in mobility between electrons and holes. In a GaN-based compound semiconductor, since the mobility of holes is small, the holes reach only the well layer of the light emitting layer 13 in the vicinity of the p-type GaN layer 14, and light emission due to recombination of holes and electrons is p. It is thought that it is biased toward the type GaN layer 14 side. Also, in terms of the transmittance of carriers in the hetero barrier composed of the well layer and the barrier layer, holes having a large effective mass reach the well layer of the light emitting layer 13 on the n-type GaN layer 12 side across the plurality of barrier layers. The factor that it is difficult to do is also considered.
Therefore, in order to effectively use the light that is biased toward the p-type GaN layer 14, an MQW structure having an asymmetric well layer in which the distribution of the well layer is biased toward the p-type GaN layer 14 is employed. It is effective. Furthermore, it can be seen that the peak of the light emission distribution is located in the region of 1/3 to 1/4 of the thickness direction of the light emitting layer 13 on the p-type GaN layer 14 side.

Examples will be described.
The GaN-based light emitting diode of Example 1 has the same configuration as the GaN-based light emitting diode of Sample 1 except for the configuration and structure of the light emitting layer 13.
Details of the MQW structure constituting the light emitting layer 13 are shown in Table 1. In Table 1 or Table 2 described later, the numbers in parentheses on the right side of the values of the thickness of the well layer and the thickness of the barrier layer are the interfaces (more specifically, the side of the light emitting layer 13 on the n-type GaN layer 13 side). These represent the integrated thickness from the interface between the undoped GaN layer and the light emitting layer 13 in Example 1.

In Example 1, the total thickness of the light emitting layer 13 is t _0, and the interface of the light emitting layer 13 on the n-type GaN layer 12 side (more specifically, in Example 1, the undoped GaN layer and the light emitting layer 13 the thickness from the _{interface) (2t 0/3) d} 1 of the well layer density of the first region of the emission layer 13 to, p-type GaN layer 14 side of the interface (more specifically, undoped in example 1 when the well layer density of the second region of the emission layer 13 to a thickness from the interface) between GaN layer and the light-emitting layer 13 (t _0/3) was d _2, so as to satisfy d ₁ <d ₂ A well layer in the light emitting layer 13 is disposed.

Specifically, when the well layer density d ₁ and the well layer density d ₂ are obtained from the equations (1) and (2), they are as follows.
<Example 1>
d ₂ = (WL ₂ / WL) / (t ₂ / t ₀ )
= (4/10) / (50/150)
= 1.20
d ₁ = (WL ₁ / WL) / (t ₁ / t ₀ )
= (6/10) / (100/150)
= 0.90

For comparison, a GaN-based light emitting diode having the light emitting layer 13 shown in Table 1 as Comparative Example 1 was produced.
In the GaN-based light emitting diodes of Example 1 and Comparative Example 1, the area of the light emitting layer 13 (area of the junction region) was 6 × 10 ⁻⁴ cm ² . Therefore, the operating current density of the GaN-based light emitting diode is a value obtained by dividing the operating current value by 6 × 10 ⁻⁴ cm ² . For example, the operating current density when a drive current of 20 mA is applied is 33 A / cm ² .
When the well layer density d ₁ and the well layer density d ₂ in Comparative Example 1 are obtained from the equations (1) and (2), they are as follows.
<Comparative example 1>
d ₂ = (WL ₂ / WL) / (t ₂ / t ₀ )
= {(3 + 1/3) / 10} / (49/147)
= 1.00
d ₁ = (WL ₁ / WL) / (t ₁ / t ₀ )
= {(6 + 2/3)} / 10} / (98/147)
= 1.00

FIG. 17 shows the result of measuring the relationship between the operating current density of the GaN-based light emitting diode and the light output. The light output of the GaN-based light emitting diode of Example 1 is higher than that of Comparative Example 1. The difference in light output between the GaN-based light emitting diode of Example 1 and the GaN-based light emitting diode of Comparative Example 1 becomes significant when the operating current density is 50 A / cm ² or more, and when the operating current density is 100 A / cm ² or more. The difference is 10% or more. That is, the GaN-based light emitting diode of Example 1 has an operating current density of 50 A / cm ² or more, preferably 100 A / cm ² or more, and the light output is significantly increased compared to the GaN-based light emitting diode of Comparative Example 1. Therefore, it can be said that it is desirable to use an operating current density of 50 A / cm ² or more, preferably 100 A / cm ² or more.

Furthermore, FIG. 18 shows the relationship between the operating current density of the GaN-based light emitting diode and the emission peak wavelength. When the operating current density is increased from 0.1 A / cm ² to 300 A / cm ² , Δλ = −19 nm in Comparative Example 1, whereas Δλ = −8 nm in Example 1, a small emission wavelength shift. Is realized. In particular, when the operating current density is 30 A / cm ² or more, almost no wavelength shift is observed. In other words, when the operating current density is 30 A / cm ² or more, the light emission wavelength changes only slightly, which is preferable in terms of management of the light emission wavelength and the light emission color. In particular, when the operating current density is 50 A / cm ² or more, or 100 A / cm ² or more, the GaN-based light-emitting diode of Example 1 has a significantly smaller wavelength shift than the GaN-based light-emitting diode of Comparative Example 1, and is superior. Is clear.

In addition to the method of controlling the light emission amount (luminance) of the GaN-based light emitting diode based on the peak current value of the driving current, it may be performed by controlling the pulse width of the driving current or controlling the pulse density of the driving current. It may be carried out by a combination of these.
Note that the total thickness of the light emitting layer 13 is t _0, and the thickness (t ₀ / n) from the interface (more specifically, the interface between the undoped GaN layer and the light emitting layer 13) of the light emitting layer 13 on the n-type GaN layer 12 side. The density of the well layer in the first region of the light emitting layer 13 up to 2) is d ₁ , the thickness from the interface on the p-type GaN layer 14 side (more specifically, the interface between the undoped GaN layer and the light emitting layer 13) ( When the well layer density in the second region of the light emitting layer 13 up to t _0/2 ) is d ₂ , the well layer in the light emitting layer 13 is arranged so as to satisfy d ₁ <d ₂ When the well layer density d ₁ and the well layer density d ₂ are determined from the equations (1) and (2), they are as follows.

<Equivalent to Example 1>
d ₂ = (WL ₂ / WL) / (t ₂ / t ₀ )
= (6/10) / (75/150)
= 1.20
d ₁ = (WL ₁ / WL) / (t ₁ / t ₀ )
= (4/10) / (75/150)
= 0.80

<Comparative example 1 equivalent>
d ₂ = (WL ₂ / WL) / (t ₂ / t ₀ )
= (5/10) / {(73 + 1/2) / 147}
= 1.00
d ₁ = (WL ₁ / WL) / (t ₁ / t ₀ )
= (5/10) / {(73 + 1/2) / 147}
= 1.00

Further, the total thickness of the light emitting layer 13 is t _0, and the thickness from the interface (more specifically, the interface between the undoped GaN layer and the light emitting layer 13) in the light emitting layer 13 (t ₀ / The density of the well layer in the first region of the light emitting layer 13 up to 3) is d ₁ , the thickness from the interface on the p-type GaN layer 14 side (more specifically, the interface between the undoped GaN layer and the light emitting layer 13) ( when the well layer density of the second region of 2t _0/3) to the light-emitting layer 13 and d _2, when the well layers in the light-emitting layer 13 so as to satisfy d ₁ <d ₂ is arranged When the well layer density d ₁ and the well layer density d ₂ are determined from the equations (1) and (2), they are as follows.

<Equivalent to Example 1>
d ₂ = (WL ₂ / WL) / (t ₂ / t ₀ )
= (8/10) / (50/150)
= 2.40
d ₁ = (WL ₁ / WL) / (t ₁ / t ₀ )
= (2/10) / (100/150)
= 0.30

<Comparative example 1 equivalent>
d ₂ = (WL ₂ / WL) / (t ₂ / t ₀ )
= {(6 + 2/3) / 10} / (98/147)
= 1.00
d ₁ = (WL ₁ / WL) / (t ₁ / t ₀ )
= {(3 + 1/3) / 10} / (49/147)
= 1.00
As described above, in any case, in the case corresponding to Example 1, the well layer in the light emitting layer 13 is disposed so as to satisfy d ₁ <d ₂ .

  Next, Example 2 will be described. The second embodiment is a modification of the first embodiment. In the GaN-based light emitting diode of Example 2, the emission wavelength was set to about 445 nm by adjusting the In composition ratio of the well layer of the light emitting layer 13. Table 2 shows details of the MQW structure constituting the light emitting layer 13 in the GaN-based light emitting diode of Example 2.

When the well layer density d ₁ and the well layer density d ₂ are obtained from the equations (1) and (2), they are as follows.
<Example 2>
d ₂ = (WL ₂ / WL) / (t ₂ / t ₀ )
= {(5 + 2/9) / 10} / {(40 + 2/3) / 122}
= 1.57
d ₁ = (WL ₁ / WL) / (t ₁ / t ₀ )
= {(4 + 7/9) / 10} / {(81 + 1/3) / 122}
= 0.72

For comparison, a GaN-based light emitting diode having a light emitting layer 13 shown in Table 2 as Comparative Example 2 was produced. The well layer density d ₁ and the well layer density d ₂ in Comparative Example 2 Formula (1), and obtained from (2), becomes as follows.
<Comparative example 2>
d ₂ = (WL ₂ / WL) / (t ₂ / t ₀ )
= {(3 + 1/3) / 10} / {(41 + 1/2) / (124 + 1/2)}
= 1.00
d ₁ = (WL ₁ / WL) / (t ₁ / t ₀ )
= {(6 + 2/3)} / 10} / {83 / (124 + 1/2)}
= 1.00
The GaN-based light emitting diodes of Example 2 and Comparative Example 2 were evaluated by the same method as in Example 1.

FIG. 19 shows the relationship between the operating current density of the GaN-based light emitting diode and the emission peak wavelength. When the operating current density is increased from 0.1 A / cm ² to 300 A / cm ² , Δλ = −9 nm in Comparative Example 1, whereas Δλ = −1 nm in Example 2, which is an extremely small emission wavelength. Shift is realized. Thus, the GaN-based light-emitting diode of Example 2 that emits blue light has a significantly smaller wavelength shift than the GaN-based light-emitting diode of Comparative Example 2, and the superiority is clear.
According to the seventh embodiment, in addition to the same advantages as those of the first embodiment, it is possible to suppress a large shift in the emission wavelength accompanying an increase in operating current density, and to perform a wider range of luminance control. The advantage that it can be obtained.

As mentioned above, although embodiment of this invention was described concretely, this invention is not limited to the above-mentioned embodiment, The various deformation | transformation based on the technical idea of this invention is possible.
For example, the numerical values, materials, structures, shapes, substrates, raw materials, processes and the like given in the first to seventh embodiments are merely examples, and if necessary, numerical values, materials, structures, Shapes, substrates, raw materials, processes, etc. may be used.

In the first to fifth embodiments described above, a metal multilayer film whose outermost surface is made of Ni, specifically, for example, a metal multilayer film having an Rh / Ni structure may be used as the n-side electrode 17. In this case, the n-side electrode 17 is formed by sequentially forming a Ni film and an Rh film on the n-type GaN layer 19 and then patterning them into a predetermined shape. When the outermost surface of the n-side electrode 17 is thus made of an Ni film, the n-side electrode 17 is exposed when the n-side electrode 17 is exposed by etching the peeled surface by RIE after the sapphire substrate 18 is peeled off. Can be prevented from being excessively etched.
Moreover, you may combine 2 or more of the above-mentioned 1st-7th embodiment as needed.

It is sectional drawing which shows the GaN-type light emitting diode by 1st Embodiment of this invention. It is a top view which shows the GaN-type light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the other example of the n side electrode of the GaN-type light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type light emitting diode by 1st Embodiment of this invention. It is sectional drawing which shows the example of mounting of the GaN-type light emitting diode by 1st Embodiment of this invention. It is sectional drawing which shows the example of mounting of the GaN-type light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type light emitting diode by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type light emitting diode by 3rd Embodiment of this invention. It is sectional drawing which shows the GaN-type light emitting diode by 4th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type light emitting diode by 4th Embodiment of this invention. It is sectional drawing which shows the GaN-type light emitting diode by 5th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type light emitting diode by 5th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the GaN-type light emitting diode by 6th Embodiment of this invention. It is sectional drawing which shows the GaN-type light emitting diode by 6th Embodiment of this invention. It is a basic diagram for demonstrating the GaN-type light emitting diode by 7th Embodiment of this invention. It is a basic diagram for demonstrating the GaN-type light emitting diode by 7th Embodiment of this invention. It is a basic diagram for demonstrating the GaN-type light emitting diode by 7th Embodiment of this invention. It is a basic diagram for demonstrating the GaN-type light emitting diode by 7th Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11, 12, 19 ... n-type GaN layer, 13 ... Light emitting layer, 14 ... p-type GaN layer, 15 ... End face, 16 ... p-side electrode, 17 ... n-side electrode, 18 ... Sapphire substrate, 24 ... Resin, 25 ... bumps, 26 ... transparent electrode, 27 ... wiring, 28, 29 ... SiO ₂ film, 33, 34 ... sub-mount

Claims (18)

A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the semiconductor light emitting device
The semiconductor light emitting element, wherein the metal electrode is embedded in the first semiconductor layer.   2. The semiconductor light emitting element according to claim 1, wherein the surface of the metal electrode not embedded in the first semiconductor layer and the main surface of the first semiconductor layer are substantially on the same plane.   2. The semiconductor light emitting device according to claim 1, wherein the metal electrode is made of Rh.   2. The semiconductor light emitting element according to claim 1, wherein the planar shape of the metal electrode is a predetermined repeating pattern.   2. The semiconductor light emitting device according to claim 1, further comprising a dielectric film between a surface of the metal electrode embedded in the first semiconductor layer and the first semiconductor layer.   2. The semiconductor light emitting element according to claim 1, wherein a surface of the metal electrode embedded in the first semiconductor layer is inclined with respect to a main surface of the first semiconductor layer.   The surface of the metal electrode embedded in the first semiconductor layer is inclined with respect to the surface of the metal electrode not embedded in the first semiconductor layer. Item 14. A semiconductor light emitting device according to Item 1.   2. The semiconductor light emitting device according to claim 1, wherein the first semiconductor layer, the light emitting layer, and the second semiconductor layer are made of a nitride III-V compound semiconductor.   9. The semiconductor light emitting device according to claim 8, wherein the metal electrode is in contact with the C-plane of the first semiconductor layer. A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the method for manufacturing a semiconductor light emitting device,
Growing a third semiconductor layer of a first conductivity type on a substrate;
Forming the metal electrode on the third semiconductor layer;
Growing the first semiconductor layer so as to cover the metal electrode;
And a step of sequentially growing the light emitting layer and the second semiconductor layer on the first semiconductor layer. A method for manufacturing a semiconductor light emitting element.   11. The semiconductor according to claim 10, further comprising a step of exposing the metal electrode by peeling or etching the third semiconductor layer from the back side after peeling the substrate from the third semiconductor layer. Manufacturing method of light emitting element.   When growing the first semiconductor layer, the first semiconductor layer is grown at a first growth temperature to cover the metal electrode, and then a second growth temperature higher than the first growth temperature. The method of manufacturing a semiconductor light emitting device according to claim 10, wherein the first semiconductor layer is grown by the method described above.   11. The method of manufacturing a semiconductor light emitting element according to claim 10, wherein a dielectric film and the metal electrode are sequentially formed on the third semiconductor layer.   11. The method of manufacturing a semiconductor light emitting element according to claim 10, wherein the first dielectric film, the metal electrode, and the second dielectric film are sequentially formed on the second semiconductor layer.   11. The semiconductor light emitting device according to claim 10, wherein the first semiconductor layer, the light emitting layer, the second semiconductor layer, and the third semiconductor layer are made of a nitride III-V compound semiconductor. Production method. In a backlight in which a plurality of red light emitting semiconductor light emitting elements, green light emitting semiconductor light emitting elements and blue light emitting semiconductor light emitting elements are arranged,
At least one of the red light emitting semiconductor light emitting element, the green light emitting semiconductor light emitting element, and the blue light emitting semiconductor light emitting element,
A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the semiconductor light emitting device
The backlight characterized in that the metal electrode is embedded in the first semiconductor layer. In a display in which a plurality of red light emitting semiconductor light emitting elements, green light emitting semiconductor light emitting elements and blue light emitting semiconductor light emitting elements are arranged,
At least one of the red light emitting semiconductor light emitting element, the green light emitting semiconductor light emitting element, and the blue light emitting semiconductor light emitting element,
At least one of the red light emitting semiconductor light emitting element, the green light emitting semiconductor light emitting element, and the blue light emitting semiconductor light emitting element,
A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the semiconductor light emitting device
The display, wherein the metal electrode is embedded in the first semiconductor layer. In an electronic device having one or more semiconductor light emitting elements,
At least one of the semiconductor light emitting elements is
A light emitting layer is sandwiched between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, and a metal electrode contacts the first semiconductor layer. In the semiconductor light emitting device
An electronic apparatus, wherein the metal electrode is embedded in the first semiconductor layer.

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