JP2008167300A - Doherty amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a Doherty amplifier having simple configuration and providing high efficiency while suppressing adjacent channel leak power. <P>SOLUTION: The Doherty amplifier is equipped with constant voltage sources 21, 22 for supplying a first voltage and a second voltage different from the first voltage and an amplification section, wherein the amplification section is equipped with: a distribution circuit 11 for distributing an input signal; a carrier amplifier 1 in which the first voltage from the constant voltage source is applied between a drain and a source thereof and which amplifies one signal distributed by the distribution circuit at all times; a peak amplifier 2 in which the second voltage from the constant voltage source is applied between a drain and a source thereof and which amplifies the other signal distributed by the distribution circuit when the input signal is above a predetermined level; and an output terminal from which an output signal of the carrier amplifier and an output signal of the peak amplifier are synthesized and output. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a Doherty amplifier capable of realizing high efficiency.

  In recent years, mobile communication and wireless LAN (Local Area Network) have made remarkable progress, especially with the explosive spread of mobile phones and the accompanying infrastructure development, which requires lower power consumption not only for mobile terminals but also for base stations. Has been. Therefore, there is an increasing demand for an improvement in efficiency and linearity for amplifiers used for transmission in base stations. Linearity is a performance in which an increase in output power linearly changes with an increase in input power. If this linearity is good, the distortion of the output signal is reduced and the adjacent channel leakage power is reduced.

  However, in a typical amplifier, there is a trade-off between efficiency and linearity, and efficiency is proportional to the input level to the amplifier. Therefore, high efficiency cannot be obtained until the amplifier output approaches the saturated output power, so it is difficult to achieve amplifier linearity. In view of this, an amplifier with higher efficiency and lower distortion has been developed by combining a technique for amplifying a signal with high efficiency such as a Doherty amplifier and a distortion compensation technique such as low distortion and feedforward.

  This Doherty amplifier has a carrier amplifier and a peak amplifier, and the gate voltage is set so that the carrier amplifier operates in class AB and the peak amplifier operates in class C.

  The phase line length is configured so that the load impedance viewed from the peak amplifier side is close to an open state from the combination point of the output ends of the carrier amplifier and the peak amplifier. Thus, during the small signal operation, since the peak amplifier is operating in class C, only the carrier amplifier is in operation, and the efficiency is improved as shown by the curve C2 in FIG.

  When the output power increases above the saturation transition point Pb at which the carrier amplifier saturates, that is, during the large signal operation, the peak amplifier also operates, so that the saturated output power Pa increases as shown by the curve C3 in FIG. . A normal amplifier that operates two amplifiers in class AB is as shown by curve C1 in FIG. 5 and obtains a saturated output power equivalent to that of the Doherty amplifier. However, in the region where the back-off is taken from the saturated output power, the efficiency is Low.

  In addition, a Doherty amplifier including a carrier amplifier and a peak amplifier having the same saturation output power has an efficiency discontinuity point at a saturation transition point Pb as shown by curve curves C2 and C3 in FIG. The saturation output power Pa is reached while maintaining the efficiency substantially.

  However, recent information communication signals, such as W-CDMA signals, have a high power ratio of the difference between the peak value and the average value, so that it is difficult to suppress adjacent channel leakage power with a general Doherty amplifier. That is, when input power exceeding the saturated output power is input (linearity is not good), distortion of the output signal increases and it is difficult to suppress adjacent channel leakage power.

  For this reason, a Doherty amplifier has been devised that suppresses adjacent channel leakage power by increasing efficiency in a region where the backoff amount from the saturated output power is larger than that of a normal Doherty amplifier. In this Doherty amplifier, devices having different gate widths, that is, devices having different saturation output powers, are used as devices used for the carrier amplifier and the peak amplifier.

  FIG. 6 shows a conventional Doherty amplifier circuit of this type (Non-Patent Document 1). The Doherty amplifier includes a carrier amplifier 1a composed of a 10W device and a peak amplifier 2a composed of a 20W device. The input signal is divided into two, one is input to the carrier amplifier 1a, and the other is input to the peak amplifier 2a via the quarter wavelength transmission line 3. The load is connected to the output of the peak amplifier 2a via the matching circuit 6a, and the output of the carrier amplifier 1a is generally connected to the load via an impedance converter composed of the matching circuit 5a and the quarter wavelength transmission line 4. The In this Doherty amplifier, only the carrier amplifier 1a operates during the small signal operation.

  During the small signal operation, the load impedance seen from the carrier amplifier 1a is higher than the impedance at the peak power, so that the efficiency of the carrier amplifier 1a increases. When the output level increases beyond the saturation transition point at which the carrier amplifier 1a is saturated, the peak amplifier 2a is activated. In this Doherty amplifier, devices having different saturation powers of the 10 W carrier amplifier 1a and the 20 W peak amplifier 2a are used, so even if the power ratio of the difference between the peak value and the average value is high, the adjacent channel leakage power Can be suppressed.

  A Doherty amplifier shown in FIG. 7 is known (Patent Document 1). In this Doherty amplifier, the directional coupler 7 supplies most of the input signal power to the orthogonal splitter 8 and outputs a small portion of the input signal to the detector 9. The quadrature splitter 8 separates the input signal into an in-phase signal and a quadrature signal, outputs the in-phase signal to the carrier amplifier 1b, and outputs the quadrature signal to the peak amplifier 2b. The output of the detector 9 is output to the bias control circuits 10a and 10b. The carrier amplifier 1b linearly amplifies the in-phase signal from the quadrature splitter 8 at a low input signal level under the control of the bias control circuit 10a. The peak amplifier 2b amplifies the quadrature signal from the quadrature splitter 8 during high output operation. The quarter wavelength transmission line 4 connected to the output of the carrier amplifier 1b is connected to the output of the peak amplifier 2b at the output terminal OUT.

  According to such a configuration, the bias control circuits 10a and 10b control the bias of the carrier amplifier 1b and the peak amplifier 2b according to the input signal so as to give a constant power gain, so that distortion of the input signal is suppressed. Can do.

Further, a high efficiency amplifier described in Patent Document 2 is known as a conventional Doherty amplifier of this type.
Ishii: “Optimization of peak amplifier in Doherty amplifier”, IEICE2005, C-2-7, p40 Special Table 2000-513535 JP 2003-188651 A

  However, in the conventional Doherty amplifier disclosed in Non-Patent Document 1 described above, in devices with different gate widths, only saturated values such as 10 W, 20 W, 90 W, and 180 W can be obtained and saturation is achieved. The output power cannot be fine tuned.

  Further, the conventional Doherty amplifier disclosed in Patent Document 1 requires the quadrature splitter 8, the detector 9, and the bias control circuits 10a and 10b, so that the circuit becomes complicated and expensive.

  An object of the present invention is to provide a Doherty amplifier capable of obtaining high efficiency while suppressing adjacent channel leakage power with a simple configuration.

  In order to solve the above problem, a Doherty amplifier according to the present invention includes a distribution circuit that distributes an input signal, a carrier amplifier that always amplifies one of the signals distributed by the distribution circuit, and an input signal that is equal to or higher than a predetermined level. A peak amplifier that amplifies the other signal distributed by the distribution circuit, and an output terminal that combines and outputs the output of the carrier amplifier and the output of the peak amplifier. The line length to the input terminal of the amplifier is different from the line length from the distribution circuit to the input terminal of the peak amplifier.

  The Doherty amplifier according to the present invention includes a constant voltage source that supplies a first voltage and a second voltage that is different from the first voltage, and an amplification unit, and the amplification unit distributes an input signal. A circuit, a carrier amplifier that applies a first voltage of the constant voltage source between main electrodes and amplifies one of the signals distributed by the distribution circuit, and a second voltage of the constant voltage source between the main electrodes. A peak amplifier that amplifies the other signal distributed by the distribution circuit when the input signal is higher than a predetermined level, and an output terminal that combines and outputs the output of the carrier amplifier and the output of the peak amplifier It is characterized by providing.

  According to the Doherty amplifier according to the present invention, it is possible to obtain high efficiency while suppressing adjacent channel leakage power with a simple configuration.

  Further, since the first voltage is applied from the constant voltage source between the main electrodes of the carrier amplifier and the second voltage is applied from the constant voltage source between the main electrodes of the peak amplifier, the devices are operated as devices having different saturation output powers.

  Hereinafter, a Doherty amplifier according to an embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a circuit diagram showing a configuration of a Doherty amplifier according to Embodiment 1 of the present invention. This Doherty amplifier has an input end, a 90 ° hybrid coupler 11, a phase correction line 13, a carrier amplifier 1, a peak amplifier 2, a carrier output stage matching circuit 5, a peak output stage matching circuit 6, a constant voltage source 21, 22, 35Ω. It consists of a line 14 and an output end OUT.

  The 90 ° hybrid coupler 11 corresponds to the distribution circuit of the present invention, and includes a directional coupler having first to fourth terminals. The first terminal is connected to the input terminal, and the second terminal is a 50Ω termination. The third terminal is connected to the carrier amplifier 1 via the phase correction line 13, and the fourth terminal is connected to the peak amplifier 2. The 90 ° hybrid coupler 11 divides the input signal from the input end into two parts with equal power and separates it into a first signal that is 3 dB down and a second signal that is delayed by 90 ° relative to the first signal. The signal is output to the carrier amplifier 1 via the phase correction line 13 and the second signal is output to the peak amplifier 2.

  The Doherty amplifier according to the first embodiment includes a block A including a phase correction line 13, a block B including a carrier amplifier 1 and a peak amplifier 2, and a block C including a carrier output stage matching circuit 5 and a peak output stage matching circuit 6. Is provided. Hereinafter, each block will be described in turn.

(Block B comprising carrier amplifier 1 and peak amplifier 2)
The devices used for the carrier amplifier 1 and the peak amplifier 2 are devices having the same gate width and the same saturation output power, and are composed of, for example, GaN-HEMT (Gallium Nitride-High Electron Mobility Transistor). Use a power of 90W. The drain voltage (drain-source voltage) of this GaN-HEMT is nominally 50V.

  The carrier amplifier 1 has a constant voltage source 21 to 40 V (corresponding to the first voltage of the present invention) between the drain and source of GaN-HEMT (corresponding to the first amplifying element of the present invention) (corresponding to between the main electrodes of the present invention). ) Is applied. The carrier amplifier 1 always operates in class AB by setting the gate voltage regardless of the output level, and amplifies the first signal sent from the third terminal of the 90 ° hybrid coupler 11 via the phase correction line 13. To the carrier output stage matching circuit 5.

  The peak amplifier 2 has a constant voltage source 22 to 50 V (corresponding to the second voltage of the present invention) between the drain and source of GaN-HEMT (corresponding to the second amplifying element of the present invention) (corresponding to between the main electrodes of the present invention). ) Is applied. The peak amplifier 2 operates in class C by setting the gate voltage only during high output operation, that is, after the carrier amplifier 1 reaches the saturation transition point Pb, and is sent from the fourth terminal of the 90 ° hybrid coupler 11. Two signals are amplified and sent to the peak output stage matching circuit 6.

  Although the two constant voltage sources 21 and 22 supply different voltages, for example, one constant voltage source may supply the first voltage and the second voltage.

  GaN-HEMT has higher drain efficiency with respect to output power when the drain voltage is 40V than when the drain voltage is 50V. For this reason, the carrier amplifier 1 has high efficiency, and the peak amplifier 2 has high linearity. The drain voltage applied to the carrier amplifier 1 is not limited to 40V, but may be 38V, for example, or any other value as long as it is 50V or less.

  When the input power is small, since the peak amplifier 2 is biased so as to be in a class C operation, only the carrier amplifier 1 operates. At this time, since the drain voltage is set to 40V, the carrier amplifier 1 can obtain higher efficiency than the case where the drain voltage is set to the nominal value 50V.

  When the input power gradually increases, the carrier amplifier 1 gradually reaches the saturation transition point Pb. This saturation transition point Pb becomes several dB smaller than the saturation transition point when the drain voltage is 50V. When the saturation transition point is reached, the peak amplifier 2 set to the class C bias starts operating. For this reason, high efficiency can be obtained in a region where the back-off is 6 dB or more as a whole.

  Thus, since the drain voltage of the carrier amplifier 1 is set lower than the drain voltage of the peak amplifier 2, it can be operated as a device having different saturation output power. Therefore, high efficiency can be obtained while suppressing adjacent channel leakage power with a simple configuration.

  Further, the saturation output power can be finely adjusted according to the set value of the drain voltage of the carrier amplifier 1. Therefore, unlike the conventional patent document 1, the saturation output power does not become a jump value like 10 W, 20 W, 90 W, 180 W, or the like.

  FIG. 3 is a diagram showing drain efficiency with respect to output power when 40 V or 50 V is applied to each of the carrier amplifier and the peak amplifier of the Doherty amplifier according to Embodiment 1 of the present invention. FIG. 4 is a diagram illustrating adjacent channel leakage power with respect to output power when 40 V or 50 V is applied to each of the carrier amplifier and the peak amplifier of the Doherty amplifier according to Embodiment 1 of the present invention.

  As shown in FIG. 3, when the drain voltage of the carrier amplifier 1 is 40V and the drain voltage of the peak amplifier 2 is 50V, the efficiency at the saturation transition point Pb is highest, and the drain voltage of the carrier amplifier 1 is 50V and the peak amplifier. It can be seen that higher efficiency is obtained than when the drain voltage of 2 is 50V.

  As shown in FIG. 4, when the drain voltage of the carrier amplifier 1 is 40 V and the drain voltage of the peak amplifier 2 is 50 V, the adjacent channel leakage power is near the carrier amplifier 1 near the output power to be used (45 dBm in this example). As in the case of the drain voltage of 50 V and the drain voltage of the peak amplifier 2, it can be seen that the adjacent channel leakage power (in this example, −35 dBc) is less than or equal to.

(Block C comprising carrier output stage matching circuit 5 and peak output stage matching circuit 6)
When the drain voltage applied to the carrier amplifier 1 is 40 V, 50 V, or any other voltage, the load impedance of the GaN-HEMT changes, so that each load impedance is different. For this reason, the carrier output stage matching circuit 5 is matched with the load impedance of the carrier amplifier 1 and the impedance viewed from the combined point of the output of the carrier amplifier 1 and the output of the peak amplifier 2 is opened. It has a long line length. As a result, a high distortion characteristic can be obtained with high efficiency and an applied drain voltage. The peak output stage matching circuit 6 has a line length for matching with the load impedance of the peak amplifier 2.

  In addition, since the impedance when the peak amplifier 2 is viewed from the synthesis point is set to be open, when only the carrier amplifier 1 is operating, there is almost no power leakage to the peak amplifier 2 side. There is no loss.

  The output of the carrier output stage matching circuit 5 and the output of the peak output stage matching circuit 6 are combined and output from the output terminal OUT via the quarter-wave 35 Ω line 14. The 35Ω line 14 is matched with the impedance 50Ω of a load (not shown) connected to the output terminal at the combination point of the output of the carrier output stage matching circuit 5 and the output of the peak output stage matching circuit 6 (impedance 25Ω at this combination point). The impedance is converted to take.

(Block A composed of phase correcting line 13)
When the drain voltage applied to the GaN-HEMT of the carrier amplifier 1 and the peak amplifier 2 is 40 V, 50 V, or other voltage, the passing phases of the devices are different from each other. In this case, since the drain voltage 40V of the carrier amplifier 1 is lower than the drain voltage 50V of the peak amplifier 2, the passing phase of the device is delayed in the carrier amplifier 1. Therefore, when the line lengths from the hybrid coupler to the amplifiers 1 and 2 are equal, when the large signal is operated, the output of the carrier amplifier 1 and the output of the peak amplifier 2 are combined at the combining point by the passing phase difference. Loss occurs. Therefore, the circuit according to the present embodiment includes the phase correction line 13.

  The phase correction line 13 performs phase correction based on the line length so as to eliminate the phase difference. That is, the line length from the 90 ° hybrid coupler 11 to the input terminal of the carrier amplifier 1 and the 90 ° hybrid coupler 11 to the peak amplifier according to the passing phase difference between the carrier amplifier 1 and the peak amplifier 2 due to the drain voltages 40V and 50V. The line length to the input end of 2 is different.

  When the phase is adjusted on the device side, impedance matching in accordance with high linearity and high efficiency is shifted. Therefore, it is better to adjust the phase by the phase correction line 13 on the input side. Here, if the passing phase of the peak amplifier 2 is, for example, 100 ° and the passing phase of the carrier amplifier 1 is, for example, 80 °, the phase correcting line 13 sets the phase to 20 ° according to the line length.

(Specific example of Example 1)
FIG. 2 is an actual circuit diagram in which the Doherty amplifier according to Embodiment 1 of the present invention is configured by a pattern formed on a substrate. In FIG. 2, the input terminal is connected to the first terminal of the 90 ° hybrid coupler 11 via the line pattern P1, and the second terminal is connected to the 50Ω termination 12 via the line pattern P2.

  The third terminal of the 90 ° hybrid coupler 11 is connected to the gate electrode G1 of the carrier amplifier 1 via the line pattern P3 and the line pattern P4. The fourth terminal of the 90 ° hybrid coupler 11 is connected to the gate electrode G2 of the peak amplifier 2 via the line pattern P5. The total line length of the line pattern P3 and the line pattern P4 is set to be longer than the line length of the line pattern P5, and the protruding line pattern P4 corresponds to the phase correction line 13, and the phase is corrected by this line length. Is done.

  A voltage is applied to the drain electrode D1 of the carrier amplifier 1 from the constant voltage source 21 (the negative electrode side is grounded), and the source electrode S1 is grounded. A voltage is applied to the drain electrode D2 of the peak amplifier 2 from a constant voltage source 22 (the negative electrode side is grounded), and the source electrode S2 is grounded. The drain electrode D1 of the carrier amplifier 1 is connected to the input end (synthesis point) of the 35Ω line 14 via the line pattern P6 and the protruding line pattern P7. The drain electrode D2 of the peak amplifier 2 is connected to the input end (synthesis point) of the 35Ω line 14 through the line pattern P8 and the protruding line pattern P9.

  Each of the impedance of the line pattern P6 and the line pattern P7 and the impedance of the line pattern P8 and the line pattern P9 is 50Ω, and since these are parallel at the synthesis point, the impedance is 25Ω at the synthesis point. The line pattern P10 constitutes a 35Ω line 14 and is composed of a ¼ wavelength line.

  Each line pattern is composed of a pattern formed on a substrate, and each characteristic impedance includes its pattern length, pattern width, pattern thickness, substrate relative dielectric constant, substrate thickness, and signal to be passed. It is determined by the frequency.

  The Doherty amplifier of the present invention can be applied to a power amplifier used for a mobile phone or the like.

1 is a circuit diagram illustrating a configuration of a Doherty amplifier according to Embodiment 1 of the present invention. FIG. FIG. 2 is an actual circuit diagram in which the Doherty amplifier according to the first embodiment of the present invention is configured by a pattern formed on a substrate. It is a figure which shows the drain efficiency with respect to output electric power when 40V or 50V is applied to each of the carrier amplifier and peak amplifier of the Doherty amplifier which concerns on Example 1 of this invention. It is a figure which shows adjacent channel leakage electric power with respect to output electric power when 40V or 50V is applied to each of the carrier amplifier of the Doherty amplifier which concerns on Example 1 of this invention, and a peak amplifier. It is a figure which shows the efficiency with respect to the output power in the small signal level of a conventional Doherty amplifier, and a large signal level. It is a circuit diagram which shows the structure of the conventional Doherty amplifier. It is a circuit diagram which shows the structure of the other conventional Doherty amplifier.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Carrier amplifier, 2 ... Peak amplifier, 3 ... 1/4 wavelength transmission line, 4 ... 1/4 wavelength transmission line, 5 ... Carrier output stage matching circuit, 6 ... Peak output stage matching circuit, 7 ... Directional coupler , 8 ... Quadrature splitter, 9 ... Detector, 10a, 10b ... Bias control circuit, 11 ... 90 ° hybrid coupler, 12 ... 50Ω termination, 13 ... Phase correction line, 14 ... 35Ω line, 21, 22 ... Constant voltage source , P1 to P10 ... line patterns, G1, G2 ... gate electrodes, S1, S2 ... source electrodes, D1, D2 ... drain electrodes.

Claims (5)

A constant voltage source for supplying a first voltage and a second voltage different from the first voltage; and an amplifying unit, the amplifying unit comprising:
A distribution circuit for distributing the input signal;
A carrier amplifier that applies a first voltage of the constant voltage source between main electrodes and constantly amplifies one of the signals distributed by the distribution circuit;
A peak amplifier that amplifies the other signal distributed by the distribution circuit when the second voltage of the constant voltage source is applied between the main electrodes and the input signal is equal to or higher than a predetermined level;
An Doherty amplifier, comprising: an output terminal that combines and outputs the output of the carrier amplifier and the output of the peak amplifier.   2. The Doherty amplifier according to claim 1, wherein the value of the first voltage applied to the carrier amplifier is set to be less than the value of the second voltage applied to the peak amplifier.   In accordance with a passing phase difference between the carrier amplifier and the peak amplifier due to the first voltage and the second voltage, a line length from the distribution circuit to the input terminal of the carrier amplifier, and from the distribution circuit to the peak amplifier, 3. The Doherty amplifier according to claim 1, wherein the line length to the input end is different. A distribution circuit for distributing the input signal;
A carrier amplifier that always amplifies one of the signals distributed by the distribution circuit;
A peak amplifier that amplifies the other signal distributed by the distribution circuit when the input signal is above a predetermined level;
An output terminal for combining and outputting the output of the carrier amplifier and the output of the peak amplifier;
A Doherty amplifier, wherein a line length from the distribution circuit to an input end of the carrier amplifier is different from a line length from the distribution circuit to an input end of the peak amplifier.   5. The Doherty amplifier according to claim 4, wherein the peak amplifier and the carrier amplifier are composed of devices of the same specification, and different bias voltages are applied.

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