JP2008112143A - Source-follower type analogue buffer, compensating operation method thereof, and display using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a source-follower type analogue buffer, a compensating operation method thereof, and a display using the same. <P>SOLUTION: The source-follower-type analogue buffer with an active load, the new compensating operation and the display with the source-follower-type analogue buffers are provided to reduce an error voltage which is a difference between an input voltage and an output voltage of the analogue buffer. The source-follower type analogue buffer can also minimize the variation from both the charging time and the device characteristics and maximize the range of the input voltage. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

  The present invention relates to an analog buffer. More particularly, the present invention relates to a source follower type analog buffer using a poly-Si TFT for an active matrix display.

  By using a low-temperature poly-Si (LTPS) thin film transistor (TFT), a driver circuit can be peripherally integrated in a pixel panel of an active matrix display based on a high current driving capability. However, it is well known that it is very difficult to integrate the entire drive circuit including the poly-Si TFT because the poly-Si TFT has low characteristics and non-uniformity compared to a single crystal Si large-scale integrated circuit (LSI). . Among the driving circuits using poly-Si TFTs, the analog buffer is indispensable for driving the load capacity of the data bus of the panel. The source follower appears to be suitable as an analog buffer circuit for “system on panel (SOP)” technology because of its simple configuration and low power loss.

FIG. 1A shows a typical source follower 100 constructed using LTPS TFTs provided in an active matrix display. The gate of the TFT 110 in the source follower 100 connected to the input voltage Vin and the drain of the TFT 110 is connected to the operating voltage Vdd. The source of the TFT 110 is grounded via a load capacitor (Cload). The waveform of the output voltage Vout of the source follower 100 is shown in FIG. 1B. As shown in the figure, the final output voltage Vout is not maintained constant, but when the threshold voltage of the TFT 110 is Vth, it is higher than the value Vin-Vth expected in principle. . This is due to the current below the threshold. As shown in FIG. 1C illustrating the curve of the drain current (I _D ) and the gate-source voltage (V _GS ) of the TFT 110, the fluctuation below the threshold value of the LTPS TFT is about 0.3 V / dec. This is much higher than in the case of a metal oxide semiconductor field effect transistor (MOSFET) (0.06 V / dec). For this reason, a typical source follower 100, when used as an analog buffer for an active matrix display, depends on the charging time for various product specifications, including the frame rate of the active matrix display. The output voltage is not constant.

  FIG. 2A shows a source follower according to another prior art which is provided in a liquid crystal display and is configured by using a poly-Si TFT. The source follower 200 includes TFTs (M1 and M2), a capacitor C1, and a plurality of switches S1 to S4. The node N1 connected to the input voltage Vin via the switch S1 is connected to the node N2 under the control of the switch S2, and further connected to the gate of the TFT (M1). The node N2 is connected to the node N3 under the control of the switch S3, and further connected to the node N4. The node N3 is connected to one terminal of the capacitor C1 and the gate terminal of the TFT (M2). Node N4 is connected to the data line under the control of switch S4. The voltage level of the node N4 is the output voltage Vout of the source follower 200. The source of the TFT (M1) is grounded, and the drain of the TFT (M1) is connected to a node N4 that is an output terminal. The TFT (M2) is a PMOS transistor, the drain of the TFT (M2) is connected to the operating voltage Vdd, and the source of the TFT (M2) is connected to the node N4.

  FIG. 2B shows the relationship between the input voltage Vin and the output voltage Vout by reference numeral 210. If the source follower is perfect, the output voltage Vout should be equal to the input voltage Vin. However, actually, the input voltage Vin and the output voltage Vout are different from each other, and an error voltage equal to the difference is generated. As indicated by reference numeral 220, when the input voltage Vin increases, a difference occurs between the output voltage Vout and the input voltage Vin. When the input voltage Vin is changed between 2.5V and 8V, an error voltage is generated. Takes a value between about 80 mV and about 175 mV. When the output voltage of the source follower is high for driving in the display, for example, 10 V, the error voltage does not have a serious influence on the driving operation. However, when the output voltage of the source follower is low for driving in the display voltage, for example, in the case of 0.5V to 2V, the error voltage becomes higher than the voltage of 1 gray scale, and the display image quality is serious. May have an effect.

  For this reason, an object of the present invention is to provide a source follower type analog buffer having an active load, which suppresses an error voltage, minimizes variations based on both charging time and device characteristics, and provides a range of input voltage. A new compensation operation method is developed to maximize

  One embodiment of the present invention provides a display comprising an analog buffer and a plurality of source follower analog buffers that drive the load capacity of a plurality of data buses. The analog buffer includes a storage capacitor, a drive transistor, and an active load. The storage capacitor has a first terminal connected to the operating voltage source via the first switch, and a second terminal connected to the input terminal of the source follower type analog buffer via the third switch. The drive transistor has a gate terminal connected to the first terminal of the storage capacitor, a drain terminal connected to the operating voltage source, and a source terminal connected to the second terminal of the storage capacitor via the second switch. In the active load, the first terminal is connected to the output terminal of the source follower type analog buffer and the source terminal of the driving transistor via the fourth switch, the second terminal is grounded, and is controlled by the bias voltage. The input terminal of the source follower type analog buffer is connected to the output terminal of the source follower type analog buffer via a fifth switch.

  Since the first switch and the second switch are turned on in the compensation period, the voltage drop is accumulated in the storage capacitor, and in the data input period, the input voltage is shifted to the H logic level, and the first switch and the second switch are turned off. Thus, the third switch and the fourth switch are turned on, the input voltage is applied to the gate terminal of the driving transistor, and the voltage difference is held in the storage capacitor. Therefore, the output voltage of the analog buffer is stored in the storage capacitor. Compensated by voltage.

  An embodiment of the present invention provides a method for compensating an analog buffer as described above. The analog buffer has a drive transistor and a load capacitor. The storage capacitor and the first switch are disposed between the gate terminal and the source terminal of the driving transistor, the drain terminal of the driving transistor is connected to the operating voltage source, and the load capacitor is disposed between the connection of the switch and the source terminal and the ground. Established. The input terminal of the source follower type analog buffer is connected to the output terminal of the source follower type analog buffer via the second switch. According to the compensation operation method, in the compensation period, the first switch is turned on, the storage capacitor is connected to the operating voltage source, and the voltage drop is stored in the storage capacitor. In the data input period, in the first period of the data input period, the input voltage is applied to the connection between the storage capacitor and the first switch, the input voltage is applied to the gate terminal of the drive transistor, and the voltage difference is the storage capacitor. The output voltage of the analog buffer is compensated by the voltage stored in the storage capacitor, and in the second period of the data input period, the second switch is turned on and the input terminal of the source follower type analog buffer becomes the source follower. Connected to the output terminal of the analog buffer.

  In order to explain the above-mentioned and other objects, features, and effects of the present invention, preferred embodiments will be described in detail below with reference to the drawings.

  Both the foregoing general description and the following detailed description are for illustrative purposes only and serve to explain the claimed invention in further detail.

  The accompanying drawings are provided to enhance the understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and are used in conjunction with the specification to explain the principles of the invention.

FIG. 3 is a schematic block diagram illustrating a typical source follower configured with LTPS TFTs provided in an active matrix display.

It is a figure which shows the waveform of the output voltage Vout of the source follower of FIG. 1A.

A drain current (I _D ) and a gate-source voltage (V _GS ) curve of the TFT 110 shown in FIG. 1A are shown.

Indicates the source follower.

The waveform of the output voltage of the source follower shown to FIG. 2A is shown.

1 shows a source-follower analog buffer with an active load.

3B shows a compensation operation used in the source follower type analog buffer of FIG. 3A. 3B shows a compensation operation used in the source follower type analog buffer of FIG. 3A.

1 shows a source-follower analog buffer with an active load.

FIG. 4B shows a compensation operation used for the source follower type analog buffer of FIG. 4A. FIG. FIG. 4B shows a compensation operation used for the source follower type analog buffer of FIG. 4A. FIG.

1 illustrates a source follower analog buffer with an active load, in accordance with a preferred embodiment of the present invention.

FIG. 5B shows a compensation operation used in the source follower type analog buffer of FIG. 5A. FIG.

5 shows the result of simulating the source follower type analog buffer shown in FIG. 5A by changing the input voltage.

It is a figure which shows the relationship between the input voltage Vin and the output voltage Vout in the source follower type analog buffer of FIG. 5A.

It is a figure which shows the relationship between the input voltage Vin and the error voltage in the source follower type | mold analog buffer of FIG. 5A.

It is a figure which shows the result of having performed the simulation of the source follower type | mold analog buffer of FIG. 3A based on the Monte Carlo method, setting an input voltage to 4V, 5V, or 6V.

The standard deviation of the output voltage corresponding to Vbias and the power consumption of the Chung analog buffer, the Kida double offset canceling analog buffer, and the analog buffer according to the present invention obtained by simulation based on the Monte Carlo method are shown.

A schematic diagram of an analog buffer with an active load of Chung and the principle of operation of the analog buffer are shown.

8C shows the result of simulation based on the Monte Carlo method for variation in output voltage of the Chung analog buffer shown in FIG. 8A.

2 shows a double offset canceling analog buffer with Kida active load.

The result of having simulated the variation in the output voltage of the double offset canceling analog buffer provided with the active load of Kida based on the Monte Carlo method is shown.

It is a figure which compares the result of having simulated the standard deviation of the output voltage of the conventional source follower, Chung's analog buffer, Kida's double offset canceling analog buffer, and the analog buffer concerning the present invention based on the Monte Carlo method.

The standard deviation of the output voltage corresponding to Vbias and the power consumption of the Chung analog buffer, the Kida double offset canceling analog buffer, and the analog buffer according to the present invention obtained by simulation based on the Monte Carlo method are shown.

1 is a diagram showing a display according to an embodiment of the present invention, which includes a plurality of source follower type analog buffers for driving load capacities of a plurality of data buses provided in the display. FIG.

  The present invention provides a source follower type analog buffer having an active load. In order to reduce the error voltage that is the difference between the input voltage and the output voltage of the analog buffer, a compensation operation method is newly developed. The source follower type analog buffer can minimize variations based on both charging time and device characteristics, and maximize the input voltage range.

  In the parent application (filing date: February 16, 2006, serial number: 11 / 356,160, title of the invention: “Source follower type analog buffer, compensation method thereof and display using the same”) The entire contents of that patent application are hereby incorporated by reference and form part of this specification, with the addition of an active load 320, as shown in Figure 3A. The active load 320 is configured to have a relatively long channel length (L) in order to minimize the DC current and reduce the kink effect. 3B, it is clear that the desaturation phenomenon of the output voltage Vout is reduced, and therefore, the source photo with the active load is reduced. Wah 300, in that it has a resistance to variations in the charging time, and better.

  However, when the source follower shown in FIG. 3A is used as it is for an analog buffer of an active matrix display, variations in the LTPS thin film transistor (TFT), for example, regarding threshold voltage or mobility are taken into consideration. FIG. 3C also shows the simulation of the output voltage (Vout) waveform and the operation time of the source follower when the input voltage Vin is set to 4 volts or 6 volts and applied to the source follower. It can be seen that the typical source follower has a large variation due to the variation of LTPS TFTs.

  FIG. 4A shows a source follower type analog buffer 400 with an active load 420. The source follower type analog buffer 400 has been proposed in the above-mentioned parent application and is also introduced in this specification. The source follower type analog buffer 400 includes a driving TFT 410, an active load 420, a load capacitor 430, a storage capacitor 440, and a plurality of switches S1 to S4. The driving TFT 410 is a thin film transistor (TFT), for example, a low temperature poly-Si TFT. The active load 420 is a thin film transistor (TFT), and the gate terminal is always biased at the voltage level Vbias.

  The node N1 connected to the input voltage Vin is connected to the node N2 under the control of the switch S3. Node N2 is connected to one terminal of storage capacitor 440, and further connected to node N5 under the control of switch S2. The node N3 is connected to the other terminal of the storage capacitor 440 and the gate terminal of the driving TFT 410, and further connected to the node N4 under the control of the switch S1. The node N4 is connected to the operating voltage Vdd and is connected to the drain terminal of the driving TFT 410. The node N5 is connected to the active load 420 and the source terminal of the driving TFT 410, and further connected to the node N6 under the control of the switch S4. Node N6 is connected to load capacitor 430. The voltage level of the node N6 is the output voltage Vout of the source follower type analog buffer 400.

  In the above parent application, a compensation operation method for minimizing variations based on both charging time and device characteristics and maximizing the input voltage range is proposed. An alternative example of the compensation operation method is shown in FIGS. 4B and 4C. First, refer to FIG. 4B together with the analog buffer 400 shown in FIG. 4A. At time t0, the gate voltage of the TFT used as the active load 420 is always biased by the voltage level Vbias. In the compensation period T1, the switches S1 and S2 are turned on from time t0 to time t1, and the switch S1 is turned off at time t1. At the end of the compensation period T1, that is, at time t2, the switch S2 is turned off. In this way, the voltage drop is stored in the storage capacitor 440.

  In the data input period T2, the input voltage Vin is shifted to the H logic level, applied to the node N1, and the switches S3 and S4 are turned on. The input voltage Vin is applied to the gate terminal of the driving TFT 410, and the voltage difference is held in the storage capacitor 440. In this way, the output voltage is compensated by the voltage stored in the storage capacitor 440.

  Please refer to FIG. 4C together with the analog buffer 400 shown in FIG. 4A for another example of the compensation operation. At time t0, the gate voltage of the TFT used as the active load 420 is always biased at the voltage level Vbias. In the compensation period T1, the switches S1 and S2 are turned on over the entire period. At the end of the compensation period T1, that is, at time t1, the switches S1 and S2 are turned off. For this reason, the voltage drop is stored in the storage capacitor 440. In the data input period T2, the input voltage Vin is shifted to the H logic level, applied to the node N1, and the switches S3 and S4 are turned on. The input voltage Vin is applied to the gate terminal of the driving TFT 410, and the voltage difference is held in the storage capacitor 440. In this way, the output voltage is compensated by the voltage stored in the storage capacitor 440.

  However, the present invention proposes a new structure in view of the error voltage which is the difference between the input voltage and the output voltage of the analog buffer. Please refer to FIG. 5A showing a source follower type analog buffer 500 with an active device 520, according to a preferred embodiment of the present invention. The source follower type analog buffer 500 includes a driving TFT 510, an active load 520, a storage capacitor 530, and a plurality of switches S1 to S5. The driving TFT 510 is a thin film transistor (TFT), for example, a low temperature poly-Si TFT. The active load 520 is a thin film transistor (TFT), and the gate terminal is always biased with the voltage Vbias.

  The node N1 connected to the input voltage (Vin) source is connected to the node N2 under the control of the switch S3, and further connected to the node N6 under the control of the switch S5. Node N2 is connected to one terminal of storage capacitor 530 and further connected to node N5 under the control of switch S2. The node N3 is connected to the other terminal of the storage capacitor 530 and the gate terminal of the driving TFT 510, and further connected to the node N4 under the control of the switch S1. The node N4 is connected to the operating voltage Vdd and is connected to the drain terminal of the driving TFT 510. Node N5 is connected to active load 520 and the source terminal of drive TFT 510, and is further connected to node N6 under the control of switch S4. The voltage level of the node N6 is the output voltage Vout of the source follower type analog buffer 500.

  The compensation operation method proposed by the present invention reduces the error voltage of the difference between the input voltage and the output voltage, further minimizes variations based on both charging time and device characteristics, and maximizes the input voltage range. The purpose is to do. An example of the operation principle according to an embodiment of the present invention is shown in FIG. 5B. First, refer to FIG. 5B together with the analog buffer 500 shown in FIG. 5A. At time t0, the gate voltage of the TFT used as the active load 520 is always biased to the voltage level Vbias. In the compensation period T1, the switches S1 and S2 are turned on from time t0 to time t1, and the switch S1 is turned off at time t1. At the end of the compensation period T1, that is, at time t2, the switch S2 is turned off. For this reason, the voltage drop is stored in the storage capacitor 530.

  Between time t2 and time t3 in the data input period T2, the input voltage Vin is shifted to the H logic level, applied to the node N1, and the switches S3 and S4 are turned on. The input voltage Vin is applied to the gate terminal of the driving TFT 510, and the voltage difference is held in the storage capacitor 530. In this way, the output voltage is compensated by the voltage stored in the storage capacitor 530. Between time t3 and time t4 in the data input period T2, the switches S3 and S4 are turned off, and the switch S5 is turned on to connect the output voltage Vout to the input voltage Vin. The influence exerted by the error voltage, which is the difference between the input voltage and the output voltage of the analog buffer 500, can be greatly reduced by connecting the output voltage Vout to the input voltage Vin between time t3 and time t4.

  FIG. 6A shows a simulation result of the source follower type analog buffer 500 shown in FIG. 5A when the input voltage is changed. In the figure, the simulation of the waveform of the output voltage (Vout) of the source follower type analog buffer 500 is associated with the operation time. According to the source follower type analog buffer 500 proposed by the present invention and the compensation operation method used therefor, it is possible to minimize variations based on both charging time and device characteristics and maximize the input voltage range. . The charging time of the source follower type analog buffer 500 proposed by the present invention is shorter than 15 μs (microseconds), and the charging time of the conventional source follower type is longer than that of the present invention. As can be seen from FIG. 6A, the charging time is about 8 μs.

  FIG. 6B shows the relationship between the input voltage Vin and the output voltage Vout of the source follower type analog buffer 500 proposed by the present invention. There is a linear relationship between the input voltage Vin and the output voltage Vout, but the linearity is improved. The voltage difference between the input voltage Vin and the output voltage Vout is greatly reduced. Therefore, it can be seen that the error voltage is reduced by the source follower type analog buffer 500 proposed by the present invention and its compensation operation method. FIG. 6C shows the relationship between the input voltage Vin and the error voltage in the source follower type analog buffer 500 proposed by the present invention. The error voltage decreases and is lower than 0.05 (5.00E-02) V, which is significantly lower than that of the conventional source follower type analog buffer.

FIG. 7A shows the result of simulating the source follower type analog buffer 500 shown in FIG. 5A based on the Monte Carlo method with the input voltage set to 4V, 5V or 6V. In the figure, the simulation of the output voltage (Vout) waveform of the source follower type analog buffer 500 and the operation time are related to each other. To variations between devices examine what effect the circuit performance, the average value and the deviation of the threshold voltage and mobility ^{1V, 1V, 77.1cm 2 / vs} , as 20 cm ² / vs, usually The simulation was performed based on the Monte Carlo method. A plurality of LTPS TFTs used for circuit simulation are different. Compared with the result of the source follower 200 shown in FIG. 2A, it is clear that the variation of the source follower 200 due to the variation of LTPS TFT is much larger than that of the source follower type analog buffer 500 shown in FIG. 5A. I understand.

  The source follower type analog buffer according to the present invention has high resistance to variations in characteristics of poly-Si TFTs, can simplify the configuration, has low power consumption, and has variations in signal timing (that is, an unsaturation phenomenon). ) Can be minimized. The source-follower analog buffer according to the present invention is suitable for use in an active matrix display, such as an active matrix liquid crystal display (AMLCD) or an active matrix organic light emitting display (AMOLED). More particularly, the source-follower analog buffer according to the present invention is suitable for use in AMLCD or AMOLED “system on panel” technology. The analog buffer proposed by the present invention is indispensable for driving the load capacity of the data bus of the panel, among drive circuits using poly-Si TFTs.

  In the related technical field, several types of source follower type analog buffers having an active load have been proposed. 8A shows a schematic diagram of an analog buffer with Chung active load and its operating principle (HJ Chung, SW Lee and CH Han, IEEE Electronics Letters, Vol. 37, p1093). 2001) and FIG. 8B show the result of simulating the variation in the output voltage by the Monte Carlo method. 9A shows an analog buffer (Y. Kida, Y. Nakajima, M. Takatoku, M. Minegishi, S. Nakamura, Y. Maki, and T. Maekawa, EURODISPLAY, p831, 2002) with an active load of Kida. FIG. 9B shows the result of simulation by the Monte Carlo method.

  FIG. 10A is a diagram comparing the results of simulating the standard deviation of the output voltage of the conventional source follower, Chung's analog buffer, Kida's double offset canceling analog buffer, and analog buffer proposed by the present invention by the Monte Carlo method. All circuits are equipped with an active load to eliminate the desaturation phenomenon. Since the analog buffer proposed by the present invention has a wide operation range and a small deviation, its advantages are clear compared with the prior art. Furthermore, the influence of the input voltage on the deviation is reduced, which reflects the good compensation in the circuit proposed by the present invention. FIG. 10B shows the standard deviation and power consumption of the output voltage associated with Vbias. According to the figure, it can be seen that Vbias needs to be appropriately set to reduce power consumption as much as possible to minimize deviation.

The source follower type analog buffer according to the present invention has high resistance to variations in characteristics of poly-Si TFTs, can simplify the configuration, has low power consumption, and has variations in signal timing (that is, an unsaturation phenomenon). ) Can be minimized, and is suitable for driving the loads of multiple data buses in an active matrix display. As shown in FIG. 11, the display includes a plurality of source follower type analog buffers to drive the load capacities of the plurality of data buses. The display 1100 includes a panel 1110, a gate driving device 1110 and a source driving device 1120. A plurality of gate lines included in the gate driving device 1110, for example, n gate lines 1112 ₁ , 1112 ₂ , 1112 ₃ ... 1112 _n are connected to the panel 1130 and a plurality of data lines included in the source driving device 1120. For example, m data lines 1122 ₁ , 1122 ₂ , 1122 ₃ ... 1122 _m are connected to the panel 1130, and the gate lines and the data lines cross each other to form an array. A plurality of pixels are disposed between the intersections of the gate lines and the data lines.

The source drive device 1120 includes, for example, a shift register 1121, a data latch circuit 1123, a level shifter 1125, a digital / analog converter 1127, and a buffer device 1129. Buffer device 1129 includes corresponding data lines 1122 ₁ , 1122 ₂ . 1122 _3, is connected to the · · · 1122 _m, m pieces of buffer 1129 _1, 1129 _2, 1129 _3, with · · · 1129 _m. The buffer units 1129 ₁ , 1129 ₂ , 1129 ₃ ,... 1129 _m are analog buffers according to the above-described embodiments of the present invention. The source follower type analog buffer according to the present invention is suitable for use in “system on panel (SoP)” technology for AMLCD or AMOLED. The analog buffer proposed by the present invention is indispensable for driving the load capacity of the data bus of the panel, among drive circuits using poly-Si TFTs.

  It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. Therefore, the present invention includes modifications and variations of the present invention as long as they are within the scope of the claims of the present invention and the equivalents thereof.

Claims (6)

A source follower type analog buffer,
One first terminal is connected to one operating voltage source via one first switch (S1), and one second terminal is connected to one input voltage (Vin) via one third switch (S3). A storage capacitor connected to the source;
One gate terminal is connected to the first terminal of the storage capacitor, one drain terminal is connected to the operating voltage source, and one source terminal is connected to the storage capacitor via one second switch (S2). One drive transistor connected to the second terminal;
One first terminal is connected to one output terminal of the source follower type analog buffer and the source terminal of the driving transistor via one fourth switch (S4), and one second terminal is grounded. An active load controlled by a bias voltage of
The source follower type analog buffer, wherein the input voltage source is connected to the output terminal of the source follower type analog buffer via one fifth switch (S5). The source follower type analog buffer according to claim 1, wherein the driving transistor and the active load are low-temperature poly-Si (LTPS) thin film transistors (TFTs). A display, comprising a plurality of source follower type analog buffers for driving load capacities of a plurality of data buses provided in the display, each of the plurality of source follower type analog buffers,
One first terminal is connected to one operating voltage source via one first switch (S1), and one second terminal is connected to one input voltage source via one third switch (S3). A storage capacitor,
One gate terminal is connected to the first terminal of the storage capacitor, one drain terminal is connected to the operating voltage source, and one source terminal is connected to the storage capacitor via one second switch (S2). One drive transistor connected to the second terminal;
One first terminal is connected to one output terminal of the source follower type analog buffer and the source terminal of the driving transistor via one fourth switch (S4), and one second terminal is grounded. One active load controlled by a bias voltage of
The input voltage source is connected to the output terminal of the source follower type analog buffer via a fifth switch (S5). The display according to claim 3, wherein the driving transistor and the active load are low-temperature poly-Si (LTPS) thin film transistors (TFTs). A method of compensating an analog buffer, wherein the analog buffer has one drive transistor and one load capacitor, and one storage capacitor and one first switch are connected to one gate terminal of the drive transistor. The drain terminal of the driving transistor is connected to one operating voltage source, and the load capacitor is arranged between the connection of the switch and the source terminal and the ground. The one input voltage source is connected to one output terminal of the source follower type analog buffer through one second switch, and the compensation operation method is such that the first switch is turned on in one compensation period, A storage capacitor is connected to the operating voltage source and a voltage drop is stored in the storage capacitor;
In one data input period, in the first period of the data input period, one input voltage is applied to one connection between the storage capacitor and the first switch, and the gate terminal of the drive transistor Is supplied with the input voltage, the voltage difference is held in the storage capacitor, one output voltage of the analog buffer is compensated by the voltage stored in the storage capacitor, and the first input of the data input period In the second period, the second switch is turned on and the input voltage source is connected to the output terminal of the source follower type analog buffer. The compensation operation method according to claim 5, wherein the first switch is turned off for a predetermined time after the storage capacitor connected to the operating voltage source is stopped.

Images