JP2008028295A - Power semiconductor module and manufacturing method thereof - Google Patents

Abstract

A highly reliable power semiconductor module that does not cause defects such as cracking and peeling with respect to a thermal cycle, and a method for manufacturing the same, and a power semiconductor module that does not cause defects such as misalignment in the manufacturing process and the manufacture thereof Providing a method.
A power semiconductor element, an insulating substrate, and a heat sink are provided. At least one of the power semiconductor element and the insulating substrate and between the insulating substrate and the heat sink is Cu. layer, the power semiconductor module and the manufacturing method thereof joined in a stacked structure formed by laminating in this order Cu 3 _Sn layer and the Cu layer.
[Selection figure] None

Description

  The present invention relates to a power semiconductor module and a manufacturing method thereof, and more specifically, a highly reliable power semiconductor module that does not cause defects such as cracking and peeling with respect to a thermal cycle and a manufacturing method thereof. The present invention relates to a power semiconductor module that does not cause problems such as misalignment and a manufacturing method thereof.

  In general, the power semiconductor module has a configuration in which an insulator is provided on the power semiconductor so that the power semiconductor and the current conducting portion are electrically insulated. The power semiconductor and the insulator are joined by solder or the like.

  Further, in the power semiconductor module, a heat radiating plate is provided in order to efficiently dissipate the heat generated from the semiconductor element or to temporarily dissipate the heat. The heat radiating plate and the insulator are made of solder or the like. Are joined by. Therefore, in a power semiconductor module, it is common to join two places between a semiconductor element and an insulator, and between an insulator and a heat sink.

Up to now, Pb-based solder materials have been used at two joints. Especially, Pb—Sn solder material is used, and the melting point is changed in the range of about 183 to 300 ° C. by changing the ratio of Pb and Sn. Then, soldering was performed twice (for example, see Non-Patent Document 1).
However, since Pb has toxicity, it is in the direction of abolition of use, and development of a Pb-free solder material is desired.

  In addition, GaN and SiC, which are next-generation power semiconductor elements, have a heat resistance of 200 ° C. or higher, and have a large dielectric breakdown electric field, saturated electron density, etc., and therefore handle a large current using a high operating voltage. Is possible. Due to the magnitude of this current, the heat generated from the semiconductor element rises to about 200 ° C., and therefore, a heat resistance of 200 ° C. or higher is required also for the joint portion by solder.

Among the requirements for such a solder material, for example, Sn-based solder materials having various compositions such as a Sn—Ag alloy and a Sn—Cu alloy have been proposed.
However, since the melting point of the Sn-based solder material is about 220 ° C., it melts at this temperature, and the tensile strength is remarkably reduced around 200 ° C., so the next generation that generates heat exceeding 200 ° C. For power semiconductor elements, it has been practically difficult to use an Sn-based solder material as a bonding material.

  Harmless solder materials having a melting point exceeding 250 ° C. are still scattered in the research stage, and very few are in practical use. There is an example of using an Au-Sn alloy (melting point 270 ° C.) for special applications, but this alloy is a very expensive material because 80% of the whole is Au, and it is difficult to apply it to consumer equipment. is there.

  In addition, as a kind of harmless bonding material having a melting point exceeding 250 ° C., an Ag-based brazing material is generally known, but the melting point thereof is as high as 600 ° C. If used, the semiconductor element is broken or altered, so that it cannot be used in this application. Considering the manufacturing process of the semiconductor module, the upper limit temperature that can be applied to the heating at the time of bonding is about 450 ° C.

Under such circumstances, a Pb-free bonding material that can be bonded at a temperature of 450 ° C. or lower that does not affect the semiconductor element and can withstand a temperature of 200 ° C. or higher generated by the operation of the semiconductor element. It is eager.
Yoichiro Baba “Efforts to Ensure HV Inverter Quality” Outline of the National Conference of the Japan Welding Society, Chapter 77 (2005-9)

  An object of the present invention is a highly reliable power semiconductor module that does not cause defects such as cracking and peeling with respect to a thermal cycle and a method for manufacturing the same, and the power semiconductor module that does not cause defects such as misalignment in the manufacturing process And a manufacturing method thereof.

Invention of Claim 1 has a power semiconductor element, an insulating substrate, and a heat sink,
At least one of the power semiconductor element and the insulating substrate, and at least one of the insulating substrate and the heat radiating plate are joined in a laminated structure in which a Cu layer, a Cu ₃ Sn layer, and a Cu layer are laminated in this order. This is a power semiconductor module.

In the present invention, the melting points of the Cu layer and the Cu ₃ Sn layer used at the junction between the power semiconductor element and the insulating substrate or between the insulating substrate and the heat sink are about 1080 ° C. and about 640 ° C., respectively. Therefore, even when it is repeatedly used using GaN or SiC, which is a next-generation power semiconductor element, a highly reliable power semiconductor module that does not cause defects such as cracks and peeling at the joint portion is obtained.

In addition, at the interface between the Cu layer and the Cu ₃ Sn layer, an unnecessary product is not generated even by a thermal cycle of the power semiconductor module, and even if a reaction product is generated at the interface, it hardly grows. The power semiconductor module of the present invention does not cause defects such as cracks and peeling even with respect to temperature changes.

  Furthermore, in the method for manufacturing a power semiconductor module of the present invention, as described in claim 6, since the lower limit of the heating temperature at the time of bonding is the melting point of Sn (about 230 ° C.), the semiconductor element is not affected. Bonding at a temperature of 450 ° C. or lower is possible.

  The invention according to claim 2 is the power semiconductor module according to claim 1, wherein the power semiconductor element is formed using GaN or SiC.

As described above, since the melting points of the Cu layer and the Cu ₃ Sn layer used for the joint in the present invention are about 1080 ° C. and about 640 ° C., respectively, the next-generation power semiconductor element GaN or SiC is used. Even when it is repeatedly used at a high temperature exceeding ℃, it becomes a highly reliable power semiconductor module that does not cause defects such as cracks and peeling at the joint.

  Invention of Claim 3 is a power semiconductor module of Claim 1 or Claim 2, wherein the said heat sink is a laminated body which has Cu layer on both surfaces of Mo layer.

  The laminate of Cu / Mo / Cu has high thermal conductivity and effectively functions as a heat sink. The Cu / Mo / Cu laminate has a thermal expansion coefficient of about 4 ppm / K, which is close to the value of the thermal expansion coefficient of the power semiconductor element. As a result, no remarkable thermal stress is generated during the cooling / heating cycle, and defects such as cracks and peeling do not occur. Moreover, since the outermost layer of this laminated body is comprised with Cu layer, it can serve as the role of Cu layer used for a junction part.

  The invention according to claim 4 is characterized in that the ratio of the thickness of the Cu layer / Mo layer / Cu layer in the heat radiating plate is 1/5/1 to 1/12/1. It is a power semiconductor module of description.

  Among laminates of Cu layer / Mo layer / Cu layer, when the ratio of the thickness of each layer is 1/5/1 to 1/12/1, the balance between thermal conductivity and thermal expansion coefficient is particularly good Thus, the function as a heat sink is effectively exhibited.

  The invention according to claim 5 is characterized in that the insulating substrate is an AlN layer, and a conductive layer formed of a Cu layer is laminated on both surfaces of the AlN layer. It is a power semiconductor module given in any 1 paragraph.

  When the conductive layer provided on the surface of the insulating substrate is a Cu layer, since the conductivity of Cu is high, the conductive layer can be thinned and thermal stress can be reduced. Further, the Cu layer on the surface of the insulating substrate can also serve as the Cu layer of the above-described joint portion.

The invention according to claim 6 is a laminate formed by laminating at least one of a semiconductor element and an insulating substrate and between an insulating substrate and a heat sink in the order of a Cu layer, a Cu ₃ Sn layer, and a Cu layer. Having a joining process of joining with a structure,
The method for manufacturing a power semiconductor module is characterized in that the joining step includes a step of performing a melting reaction at a temperature equal to or higher than the melting point of Sn and lower than the melting point of Cu.

Since the melting point of the Cu ₃ Sn layer is about 640 ° C., if it is to be soldered as it is, heat exceeding 640 ° C. must be applied, workability is lowered, and the manufacturing cost is increased. Further, since the power semiconductor element is also heated at the time of soldering, the power semiconductor element may be destroyed or modified. From these viewpoints, the upper limit of the junction temperature applicable to the power semiconductor module is about 450 ° C.

Therefore, in the present invention, as a method for forming the Cu ₃ Sn layer, first, a Cu layer and an Sn layer are stacked on the surfaces of the members to be joined, and then the layers are stacked so that the respective Sn layers face each other. In this state, the melting reaction is performed at a temperature higher than the melting point of Sn and lower than the melting point of Cu.
When the temperature is raised to a temperature equal to or higher than the melting point of Sn and lower than the melting point of Cu, only Sn melts and the Sn layers are joined to form a liquid layer. At this time, in order to heat at a temperature lower than the melting point of Cu, the Cu layer is a solid phase, but mutual diffusion occurs between the solid phase Cu and the liquid phase Sn, and an alloy of Cu and Sn. (Cu ₃ Sn) is generated.

Therefore, according to the present invention, bonding can be performed by heating at a temperature higher than the melting point of Sn (about 230 ° C.), so that the workability of manufacturing is improved.
In addition, since the Sn layer does not remain in the joint, and all Sn is a Cu ₃ Sn alloy, the melting point of the formed joint is approximately 640 ° C. Therefore, the repeated use at a high temperature exceeding 200 ° C. does not cause defects such as cracks and peeling at the joint.

  That is, the present invention is a very useful method from the viewpoint of manufacturing workability and cost because the heating temperature at the time of bonding is lower than the melting point of the formed bonded portion. In addition, since the melting point of the formed joint is as high as about 640 ° C., repeated use at a high temperature exceeding 200 ° C. does not cause defects such as cracks and peeling at the joint.

Incidentally, the joint between the power semiconductor element and the insulating substrate, or one of the junction between the insulating substrate and the heat radiating plate, Cu layer, or a stacked structure of laminating in the order of Cu 3 _Sn layer and the Cu layer and, both the two junctions, Cu layer, or a stacked structure of laminating in the order of Cu 3 _Sn layer and the Cu layer.

  The invention according to claim 7 is the method for manufacturing a power semiconductor module according to claim 6, wherein the heating temperature in the melting reaction step is 230 ° C. or higher and 450 ° C. or lower.

The lower limit of the heating temperature in the melting reaction step is the temperature at which Sn melts, that is, the melting point of Sn (about 230 ° C.). If this temperature is exceeded, the power semiconductor module of the present invention can be manufactured. . However, with heating at about 230 ° C., it takes a long time to make all of the Sn layer into a Cu ₃ Sn layer. Therefore, a more preferable heating temperature is 250 ° C. or more in consideration of the heating time for completing the reaction.
In order to prevent the semiconductor element from being destroyed or modified by heating at the time of bonding, it is desirable to bond at a temperature of 450 ° C. or lower.

  According to the present invention, a highly reliable power semiconductor module that does not cause defects such as cracking and peeling with respect to a thermal cycle and a method for manufacturing the same, and a power semiconductor module that does not cause defects such as misalignment in the manufacturing process And a manufacturing method thereof.

The power semiconductor module of the present invention includes at least a power semiconductor element, an insulating substrate, and a heat sink, and at least between the power semiconductor element and the insulating substrate and between the insulating substrate and the heat sink. One side is joined by a laminated structure in which a Cu layer, a Cu ₃ Sn layer, and a Cu layer are laminated in this order.
In the following, first, the configuration of the power semiconductor module will be described, then each component will be described, and then the method for manufacturing the power semiconductor module will be described.

<Power semiconductor module>
In FIG. 1, the principal part sectional drawing of the power semiconductor module 10 of this invention is typically shown.
The power semiconductor module 10 includes a power semiconductor element 20, an insulating unit 30, and a heat sink 40. The power semiconductor element 20 and the insulating part 30 are joined by the first joining part 50. The insulating part 30 and the heat sink 40 are joined by the second joining part 60.

  The power semiconductor module 10 is used for an in-vehicle inverter or the like. Since an internal combustion engine (not shown) is provided around the power semiconductor module 10, the environment in which the power semiconductor module 10 is placed is considerably high. Further, when next-generation GaN or SiC is used as the power semiconductor element, heat generated from the power semiconductor element 20 is large, and the temperature of the power semiconductor module 10 rises.

  A cooling pipe (not shown) through which cooling water flows is provided so as to prevent the power semiconductor element from being destroyed by the heat generated by the power semiconductor element or the high-temperature ambient environment, and between the cooling pipe and the power semiconductor element. A heat sink 40 is provided between them.

  Therefore, in general, the performance required for the power semiconductor module is to first cause no problems such as cracking and peeling with respect to the thermal cycle, and secondly to ensure insulation by the insulating substrate, Thirdly, the heat generated from the power semiconductor element is transmitted to the heat radiating plate without accumulating as much as possible.

In order to prevent cracking, peeling, etc. from occurring in the thermal cycle, the members such as the semiconductor element, the insulating substrate, the heat radiating plate, and the bonding member must be resistant to temperature changes. It is important not to generate unnecessary reaction products in the process. Such a reaction product is a brittle substance or, on the other hand, a substance that is too hard, and easily cracks, peels off, etc. starting from the site where the reaction product is generated.
Moreover, it is important for the thermal expansion coefficient of each member to be a close value to suppress the occurrence of cracks and peeling due to the thermal cycle. When members having greatly different thermal expansion coefficients are joined, cracks, peeling, and the like are likely to occur due to a volume change of the member that repeatedly occurs due to a cooling cycle.

<First joint and second joint>
In the present invention, the first joint portion 50 is provided for joining the power semiconductor element 20 and the insulating portion 30, and the second joint portion 60 is for joining the insulating portion 30 and the heat sink 40. Provided.
In the present invention, at least one of the first joint portion 50 and the second joint portion 60 is joined in a laminated structure in which a Cu layer, a Cu ₃ Sn layer, and a Cu layer are laminated in this order. In other words, only the first bonding portion 50, or only the second joint portion 60, Cu layer, may be used as the laminated structure formed by laminating in this order Cu 3 _Sn layer and the Cu layer, the first bonding unit 50 second bonding unit 60 both the Cu layer or a layered structure formed by laminating in this order _Cu 3 Sn layer and the Cu layer.

Since the melting point of Cu at the joint is 1080 ° C. and the melting point of Cu ₃ Sn is about 640 ° C., even when repeatedly used with GaN or SiC, which are next-generation power semiconductor elements, It becomes a highly reliable power semiconductor module that does not cause defects such as peeling.

Further, generally, a reaction product is generated and grows at the interface between different substances in the joint portion by the thermal cycle, and as a result, defects such as cracks and peeling occur with respect to temperature changes.
However, in the laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer according to the present invention, an unnecessary product may be generated even at the interface between the Cu layer and the Cu ₃ Sn layer even by the thermal cycle of the power semiconductor module. However, even if a reaction product is generated at the interface, it hardly grows, so that defects such as cracks and peeling do not occur even with respect to temperature changes. It also has excellent adhesion.

In the present invention, the thickness of the Cu ₃ Sn layer is preferably 0.1 to 100 μm from the viewpoint of reliability, thermal characteristics and electrical characteristics, more preferably 0.5 to 20 μm, Preferably it is 1-10 micrometers. If it is thinner than 1 μm, the Sn layers do not sufficiently adhere to each other, and there is a possibility that a gap is formed in the joint, resulting in high thermal resistance. If it is thicker than 10 μm, a part of Sn remains and reliability decreases. There is.

  In addition, the Cu layer of the laminated structure in the joint portion may be provided as a part of the insulating portion 30 or the heat sink 40. The Cu layer provided on the surface of the insulating substrate 32 is provided as a conductive layer. When the conductive layer is a Cu layer, it is preferable because the conductivity of Cu is high, so that the conductive layer can be thinned and thermal stress can be reduced. Moreover, as shown below, when the heat sink 40 is a laminate of Cu layer 44 / Mo layer 42 / Cu layer 46 in which a Cu layer is provided on the surface of Mo, it is preferable from the viewpoint of thermal conductivity and thermal expansion coefficient. A heat sink.

  The Cu plate can be attached to the insulating unit 30 and the heat radiating plate 40 by a method such as brazing.

  As described above, the Cu layer of the laminated structure may be provided as another part of the insulating portion 30 or the heat sink 40 as described above. It is preferable to adjust.

  In the 1st junction part 50, it is preferable from a viewpoint of reliability that it is 0.1-10 micrometers as Cu layer 22 by the side of the power semiconductor element 20, More preferably, it is 0.5-5 micrometers. If it is thinner than 0.5 μm, it may be lost at the time of bonding, and if it is thicker than 5 μm, it affects the thermal expansion coefficient of the entire power semiconductor module and causes thermal stress, which is not preferable.

In addition, when forming the laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer, since a Cu ₃ Sn layer slightly thicker than the thickness of the Sn layer is obtained, the power semiconductor element 20, the insulating portion 30, and the heat sink 40 The thickness of the Sn layer provided on each surface is appropriately selected according to the desired thickness of the Cu ₃ Sn layer.

Further, the first bonding section 50 one of the second joint portion 60, the case of bonding a material other than the laminated structure of the Cu layer / Cu 3 _Sn layer / Cu layer, As the bonding material suitable known ones Can be applied. Here, either the first joint 50 or the second joint 60 may be formed first.

When a laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer is applied to the first joint, the second joint is joined at a temperature lower than the melting point (about 640 ° C.) of the Cu ₃ Sn layer. It is preferable to select a material that can be used from the viewpoint of preventing the occurrence of defects such as misalignment and inclination at the time of the second bonding, and more preferably, from the viewpoint of preventing destruction and modification of the semiconductor element due to heating. It is preferable to select a material that can be bonded at a temperature of less than or equal to ° C.
When a laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer is applied to the second junction, a material having a melting point sufficiently higher than the melting point of Sn (about 230 ° C.) at the first junction Is preferable from the viewpoint of preventing the occurrence of defects such as misalignment and inclination at the time of the second bonding, and further, a temperature of 450 ° C. or less from the viewpoint of preventing destruction or modification of the semiconductor element due to heating. It is preferable to select materials that can be joined together.

In the present invention, it is possible for both the first junction and the second junction, to apply the multilayer structure of the Cu layer / Cu 3 _Sn layer / Cu layer.

Normally, in the method of manufacturing a semiconductor module, the entire bonding process including the portion bonded at the first time is heated in the second bonding step, so that the first bonding portion does not cause displacement or inclination. The heating temperature at the time of bonding must be sufficiently lower than the melting point of the bonding material used for the first time.
That is, in a normal method for manufacturing a semiconductor module, materials having different melting points must be used for the first bonding portion and the second bonding portion. In particular, the first bonding material is the second bonding material. One having a melting point sufficiently higher than the melting point of must be selected.

However, in the manufacturing method of the present invention, as described below, after a Cu layer or a Sn layer is formed on each surface of the joining member by sputtering or plating, the layers are stacked so that the respective Sn layers face each other and come into contact with each other. In this state, the bonding can be performed by heating at a temperature at which the Sn layers are joined and the Cu ₃ Sn layer is formed.
Therefore, the lower limit of the heating temperature for bonding may be a temperature at which Sn melts, that is, a melting point (about 230 ° C.). On the other hand, since the layer formed after bonding becomes Cu layer / Cu ₃ Sn layer / Cu layer, it melts at a temperature lower than the melting point of Cu (about 1080 ° C.) and the melting point of Cu ₃ Sn (about 640 ° C.). Without causing misalignment or tilting of the joining portion.

Thus, the first joint portion and a laminated structure of the Cu layer / _Cu 3 Sn layer / Cu layer, even if also A stacked structure of the Cu layer / _Cu 3 Sn layer / Cu layer at the junction of the second, 2 The heating temperature at the time of the first bonding (the lower limit temperature is about 230 ° C. of the melting point of Sn) is sufficiently lower than the melting point of the first bonding portion (that is, the melting point of Cu ₃ Sn (about 640 ° C.)). Since it can be adjusted, it can join so that position shift, an inclination, etc. may not occur in the 1st joining part.

  Thus, in the power semiconductor module of the present invention, since the same bonding material can be applied to two bonding sites, the operation is simplified and the manufacturing space can be saved.

<Power semiconductor element>
As the power semiconductor element 20, it can apply suitably according to a use without a restriction | limiting in particular, A general Si substrate etc. can also be applied.
In the present invention, even when a GaN substrate or SiC substrate is used as the next generation device, the melting points of the Cu ₃ Sn layer and the Cu layer used for the junction are about 640 ° C. and 1080 ° C., respectively. It becomes a highly reliable power semiconductor module that does not cause defects such as cracks and peeling even at a high temperature exceeding 200 ° C. that is dissipated by repeated use of the element.

When the first bonding portion 50 has a stacked structure of Cu layer / Cu ₃ Sn layer / Cu layer, the Cu layer 22 is provided on the surface of the power semiconductor element 20 on the first bonding portion 50 side.
The thickness of the Cu layer 22 is preferably 0.1 μm to 10 μm, and more preferably 0.5 μm to 2 μm. If it is thinner than 0.1 μm, it may be dissolved in the solder material during bonding, and if it is thicker than 10 μm, the thermal expansion coefficient of the entire power semiconductor module will be affected and thermal stress will be generated, which is not preferable. .

  The Cu layer 22 can be formed by sputtering, plating, vapor deposition, or the like.

  Further, the Sn layer is provided on the surface of the Cu layer 22 as described above. The Sn layer can be formed by sputtering, plating, vapor deposition, or the like.

<Insulation part>
The insulating substrate 32 in the insulating portion 30 can be applied without particular limitation as long as it can ensure insulation, but preferably has a thermal expansion coefficient of the semiconductor element so as not to cause significant thermal stress during the cooling cycle. It has a thermal expansion coefficient comparable to the above.

Specific examples of suitable insulating substrate 32 include those formed of AlN, Si ₃ N ₄ , Al ₂ O _3, etc. Among them, AlN is preferable from the viewpoint of thermal conductivity and thermal expansion coefficient. is there.

  In addition, a conductive layer 34 is laminated on the surface of AlN in order to conduct electricity from the surface of the insulating substrate 32 on the power semiconductor element side to the semiconductor element. Moreover, in order to suppress the curvature with respect to a temperature change, it is preferable to laminate | stack the conductive layer 36 also on the heat sink 40 side.

Examples of the conductive layers 34 and 36 include Al, Cu, Mo, Ni, and the like, and among these, Al and Cu are preferable. When an Al layer is provided on the surface of AlN, plastic deformation occurs due to temperature changes and thermal stress can be relaxed. On the other hand, when a Cu layer is provided, the electrical conductivity is high, so the thickness can be reduced and thermal stress can be relaxed. Is preferred.
In particular, it is preferable that the conductive layers 34 and 36 are Cu layers because they can be provided as the Cu layer in the laminated structure of the Cu layer / Cu ₃ Sn layer / Cu layer of the joint.

  The thickness of the conductive layers 34 and 36 provided on the surface of AlN is preferably 0.01 mm to 2 mm, and more preferably 0.1 mm to 1 mm. If the thickness of the conductive layer is less than 0.01 mm, loss and heat generation due to current in the lateral direction (direction perpendicular to the stacking direction) cannot be ignored, and if it exceeds 2 mm, the entire power semiconductor module This is not preferable because the thermal expansion coefficient is affected and thermal stress is generated.

  The thickness of the conductive layers 34 and 36 provided on the surface of AlN is preferably 0.01 mm to 2 mm, and more preferably 0.1 mm to 1 mm. When the thickness of the Cu layer is less than 0.01 mm, the loss and heat generation due to the current in the lateral direction cannot be ignored. When the thickness exceeds 2 mm, the thermal expansion coefficient of the entire power semiconductor module is affected, and the heat This is not preferable because stress is generated.

  The conductive layers 34 and 36 can be attached to the insulating substrate 32 by a method such as brazing.

In the case where the conductive layers 34 and 36 are not Cu layers, a Cu layer (not shown) is formed on the surface of the insulating portion 30 on the side to be joined with the laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer.
The Cu layer can be formed by sputtering, plating, vapor deposition, or the like.

  Further, the Sn layer is provided on the surface of the Cu layer as described above. The Sn layer can be formed by sputtering, plating, vapor deposition, or the like.

<Heat sink>
The heat sink 40 can be applied without particular limitation as long as it has heat dissipation properties, but it has a sufficiently high thermal conductivity and an excellent function as a heat sink and is close to the thermal expansion coefficient of the semiconductor element. It is preferable to use it.

  Specific examples of the suitable heat sink 40 include those formed of Mo, Cu—Mo alloy, Al—SiC, Cu, Al, etc. Among them, high thermal conductivity and heat close to power semiconductor elements. Mo is preferable because it has an expansion coefficient.

  When using Mo for a heat sink, it is preferable to provide other metal layers on both sides of Mo from the viewpoint of enabling bonding, and examples of such metal layers include Cu and Ni. Among these, Cu is preferable. In particular, it is preferable that the heat dissipation plate 40 is a laminate of a Cu layer 44 / Mo layer 42 / Cu layer 46 in which a Cu layer is provided on the surface of Mo from the viewpoint of adjusting the thermal conductivity and the thermal expansion coefficient. It is.

  Thus, when the heat sink 40 is a laminated body composed of the Cu layer 44 / Mo layer 42 / Cu layer 46, the thickness ratio of each layer is 1/5/1 to 1/12/1. It is preferable that it is 1/7/1 to 1/9/1. If the Mo layer is thinner than 1/5/1, it is not preferable because it has a thermal expansion coefficient far from that of the power semiconductor element. If the Mo layer is thicker than 1/12/1, the heat dissipation function as a heat sink is not sufficiently exhibited, which is not preferable.

  As a specific layer thickness, the Cu layers 44 and 46 are preferably 0.05 mm to 1 mm, and more preferably 0.2 mm to 0.5 mm. The thickness of the Mo layer 42 is preferably 1 mm to 7 mm, and more preferably 2 mm to 4 mm.

  In order that the laminated body constituted by the Cu layer 44 / Mo layer 42 / Cu layer 46 sufficiently exhibits the heat dissipation function, the total thickness is preferably 1 mm to 8 mm, more preferably 2 mm to 5 mm. preferable.

As described above, the Cu layer 44 can also serve as the Cu layer in the stacked structure of the Cu layer / Cu ₃ Sn layer / Cu layer at the junction.

On the other hand, in the case where the second bonding portion 60 has a laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer, and the Cu layer is not provided on the surface as a part of the heat radiating plate 40, heat dissipation A Cu layer (not shown) is formed on the surface of the plate 40 on the second bonding portion 60 side.
The Cu layer can be formed by sputtering, plating, vapor deposition, or the like.

  Further, the Sn layer is provided on the surface of the Cu layer as described above. The Sn layer can be formed by sputtering, plating, vapor deposition, or the like.

In the power semiconductor module of the present invention, at the interface of each layer of the joint portion, an unnecessary product is not generated due to the thermal cycle, or even if a reaction product is generated at the interface, it hardly grows. The power semiconductor module of the present invention has high resistance to temperature changes.
In addition, since the bonding portion is formed of a Cu layer (melting point: about 1080 ° C.) having a high melting point and a Cu ₃ Sn layer (melting point: about 640 ° C.), 200 ° C. radiated by repeated use of the semiconductor element is reduced. Even when the temperature is higher than that, a highly reliable power semiconductor module that does not cause defects such as cracks and peeling.

<Manufacturing method>
In the method for manufacturing a power semiconductor module of the present invention, at least one of a semiconductor element and an insulating substrate and between an insulating substrate and a heat sink is laminated in the order of a Cu layer, a Cu ₃ Sn layer, and a Cu layer. A bonding step of bonding with a laminated structure, and the bonding step includes a step of performing a melting reaction at a temperature equal to or higher than the melting point of Sn and lower than the melting point of Cu.

Since the melting point of the Cu ₃ Sn layer is about 640 ° C., if it is intended to be melted and joined as it is, heat exceeding 640 ° C. must be applied, workability is reduced, and manufacturing costs are increased. .

Therefore, in the present invention, as a method of forming the Cu ₃ Sn layer, first, a Cu layer and an Sn layer are laminated on the surfaces of the members to be joined, and are superposed so that the respective Sn layers are opposed to and in contact with each other. Next, the temperature is raised to a temperature equal to or higher than the melting point of Sn and lower than the melting point of Cu to cause a melting reaction. At this time, only Sn melts into a liquid layer, and the Sn layers are integrated. On the other hand, although the Cu layer is a solid phase, mutual diffusion occurs between the solid phase Cu and the liquid phase Sn, and Cu ₃ Sn that is an alloy of Cu and Sn is generated. This alloy is first generated at the interface between solid phase Cu and liquid phase Sn, and then continues until the alloy grows and either Sn or Cu is no longer supplied.

In the present invention, Sn that is thinner than the Cu film thickness is used, so the rate is controlled by the supply amount of Sn, and the reaction stops when all Sn becomes an alloy. As a result, the Sn layer becomes a Cu—Sn alloy single layer, and has a structure in which the Cu layer exists on both sides thereof. Here, when the formed Cu—Sn alloy was analyzed, it was confirmed that all were Cu ₃ Sn.

Therefore, the Sn layer does not remain in the joint portion, and the Sn layer is entirely made of a Cu ₃ Sn alloy. Therefore, the melting point of the formed joint portion is about 640 ° C. Since the remaining Cu has a melting point of about 1080 ° C., even a cooling cycle at a high temperature exceeding 200 ° C. does not cause defects such as cracks and peeling at the joint.

A specific joining method will be described.
First, the first joint portion 50 is a joint portion between the power semiconductor element 20 and the insulating portion 30, for explaining a method of bonding when bonding a stack structure of the Cu layer / Cu 3 _Sn layer / Cu layer.

  First, a Cu layer is formed by sputtering on the surface of the power semiconductor element 20 on the bonding surface side, and an Sn layer is further formed by sputtering on the Cu layer. On the other hand, a Cu plate as a conductive layer is attached to the bonding surface side of the insulating portion 30 by a method such as brazing. An Sn layer is formed on the surface of the Cu plate by plating.

  The power semiconductor element 20 and the insulating part 30 are overlapped so that the Sn layers provided in the respective parts face each other and come into contact with each other, and are pressed in the stacking direction with a jig or the like so as to ensure the adhesion and uniformity of the joined part.

In this state, bonding is performed by heat treatment using a reflow method or the like in an inert gas or reducing gas atmosphere. The heating temperature is set to be equal to or higher than the melting point of Sn and lower than the melting point of Cu. If it is lower than the melting point of Sn, Sn does not melt, so it does not join. Further, the reaction between Cu and Sn does not occur, and Cu ₃ Sn is not formed. On the other hand, if it is higher than the melting point of Cu, Cu at the joint portion melts, causing a positional shift or inclination of the joint portion. In addition, the Cu layer and the Sn layer all become a liquid phase, and the whole becomes an alloy, so that a laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer is not obtained. Furthermore, the power semiconductor element is destroyed or modified.

A more preferable heating temperature at the time of joining is 230 ° C. or higher and 450 ° C. or lower. In order to prevent the semiconductor element from being destroyed by heating at the time of bonding, it is desirable to bond by heating at 450 ° C. or lower.
In addition, in the case of heating near the melting point of Sn (230 ° C.), the heating reaction time becomes long in order to convert all Sn into Cu ₃ Sn. In view of the heat reaction time, a more preferable lower limit of the heating temperature is 250 ° C.

The joining time is not limited as long as it is sufficient for Sn to completely change to Cu ₃ Sn, and it is preferable to appropriately adjust the joining time according to the joining temperature and the thickness of the Sn layer.

  In the method for manufacturing a power semiconductor module, there are two joining steps in order to join two places between the power semiconductor element and the insulating substrate or between the insulating substrate and the heat sink. In the second bonding step, the entire area including the first bonded portion is heated, so that the second bonding temperature is used for the first bonding portion so that the first bonding portion does not shift or tilt. Must be well below the melting point of the material.

Therefore, as the first bonding, when the first bonding portion 50 is bonded with a laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer, the melting points of the Cu layer and the Cu ₃ Sn layer are about 1080 ° C. and about 640 ° C. Therefore, it is desirable to select a material having a melting point sufficiently lower than 640 ° C. as the second bonding material. By selecting such a material, there is no occurrence of component misalignment or inclination in the heating during the second bonding.

Thus, the first joint portion 50 in the case of a laminated structure of the Cu layer / _Cu 3 Sn layer / Cu layer, the second joint portion 60 is a joint portion between the insulating portion 30 and the heat radiating plate 40, the Cu layer / A laminated structure of Cu ₃ Sn layer / Cu layer may be applied, or a material that can be bonded at a temperature lower than the melting point of Cu ₃ Sn (about 640 ° C.) may be applied.
For example, Sn—Cu solder material or the like can be exemplified as the bonding material of the second bonding portion 60. When soldering with an Sn—Cu solder material, heating is performed at 250 to 300 ° C., and bonding is performed.

Next, a method of joining the second joining portion 60 first by a laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer will be described.

  First, a material in which a Cu plate as a conductive layer is attached to the heat radiating plate 40 side of the insulating portion 30 by a method such as brazing is prepared, while a method such as brazing is applied to the insulating portion 30 side of the heat radiating plate 40. Prepare the one with the Cu plate attached. An Sn layer is formed on the surface of each Cu plate by plating.

The insulating portion 30 and the heat radiating plate 40 are overlapped so that the Sn layers provided in the respective portions face each other and come into contact with each other, and are pressed in the stacking direction with a jig or the like so as to ensure the adhesion and uniformity of the joint portion.
In this state, bonding is performed by heat treatment using a reflow method or the like in an inert gas or reducing gas atmosphere. The heating temperature and heating time are the same as in the case where the first bonding portion has a laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer.

Next, the first joint 50 is joined. For the first bonding portion 50, a laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer may be used, or a material that can be bonded at a temperature lower than the melting point of Cu ₃ Sn (about 640 ° C.) may be used. Good. As such a bonding material, for example, Sn—Cu solder material can be exemplified. When soldering with Sn—Cu solder material, heating is performed at 250 to 300 ° C., but Cu layer and Cu _{3 are used.} Since the melting point of the Sn layer is as high as about 640 ° C. or higher, even if it is heated at the time of joining the first joint portion 50, no component displacement or inclination occurs.

In addition, although the case where the laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer was used as a bonding material at the time of the first bonding was specifically described, as described above, Cu layer / Cu ₃ Sn layer / Cu layer The laminated structure can also be used as a bonding material for the second bonding.
In this case, as the first bonding material, a material having a melting point sufficiently higher than the melting point of Sn (about 230 ° C.) can be selected. This is preferable from the viewpoint of preventing the occurrence of inclination. From the viewpoint of avoiding damage or modification of the power semiconductor element during the first bonding, it is preferable to select a material that can be bonded at 450 ° C. or lower as the first bonding material.

  Hereinafter, the present invention will be described by way of examples, but an example of a method for manufacturing a power semiconductor module will be described, and the present invention is not limited to these examples.

[Example 1]
FIG. 2 shows the configuration of the power semiconductor module of this embodiment.

<Preparation of power semiconductor element>
A power semiconductor element using GaN was prepared, and a 5 μm Cu layer and a 2 μm Sn layer on the surface of the Cu layer were formed by sputtering.

<Preparation of insulation part>
On the other hand, a Cu plate having a thickness of 0.3 mm was attached to both surfaces of AlN as an insulating substrate by brazing to produce a Cu layer / AlN layer / Cu layer laminate.
A 2 μm Sn layer was formed on the surface of the Cu layer by plating. During plating, the non-plated surface was protected with a masking sheet or the like.

<Join the first joint>
The Sn layer of the prepared power semiconductor element and the Sn layer of the insulating part were stacked so as to face each other and contacted, and pressed by a jig of a type that pressurizes with a screw. In consideration of thermal expansion, a jig made of a molybdenum material was used, and the applied pressure was 5 MPa.
The sample and jig so pressurized were placed in a quartz tube as they were, and heat-treated at 400 ° C. for 30 minutes in an electric furnace in a flow of a reducing gas atmosphere of 5% by volume H ₂ / N ₂ .

As a result of analyzing the cross section of the joint by the EDX method and the XRD method, it was confirmed that the Sn layer did not remain and was all made of Cu ₃ Sn alloy (melting point 640 ° C.).

<Preparation of heat sink>
As a heat radiating plate, a Cu plate was attached to both surfaces of the Mo plate by brazing to produce a laminate composed of Cu layer / Mo layer / Cu layer. The thickness of the whole laminated body was 3 mm, and the ratio of the thickness of Cu layer / Mo layer / Cu layer was 1/8/1.

<Second joint>
The power semiconductor element was disposed so that the Cu layer in the insulating part joined at the first joining part and the Cu layer of the heat radiating plate face each other, and the space between them was joined at 280 ° C. with Sn—Cu solder material.

Note that (first bonding section of the laminate structure of the Cu layer / Cu 3 _Sn layer / Cu layer) first bonding portion, the bonding temperature despite a 400 ° C., after bonding 600 ° C. or higher heat resistance Therefore, the second soldering was not melted by the soldering heating with Sn—Cu, and the problem of misalignment or tilting during the second joining was not caused.

<Cooling cycle test>
The obtained power semiconductor module was subjected to a thermal cycle test.
In the present example, in the cooling / heating cycle test, a cycle between −40 ° C. and 200 ° C. was raised and lowered in 40 minutes as one cycle, and that cycle was performed for a total of 3000 cycles. The cross section of the 1st junction part after 3000 cycles and the 2nd junction part was observed with the electron microscope, and the presence or absence of defects, such as a reaction product of an interface and a crack, was investigated.
As a result, only a few cracks were observed in the first joint part, which had no practical problem, and no trouble was found that would hinder it.

[Example 2]
FIG. 3 shows the configuration of the power semiconductor module of this embodiment. Unlike Example 1, in Example 2, the insulating substrate and the heat sink were bonded first, and then the semiconductor element was bonded to the insulating substrate.

<Preparation of insulation part>
A Cu layer / AlN layer / Cu layer laminate was produced in the same manner as in Example 1. On the surface of the Cu layer on the heat sink side, a 2 μm Sn layer was formed by plating. During plating, the non-plated surface was protected with a masking sheet or the like.

<Preparation of heat sink>
In the same manner as in Example 1, a laminate composed of Cu layer / Mo layer / Cu layer was produced. The thickness of the whole laminated body was 3 mm, and the ratio of the thickness of Cu layer / Mo layer / Cu layer was 1/8/1.
On the surface of the Cu layer on the insulating part side, a 2 μm Sn layer was formed by plating. During plating, the non-plated surface was protected with a masking sheet or the like.

<Join the second joint>
The prepared Sn layer of the insulating part and the Sn layer of the heat sink were stacked so as to face each other and in contact with each other, and pressed with a screw type pressurizing jig. In consideration of thermal expansion, a jig made of a molybdenum material was used, and the applied pressure was 5 MPa.
The sample and jig so pressurized were placed in a quartz tube as they were, and heat-treated at 400 ° C. for 30 minutes in an electric furnace in a flow of a reducing gas atmosphere of 5% by volume H ₂ / N ₂ .
As a result of analyzing the cross section of the joint by the EDX method and the XRD method, it was confirmed that the Sn layer did not remain and was all made of Cu ₃ Sn alloy (melting point 640 ° C.).

<Preparation of power semiconductor element>
A power semiconductor element using GaN was prepared, and a 5 μm Cu layer was formed on the surface thereof by sputtering.

<First joint>
The power semiconductor element and the insulating portion were joined at 280 ° C. with Sn—Cu solder material.

Note that the first bonded portion (second bonded portion with a laminated structure of Cu layer / Cu ₃ Sn layer / Cu layer) has a heat resistance of 600 ° C. or higher after bonding although the bonding temperature is 400 ° C. Therefore, the second soldering was not melted by the soldering heating with Sn—Cu, and the problem of misalignment or tilting during the second joining was not caused.

<Cooling cycle test>
As a result of performing a thermal cycle test in the same manner as in Example 1, it was confirmed that there was no damage.

[Comparative Example 1]
FIG. 4 shows the configuration of the power semiconductor module of Comparative Example 1.

<Preparation of power semiconductor element>
A power semiconductor element using GaN was prepared, and a Ni layer was formed on the outermost surface by sputtering. An Au layer (not shown) was formed on the surface of the Ni layer by sputtering.

<Preparation of insulation part>
On the other hand, Al layers were pasted on both sides of AlN as an insulating substrate by brazing to produce a laminate of Al layer / AlN layer / Al layer. Further, an Ni layer was formed on the surface of the Al layer of the laminate by plating to produce an insulating part. During plating, the non-plated surface was protected with a masking sheet or the like.

<Preparation of heat sink>
A plate-like material made of a CuMo alloy was prepared and cut into a predetermined size, and then Ni layers were formed on the upper and lower surfaces by plating.

<Joint>
In the power semiconductor module of Comparative Example 1, the solder material of the joint part (first joint part) between the power semiconductor element and the insulating part is 90Pb-Sn having a Pb content of 90% by mass, and the insulating part and the heat sink The solder material of the bonding portion (second bonding portion) was 50Pb-Sn with a Pb content of 50 mass%.

  The obtained comparative power semiconductor module was also subjected to the same thermal cycle test as in Example 1. As a result, peeling occurred at the second joint between the insulating part and the heat sink. This is probably because the solid line of the solder of the bonding material (50Pb-Sn) of the second bonding portion is around 183 ° C., and melted and peeled off on the high temperature side of the thermal cycle test.

It is a figure which shows the structure of the power semiconductor module of this invention. It is a figure which shows the structure of the power semiconductor module of Example 1. FIG. It is a figure which shows the structure of the power semiconductor module of Example 2. FIG. It is a figure which shows the structure of the power semiconductor module of the comparative example 1.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Power semiconductor module 20 Power semiconductor element 22 Cu layer 30 Insulation part 32 Insulation board | substrates 34 and 36 Conductive layer 40 Heat sink 42 Mo layer 44, 46 Cu layer 50 1st junction part 60 2nd junction part

Claims (7)

A power semiconductor element, an insulating substrate, and a heat sink;
At least one of the power semiconductor element and the insulating substrate, and at least one of the insulating substrate and the heat radiating plate are joined in a laminated structure in which a Cu layer, a Cu ₃ Sn layer, and a Cu layer are laminated in this order. Power semiconductor module.   The power semiconductor module according to claim 1, wherein the power semiconductor element is formed using GaN or SiC.   3. The power semiconductor module according to claim 1, wherein the heat radiating plate is a Cu layer / Mo layer / Cu layer laminate having Cu layers on both sides of the Mo layer. 4.   4. The power semiconductor module according to claim 3, wherein the ratio of the thickness of the Cu layer / Mo layer / Cu layer in the heat radiating plate is 1/5/1 to 1/12/1.   The power semiconductor according to any one of claims 1 to 4, wherein the insulating substrate is an AlN layer, and a conductive layer formed of a Cu layer is laminated on both surfaces of the AlN layer. module. A bonding step of bonding at least one of the semiconductor element and the insulating substrate and between the insulating substrate and the heat dissipation plate in a stacked structure in which a Cu layer, a Cu ₃ Sn layer, and a Cu layer are stacked in this order; ,
The method for manufacturing a power semiconductor module, wherein the bonding step includes a step of performing a melting reaction at a temperature equal to or higher than the melting point of Sn and lower than the melting point of Cu.   The method for manufacturing a power semiconductor module according to claim 6, wherein a heating temperature in the melting reaction step is 230 ° C. or higher and 450 ° C. or lower.

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