JP2008027935A - Power semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a matter that an Si chip must be mounted as close as possible to the heat dissipating portion in order to enhance heat dissipation properties of a semiconductor module and an insulator is required between the Si chip and the heat dissipating portion in order to insure high breakdown voltage, but when solder is employed for bonding them, thermal fatigue of solder due to temperature variation during use must be prevented. <P>SOLUTION: Warpage of a semiconductor module due to contraction of resin or the coefficient of thermal expansion can be lessened by mounting an insulating substrate mounting an electric circuit such as an Si chip on two or more sides of a heat dissipation plate and then molding the entirely of hard resin. Furthermore, heat dissipation properties can be enhanced by providing a channel of cooling liquid in the heat dissipation plate. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  This patent relates to a semiconductor device, in particular, a power semiconductor device used for controlling a motor or the like.

  The power semiconductor device is a semiconductor device used for controlling an electric device such as a motor. The demand for power semiconductor devices is growing due to the growth of the market for hybrid vehicles and fuel cells. In addition, specifications such as required energization current and environmental temperature are becoming stricter. It is important that the reliability of the power semiconductor device is not impaired under such use conditions. In particular, it is important to ensure heat dissipation of the Si (silicon) chip.

  For this reason, for example, as shown in Patent Document 1, a Si chip is directly attached to a radiator, a cooling liquid is filled in the radiator, and the Si chip is cooled by boiling cooling. There has been proposed a power semiconductor device with improved characteristics.

JP-A-8-294266

Since a high voltage is applied to the Si chip of the power semiconductor device, unless sufficient insulation between the Si chip and the heatsink is secured, dielectric breakdown may occur during use, which is extremely dangerous. For this reason, when mounting a power module, a ceramic insulating substrate having a metal circuit layer on the front and back surfaces between the Si chip and the radiator, or a metal insulating substrate having a metal circuit layer on the surface through a resin insulating sheet Etc. are often used. Generally, solder is used for bonding between the Si chip and the ceramic insulating substrate or between the Si chip and the metal insulating substrate. However, since a large current is passed through the Si chip, the temperature of the Si chip rises due to Joule heat generation during operation of the semiconductor device. Since the temperature of the Si chip decreases when the Si chip is not energized, the temperature of the semiconductor device repeatedly rises and cools by repeated use, and the whole repeats thermal expansion and cooling contraction. Of the members of the power semiconductor device, the linear expansion coefficient of the Si chip is about 3 × 10 ⁻⁶ / ° C., while the linear expansion coefficient of Cu (copper) used as the material of the member connected to the Si chip is 17 Since the linear expansion coefficient of Al × 10 ⁻⁶ / ° C. and Al (aluminum) is about 24 × 10 ⁻⁶ / ° C., the solder joining these members undergoes shear deformation due to mismatch of the linear expansion coefficient. Fatigue failure by repeated. In order to ensure the reliability of the power semiconductor device, it is important to prevent fatigue breakdown of the solder.

  In order to prevent solder fatigue failure and extend the thermal fatigue life, it is effective to seal the periphery of the solder with a hard resin. However, there is a risk that the semiconductor device is warped due to a difference in linear expansion coefficient between the resin and the substrate or the base, or due to curing shrinkage of the resin, and the substrate is damaged. Although the warpage can be reduced by keeping the linear expansion coefficient of the resin close to the linear expansion coefficient of the substrate or the base, the warpage cannot be completely removed due to curing shrinkage of the resin.

  The present invention has been made in order to solve the above-described problems. The purpose of the power semiconductor device is to prevent fatigue disconnection due to a thermal cycle during use and to have good heat dissipation and warp deformation. The object is to provide a semiconductor device with a small amount, low cost and high reliability.

  In order to achieve the above-mentioned object, the present invention joins a ceramic substrate or a metal insulating substrate on which a Si chip is mounted on both surfaces of a heat radiating portion, and forms a coolant flow path inside the heat radiating portion. A power semiconductor device in which both sides of the heat sink are sealed by a hard resin such as an epoxy resin for sealing the solder joint portion is configured.

  Furthermore, the present invention is characterized in that a lead frame is joined to a Si chip by solder, and a part or all of the solder connection portion is sealed by a hard potting resin.

  According to the present invention, it is possible to provide a semiconductor device with good heat dissipation by bonding a ceramic substrate or a metal insulating substrate to two or more surfaces of a heat dissipation portion and flowing a cooling liquid inside the heat dissipation portion. In addition, by sealing part or all of the solder with a hard resin, a highly reliable semiconductor device that does not easily cause fatigue failure of the solder due to the temperature cycle during use and that does not easily cause fatigue failure of the lead frame. Can be provided.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a cross section of a semiconductor device according to an embodiment of the present invention. In the present embodiment, a Cu lead frame 7 is directly provided on the surface of the ceramic substrate 4, and the Si chip 1 is joined to the lead frame 7 via the under-chip solder 9. Bonding 3 is joined. The wire bonding 3 electrically joins the Si chip 1 and the lead frame 7. A lead frame 7 is also provided on the back surface of the ceramic substrate 4, and the lead frame 7 and the metal base plate 5 serving as a heat radiating portion are joined via a solder under substrate 8. The ceramic substrate 4 is joined to the front and back surfaces of the metal base plate 5 via the lead frame 7 and the under-substrate solder 8, and the whole has a substantially symmetrical structure in the vertical direction. The entire module excluding a part of the metal base plate 5, the coolant inlet 10, the coolant outlet, and a part of the lead frame 7 is sealed with a transfer molded hard resin 2. By molding the surfaces of the under-substrate solder 8 and under-chip solder 9 with a hard resin, it is possible to suppress the deformation of the solder accompanying a temperature change and to prolong the thermal fatigue life of the solder. Since the Si chip 1, the ceramic substrate 4, etc. are provided on both surfaces of the metal base plate 5 and covered with the hard resin 2, the stress due to the hard resin 2 is applied to both surfaces of the metal base plate 5. It is possible to prevent warping of the entire structure and peeling or cracking of the resin accompanying temperature changes. If the entire structure including the hard resin 2 is vertically symmetric, it is desirable because warpage becomes smaller.

In order to suppress the deformation of the solder, the Young's modulus of the hard resin is 5 GPa or more, the linear expansion coefficient of the hard resin is 3 × 10 ⁻⁶ / ° C. or more, which is the linear expansion coefficient of the Si chip, and Cu It is desirable that the linear expansion coefficient of the lead frame is 17 × 10 ⁻⁶ / ° C. or less. When the material of the lead frame is Al, the linear expansion coefficient of the hard resin is preferably 24 × 10 ⁻⁶ / ° C. or less, which is the linear expansion coefficient of Al.

The manufacturing process of the semiconductor device of Example 1 is shown in FIG. First, as shown in (5a), the lead frame 7 is joined to both surfaces of the ceramic substrate 4. For joining, silver solder may be used, or direct joining may be used. Next, as shown in (5 a), the Si chip 1 is bonded to the lead frame 7 using the under-chip solder 9. Here, the under-chip solder 9 is a high melting point 95Pb-5Sn solder, and the melting point is different from the solder used for under-substrate soldering performed in (5d). Next, as shown in (5c), an Al wire bonding 3 is bonded to the Si chip 1. Next, as shown in (5d), the ceramic substrate 4 is placed on the upper and lower surfaces of the Cu metal base plate 5 and placed on the carbon jig. A solder sheet 22 is disposed between the ceramic substrate 4 and the metal base plate 5. Here, all the solder sheets 22 have the same composition Sn (tin) −
Pb (lead) eutectic solder. When the operating temperature of the semiconductor device is high, use a high melting point solder having a Pb content ratio of 90% or more, omit the soldering process of (5b), and perform soldering under the chip and soldering under the board in (5d). It is also possible to carry out all at once. At this time, the Al wire bonding in (5c) is performed after (5d). In order to avoid the use of Pb, it is possible to use a lead-free solder such as Sn—Ag (silver) —Cu. Next, as shown in (5d), the whole is passed through and the whole is heated to melt the solder and join the lead frame 7 and the Cu metal base plate 5 together. The temperature of the furnace is set to about 230 ° C., only the under-substrate solder 8 below the substrate is melted, and the under-chip solder 9 is not melted. Next, as shown in (5e), the whole is placed in a transfer mold 17 and sealed with the hard resin 2. As shown in (5e), the semiconductor device is completed by removing the transfer mold.

  FIG. 2 shows a cross section of a semiconductor device according to another embodiment of the present invention. In this embodiment, the Cu lead 13 is bonded to the upper surface of the Si chip via the solder 14 under the lead instead of wire bonding. Here, high melting point 95Pb-5Sn solder is used for the solder 14 under the lead, and it is joined together with the solder under the chip by reflow. The entire structure is transfer molded by a hard resin. By not using wire bonding, the wire bonding process can be omitted, and manufacturing cost and manufacturing time can be reduced. Here again, it is desirable that the linear expansion coefficient of the hard resin is larger than that of the Si chip and smaller than that of the lead frame.

  FIG. 3 shows a cross section of a semiconductor device according to another embodiment of the present invention. The place where the lead is joined on the Si chip is the same as that of the second embodiment, but here the whole is not transfer-molded but sealed by the potting resin 15 so as to cover the solder under the chip and the solder under the chip and the lead. It has stopped. By not using a transfer mold, it is not necessary to prepare a mold and manufacturing cost and manufacturing time can be reduced. Further, since the resin sealing portion is small, the influence of the resin due to the resin shrinkage and the temperature change at the time of use is reduced, and the warpage of the entire power semiconductor device is reduced. Here again, it is desirable that the linear expansion coefficient of the hard resin is larger than that of the Si chip and smaller than that of the lead frame.

  The manufacturing process of the semiconductor device of Example 3 is shown in FIG. First, as shown in (6a), the lead frames 7 are joined to the upper and lower surfaces of the ceramic substrate 4. Next, as shown in (6 b), the Si chip 1 is joined to the lead frame 7 via the under-chip solder 9, and simultaneously, the lead 13 is joined to the Si chip 1 via the under-lead solder 14. Here, the under-chip solder 9 and the under-lead solder 14 have the same composition, and are joined by batch reflow. Next, as shown in (6c), sealing is performed with a hard potting resin 15 so that the surfaces of the solder under the chip and the solder under the lead are covered. The potting resin used here is desirably a hard one having a Young's modulus of 5 GPa or more in order to suppress thermal deformation of the solder. The linear expansion coefficient is preferably not less than the Si chip and not more than the lead frame. Next, as shown in (6d), the Cu metal base plate 5 and the ceramic substrate are placed in a soldering jig 16. A solder sheet 22 is installed between the metal base plate and the ceramic substrate. Here, a Pb—Sn eutectic solder is used as the solder sheet. Next, the metal base plate and the ceramic substrate are joined by soldering through the furnace. Finally, the soldering jig is removed to complete the semiconductor device.

  FIG. 4 shows a cross section of a semiconductor device according to another embodiment of the present invention. Here, a metal substrate 19 is used instead of the ceramic substrate, and this metal substrate is bonded to a Cu metal base plate via a heat conductive sheet 18. The lead frame 7 is joined to the surface of the metal substrate 19 via a resin insulating layer 20, and the Si chip 1 is joined to the lead frame 7 via a chip solder 9. The upper surface of the Si chip 1 and the upper surface of the lead frame 7 are electrically coupled by Al wire bonding 3. The whole is molded with the hard resin 2, and the metal base substrate is pressed against the Cu metal base plate by the residual stress generated by the hardening shrinkage of the hard resin. It is possible to tell the board.

  The manufacturing process of the semiconductor device of Example 4 is shown in FIG. First, as shown in (7 a), the lead frame 7 is joined to the upper surface of the metal substrate 19 via the resin insulating sheet 20. Here, an adhesive is used for joining. Next, as shown in (7 b), the Si chip 1 is joined to the lead frame 7 using the under-chip solder 9. Here, Pb—Sn eutectic solder is used for the under-chip solder 9, but when the operating temperature is high, 95 Pb-5 Sn solder having a high melting point may be used, or Pb-free such as Sn—Ag—Cu. It is also possible to use solder. Next, as shown in (7c), an Al wire bonding 3 is bonded to the Si chip 1. Next, as shown in (7d), the metal substrate 19 is placed on the mold die 17 so as to overlap the upper and lower surfaces of the metal base plate 5 made of Cu. A resin heat conduction sheet 18 is disposed between the metal substrate 19 and the metal base plate 5. A carbon spacer 21 is installed inside the mold, and the metal substrate 19 is pressed against the metal base plate 5 in advance. In this state, a liquid resin 12 is injected by a transfer mold and cured by heating to obtain a hard resin 2. The hard resin 2 used here is desirably a hard resin having a Young's modulus of 5 GPa or more. Since the metal substrate 19 is pressed against the metal base plate 5 by the hardening shrinkage of the hard resin and the heat shrinkage after hardening, the adhesion of the lead frame 7 and the metal base plate 5 to the resin thermal conductive sheet 18 is improved. It is possible to configure a semiconductor device with high heat dissipation that can efficiently release the heat generated in the chip 1 to the metal base plate. Finally, as shown in (7e), the semiconductor device is completed by removing the transfer mold.

It is sectional drawing which shows the semiconductor device which becomes one Embodiment of this invention. It is sectional drawing which shows the semiconductor device which becomes other embodiment of this invention. It is sectional drawing which shows the semiconductor device which becomes other embodiment of this invention. It is sectional drawing which shows the semiconductor device which becomes other embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which becomes one Embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which becomes other embodiment of this invention. It is sectional drawing which shows the manufacturing method of the semiconductor device which becomes other embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Si chip, 2 ... Hard resin, 3 ... Wire bonding, 4 ... Ceramic substrate, 5 ... Metal base plate, 6 ... Cooling liquid, 7 ... Lead frame, 8 ... Substrate solder, 9 ... Under-chip solder, 10 ... Coolant suction port, 11 ... Coolant discharge port, 12 ... Liquid resin, 13 ... Lead, 14 ... Solder under lead, 15 ... Potting resin, 16 ... Soldering jig, 17 ... Transfer mold die, 18 ... Heat conduction Sheet, 19 ... metal substrate, 20 ... resin insulation sheet, 21 ... spacer, 22 ... solder sheet.

Claims (6)

A metal heat dissipating part having a flow path for circulating the coolant inside;
A first insulating substrate provided on the heat dissipating part and provided with a circuit layer;
A first semiconductor chip bonded to the first insulating substrate by a bonding member;
A first metal wiring bonded on the first semiconductor chip;
A second insulating substrate provided on a surface opposite to the surface on which the first insulating substrate is provided of the heat radiating portion, and provided with a circuit layer;
A second semiconductor chip bonded to the second insulating substrate by a bonding member;
A second metal wiring bonded on the second semiconductor chip;
A sealing resin that covers the heat sink, the first insulating substrate, the first semiconductor chip, the first metal wiring, the second insulating substrate, the second semiconductor chip, and the second metal wiring. A power semiconductor device characterized by the above. In claim 1,
The first insulating substrate, the first semiconductor chip, the first metal wiring, the second insulating substrate, the second semiconductor chip, the second metal wiring, and the sealing resin are provided substantially symmetrically. A power semiconductor device. A metal heat dissipating part having a flow path for circulating the coolant inside;
A first insulating substrate provided on the heat dissipating part and provided with a circuit layer;
A first semiconductor chip bonded to the first insulating substrate by a first bonding member;
A first metal wiring bonded on the first semiconductor chip;
A first botting resin that covers the first bonding member, the first semiconductor chip, and a bonding portion between the first semiconductor chip and the first metal wiring;
A second insulating substrate provided on a surface opposite to the surface on which the first insulating substrate is provided of the heat radiating portion, and provided with a circuit layer;
A second semiconductor chip bonded to the second insulating substrate by a second bonding member;
A second metal wiring bonded on the second semiconductor chip;
A first botting resin that covers the first bonding member, the first semiconductor chip, and a bonding portion between the first semiconductor chip and the first metal wiring;
A power comprising: the second bonding member, the second semiconductor chip, and a second botting resin that covers a bonding portion between the second semiconductor chip and the second metal wiring. Semiconductor device. In claim 3,
The first insulating substrate, the first semiconductor chip, the first metal wiring, the first botting resin, the second insulating substrate, the second semiconductor chip, the second metal wiring, and the second The power semiconductor device is characterized in that the ting resin is provided substantially symmetrically. Bonding a semiconductor chip on an insulating substrate having a circuit, and bonding metal wiring on the semiconductor chip;
Attaching the insulating substrate having the semiconductor chip and the metal wiring to each of both surfaces of a heat sink having a reflux path for cooling liquid inside;
A method of manufacturing a power semiconductor device, comprising: sealing the semiconductor chip, the metal wiring, the insulating substrate, and the heat sink. In claim 5,
A method of manufacturing a power semiconductor device, wherein resin sealing is performed in a state where the insulating substrate is pressed against the heat sink by a spacer.

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