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JP2008016775A - Circuit board and hybrid integrated circuit - Google Patents

Circuit board and hybrid integrated circuit Download PDF

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Publication number
JP2008016775A
JP2008016775A JP2006189295A JP2006189295A JP2008016775A JP 2008016775 A JP2008016775 A JP 2008016775A JP 2006189295 A JP2006189295 A JP 2006189295A JP 2006189295 A JP2006189295 A JP 2006189295A JP 2008016775 A JP2008016775 A JP 2008016775A
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circuit board
circuit
insulating layer
metal plate
hybrid integrated
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Katsunori Yashima
克憲 八島
Yoshihiko Okajima
芳彦 岡島
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Denka Co Ltd
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Denki Kagaku Kogyo KK
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

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Abstract

【課題】ハイパワーのトランジスタやＬＥＤを実装するために好適な回路基板と、それを用いた混成集積回路を提供する。
【解決手段】金属板の一主面上又は両主面上に絶縁層を介して回路が設けられている回路基板であって、前記金属板の回路を設けている側の面の絶縁層の一部に窓を有し、金属板の一部が露出していることを特徴とする回路基板であり、好ましくは、絶縁層の熱伝導率が１．０Ｗ／ｍＫ以上であり、導体回路と金属板又は両主面上の回路と金属板間の耐電圧が１．０ｋＶ以上である前記の回路基板であり、更に好ましくは、絶縁層が、熱硬化性樹脂を２５〜６０体積％と、残部が最大粒子径７５μｍ以下からなる無機フィラーとからなる樹脂組成物の硬化体であることを特徴とする前記の回路基板であり、加えて、前記の回路基板を用い、当該回路基板の前記露出している部分に電子部品を搭載してなることを特徴とする混成集積回路。
【選択図】図１A circuit board suitable for mounting a high-power transistor or LED and a hybrid integrated circuit using the circuit board are provided.
A circuit board in which a circuit is provided on one main surface or both main surfaces of a metal plate via an insulating layer, wherein the insulating layer on the surface of the metal plate on which the circuit is provided is provided. A circuit board characterized by having a window in part and a part of the metal plate exposed, preferably, the insulating layer has a thermal conductivity of 1.0 W / mK or more, The above-mentioned circuit board having a withstand voltage of 1.0 kV or more between the metal plate or the circuit on both main surfaces and the metal plate, and more preferably, the insulating layer comprises 25 to 60% by volume of a thermosetting resin, The circuit board is characterized in that the remainder is a cured product of a resin composition comprising an inorganic filler having a maximum particle size of 75 μm or less. In addition, the circuit board is used, and the exposure of the circuit board is performed. A hybrid integrated circuit characterized in that an electronic component is mounted on a portion that is connected.
[Selection] Figure 1

Description

本発明は、絶縁性に優れ、熱放散性が良好な回路基板と、それを用いた混成集積回路に関する。 The present invention relates to a circuit board having excellent insulation and good heat dissipation, and a hybrid integrated circuit using the circuit board.

近年、電子機器等の小型化や軽量化に伴い、電子部品の小型化が進んでおり、電子部品を実装するため、回路基板の高密度化の要求が高まっている。また、電子部品の高機能化により消費電力が増加しており、この電子部品からの発熱が課題となっている。 In recent years, along with the downsizing and weight reduction of electronic devices and the like, downsizing of electronic parts has progressed, and in order to mount electronic parts, there is an increasing demand for high density circuit boards. In addition, the power consumption has increased due to the higher functionality of electronic components, and heat generation from the electronic components has become a problem.

金属板上に無機フィラーを充填したエポキシ樹脂などからなる絶縁層を設け、その上に回路パターンを形成した金属ベース回路基板は、熱放散性と電気絶縁性に優れることから高発熱性電子部品を実装する通信機及び自動車などの電子機器用回路基板として用いられている（特許文献１参照）。
特開昭６２−２７１４４２号公報 A metal base circuit board with an insulating layer made of an epoxy resin filled with an inorganic filler on a metal plate and a circuit pattern formed on it is excellent in heat dissipation and electrical insulation. It is used as a communication device to be mounted and a circuit board for electronic devices such as automobiles (see Patent Document 1).
JP-A-62-271442

金属ベース回路基板は、ガラスエポキシ基板等を用いた樹脂回路基板に比較すると熱伝導率が高く放熱性に優れている。しかし、絶縁層の熱伝導率が、金属、導電ペーストおよび半田等に比べ非常に低いため、ハイパワーのトランジスタや発光ダイオード（以下ＬＥＤ）を実装することができなかった。 The metal base circuit board has higher thermal conductivity and excellent heat dissipation than a resin circuit board using a glass epoxy board or the like. However, since the thermal conductivity of the insulating layer is very low compared to metals, conductive pastes, solders, and the like, high-power transistors and light-emitting diodes (hereinafter referred to as LEDs) could not be mounted.

そのため、ハイパワーのトランジスタやＬＥＤを実装するためには、放熱性を改善させるために、実装部品の直下にスルーホールを形成し、一方の主面側の金属パターンと他方の主面側の放熱用金属膜とを前記スルーホールを介して接続することで放熱性を改善する方が提案されている（特許文献２参照）。しかし、作業性やコストの面から問題がある。
特開２００５−２８３８５２号公報 Therefore, in order to mount a high-power transistor or LED, in order to improve heat dissipation, a through hole is formed immediately below the mounted component, and the metal pattern on one main surface side and the heat dissipation on the other main surface side are formed. There has been proposed a method of improving heat dissipation by connecting a metal film for use via the through hole (see Patent Document 2). However, there are problems in terms of workability and cost.
JP 2005-283852 A

本発明は、前記従来技術の状況に鑑みてなされたもので、絶縁性に優れ、熱放散性が良好な回路基板、特に、ハイパワーのトランジスタやＬＥＤを実装するために好適な回路基板と、それを用いた混成集積回路を提供することを目的としている。 The present invention has been made in view of the state of the prior art, and is a circuit board excellent in insulation and good in heat dissipation, particularly a circuit board suitable for mounting high-power transistors and LEDs, An object of the present invention is to provide a hybrid integrated circuit using the same.

本発明は、金属板の一主面上又は両主面上に絶縁層を介して回路が設けられている回路基板であって、前記金属板の回路を設けている側の面の絶縁層の一部に窓を有し、金属板の一部が露出していることを特徴とする回路基板であり、好ましくは、絶縁層の熱伝導率が１．０Ｗ／ｍＫ以上であり、導体回路と金属板又は両主面上の回路と金属板間の耐電圧が１．０ｋＶ以上である前記の回路基板であり、更に好ましくは、絶縁層が、熱硬化性樹脂を２５〜６０体積％と、残部が最大粒子径７５μｍ以下からなる無機フィラーとからなる樹脂組成物の硬化体であることを特徴とする前記の回路基板であり、加えて、前記の回路基板を用い、当該回路基板の前記露出している部分に電子部品を搭載してなることを特徴とする混成集積回路である。 The present invention is a circuit board in which a circuit is provided on one main surface or both main surfaces of a metal plate via an insulating layer, and the insulating layer on the surface on the side where the circuit of the metal plate is provided A circuit board characterized by having a window in part and a part of the metal plate exposed, preferably, the insulating layer has a thermal conductivity of 1.0 W / mK or more, The above-mentioned circuit board having a withstand voltage of 1.0 kV or more between the metal plate or the circuit on both main surfaces and the metal plate, and more preferably, the insulating layer comprises 25 to 60% by volume of a thermosetting resin, The circuit board is characterized in that the remainder is a cured product of a resin composition comprising an inorganic filler having a maximum particle size of 75 μm or less. In addition, the circuit board is used, and the exposure of the circuit board is performed. This is a hybrid integrated circuit characterized in that an electronic component is mounted on the portion where it is formed.

本発明の回路基板は、金属板の一主面上又は両主面上に絶縁層を介して回路が設けられ、前記金属板の回路を設けている側の面の絶縁層の一部に窓を有し、金属板の一部が露出している構造を有するので、前記露出している部分に高発熱部品を実装することが可能となり、例えば、ハイパワーのトランジスタやＬＥＤ等の従来では搭載し得なかった高発熱の電子部品も実装できるという格別の効果を発揮できる。 In the circuit board of the present invention, a circuit is provided on one main surface or both main surfaces of a metal plate via an insulating layer, and a window is formed in a part of the insulating layer on the surface on which the circuit of the metal plate is provided. And has a structure in which a part of the metal plate is exposed, so that it is possible to mount a high heat-generating component on the exposed portion, for example, conventionally mounted such as a high-power transistor or LED It is possible to achieve a special effect that it is possible to mount a high heat generation electronic component that could not be achieved.

更に、本発明によれば、絶縁層が露出している部分に高発熱の電子部品を搭載できる上、絶縁層がある部分についても熱伝導率が高いことから、ある程度の発熱する部品を絶縁層上の回路部分にも実装することが可能となり、小型な混成集積回路を得ることが出来るという効果をも奏する。 Furthermore, according to the present invention, a highly heat generating electronic component can be mounted in a portion where the insulating layer is exposed, and the heat conductivity is high in a portion where the insulating layer is present. It can also be mounted on the upper circuit portion, and there is an effect that a small hybrid integrated circuit can be obtained.

図１は、本発明の回路基板とそれを用いた混成集積回路の一例である。本発明の混成集積回路においては、金属板１と絶縁層２と、回路３とからなる金属ベース回路基板の回路３上に、複数の半導体、すなわち、制御用半導体４やチップ部品等が半田などにより接合搭載されている。また、絶縁層２に窓を設け、金属板１を露出させた部分には、放熱を必要する出力用半導体５を熱伝導性接着剤６により接合し搭載している。 FIG. 1 shows an example of a circuit board of the present invention and a hybrid integrated circuit using the circuit board. In the hybrid integrated circuit of the present invention, a plurality of semiconductors, that is, a control semiconductor 4 and chip components are soldered on the circuit 3 of the metal base circuit board composed of the metal plate 1, the insulating layer 2, and the circuit 3. It is jointly mounted by. Further, a window is provided in the insulating layer 2, and an output semiconductor 5 that requires heat radiation is bonded and mounted on a portion where the metal plate 1 is exposed by a heat conductive adhesive 6.

金属板１としては、良好な熱伝導性を持つ銅および銅合金、アルミニウムおよびアルミニウム合金、鉄ならびにステンレスなどの金属が使用可能である。 As the metal plate 1, metals such as copper and copper alloy, aluminum and aluminum alloy, iron and stainless steel having good thermal conductivity can be used.

図１と異なり、出力用半導体５を金属板１に直接に半田接合する場合は、金属板１の表面をニッケルめっき、ニッケル−金めっき、銀めっき或いははんだめっき等を施すことが好ましい。 Unlike FIG. 1, when the output semiconductor 5 is directly soldered to the metal plate 1, the surface of the metal plate 1 is preferably subjected to nickel plating, nickel-gold plating, silver plating, or solder plating.

金属板１の厚みとしては、０．００５ｍｍ以上５．０ｍｍ以下のものが使用できる。金属板１の厚みが、０．００５ｍｍ以上であれば金属ベース回路基板の剛性が低下するため使用できなくなることもなく、金属板１の厚みが５．０ｍｍ以下であれば、回路基板の加工用金型又はプレス機などに大型な設備が必要となることもない。金属板１の厚みは、０．０３５ｍｍ以上３．０ｍｍ以下が金属ベース回路基板の剛性、加工性などが確保できることからより好ましい。 The thickness of the metal plate 1 can be 0.005 mm or more and 5.0 mm or less. If the thickness of the metal plate 1 is 0.005 mm or more, the rigidity of the metal base circuit board is reduced, so that it cannot be used. If the thickness of the metal plate 1 is 5.0 mm or less, the circuit board is processed. There is no need for large equipment such as a mold or a press. The thickness of the metal plate 1 is more preferably 0.035 mm or more and 3.0 mm or less because the rigidity and workability of the metal base circuit board can be secured.

絶縁層２の厚さについては、３０μｍ以上２００μｍ以下が好ましい。３０μｍ以上であれば電気的絶縁性が確保できるし、２００μｍ以下で十分な熱放散性を確保できる。 About the thickness of the insulating layer 2, 30 micrometers or more and 200 micrometers or less are preferable. If it is 30 μm or more, electrical insulation can be secured, and if it is 200 μm or less, sufficient heat dissipation can be secured.

絶縁層２を構成する熱硬化性樹脂としては、エポキシ樹脂、フェノール樹脂、シリコーン樹脂、アクリル樹脂などが使用できる。中でも、無機フィラーを含みながらも、硬化状態において金属板１、回路３との接合力に優れるエポキシ樹脂を主成分とするものが好ましい。また、必要に応じて、シラン系カップリング剤、チタネート系カップリング剤等の表面改質剤、更に安定剤および硬化促進剤等を用いることができる。 As the thermosetting resin constituting the insulating layer 2, an epoxy resin, a phenol resin, a silicone resin, an acrylic resin, or the like can be used. Especially, what contains an epoxy resin which is excellent in the joining force with the metal plate 1 and the circuit 3 in a hardening state, although containing an inorganic filler is preferable. Moreover, surface modifiers, such as a silane coupling agent and a titanate coupling agent, a stabilizer, a hardening accelerator, etc. can be used as needed.

絶縁層２に含有される無機フィラーとしては、電気絶縁性で熱伝導性の良好なものが好ましく、例えば、シリカ、アルミナ、窒化アルミニウム、窒化珪素、窒化硼素などが用いられる。 The inorganic filler contained in the insulating layer 2 is preferably an electrically insulating and heat conductive material, and for example, silica, alumina, aluminum nitride, silicon nitride, boron nitride or the like is used.

絶縁層２中の無機フィラーの含有量は、４０〜７５体積％が好ましく、無機フィラーの粒度は最大粒子径が７５μｍであることが好ましい。最大粒子径については、特に、回路基板の熱放散性を重視して、絶縁層を５０μｍ以下と薄くする場合には、最大粒子径を４５μｍ以下にすることで、絶縁層上の突起なのどの不具合を防止できるので一層好ましい。また、無機フィラーを５０体積％以上含有して対応したい場合には、破砕粒子や球状粒子を単独で用いるよりも球状粗粒子と球状微粒子とを適宜混ぜ合わせることで無機フィラーと熱硬化性樹脂との混合が容易にすることが可能になり好ましい。 The content of the inorganic filler in the insulating layer 2 is preferably 40 to 75% by volume, and the inorganic filler preferably has a maximum particle size of 75 μm. With regard to the maximum particle size, especially when the heat dissipation property of the circuit board is emphasized and the insulating layer is made as thin as 50 μm or less, the maximum particle size is reduced to 45 μm or less so that defects such as protrusions on the insulating layer can be detected. Is more preferable. Further, when it is desired to contain 50% by volume or more of an inorganic filler, the inorganic filler and the thermosetting resin can be appropriately mixed with spherical coarse particles and spherical fine particles rather than using crushed particles or spherical particles alone. It is possible to facilitate the mixing of these, which is preferable.

回路３の厚みは、５μｍ以上５００μｍ以下であることが好ましい。５μｍ以上であれば回路としての機能が十分確保できるし、５００μｍ以下であれば回路形成に難しくなるようなことがない。 The thickness of the circuit 3 is preferably 5 μm or more and 500 μm or less. If it is 5 μm or more, a sufficient function as a circuit can be secured, and if it is 500 μm or less, there is no difficulty in circuit formation.

本発明において、絶縁層の一部に窓を有するようにする方法については、特に制限はないが、金属板１上に全面に無機フィラーを含有する硬化性樹脂を塗布し、金属箔を貼り付け、前熱硬化性樹脂を硬化し、前記金属箔から回路形成した後に、露出している絶縁層２の所定部分を除去する方法が、高品質の回路基板を安定して得られることから好ましい方法である。また、前記絶縁層を除去する方法としては、コストおよび作業性の問題からエンドミルなどによる機械加工や炭酸ガスレーザー等のレーザー加工などが好ましく用いられる。尚、本発明に於いて、窓の部分は必ずしも絶縁層に囲まれている必要はなく、一部が解放されている状態であっても良い。 In the present invention, there is no particular limitation on the method of having a window in a part of the insulating layer, but a curable resin containing an inorganic filler is applied to the entire surface of the metal plate 1 and a metal foil is pasted. The method of removing a predetermined portion of the exposed insulating layer 2 after curing a pre-thermosetting resin and forming a circuit from the metal foil is preferable because a high-quality circuit board can be stably obtained. It is. As the method for removing the insulating layer, mechanical processing by an end mill or laser processing such as a carbon dioxide laser is preferably used because of cost and workability problems. In the present invention, the window portion is not necessarily surrounded by the insulating layer, and a part of the window may be open.

出力用半導体５を固定する熱伝導性接着剤６としては、半田、銀ペースト、銅ペーストといった熱伝導性を重視した接着剤が用いられる。また、絶縁層２の窓の部分に存在する金属板１上に実装する出力用半導体５は、電気絶縁性を必要としない部品であるため、熱伝導性接着剤６として導電性の材料を使用することができるが、部品を固定する必要があるため、熱や湿度によって劣化しない材料であることを重視して選定すべきである。 As the thermally conductive adhesive 6 for fixing the output semiconductor 5, an adhesive that places importance on thermal conductivity, such as solder, silver paste, or copper paste, is used. Moreover, since the output semiconductor 5 mounted on the metal plate 1 existing in the window portion of the insulating layer 2 is a component that does not require electrical insulation, a conductive material is used as the heat conductive adhesive 6. However, since it is necessary to fix the parts, the material should not be deteriorated by heat or humidity.

尚、本発明の回路基板は、図１に例示した通りに、全体として平板状を呈しているものに限定されず、全体として可撓性を有するものも含まれる。この場合において、絶縁層の窓の部分の金属板の表面が平面であれば良い。前記可撓性を有する回路基板としては、例えば、金属板１の厚さが５〜２１０μｍ、絶縁層２の厚さが２５〜２００μｍ、回路３の厚さが９〜１４０μｍと限定するとき、曲率半径１〜５ｍｍで約９０度以上の折り曲げ加工できる回路基板が例示できる。 In addition, the circuit board of this invention is not limited to what is exhibiting flat form as a whole as illustrated in FIG. 1, The thing which has flexibility as a whole is also contained. In this case, the surface of the metal plate in the window portion of the insulating layer may be flat. As the flexible circuit board, for example, when the thickness of the metal plate 1 is 5 to 210 μm, the thickness of the insulating layer 2 is 25 to 200 μm, and the thickness of the circuit 3 is 9 to 140 μm, the curvature is A circuit board that can be bent at a radius of 1 to 5 mm and about 90 degrees or more can be exemplified.

本発明の回路基板を用いた混成集積回路は、上記構成を有しており、絶縁層が、熱硬化性樹脂を２５〜６０体積％と、残部が最大粒子径７５μｍ以下からなる無機フィラーとからなる樹脂組成物の硬化体であることから、絶縁を必要し、且つ放熱性を有する半導体素子や抵抗チップなどの電機部品を実装することができる上、絶縁層の窓の部分には、従来は発熱量が大きすぎて実装するこのできなかった出力用半導体などの電子部品を搭載することが可能となり、回路設計に於いて電子部品に関する制限があったのを解除でき、より自由な設計を可能とするものである。 The hybrid integrated circuit using the circuit board of the present invention has the above-described configuration, and the insulating layer is composed of 25 to 60% by volume of a thermosetting resin, and the balance is an inorganic filler having a maximum particle diameter of 75 μm or less. Since it is a cured product of the resin composition, it is possible to mount an electrical component such as a semiconductor element or a resistor chip that requires insulation and has a heat dissipation property. It is possible to mount electronic parts such as output semiconductors that could not be mounted due to too much heat generation, and it was possible to release restrictions on electronic parts in circuit design, and more flexible design was possible It is what.

（実施例１）
厚さ２．０ｍｍのアルミニウム板上に、アルミナフィラー（昭和電工社製「ＡＬ―１７３」）を４５体積％含有したエポキシ樹脂（大日本インキ化学工業社製「ＥＰＩＣＬＯＮ８３０−Ｓ」）を混合した絶縁材料を、硬化後の厚さが８０μｍとなるように塗布し、更に３５μｍ銅箔（古河サーキットホイル社製「ＧＴＳ」）を貼り合わせし、加熱硬化し、金属ベース基板を得た。 (Example 1)
Insulation in which an epoxy resin (“EPICLON 830-S” manufactured by Dainippon Ink & Chemicals, Inc.) containing 45% by volume of alumina filler (“AL-173” manufactured by Showa Denko KK) is mixed on an aluminum plate having a thickness of 2.0 mm. The material was applied so that the thickness after curing was 80 μm, and a 35 μm copper foil (“GTS” manufactured by Furukawa Circuit Foil Co., Ltd.) was further bonded and heat cured to obtain a metal base substrate.

前記アルミナフィラーを含有するエポキシ樹脂を、加熱硬化して、２５×２５ｍｍ×厚さ０．６３５ｍｍの試片を作製し、これを用いて熱伝導率をレーザーフラッシュ法で測定した（使用機器（真空理工社製「ＴＣ−７０００」））ところ、１．５Ｗ／ｍＫであった。 The epoxy resin containing the alumina filler was cured by heating to prepare a 25 × 25 mm × 0.635 mm thick specimen, and the thermal conductivity was measured by the laser flash method using this (use equipment (vacuum) “TC-7000” manufactured by Riko Co., Ltd.)) However, it was 1.5 W / mK.

また、金属ベース基板について、耐電圧を測定した。耐電圧の測定は、ＪＩＳ Ｃ２１１０に基づき（菊水電子工業社製「ＴＯＳ−８７００形」を用いた）測定した。その結果、耐電圧は３.６ｋＶであった。 Further, the withstand voltage of the metal base substrate was measured. The withstand voltage was measured based on JIS C2110 (using “TOS-8700 type” manufactured by Kikusui Electronics Corporation). As a result, the withstand voltage was 3.6 kV.

前記金属ベース基板に、エッチング法により、所望の回路を形成して、金属ベース回路基板を作製した。更に、出力用半導体を実装する部分の絶縁層を、エンドミル加工により除去した後、アルミニウム板の露出部にニッケルメッキを施した。更に、前記ニッケルメッキ上に出力用半導体としてＭＯＳ−ＦＥＴをはんだ（千住金属社製「Ｍ７０５」）で実装し、出力用半導体を制御する制御用半導体としてデジタル信号ＩＣを搭載したデジタルアンプ（混成集積回路）を試作し、動作周波数８００ｋＨｚで動作させたところ、正常に動作することを確認した。 A desired circuit was formed on the metal base substrate by etching to produce a metal base circuit substrate. Further, after removing the insulating layer at the portion where the output semiconductor was mounted by end milling, the exposed portion of the aluminum plate was plated with nickel. Furthermore, a digital amplifier (hybrid integrated circuit) in which a MOS-FET is mounted on the nickel plating as an output semiconductor with solder (“M705” manufactured by Senju Metal Co., Ltd.) and a digital signal IC is mounted as a control semiconductor for controlling the output semiconductor. Circuit) was prototyped and operated at an operating frequency of 800 kHz, and it was confirmed that it was operating normally.

（実施例２）
実施例１において、アルミナフィラーの量を６０体積％含有したエポキシ樹脂からなる絶縁材料を用いたこと以外は、実施例１と同じ手順で金属ベース回路基板を作製した。このとき、絶縁層を構成する樹脂の硬化体の熱伝導率は、２．８Ｗ／ｍＫで耐電圧は３．２ｋＶであった。 (Example 2)
In Example 1, the metal base circuit board was produced in the same procedure as Example 1 except having used the insulating material which consists of an epoxy resin which contained 60 volume% of alumina fillers. At this time, the thermal conductivity of the cured resin body constituting the insulating layer was 2.8 W / mK, and the withstand voltage was 3.2 kV.

更に実施例１と同様にデジタルアンプを作製して動作させたところ、動作周波数１ＧＨｚで１時間以上継続して正常に動作することを確認した。 Further, when a digital amplifier was manufactured and operated in the same manner as in Example 1, it was confirmed that it operated normally at an operating frequency of 1 GHz for 1 hour or longer.

（実施例３）
実施例１と同じ手順で金属ベース回路基板を作製し、所望の回路を形成し金属ベース回路基板を作製した。ＬＥＤを実装する部分の絶縁層を炭酸ガスレーザーにより除去し、実施例1同様にニッケルメッキを施した。前記ニッケルメッキ上にＬＥＤ（日亜化学社製「ＮＦＳＷ０３６ＡＴ」）をはんだで実装し、ＬＥＤ光源ユニットを得た。 (Example 3)
A metal base circuit board was manufactured by the same procedure as in Example 1, a desired circuit was formed, and a metal base circuit board was manufactured. The insulating layer in the portion where the LED is mounted was removed with a carbon dioxide laser, and nickel plating was applied in the same manner as in Example 1. An LED (“NFSW036AT” manufactured by Nichia Corporation) was mounted on the nickel plating with solder to obtain an LED light source unit.

温度２３℃、湿度３０％の環境下にて、得られたＬＥＤ光源ユニットに安定化電源を接続して電流４５０ｍＡ流して１５分間ＬＥＤを点灯させた。そのときの電圧は１１．８Ｖであった。点灯させたＬＥＤの温度を熱電対により測定したところ、ＬＥＤの温度は４５℃であった。 In an environment of a temperature of 23 ° C. and a humidity of 30%, a stabilized power source was connected to the obtained LED light source unit, and a current of 450 mA was applied to light the LED for 15 minutes. The voltage at that time was 11.8V. When the temperature of the lit LED was measured with a thermocouple, the LED temperature was 45 ° C.

（比較例１）
実施例１において、絶縁層除去のないこと以外は、実施例１と同じ手順で金属ベース回路基板を作製した。 (Comparative Example 1)
In Example 1, a metal base circuit board was produced in the same procedure as in Example 1 except that the insulating layer was not removed.

前記金属ベース回路基板について、実施例１同様にデジタルアンプを作製し、動作確認を行った。その結果、動作周波数８００ｋＨｚで動作させた当初は正常に動作したが、パワートランジスタの発熱により、５秒動作後に動作しなくなった。 With respect to the metal base circuit board, a digital amplifier was produced in the same manner as in Example 1 and the operation was confirmed. As a result, the device operated normally at an operation frequency of 800 kHz, but stopped operating after 5 seconds due to heat generated by the power transistor.

（比較例２）
実施例３において、絶縁層除去のないこと以外は、実施例１と同じ手順で金属ベース回路基板を作製した。 (Comparative Example 2)
In Example 3, a metal base circuit board was produced in the same procedure as in Example 1 except that the insulating layer was not removed.

前記金属ベース回路基板について、実施例３同様にＬＥＤ光源ユニットを作製し、温度２３℃、湿度３０％の環境下にて、ＬＥＤ光源ユニットに安定化電源を接続して電流４５０ｍＡ流してＬＥＤを点灯させた。そのときの電圧は１２．５Ｖであった。点灯させたＬＥＤの温度を熱伝対により測定したところ、ＬＥＤの温度は６５℃であった。 For the metal base circuit board, an LED light source unit was manufactured in the same manner as in Example 3, and a stabilized power supply was connected to the LED light source unit in an environment of a temperature of 23 ° C. and a humidity of 30%, and a current of 450 mA was applied to light the LED. I let you. The voltage at that time was 12.5V. When the temperature of the lighted LED was measured by a thermocouple, the LED temperature was 65 ° C.

本発明は、ＬＥＤ等実装部品から発熱する熱を、効率よく基板裏面側に放熱しすることが可能となり、実装部品の温度上昇を抑制できるため、誤作動や蓄熱を低減し、高信頼性の混成集積回路を提供できる。また、混成集積回路の小型化が可能になるため、いろいろな用途分野に適用できるので、例えば、ハイパワーのトランジスタや発光ダイオード（以下ＬＥＤ）を実装することができ、産業上非常に有用である。 In the present invention, it is possible to efficiently dissipate heat generated from mounting components such as LEDs to the back side of the substrate, and the temperature rise of the mounting components can be suppressed. Therefore, malfunction and heat storage are reduced, and high reliability is achieved. A hybrid integrated circuit can be provided. Further, since the hybrid integrated circuit can be reduced in size, it can be applied to various fields of application. For example, a high-power transistor or a light emitting diode (hereinafter referred to as LED) can be mounted, which is very useful industrially. .

本発明に係る金属ベース回路基板と混成集積回路の一例を示す断面図。Sectional drawing which shows an example of the metal base circuit board and hybrid integrated circuit which concern on this invention.

符号の説明Explanation of symbols

１ 金属板
２ 絶縁層
３ 回路
４ 制御用半導体
５ 出力用半導体
６ 熱伝導性接着剤
７ ボンディング用ワイヤー DESCRIPTION OF SYMBOLS 1 Metal plate 2 Insulating layer 3 Circuit 4 Control semiconductor 5 Output semiconductor 6 Thermal conductive adhesive 7 Bonding wire

Claims (4)

金属板の一主面上又は両主面上に絶縁層を介して回路が設けられている回路基板であって、前記金属板の回路を設けている側の面の絶縁層の一部が窓を有し、金属板の一部が露出していることを特徴とする回路基板。 A circuit board in which a circuit is provided on one main surface or both main surfaces of the metal plate via an insulating layer, and a part of the insulating layer on the surface on which the circuit of the metal plate is provided is a window And a part of the metal plate is exposed. 絶縁層の熱伝導率が１．０Ｗ／ｍＫ以上であり、導体回路と金属板又は両主面上の回路と金属板間の耐電圧が１．０ｋＶ以上である請求項１項記載の回路基板。 2. The circuit board according to claim 1, wherein the heat conductivity of the insulating layer is 1.0 W / mK or more, and the withstand voltage between the conductor circuit and the metal plate or between the circuit on both main surfaces and the metal plate is 1.0 kV or more. . 絶縁層が、熱硬化性樹脂を２５〜６０体積％と、残部が最大粒子径７５μｍ以下からなる無機フィラーとからなる樹脂組成物の硬化体であることを特徴とする請求項１又は請求項２に記載の回路基板。 The insulating layer is a cured product of a resin composition comprising 25 to 60% by volume of a thermosetting resin and an inorganic filler having a maximum particle diameter of 75 μm or less as a remainder. Circuit board as described in. 請求項１乃至３のいずれか一項に記載の回路基板を用い、当該回路基板の前記露出している部分に電子部品を搭載してなることを特徴とする混成集積回路。 A hybrid integrated circuit comprising: the circuit board according to claim 1; and an electronic component mounted on the exposed portion of the circuit board.
JP2006189295A 2006-07-10 2006-07-10 Circuit board and hybrid integrated circuit Pending JP2008016775A (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6484649A (en) * 1987-09-26 1989-03-29 Matsushita Electric Works Ltd Manufacture of semiconductor package
JPH02286768A (en) * 1989-04-28 1990-11-26 Denki Kagaku Kogyo Kk Insulating adhesive composition for circuit board and use thereof
JPH0745920A (en) * 1993-07-30 1995-02-14 Mitsubishi Shindoh Co Ltd Circuit board and manufacturing method thereof
JPH08148781A (en) * 1994-09-19 1996-06-07 Denki Kagaku Kogyo Kk Metal base multilayer circuit board
JPH10154765A (en) * 1996-11-25 1998-06-09 Matsushita Electric Works Ltd Manufacture of semiconductor package
JP2004172426A (en) * 2002-11-21 2004-06-17 Hitachi Ltd Electronic equipment
JP2004281849A (en) * 2003-03-18 2004-10-07 Sumitomo Metal Electronics Devices Inc High heat radiation plastic package and its manufacturing method

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6484649A (en) * 1987-09-26 1989-03-29 Matsushita Electric Works Ltd Manufacture of semiconductor package
JPH02286768A (en) * 1989-04-28 1990-11-26 Denki Kagaku Kogyo Kk Insulating adhesive composition for circuit board and use thereof
JPH0745920A (en) * 1993-07-30 1995-02-14 Mitsubishi Shindoh Co Ltd Circuit board and manufacturing method thereof
JPH08148781A (en) * 1994-09-19 1996-06-07 Denki Kagaku Kogyo Kk Metal base multilayer circuit board
JPH10154765A (en) * 1996-11-25 1998-06-09 Matsushita Electric Works Ltd Manufacture of semiconductor package
JP2004172426A (en) * 2002-11-21 2004-06-17 Hitachi Ltd Electronic equipment
JP2004281849A (en) * 2003-03-18 2004-10-07 Sumitomo Metal Electronics Devices Inc High heat radiation plastic package and its manufacturing method

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