JP2007317840A - Photovoltaic device, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a photovoltaic device where connection reliability of a solder electrode is improved, and to provide a manufacturing method of the device. <P>SOLUTION: In the photovoltaic device 1, an outer peripheral end of a second electrode 16 formed of solder is positioned on an inner side compared to an outer peripheral end of a first electrode 15 formed of conductive paste. To put it concretely, a periphery of the first electrode 15 is covered with an insulating layer 14, and only vicinity of the center of the first electrode 15 is exposed from the insulating layer 14. The second electrode 16 formed of solder is formed on an upper face of the center of the first electrode 15 which is not covered with the insulating layer 14. Thus, a position shape of the second electrode 16 formed of solder is regulated by the insulating layer 14 covering the periphery of the first electrode 15. Consequently, the outer peripheral end of the second electrode 16 is positioned on the inner side compared to the outer peripheral end of the first electrode 15. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a photovoltaic device and a manufacturing method thereof, and more particularly to a photovoltaic device including an external terminal made of a conductive adhesive such as solder and a manufacturing method thereof.

  Conventionally, in an optical semiconductor device having a semiconductor layer functioning as a power generation region, in order to extract electric power from a semiconductor layer irradiated with light such as sunlight, the semiconductor layer and an external lead wire are electrically connected using a solder electrode or the like. (Patent document 1).

  With reference to FIG. 6 (A), the structure of the conventional photovoltaic apparatus 100 is demonstrated. The photovoltaic device 100 includes a substrate 101 made of a transparent material such as glass, and a transparent electrode layer 102, a semiconductor layer 103, an electrode layer 104, and an insulating layer 105, which are sequentially deposited on the substrate 101. Further, the insulating layer 105 is partially removed to form an opening, and a conductive paste 106 and a solder electrode 107 are welded to the opening.

  When a light beam such as sunlight enters from below the photovoltaic device 100, the light beam passes through the substrate 101 and the transparent electrode layer 102 and reaches the semiconductor layer 103. When the light beam is irradiated, a potential is generated on both main surfaces of the semiconductor layer 103. The generated potential is extracted to the outside via the conductive paste 106 and the solder electrode 107 described above.

The manufacturing method of the photovoltaic device 100 having the above-described structure is as follows. First, a transparent substrate 101 such as glass is prepared, and a transparent electrode layer 102, a semiconductor layer 103, and an electrode layer 104 are sequentially deposited on the upper surface of the substrate 101. Next, the upper surface of the electrode layer 104 is covered with an insulating layer 105 made of an insulating material such as a resin. Furthermore, an opening having a size of, for example, several millimeters square is provided in the insulating layer 105, and a conductive paste 106 is attached to the opening. Connect (not shown).
Japanese Patent Laid-Open No. 10-256578

  However, the photovoltaic device 100 having the above-described structure has a problem that the electrode layer 104 and the like are separated at the peripheral edge of the conductive paste 106.

  This phenomenon will be described with reference to FIG. Since the solder electrode 107 is formed using the wettability of the conductive paste 106, the outer peripheral end portion of the solder electrode 107 substantially coincides with the outer peripheral end portion of the conductive paste 106. For this reason, when the solder electrode 107 is formed by heating and melting to about 200 ° C. or more, a large stress acts on the outer peripheral edge of the conductive paste 106 due to thermal shrinkage. In the figure, this stress is indicated by white arrows.

  When the above-described stress occurs, cracks and peeling occur in each layer formed on the upper surface of the substrate 101 at the outer peripheral edge of the conductive paste 106. And the part in which the solder electrode 107 was formed peeled from the board | substrate 101, and a defect will generate | occur | produce.

  Further, when lead-free solder is used as the above-described solder electrode 107, the above-described problem becomes obvious. This is because, compared with lead eutectic solder, lead-free solder has a high melting temperature, and furthermore, the stress generated by heat shrinkage is large.

  The present invention has been made in view of such problems, and a main object of the present invention is to provide a photovoltaic device with improved solder electrode connection reliability and a method for manufacturing the photovoltaic device. .

  The photovoltaic device of the present invention includes a semiconductor layer, an electrode layer covering the semiconductor layer, a first electrode part connected to the electrode layer, a first electrode part connected to the first electrode part, and the first electrode part Includes a second electrode portion made of a different material, and an outer peripheral end portion of the second electrode portion is positioned inside an outer peripheral end portion of the first electrode portion.

  Furthermore, the photovoltaic device of the present invention includes a substrate made of a transparent material, a first electrode layer made of a transparent conductive material covering the surface of the substrate, and a semiconductor layer covering the first electrode layer. A second electrode layer covering the semiconductor layer, a first electrode part connected to the second electrode layer, and a second electrode made of a material different from the first electrode part connected to the first electrode part And an outer peripheral end portion of the second electrode portion is positioned inside an outer peripheral end portion of the first electrode portion.

  The method for producing a photovoltaic device of the present invention includes a step of covering both main surfaces of a semiconductor layer with an electrode layer, a step of forming a first electrode portion on the main surface of the electrode layer, and a main surface of the electrode layer. And covering the periphery of the first electrode portion with an insulating layer, and depositing a second electrode portion made of a material different from the first electrode portion on the first electrode portion exposed from the insulating layer, And a step of positioning an outer peripheral end portion of the second electrode portion inside an outer peripheral end portion of the first electrode portion.

  In the photovoltaic device and the manufacturing method thereof according to the present invention, the outer peripheral end portion of the second electrode portion made of solder or the like is positioned inside the outer peripheral end portion of the first electrode portion made of conductive paste or the like. Therefore, the stress due to thermal contraction when forming the second electrode portion does not concentrate on the outer peripheral end portion of the first electrode portion. From this, it can suppress that each layer, such as a semiconductor layer, peels in the outer peripheral edge part of a 1st electrode part.

  Furthermore, according to the present invention, even when using lead-free solder that increases the degree of thermal shrinkage described above, stress concentration associated with thermal shrinkage is suppressed, so that peeling of each layer such as a semiconductor layer can be avoided. it can.

  With reference to FIG. 1, the structure of the photovoltaic apparatus 1 (solar cell) of this form is demonstrated. 1A is a plan view of the photovoltaic device 1 as viewed from above, and FIG. 1B is a cross-sectional view taken along the line BB ′ of FIG. 1A. ) Is a cross-sectional view taken along the line CC ′ of FIG.

  Referring to FIG. 1A, the photovoltaic device 1 of the present invention has a configuration in which a semiconductor layer is sandwiched between electrode layers, and an electrode region 33, cells 23 to 25, and an electrode region 32 are formed. ing. A positive (or negative) potential is extracted from the electrode region 33 to the outside. A negative (or positive) potential is extracted from the electrode region 32 to the outside. The cells 23 to 25 function as a power generation region that substantially generates power. Here, the electrode region 33, the cell 23, the cell 24, the cell 25, and the electrode region 32 are connected in series in this order from the left side on the paper surface. Thus, a predetermined voltage is obtained by dividing the power generation region into a plurality of cells and connecting the cells in series. Each cell includes an electrode layer sandwiching a semiconductor layer.

  Referring to FIG. 1B, the photovoltaic device 1 includes a first electrode layer 11, a semiconductor layer 12, a second electrode layer 13, and an insulating layer 14, which are sequentially deposited on the upper surface of a substrate 10. The first electrode portion 15 and the second electrode portion 16 are formed in the opening provided by partially removing the insulating layer 14.

  The substrate 10 is made of a material that can transmit light such as sunlight and mechanically support each layer formed on the upper surface thereof. For example, a glass plate (soda glass) having a thickness of about 1.1 mm to 1.8 mm is suitable as a material for the substrate 10. The upper surface of the substrate 10 is covered with a silicon oxide film (SiO2) (not shown).

  The first electrode layer 11 is an electrode layer that takes out the potential of the semiconductor layer 12 and is made of a transparent conductive material so that light that passes through the substrate 10 and enters from the outside reaches the semiconductor layer 12. Specifically, a transparent electrode such as zinc oxide (ZnO), indium tin oxide (ITO), or tin oxide (SnO 2) having a thickness of 750 nm to 1150 nm (for example, about 950 nm) is employed as the first electrode layer 11. The first electrode layer 11 is divided between cells or between a cell and an electrode region in order to obtain a predetermined voltage.

  The semiconductor layer 12 covers the first electrode layer 11 and is laminated on the entire upper surface of the substrate 10 and has a thickness of 300 nm to 400 nm (for example, 350 nm). The semiconductor layer 12 is formed by stacking amorphous silicon, amorphous silicon carbide, amorphous silicon germanium, or the like on p / n, p / i / n, n / p, or n / i / p. Here, a polycrystalline semiconductor or a single crystal semiconductor may be adopted as the material of the semiconductor layer 12.

  The second electrode layer 13 is an electrode layer that is paired with the first electrode layer 11 described above and extracts a potential from the semiconductor layer 12, and is formed over the entire upper surface of the semiconductor layer 12. As the material of the second electrode layer 13, a laminated body of metal such as W / Al / Ti having a thickness of about 30 μm to 40 μm (for example, 35 μm) is employed.

  The upper surface of the second electrode layer 13 is covered with an insulating layer 14 made of an insulating material such as an epoxy resin. The thickness of the insulating layer 14 is about 10 μm to 15 μm (for example, 12.5 μm).

  Referring to FIGS. 1A and 1B, an insulating paste 17A and the like, a conductive paste 18A and the like are partially provided on the upper surface of the first electrode layer 11.

  The insulating paste 17A and the like are provided between cells or between a cell and an electrode region. Further, referring to FIG. 1A, the insulating paste 17 is also provided on the periphery of the substrate 10. Referring to FIG. 1B, insulating pastes 17A and 17B are provided at both ends so as to sandwich the electrode region 33, and the semiconductor layer 12 and the second electrode layer 13 located above these insulating pastes are partially Has been removed. As a result, the semiconductor layer 12 and the second electrode layer 13 located inside the electrode region 33 are separated from the semiconductor layer 12 and the second electrode layer 13 in other regions, and function as a region for extracting a potential. ing. Furthermore, the insulating paste 17 </ b> C is provided between the second electrode layer 13 of the cell 23 and the second electrode layer 13 of the cell 24. The insulating paste 17A and the like described above function as a layer for stopping the laser in the manufacturing process, and this matter will be described later.

  The conductive paste 18A and the like have a function of connecting the second electrode layer 13 and the first electrode layer 11 in the electrode region or inside the cell. Specifically, referring to the electrode region 33, the conductive paste 18 </ b> A is provided on the upper surface of the first electrode layer 11, and the upper surface penetrates the semiconductor layer 12 and is electrically connected to the second electrode layer 13. ing. As a result, the potential of the lower first electrode layer 11 inside the electrode region 33 can be extracted to the outside via the second electrode layer 13. In addition, the first electrode layer 11 inside the electrode region 33 is continuous with the first electrode layer 11 of the cell 23 adjacent to the electrode region 33.

  Further, in the cell 23, the second electrode layer 13 of the cell 23 and the first electrode layer 11 of the adjacent cell 24 are connected at a place where the conductive paste 18 </ b> B is provided. The first electrode layer 11 of the cell 24 partially extends to the region of the cell 23 and extends. By connecting in this way, the adjacent cells 23 and 24 are connected in series. This connection structure is the same for the cell 24 and the cell 25.

  Referring to FIG. 1B, a first electrode portion 15 and a second electrode portion 16 are formed on the upper surface of the second electrode layer 13 in the electrode region 33. The 1st electrode part 15 consists of thermosetting resins (electrically conductive paste), such as a phenol resin with which Cu was mixed, The thickness is 30 micrometers-40 micrometers (for example, 35 micrometers). The width | variety of the 1st electrode part 15 formed in a rectangle is about 2 mm-4 mm, for example. In this embodiment, the planar size of the first electrode portion 15 is slightly larger than the conductive paste 106 of the background art in order to position the outer peripheral end portion of the first electrode portion 15 outside the second electrode portion 16. Largely formed.

  The outer peripheral end of the first electrode portion 15 is covered with an insulating layer 14. For example, a region of about 100 μm to 500 μm is covered with the insulating layer 14 from the outer peripheral end of the first electrode portion 15 to the inside. An opening in which the insulating layer 14 is not provided is formed inside, and the vicinity of the center of the upper surface of the first electrode portion 15 is exposed from this opening.

  The second electrode portion 16 is made of a conductive adhesive such as solder or lead-free solder, and is provided on the upper surface of the first electrode portion 15 in the vicinity of the central portion that is not covered with the insulating layer 14. Here, Sn / Pb, Sn / Ag, Sn / Ag / Cu, Sn / Bi, Sn / Cu, Sn / Zn, Sn / Zn / Bi, etc. are considered as a composition of the solder used as the 2nd electrode part 16. FIG. It is done. Since the first electrode portion 15 is a conductive paste (for example, Cu paste) excellent in solder wettability, the adhesion strength between the first electrode portion 15 and the second electrode portion 16 is very high.

  Referring to FIG. 1C, a first electrode portion 26 is formed on the upper surface of the second electrode layer 13 in the electrode region 32, and a second electrode portion 27 is formed on the upper surface of the first electrode portion 26. It is welded. Here, the structure of the 1st electrode part 26 and the 2nd electrode part 27 is the same as that of the 1st electrode part 15 and the 2nd electrode part 16 which were mentioned above. That is, the peripheral part of the first electrode part 26 is covered with the insulating layer 14, and the second electrode part 27 made of solder is welded to the upper surface of the first electrode part 26 not covered with the insulating layer 14.

  In the electrode region 32, the second electrode layer 13 of the adjacent cell 25 is continuously extended, and the first electrode portion 26 and the second electrode portion 27 described above are formed on the upper surface of the second electrode layer 13. Yes. The electrode region 32 functions as an external electrode having a polarity different from that of the electrode region 33. That is, when the electrode region 33 functions as a positive electrode, the electrode region 32 functions as a negative electrode, and when the electrode region 33 functions as a negative electrode, the electrode region 32 functions as a positive electrode. Further, in the electrode region 32, the conductive paste 18 </ b> D is provided on the first electrode layer 11, but the first electrode layer 11 becomes an ineffective portion because it is separated from the cell 25. The reason why the conductive paste 18D is provided in the electrode 32 as well as in the electrode region 33 is due to the reason of external design.

  In this embodiment, the outer peripheral end portion of the second electrode portion 16 made of solder or the like is positioned inside the outer peripheral end portion of the second electrode portion 16 made of conductive paste. Specifically, referring to FIG. 1B, the peripheral portion of first electrode portion 15 is covered with insulating layer 14, and only the vicinity of the central portion of first electrode portion 15 is exposed from insulating layer 14. . A second electrode portion 16 made of solder is formed on the upper surface of the central portion of the first electrode portion 15 that is not covered with the insulating layer 14. Accordingly, the position shape of the second electrode portion 16 made of solder is regulated by the insulating layer 14 covering the peripheral portion of the first electrode portion 15. As a result, the outer peripheral end portion of the second electrode portion 16 is located inside the outer peripheral end portion of the first electrode portion 15. In other words, the outer peripheral end portion of the second electrode portion 16 is separated from the outer peripheral end portion of the first electrode portion 15.

  With the above configuration, even when thermal stress is generated when the second electrode portion 16 is welded or used, the stress is dispersed and does not concentrate on the outer peripheral end portion of the first electrode portion 15. Therefore, problems such as peeling of the semiconductor layer at the terminal portion of the first electrode portion 15, which has occurred in the background art, can be suppressed.

  For example, when welding the second electrode portion 16 made of solder, a heating process at around 300 ° C. is required. Therefore, when the second electrode portion 16 is welded, a large thermal stress acts on the first electrode portion 15 and the second electrode portion 16 with heating and cooling. Here, if the outer peripheral end portions of the two coincide, stress concentrates on the outer peripheral end portion, and the semiconductor layer 12 and the like may be peeled off. In this embodiment, as described above, the outer peripheral end portion of the second electrode portion 16 is located inside the outer peripheral end portion of the first electrode portion 15. Therefore, the stress at the time of welding the second electrode portion 16 is not concentrated on the outer peripheral end portion of the first electrode portion 15, but is dispersed throughout the first electrode portion 15. As a result, the stress acting on the second electrode layer 13 and the like located below the outer peripheral end of the first electrode portion 15 is also reduced, and partial peeling and cracking are suppressed. Therefore, the connection reliability in the vicinity of the first electrode portion 15 is improved.

  Furthermore, the connection reliability of the first electrode portion 15 can be improved by the configuration of the present embodiment even under use conditions. Specifically, in order to electrically connect the photovoltaic device 1 to a load, an external lead wire (not shown) or the like is connected to the second electrode portion 16 that is solder. Therefore, when a tensile stress acts on the second electrode portion 16 by an unillustrated external lead wire, the first electrode portion 15 may be peeled off from the second electrode layer 13. In this embodiment, since the peripheral portion of the first electrode portion 15 is covered with the insulating layer 14, the adhesion strength between the first electrode portion 15 and the second electrode layer 13 is improved. For this reason, even if tensile stress is applied by an external lead wire (not shown), the separation of the first electrode portion 15 from the photovoltaic device 1 is suppressed.

  Furthermore, the electrode region 33 where the first electrode portion 15 and the second electrode portion 16 are formed is in a state of being partially separated from other regions. Specifically, the second electrode layer 13 and the semiconductor layer 12 inside the electrode region 33 are separated from the second electrode layer 13 and the semiconductor layer 12 in other regions. The electrode region 33 is thus partially separated from other regions in order to connect the lower first electrode layer 11 to the outside. From this, the electrode region 33 is in a state where it is easy to peel off because the lower first electrode layer 11 is only continuous with other regions. In this embodiment, by taking the above-described measures (that is, by positioning the outer peripheral end portion of the second electrode portion 16 on the inner side of the first electrode portion 15), the peeling of the first electrode layer 11 in the electrode region 33 is suppressed. is doing.

  Next, with reference to FIGS. 2 to 5, a method for manufacturing the photovoltaic device having the above-described configuration will be described. Hereinafter, a method for manufacturing a photovoltaic device including a semiconductor layer made of amorphous silicon will be described. However, the manufacturing method of this embodiment can also be applied to a method for manufacturing a photovoltaic device made of single crystal silicon or polycrystalline silicon. It is.

  Referring to FIG. 2, first, first electrode layer 11 formed on the upper surface of substrate 10 is separated into cells. FIG. 2A is a cross-sectional view showing this step, and FIG. 2B is a plan view.

  Referring to FIG. 2A, first, a first electrode layer 11 is formed on the upper surface of a substrate 10 made of glass having a thickness of about 1.1 mm to 1.8 mm. Actually, the upper surface of the substrate 10 is covered with a silicon oxide film (SiO 2) (not shown), and the first electrode layer 11 is formed on the upper surface of the silicon oxide film using a well-known film formation technique such as CVD. As the material of the first electrode layer 11, a transparent electrode such as zinc oxide (ZnO), indium tin oxide (ITO), or tin oxide (SnO2) is employed, and the thickness thereof is 750 nm to 1150 nm (for example, about 950 nm).

  After the first electrode layer 11 is formed over the entire upper surface of the substrate 10, the first electrode layer 11 is partially removed using a laser 19 and divided into regions of a predetermined size. In this step, a YAG laser is used as the laser 19.

  With reference to the plan view of FIG. 2B, an ablation line 30A and the like for removing the first electrode layer 11 by the laser described above are formed on the upper surface of the substrate 10. In the figure, the cutting line 30A and the like are indicated by a one-dot chain line. Furthermore, the electrode region 33, the cell 23, the cell 24, the cell 25, and the electrode region 32 to be formed are each surrounded by a dotted line.

  First, the cutting lines 30 </ b> A, 30 </ b> B, 30 </ b> C, and 30 </ b> D are lines for cutting the first electrode layer 11 in the peripheral portion of the substrate 10. On the paper surface, cutting lines 30A, 30B, 30C, and 30D are formed linearly along the upper peripheral portion, the lower peripheral portion, the left peripheral portion, and the right peripheral portion of the substrate 10. A portion that substantially functions as a power generation region is surrounded by the cutting line 30A or the like, and the first electrode layer 11 in other portions is insulated from the power generation region. Therefore, the 1st electrode layer 11 which functions as a power generation field is insulated from the exterior, and malfunctions, such as a short circuit, are controlled.

  The ablation lines 30E, 30F, and 30G are ablation areas provided to partially remove the first electrode layer 11 linearly and separate the first electrode layer 11 of each cell. The first electrode layer 11 of the cell 23 and the first electrode layer 11 of the cell 24 are divided by the cutting line 30E. Further, the first electrode layer 11 of the cell 24 and the first electrode layer 11 of the cell 25 are separated by the cutting line 30F. Further, the cell 25 and the first electrode layer 11 in the electrode region 32 are separated by the cutting line 30G. In addition, since the electrode region 33 and the cell 23 need to be electrically connected to extract the potential to the outside, no ablation line is provided between them.

  Next, referring to FIG. 3, a semiconductor layer or the like is further deposited above the substrate 10. FIG. 3A is a plan view of the substrate 10 in this step, and FIGS. 3B and 3C are cross-sectional views showing this step. Here, FIGS. 3B and 3C are cross-sectional views taken along line B-B ′ of FIG.

  Referring to FIGS. 3A and 3B, first, insulating paste 17A and the like, conductive paste 18A and the like are formed in a predetermined region of substrate 10 using a screen printing technique. Referring to FIG. 3A, an insulating paste 17 is applied in the vicinity of the outer peripheral edge of the substrate 10 and between the cells. Then, a conductive paste 18A or the like is applied to the inside of each electrode region and each cell. Here, the insulating paste 17 is made of a material mainly composed of glass, and has a function of protecting the first electrode layer 11 by blocking a laser irradiated from above in a later step. The conductive paste 18A and the like are made of a material obtained by mixing Ag powder and glass and have conductivity. The conductive paste 18A and the like function as part of a portion that penetrates the semiconductor layer and makes the first electrode layer and the second electrode layer conductive in a later step. Moreover, after apply | coating the above-mentioned insulating paste and electrically conductive paste, it baked at about 450 to 500 degreeC, and is solidified.

  The conductive paste 18A and the like will be described in detail. The substantially entire surface of the electrode region 33 is covered with the conductive paste 18A. In the cells 23 and 24, the conductive pastes 18B and 18C are applied along the right side surface. The region where the conductive pastes 18B and 18C are applied functions as a region for connecting cells in series. Furthermore, substantially the entire surface of the electrode region 32 is covered with the conductive paste 18D.

  Referring to FIG. 3C, next, the semiconductor layer 12 and the second electrode layer 13 are sequentially formed so as to cover the first electrode layer 11 and the like. The semiconductor layer 12 is made of, for example, amorphous silicon having a thickness of 300 nm to 400 nm, amorphous silicon carbide, amorphous silicon germanium, or the like. The semiconductor layer 12 is formed by stacking this semiconductor material on p / n, p / i / n, n / p or n / i / p. Here, instead of amorphous silicon or the like, single crystal silicon or polycrystalline silicon may be employed as the semiconductor layer 12.

  The second electrode layer 13 is formed on the upper surface of the semiconductor layer 12, and is formed by sequentially depositing W / Al / Ti. The thickness of the second electrode layer 13 is about 10 μm to 15 μm (for example, 12.5 μm).

  The semiconductor layer 12 and the second electrode layer 13 described above are formed over the entire surface of the substrate 10.

  Referring to FIG. 4, by irradiating with laser, second electrode layer 13 and semiconductor layer 12 are partially removed, and semiconductor layer 12 and second electrode layer 13 of each cell are separated. FIG. 4A is a plan view showing this step, and FIG. 4B is a cross-sectional view taken along line B-B ′ of FIG.

  In this step, laser irradiation with a YAG laser is performed by linearly scanning from one side of the substrate 10 to the opposite side (from the upper end to the lower end on the paper). By this laser irradiation, the second electrode layer 13 and the semiconductor layer 12 are removed, and cut lines 31A to 31H are formed. In addition, the cutting lines 31A, 31C, 31E, and 31G are formed in a region where the insulating paste 17 is provided, and are provided to separate the second electrode layer 13 and the semiconductor layer 12 between cells. On the other hand, the cutting lines 31B, 31D, 31F, and 31H are formed in regions where the conductive paste 18A and the like are provided, and connect the second electrode layer 13 and the first electrode layer 11 through the semiconductor layer 12. To be provided.

  Referring to FIG. 4B, this process will be described in detail. The YAG laser 20 is irradiated from above to remove the second electrode layer 13 and the semiconductor layer 12 in the thickness direction. For example, the insulating paste 17 </ b> A is disposed on the left end portion of the electrode region 33. When the laser 20 is irradiated from above the insulating paste 17A, the second electrode layer 13 and the semiconductor layer 12 are removed. Then, the removal by the laser 20 is stopped by the insulating paste 17A. That is, the insulating paste 17A functions as a stopper layer that prevents the laser 20 from proceeding. Due to the action of the insulating paste 17A, the laser 20 used in this step does not reach the first electrode layer 11. It is also conceivable that the irradiated second electrode layer 13 is eluted by the laser irradiation in this step and flows into the groove formed by the laser 20. Even if such a phenomenon occurs, in this embodiment, since the insulating paste 17A is provided at a place where the removal is performed by the laser 20, the eluted second electrode layer 13 does not reach the first electrode layer 11.

  When the laser 20 reaches the first electrode layer 11, the second electrode layer 13 and the first electrode layer 11 are brought into conduction at an unnecessary portion, and there is a possibility that a problem such as a short circuit may occur. In this embodiment, the insulating paste 17A is blocked before the laser 20 reaches the first electrode layer 11, so that this problem is avoided.

  Even in the places where the insulating pastes 17B and 17C are provided, the upper second electrode layer 13 and the semiconductor layer 12 are removed by the laser 20 in the same manner as described above. Also here, the insulating pastes 17B and 17C have a function of stopping the progress of the laser 20 at a predetermined location.

  On the other hand, at the place where the conductive paste 18A is provided, the laser 20 is irradiated from above, and the second electrode layer 13 and the semiconductor layer 12 are partially removed. Simultaneously with this removal, the portion of the second electrode layer 13 irradiated with the laser 20 is dissolved, and the dissolved conductive material flows into the portion drilled by the laser 20 to form the connection portion 28. By the connection portion 28, the first electrode layer 11 and the second electrode layer 13 are connected through the semiconductor layer 12 inside the electrode region 33.

  The electrode region 33 is removed and welded by the laser 20 as described above, so that it does not function as a solar cell but has an electrode-like function for extracting the potential to the outside. That is, in the electrode region 33, the semiconductor layer 12 and the second electrode layer 13 above the insulating pastes 17A and 17B are removed (removal lines 31A and 31C shown in FIG. 4A are provided). Thus, the semiconductor layer 12 and the second electrode layer 13 in the electrode region 33 are insulated from the semiconductor layer 12 and the second electrode layer 13 in other regions. In particular, the semiconductor layer 12 and the second electrode layer 13 in the electrode region 33 are separated from the semiconductor layer 12 and the second electrode layer 13 in the cell 23 at a location where the cutting line 31C is provided.

  On the other hand, the first electrode layer 11 of the cell 23 extends continuously to the electrode region 33. In the electrode region 33, the first electrode layer 11 is connected to the second electrode layer 13 through the conductive paste 18 </ b> A and the connection portion 28. Therefore, the cell 23 can be connected to the outside via the electrode region 33. Specifically, the first electrode layer 11 of the cell 23 → the first electrode layer 11 of the electrode region 33 → the conductive paste 18 </ b> A → the connection portion 28 → the second electrode layer 13 of the electrode region 33.

  A conductive paste 18B is provided at the right end of the cell 23, and a connection portion 29 is provided above the conductive paste 18B by irradiation of a laser 20. As a result, the second electrode layer 13 of the cell 23 and the first electrode layer 11 of the cell 24 are electrically connected. This connection structure is the same for the cell 24 and the cell 25. The cell 25 and the electrode region 32 are not provided with the ablation line described above. That is, in the cell 25 and the electrode region 32, the second electrode layer 13 and the semiconductor layer 12 are continuous.

  Next, referring to FIG. 5, the insulating layer 14, the first electrode portion 15, and the second electrode portion 16 are formed on the upper surface of the second electrode layer 13. Each drawing in FIG. 5 is a cross-sectional view showing this step.

  With reference to FIG. 5A, the first electrode portion 15 is formed on the upper surface of the second electrode layer 13 in the electrode region 33. The first electrode portion 15 is made of a thermosetting resin (conductive paste) such as phenol resin mixed with fine particles made of a conductive material such as Cu. The first electrode portion 15 is formed by thermosetting a paste applied to the upper surface of the second electrode layer 13 by screen printing or the like. The planar size of the first electrode portion 15 is, for example, a rectangle of about 2 mm to 4 mm square, and the thickness is about 30 μm to 40 μm.

  With reference to FIG. 5 (B), next, the insulating layer 14 is provided so that the periphery of the 2nd electrode layer 13 and the 1st electrode part 15 may be covered. The insulating layer 14 is made of an insulating material such as a resin material and has a thickness of about 10 μm to 15 μm. A specific method for manufacturing the insulating layer 14 is to use a screen plate masked so as to expose the upper surface of the first electrode portion 15, and to form an insulating layer around the second electrode layer 13 and the first electrode portion 15. 14 is applied. As a result, a configuration in which the peripheral portion of the first electrode portion 15 is covered with the insulating layer 14 is obtained. For example, as for the 1st electrode part 15, the area | region (W1) about 100 micrometers-500 micrometers from an outer peripheral edge part is coat | covered with the insulating layer 14. FIG.

  Next, referring to FIG. 5C, the second electrode portion 16 made of solder is welded to the upper surface of the first electrode portion 15. Specifically, the second electrode portion 16 is welded by heating and melting using a solder paste in which flux and solder powder are mixed, or using flux-cored yarn solder. The lead wire 22 is electrically connected to the photovoltaic device by the second electrode portion 16. As described above, the peripheral portion of the first electrode portion 15 is covered with the insulating layer 14, and the upper surface near the center portion of the first electrode portion 15 is exposed from the opening provided in the insulating layer 14. Therefore, the outer peripheral end portion of the second electrode portion 16 formed in this opening is located inside the outer peripheral end portion of the first electrode portion 15. The first electrode portion and the second electrode portion having such a structure are also formed in the electrode region 32 shown in FIG.

  From the above, even if thermal stress is generated as the second electrode portion 16 is welded, there are problems such as peeling of the first electrode layer 11 and cracks at the terminal portion of the first electrode portion 15. It is suppressed. Specifically, since the first electrode layer 11, the semiconductor layer 12, and the second electrode layer 13 are thin films having a thickness of several hundred nm, the mechanical strength of these layers is very weak. The second electrode layer 13 and the semiconductor layer 12 around the electrode region 33 are removed by the laser processing described above. For these reasons, at the outer peripheral end portion of the first electrode portion 15, the condition is such that peeling or the like is likely to occur in a thin material such as the first electrode layer 11.

  In this embodiment, the outer peripheral end portion of the second electrode portion 16 is provided inside the outer peripheral end portion of the first electrode portion 15. That is, the outer peripheral end portion of the second electrode portion 16 and the outer peripheral end portion of the first electrode portion 15 do not overlap. As a result, even if thermal stress is applied during the welding operation of the second electrode portion 16, the thermal stress is relaxed by the relatively wide first electrode portion 15. Therefore, thermal stress acting on each layer such as the first electrode layer 11 is also reduced, and the occurrence of peeling and cracking of the first electrode layer 11 and the like is suppressed.

  Furthermore, when lead-free solder is used as the material of the second electrode portion 16, the temperature at which the second electrode portion 16 is melted increases, and the lead-free solder itself is a brittle material. It tends to grow. In this embodiment, since stress is suppressed from concentrating on the periphery of the first electrode portion 15 by the above-described method, problems such as peeling of the semiconductor layer 12 can be avoided even when lead-free solder is used.

  Through the above steps, the photovoltaic device 1 having the configuration shown in FIG. 1 is manufactured.

  In the above description, the embodiment has been described by taking the photovoltaic device as an example, but the present embodiment can also be applied to other devices. For example, this embodiment can be applied to a flat display such as a liquid crystal display.

It is a figure which shows the photovoltaic apparatus of this invention, (A) is a top view, (B) is sectional drawing, (C) is sectional drawing. It is a figure which shows the manufacturing method of the photovoltaic apparatus of this invention, (A) is sectional drawing, (B) is a top view. It is a figure which shows the manufacturing method of the photovoltaic apparatus of this invention, (A) is a top view, (B) is sectional drawing, (C) is sectional drawing. It is a figure which shows the manufacturing method of the photovoltaic apparatus of this invention, (A) is a top view, (B) is sectional drawing. It is a figure which shows the manufacturing method of the photovoltaic apparatus of this invention, and (A)-(C) is sectional drawing. It is a figure which shows the structure of the conventional photovoltaic apparatus, (A) is sectional drawing, (B) is sectional drawing.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Photovoltaic apparatus 10 Board | substrate 11 1st electrode layer 12 Semiconductor layer 13 2nd electrode layer 14 Insulating layer 15 1st electrode part 16 2nd electrode part 17, 17A, 17B, 17C, 17D Insulating paste 18A, 18B Conductive paste 19 , 20 Laser 22 Lead wire 23, 24, 25 Cell 26 First electrode part 27 Second electrode part 28, 29 Connection part 30A, 30B, 30C, 30D, 30E, 30F, 30G Ablation line 31A, 31B, 31C, 31D, 31E, 31F, 31G, 31H Cutting line 32 Electrode region 33 Electrode region

Claims (8)

A semiconductor layer; an electrode layer covering the semiconductor layer; a first electrode portion connected to the electrode layer; and a second electrode portion connected to the first electrode portion and made of a material different from the first electrode portion And
The photovoltaic device according to claim 1, wherein an outer peripheral end portion of the second electrode portion is positioned inside an outer peripheral end portion of the first electrode portion. A substrate made of a transparent material, a first electrode layer made of a transparent conductive material covering the surface of the substrate, a semiconductor layer covering the first electrode layer, and a second electrode layer covering the semiconductor layer And a first electrode part connected to the second electrode layer, and a second electrode part connected to the first electrode part and made of a material different from the first electrode part,
The photovoltaic device according to claim 1, wherein an outer peripheral end portion of the second electrode portion is positioned inside an outer peripheral end portion of the first electrode portion.   The photovoltaic device according to claim 1, wherein the first electrode portion is a conductive paste, and the second electrode portion is solder. The surface of the electrode layer is covered with an insulating layer made of an insulating material,
The outer peripheral end portion of the second electrode portion is separated from the outer peripheral end portion of the first electrode portion by covering at least a peripheral portion of the first electrode portion with the insulating layer. 1. The photovoltaic device according to 1. The surface of the second electrode layer is covered with an insulating layer made of an insulating material,
The outer peripheral end portion of the second electrode portion is separated from the outer peripheral end portion of the first electrode portion by covering at least a peripheral portion of the first electrode portion with the insulating layer. 2. The photovoltaic device according to 2.   The photovoltaic device according to claim 2, wherein the second electrode layer in a region where the first electrode portion is formed is separated from the second electrode layer in another region. Covering both main surfaces of the semiconductor layer with electrode layers;
Forming a first electrode portion on the main surface of the electrode layer;
Covering the main surface of the electrode layer and the periphery of the first electrode portion with an insulating layer;
A second electrode part made of a material different from that of the first electrode part is attached to the first electrode part exposed from the insulating layer, and an outer peripheral end of the second electrode part is attached to an outer periphery of the first electrode part A method of manufacturing a photovoltaic device, comprising: a step of positioning the inner side of the end portion. 8. The method of manufacturing a photovoltaic device according to claim 7, wherein the first electrode portion is a conductive paste, and the second electrode portion is formed by melting solder.

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