JP2007258335A - FIELD EFFECT TRANSISTOR AND IMAGE DISPLAY DEVICE USING THE SAME - Google Patents

Abstract

Ｒは芳香族基、置換芳香族基から選ばれ、Ａはシラン残基、チタン残基、有機酸残基から選ばれ、ｎは０〜２０の範囲である。
【選択図】 なし
A field effect transistor having high mobility and low hysteresis is provided.
A field effect transistor having an organic semiconductor layer provided between a source electrode and a drain electrode, an insulating layer, and a gate electrode, represented by the general formula (1) between the insulating layer and the semiconductor layer. Field effect transistor having a thin film formed from the compound to be produced.
[Chemical 1]

R is selected from an aromatic group and a substituted aromatic group, A is selected from a silane residue, a titanium residue, and an organic acid residue, and n is in the range of 0-20.
[Selection figure] None

Description

  The present invention relates to a field effect transistor having an organic semiconductor layer, an insulating layer, and a thin film between the semiconductor layer and the insulating layer.

  In a field effect transistor (hereinafter referred to as an FET element) using an organic semiconductor, there is a possibility that the semiconductor layer can be directly formed on a substrate by a simple process such as an inkjet method or a printing method. By adopting the above process, it can be expected that the manufacturing cost can be reduced as compared with the case of using an inorganic semiconductor. In addition, since there is a possibility of forming a thin and light integrated circuit with a large area, application to liquid crystal displays, organic EL displays, IC cards, and the like is expected.

  Here, mobility and hysteresis are mentioned as important indexes indicating the characteristics of the organic FET element. The improvement in mobility means that the driving speed is increased and the on-current is increased. In the FET element, the current between the source electrode and the drain electrode is controlled by controlling the gate voltage. At this time, when a positive to negative voltage is applied to the gate electrode and when a negative to positive voltage is applied to the gate electrode, the current between the source electrode and the drain electrode has different current values even at the same gate voltage. May show. This phenomenon is referred to as hysteresis. When the hysteresis is large, for example, when used in a liquid crystal display device, there is a problem in that the image quality is inferior because the current flowing at a constant gate voltage is different. In an FET element using an organic semiconductor as a semiconductor layer, it is an important issue to achieve performance that meets industrial demands in terms of mobility and hysteresis.

  An FET element using pentacene, regioregular polyalkylthiophene, or the like as an organic semiconductor and showing high mobility is known (see Patent Document 1). An FET element using a low molecule such as pentacene exhibits high mobility when the crystallinity is high. Also, an FET element using a polymer such as polyalkylthiophene exhibits high mobility when the orientation is high. This is because the movement of charges is likely to occur due to the formation of π-π stacking between molecules. That is, the mobility increases as the crystallinity and orientation of the organic semiconductor increase. As a method for improving the crystallinity and orientation of the organic semiconductor, a method of forming a thin film between the semiconductor layer and the insulating layer can be given. For example, it is known that when a monomolecular layer is formed of a compound having a long-chain alkyl group, the surface energy on the insulating layer is reduced, so that the crystallinity and orientation of the organic semiconductor are improved (see Non-Patent Document 1). ). However, this technique increases hysteresis. When the orientation of the semiconductor layer is improved, the mobility is improved, but on the other hand, charge is trapped in the domain between the orientations, so that hysteresis occurs.

  Further, there is a technique having a thin film formed of a silica compound between a semiconductor layer and an insulating layer (see Patent Documents 2 and 3). In this technique, an aminoalkylsilane compound or a fluorinated alkylsilane compound is used as the silica compound, and the threshold voltage can be controlled. However, the mobility is not improved and the hysteresis is larger.

  In addition, there is a technique having a thin film formed of a silica compound having a π-electron conjugated functional group between a semiconductor layer and an insulating layer (Patent Documents 4 and 5). However, the silica compounds having a π-electron conjugated functional group disclosed in Patent Documents 4 and 5 are mainly used as an organic semiconductor layer. In a monomolecular film, although the semiconductor layer has high crystallinity, The mobility is low because the thickness is too thin. In addition, in the case of a thin film in which a silica compound having a π-electron conjugated functional group is laminated, a highly crystallized part and a non-crystallized part exist, and the non-crystallized part is a highly crystallized part. Since the resistance is higher than that of the current, current hardly flows, and once the charge flows into the amorphous portion, the charge is trapped and hysteresis is increased.

  In order to reduce hysteresis, an FET element has been proposed in which a functional layer containing an electron-accepting substance is provided in contact with a semiconductor layer (see Patent Document 6). However, when a substance having a high electron-accepting property is used, holes are generated in the semiconductor layer and there is a problem in that off-current is increased. Further, when the off-current is increased, the on / off ratio is decreased and the hysteresis is also reduced. However, in this case, the important on / off ratio of the transistor characteristics is decreased, so that performance that meets industrial requirements cannot be achieved.

As another method for reducing hysteresis, an FET element has been proposed in which an insulating layer made of an aromatic ring-containing polymer is laminated on a side of the organic semiconductor layer different from the gate insulating layer (see Patent Document 7). However, since this FET element undergoes a process of coating a solution containing an aromatic ring-containing polymer on the organic semiconductor layer, an organic semiconductor layer that is insoluble in an organic solvent must be selected. Semiconductors are limited. Even if an organic semiconductor that is insoluble in an organic solvent can be used, there is a risk that the high order and crystallinity of the organic semiconductor layer may be lost and mobility may be reduced.
JP-A-6-177380 (Claim 1) Japanese Patent Laying-Open No. 2005-32774 (Claim 1) JP 2005-228968 A (Claim 1) JP-A-2005-39222 (Claim 1) JP-A-2005-298485 (14th paragraph) Japanese Patent Laying-Open No. 2005-19466 (Claim 1) JP 2005-101555 A (Claim 1) IEEE Electron Devices Letters (USA) vol. 18, no. 12, p. 606-608 (1997)

  As described above, it has been difficult for FET devices using conventional organic semiconductors as semiconductor layers to achieve both improvement in mobility and reduction in hysteresis. An object of the present invention is to provide an FET element that achieves both improvement in mobility of an organic semiconductor layer and reduction in hysteresis.

  That is, the present invention is a field effect transistor having an organic semiconductor layer provided between a source electrode and a drain electrode, an insulating layer, and a gate electrode, and is represented by the general formula (1) between the insulating layer and the semiconductor layer. An image display device having a thin film formed from the compound represented, and using the thin film.

  In general formula (1), R is selected from an aromatic group and a substituted aromatic group, A is selected from a silane residue, a titanium residue, and an organic acid residue, and n is in the range of 0-20.

  The field effect transistor obtained by the present invention can improve both the characteristics of mobility increase and hysteresis reduction.

  The present invention is an FET element having a thin film formed of a compound represented by the general formula (1) between an insulating layer and an organic semiconductor layer of the FET element. The present invention will be described below.

  An FET element is composed of a source electrode, a drain electrode, a gate electrode, an insulating layer, an organic semiconductor layer, and the like, and the current flowing between the source electrode and the drain electrode can be controlled by changing the gate voltage. The mobility can be calculated from the characteristics using the following equation (2).

μ = (δId / δVg) L · D / (W · ε r · ε · Vsd) (2)
However Id is the current between the source and drain, Vsd is the voltage between the source and the drain, Vg is the thickness of the gate voltage, D is the insulating layer, L is the channel length, W is the channel width, epsilon _r is the relative permittivity of the insulating layer , Ε is the dielectric constant of vacuum (8.85 × 10 ⁻¹² F / m).

Hysteresis will be described with reference to the schematic diagram of the Vg-Id characteristic of FIG. The current value of Vsd when a positive to negative voltage is applied to the gate electrode is Ia, the current value of Vsd when a negative to positive voltage is applied to the gate electrode is Ib, and each of the absolute values of Ib and Ia and Ib is large. With the current value as Ic, the maximum value when the absolute value of the difference between Ia and Ib is obtained for each Vg is used, and the value calculated from the following equation (3) is defined as hysteresis.
| Ia−Ib | / | Ic | (3)

  In the present invention, the thin film formed between the organic semiconductor layer and the insulating layer has a compound represented by the following general formula (1).

  In general formula (1), R is selected from an aromatic group and a substituted aromatic group, A is selected from a silane residue, a titanium residue, and an organic acid residue, and n is in the range of 0-20. Generally, since the Fermi level is different between the insulating layer and the organic semiconductor layer, charges are trapped at the interface between the insulating layer and the semiconductor layer, and hysteresis occurs. In the present invention, by using the compound represented by the general formula (1) between the insulating layer and the semiconductor layer, charges trapped at the interface can be relaxed, which is effective in reducing hysteresis. An FET element having a thin film formed from the compound represented by the general formula (1) between the insulating layer and the organic semiconductor layer does not have a thin film formed from the compound represented by the general formula (1). Compared to the case, the mobility can be improved, the off-current can be reduced, and the threshold voltage can be controlled.

  Specific examples of the aromatic group of R in the general formula (1) include benzene ring, biphenyl ring, pyrene ring, perylene ring, coronene ring, naphthalene ring, anthracene ring, tetracene ring, pentacene ring, hexacene ring, heptacene ring, An aromatic group consisting of a hydrocarbon such as an octacene ring or a polycyclic aromatic group can be mentioned. In addition, heterocyclic aromatic groups such as a pyrrole ring, a pyridine ring, a pyrimidine ring, a furan ring, and a thiophene ring having a hetero atom such as a nitrogen atom, an oxygen atom, or a sulfur atom can be given. Among the aromatic groups, an aromatic hydrocarbon group and a substituted aromatic hydrocarbon group are preferable because charges on the interface can be more relaxed. In addition, the hydrogen atom of the aromatic group is changed to a functional group such as an alkyl group, arylene group, carboxyl group, acetyl group, cyano group, nitro group, halogen atom, amino group, mercapto group, alkylthio group, hydroxyl group, or alkoxy group. It may be a substituted aromatic group.

  A in the general formula (1) is selected from a silane residue, a titanium residue, and an organic acid residue. Each functional group of A can form a thin film by reacting with the surface of the insulating layer and chemically bonding. The silane residue or titanium residue of A may have a halogen atom, a hydroxyl group, or an alkoxy group. The halogen atom is selected from fluorine, chlorine, bromine and iodine, and the alkoxy group is selected from a linear alkyl group, a branched alkyl group, and an aryl group, but has a high reactivity with the substrate surface, a halogen atom or a methoxy group, Alkoxy groups composed of 1 to 4 carbon atoms such as ethoxy group, propyl group, isopropyl group and butyl group are preferred. The organic acid residue is a residue from a functional group that exhibits acidity in an organic compound, and is selected from, for example, carboxylic acid, phosphoric acid, sulfonic acid, and the like that are highly reactive with the substrate surface. The n of the methylene group is in the range of 0-20. When there is no methylene group connecting A and R in the general formula (1) (n = 0), it becomes a compound in which R is directly bonded to A and can exhibit the effects of the present invention. It is more effective by relaxing the charge on the interface. Further, when the number of methylene groups increases, the molecular chains are easily entangled and it becomes difficult to form a dense thin film. Further, when the number of methylene groups increases, the distance between the insulating layer and the semiconductor layer increases, and the charge relaxation effect at the interface decreases. From the above, n is preferably in the range of 1 to 12, more preferably n is in the range of 1 to 6.

  Specific examples of the compound represented by the general formula (1) include phenyltrichlorosilane, naphthyltrichlorosilane, anthracentrichlorosilane, pyrenetrichlorosilane, perylenetrichlorosilane, coronenetrichlorosilane, thiophenetrichlorosilane, pyrroletrichlorosilane, and pyridinetrichlorosilane. , Phenyltrimethoxysilane, phenyltriethoxysilane, naphthyltrimethoxysilane, naphthyltriethoxysilane, anthracentrimethoxysilane, anthracentriethoxysilane, pyrenetrimethoxysilane, pyrenetriethoxysilane, thiophenetrimethoxysilane, thiophenetriethoxysilane Aromatic silane compounds such as phenylmethyltrichlorosilane, phenylethyltrichlorosilane, phenyl Propyltrichlorosilane, phenylbutyltrichlorosilane, phenylhexyltrichlorosilane, phenyloctyltrichlorosilane, naphthylmethyltrichlorosilane, naphthylethyltrichlorosilane, anthracenemethyltrichlorosilane, anthraceneethyltrichlorosilane, pyrenemethyltrichlorosilane, pyreneethyltrichlorosilane, Aromatic alkylsilane compounds such as thiophenemethyltrichlorosilane, thiopheneethyltrichlorosilane, aminophenyltrichlorosilane, hydroxyphenyltrichlorosilane, chlorophenyltrichlorosilane, dichlorophenyltrichlorosilane, trichlorophenyltrichlorosilane, bromophenyltrichlorosilane, fluorophenyltrichlorosilane, Difluo Substituted aromatic silane compounds such as phenyltrichlorosilane, trifluorophenyltrichlorosilane, tetrafluorophenyltrichlorosilane, pentafluorophenyltrichlorosilane, iodophenyltrichlorosilane, cyanophenyltrichlorosilane, phenyltrichlorotitanium, naphthyltrichlorotitanium, anthracentrichlorotitanium , Pyrene trichloro titanium, perylene trichloro titanium, coronene trichloro titanium, thiophene trichloro titanium, pyrrole trichloro titanium, pyridine trichloro titanium, phenyl trimethoxy titanium, phenyl triethoxy titanium, naphthyl trimethoxy titanium, naphthyl triethoxy titanium, anthrac trimethoxy titanium, Anthracentriethoxytitanium, pyrenetrimethoxy Aromatic titanium compounds such as titanium, pyrenetriethoxytitanium, thiophenetrimethoxytitanium, thiophenetriethoxytitanium, phenylmethyltrichlorotitanium, phenylethyltrichlorotitanium, phenylpropyltrichlorotitanium, phenylbutyltrichlorotitanium, phenylhexyltrichlorotitanium, phenyloctyl Aromatic alkyl titanium compounds such as trichlorotitanium, naphthylmethyltrichlorotitanium, naphthylethyltrichlorotitanium, anthracenemethyltrichlorotitanium, anthraceneethyltrichlorotitanium, pyrenemethyltrichlorotitanium, pyreneethyltrichlorotitanium, thiophenemethyltrichlorotitanium, thiopheneethyltrichlorotitanium, Phenyl carboxylic acid, naphthyl carboxylic acid, anthracene Aromatic carboxylic acids such as rubonic acid, pyrenecarboxylic acid, perylenecarboxylic acid, coronenecarboxylic acid, thiophenecarboxylic acid, pyrrolecarboxylic acid, pyridinecarboxylic acid, phenylmethylcarboxylic acid, phenylethylcarboxylic acid, phenylpropylcarboxylic acid, phenylbutyl Carboxylic acid, phenylhexylcarboxylic acid, phenyloctylcarboxylic acid, naphthylmethylcarboxylic acid, naphthylethylcarboxylic acid, anthracenemethylcarboxylic acid, anthraceneethylcarboxylic acid, pyrenemethylcarboxylic acid, pyreneethylcarboxylic acid, thiophenemethylcarboxylic acid, thiophenethyl Aromatic alkyl carboxylic acids such as carboxylic acids are exemplified.

  Although the thin film formed from the compound represented by the general formula (1) may be a monomolecular layer or an aggregate of molecules, the orientation of the aromatic group of the compound represented by the general formula (1) and the thin film In view of the resistance, the thin film is preferably 10 nm or less, and more preferably a monomolecular film. Moreover, the above-mentioned thin film contains what was formed by condensing with the functional group A and the substrate surface which exist in the compound represented by General formula (1). A dense and strong film can be formed by chemically reacting, for example, a silyl halide group of the functional group A in the compound represented by the general formula (1) with, for example, a hydroxyl group on the substrate surface. When only the compound represented by the general formula (1) is laminated on the strong film after the reaction, it was formed only from the compound represented by the general formula (1) by washing or the like. By removing the layer, a monomolecular film formed by condensation between the functional group A of the compound represented by the general formula (1) and the substrate surface can be obtained.

  An organic semiconductor layer is used for the FET element of the present invention. The organic semiconductor is not particularly limited as long as it is a semiconductor containing an organic substance as a main component. Specifically, condensed aromatic hydrocarbons such as naphthacene, pentacene, pyrene and fullerene, macrocyclic compounds such as phthalocyanine and porphyrin, and oligothiophenes containing 4 or more thiophene rings such as α-sexithiophene and dialkylsexithiophene Thiophene ring, benzene ring, fluorene ring, naphthalene ring, anthracene ring, thiazole ring, thiadiazole ring, benzothiazole ring in total, or anthradithiophene, α, α'-bis (dithieno Condensed thiophene such as thiophene) and derivatives thereof, naphthalenetetracarboxylic anhydride, naphthalenetetracarboxylicsandiimide, perylenetetracarboxylic anhydride, perylenetetracarboxylicsandiimide and other aromatic carboxylic acid anhydrides and imidized products thereof, copper phthalocyanine , Tetrabenzoporphyrin and its metal salts such as macrocycles, polythiophene, polyfluorene, polythienylene vinylene, polyphenylene vinylene, polyphenylene, polyacetylene, polydiacetylene, polypyrrole, polyaniline, polythiazole, polypyrene, polycarbazole, polyfuran, polyfuran Examples thereof include conjugated polymers such as indole polymers and copolymers thereof. In addition, the organic semiconductor material can be used alone, but can also be used in a mixture with other materials, and further can be used in a laminated structure with other layers.

  Among the materials used for the organic semiconductor layer, a conjugated polymer excellent in moldability and film stability is preferable. The type of conjugated polymer used in the semiconductor layer is not particularly limited, but polythiophene, polyfluorene, polythienylene vinylene, polyphenylene vinylene, polyphenylene, polyacetylene, polydiacetylene, polypyrrole, polyaniline, polythiazole, polypyrene, polycarbazole, polyfuran. And polyindole-based polymers and copolymers thereof. Among them, it is preferable to use a polythiophene polymer or a copolymer containing a polythiophene unit as a semiconductor having excellent semiconductor characteristics. The polythiophene polymer is a polyalkylthiophene having a structure in which a polymer having a polythiophene structure skeleton is attached to a side chain. Specific examples include poly-3-alkylthiophene such as poly-3-methylthiophene, poly-3-butylthiophene, poly-3-hexylthiophene, poly-3-octylthiophene, poly-3-dodecylthiophene, poly ( 3,3 ″ -dialkylterthiophene), poly [5,5′-bis (3-alkyl-2-thienyl) -2,2′-dithiophene], poly [2,5-bis (2-thienyl) -3 , 4-dialkylthiophene], poly [2,5-bis (3-alkylthiophen-2-yl) thieno [2,3-b] thiophene] (the carbon number of the alkyl group is not particularly limited, but preferably 1 to 16), poly-3-alkoxythiophene such as poly-3-methoxythiophene, poly-3-ethoxythiophene, poly-3-dodecyloxythiophene (arco The carbon number of the silyl group is not particularly limited but is preferably 1-12), poly-3-alkoxy-4- such as poly-3-methoxy-4-methylthiophene, poly-3-dodecyloxy-4-methylthiophene, etc. Alkylthiophene (the number of carbons of the alkoxy group and the alkyl group is not particularly limited, but preferably 1 to 12), poly-3-thioalkylthiophene such as poly-3-thiohexylthiophene and poly-3-thiododecylthiophene (alkyl The number of carbons of the group is not particularly limited, but preferably 1 to 12), and poly-3,4-ethylenedioxythiophene can be used, and one or more kinds can be used. Thiophene, poly (3,3 ″ -dialkylterthiophene), poly [5,5′-bis (3-alkyl-2-thienyl) -2,2 - dithiophene], poly [2,5-bis (3-alkylthiophene-2-yl) thieno [2,3-b] thiophene, poly-3-alkoxy thiophene is preferred. Copolymers containing polythiophene units are arylene units, thienylthiazole units, thiazole units, thienothiophene units, thienylthienothiophene units, fluorene units, carbazole units, phthalocyanine units, porphyrin units Or the polymer etc. which pinched | interposed the derivative | guide_body of said unit are mentioned, If it is a conjugated continuous thing, it can use preferably. A preferred molecular weight is 800 to 200,000 in terms of weight average molecular weight. Further, the polymer need not necessarily have a high molecular weight, and may be an oligomer. The weight average molecular weight can be determined by measuring by size exclusion chromatography and converting to a polystyrene standard sample.

  The side chain bonding mode of the polythiophene polymer used in the present invention preferably has a regioregular structure, and preferably has a regioregularity of at least 80%. The regioregularity is an index indicating how many side chain directions are regularly aligned in one direction in a plurality of monomer units arranged side by side. The regioregularity can be quantified by a nuclear magnetic resonance spectrometer (NMR), and the higher the regioregular ratio, the better the semiconductor properties. In the present invention, the steric structure of the main chain of the conjugated polymer and the arrangement of the side chain substituents may be controlled as described above.

  The method for removing impurities of the conjugated polymer used in the present invention is not particularly limited, but is basically a purification step for removing raw materials and by-products used in the synthesis process, reprecipitation method, Soxhlet extraction method, A filtration method, an ion exchange method, a chelate method, or the like can be used. Among them, the reprecipitation method or Soxhlet extraction method is preferably used for removing impurities such as monomers and by-products used during the polymerization, dimer deactivated during the polymerization, and the reprecipitation method for removing metal components. The chelate method and the ion exchange method are preferably used. Among these methods, one type may be used alone, or a plurality may be combined.

  When a conjugated polymer is used as a semiconductor layer, it is often used in the form of a coating film. Spin coating application, blade coating application, slit die coating application, screen printing application, bar coater application, mold application, printing transfer method, immersion Any method such as a pulling method or an ink jet method can be used. What is necessary is just to select the application | coating method according to the coating-film characteristic to obtain, such as coating-film thickness control and orientation control. For example, when spin coating is performed, the concentration of the conjugated polymer solution is preferably 1 to 20 g / L in order to obtain a coating film having a thickness of 5 to 200 nm. At this time, tetrahydrofuran, toluene, xylene, tetralin, dichloromethane, dichloroethane, chloroform, chlorobenzene, dichlorobenzene, trichlorobenzene and the like are preferably used as the solvent for dissolving the conjugated polymer. The formed coating film may be annealed under reduced pressure or in an inert atmosphere (nitrogen or argon atmosphere).

  The thickness of the semiconductor layer is not particularly limited, but preferably 10 nm or more and 100 nm or less. If the film thickness is larger than this range, the source-drain current increases when an off voltage is applied, and the on / off ratio of the FET element is lowered. Further, below this range, there is a problem that the carrier mobility decreases.

  An example of an FET element having a semiconductor layer in which the thin film of the present invention is formed on the surface of an insulating layer and the semiconductor layer is formed of a conjugated polymer will be described. 2 and 3 are schematic cross-sectional views showing examples of the FET element of the present invention. A thin film of the present invention is formed on a substrate 1 having a gate electrode 2 covered with an insulating layer 3. A thin film is formed on the insulating layer 3 using the compound represented by the general formula (1). In the case of using a highly volatile compound, a thin film can be formed by a vapor phase method such as a CVD method. When using a compound with low volatility, a thin film is formed by applying a raw material or a solution in which the raw material is dissolved in a solvent, or immersing a substrate having an insulating layer in a solution in which the raw material or the raw material is dissolved in a solvent. can do. Moreover, reaction with the compound represented by the surface of an insulating layer and General formula (1) can also be accelerated | stimulated by heating. Moreover, after forming the thin film, the surface of the layer having the compound represented by the general formula (1) is washed with acetone, methanol, ethanol, isopropanol, pure water or the like as necessary to remove unnecessary adsorbate. It may be removed.

  A bottom contact type FET element will be described with reference to FIG. A source electrode 5 and a drain electrode 6 such as gold are formed on a substrate 1 having a gate electrode 2 covered with an insulating layer 3 by using a normal photolithography technique, a vacuum deposition method, and a sputtering method, and the above method is used. A thin film is formed on the insulating layer 3 using the compound represented by the general formula (1). Thereafter, the organic semiconductor layer 4 is formed by a spin coating method or the like. As another method for forming a thin film using the compound represented by the general formula (1) on the insulating layer 3, a thin film is formed using the compound represented by the general formula (1) on the insulating layer 3. After that, the source electrode 5 and the drain electrode 6 such as gold are formed. Thereafter, the organic semiconductor layer 4 can also be formed by spin coating or the like. Further, a top contact type FET element will be described with reference to FIG. A thin film is formed on the insulating layer 3 using the compound represented by the general formula (1). Subsequently, after the organic semiconductor layer 4 is formed by a spin coating method, a source electrode 5 and a drain electrode 6 such as gold are formed by a mask vapor deposition method or the like.

  As the substrate 1, for example, an inorganic material such as a silicon wafer, glass, and an alumina sintered body, and an organic material such as polyimide, polyester, polycarbonate, polysulfone, polyethersulfone, polyethylene, polyphenylene sulfide, and polyparaxylene can be used.

  As the gate electrode 2, the source electrode 5 and the drain electrode 6, metals such as gold, platinum, silver, copper, chromium, palladium, aluminum, indium, molybdenum, low resistance polysilicon, low resistance amorphous silicon, tin oxide, oxidation An inorganic compound such as indium, indium tin oxide (ITO), platinum silicide, or indium silicide, or an organic compound such as poly-3,4-ethylenedioxythiophene / polystyrene sulfonate (PEDOT / PSS) can be used. Two or more of these materials may be used in combination.

  The gate electrode 2, the source electrode 5 and the drain electrode 6 can be formed by vapor deposition, sputtering, plating, various CVD growth, spin coating method and so-called semiconductor process technology such as photolithography and etching, cluster ion beam vapor deposition and the like. .

  Specific examples of materials used for the insulating layer 3 (gate insulating layer) include inorganic materials such as silicon oxide and alumina, polyvinylphenol, polyimide, polyvinyl alcohol, polyvinyl chloride, polyethylene terephthalate, polyvinylidene fluoride, polysiloxane, and polysiloxane. Polymer materials such as acrylate and polystyrene, or a mixture of inorganic material powder and organic polymer material can be used. The insulating layer can be used alone or in combination. The insulating layer can be formed by sputtering, vapor deposition, spin coating, or the like. Further, when the ashing treatment or UV ozone treatment is performed on the surface of the insulating layer, the surface can be cleaned and a hydroxyl group can be generated, which easily reacts with the compound represented by the general formula (1) and is effective. is there.

  The organic semiconductor layer 4 can be formed by various methods. For example, a film having a certain degree of solubility can be formed by coating. As a coating method, a coating method such as casting, spin coating, dip coating, blade coating, and spray coating, a printing method such as inkjet printing and screen printing, and a combination of these methods can be used. . Alternatively, a highly soluble precursor can be formed by the above coating method, and a semiconductor film can be formed by heat treatment or the like.

  Also, the organic semiconductor layer can be formed by a vacuum process. In this case, a vacuum vapor deposition method or the like in which the organic semiconductor compound is heated in a vacuum and attached to the substrate is used. Although it is necessary to select an optimum substrate temperature, a range of 0 ° C. to 200 ° C. is preferable. The deposition rate is usually 0.001 nm / second or more and 10 nm / second or less, preferably 0.01 nm / second or more and 1 nm / second or less. As a method for evaporating the material, a sputtering method in which ions such as accelerated argon collide can be used in addition to heating.

  Although the FET element obtained by the above method can be used for various devices, it can be used as a drive element for an image display device such as a liquid crystal display device or an electroluminescence display device.

  FIG. 4 is a schematic cross-sectional view showing an example of a liquid crystal display device using the FET element of the present invention. In a matrix display type liquid crystal display device comprising a plurality of address lines 8 and a plurality of data lines 9, the FET element of the present invention is formed at the intersection of the matrix lines. A matrix display is performed by driving a liquid crystal layer composed of liquid crystal molecules 12 sandwiched between a pixel electrode 10 connected to the data line 9 and a counter electrode 14 facing the electrode through the FET element. At this time, the conductivity of the organic semiconductor layer 4 provided between the source electrode and the drain electrode of the FET element is controlled by the gate electrode 2 provided via the insulating layer 3 to drive the liquid crystal.

  According to the present invention, an FET element can be easily formed on a large-area substrate like a liquid crystal display device. Since the source-drain current can be greatly modulated by the voltage applied to the gate, high gradation is obtained, and the operation is stable, an excellent matrix type liquid crystal display device can be provided.

Hereinafter, the present invention will be specifically described based on examples. However, the present invention is not limited to the following examples. Of the compounds used in the examples and the like, those using abbreviations are shown below.
PTS: (Phenyl) trichlorosilane P3HT: (Resiregular) poly-3-hexylthiophene PETS: (Phenethyl) trichlorosilane P3T-8: Poly (3,3 "-dioctylterthiophene)
OTS: (octadecyl) trichlorosilane.

Example 1
This will be described with reference to FIG. The substrate 1 is an antimony-doped silicon wafer (resistivity 0.02 Ωcm or less) with a thermal oxide film (film thickness 300 nm), and is a gate electrode 2 at the same time as the substrate, and the thermal oxide film becomes an insulating layer 3. Next, a gold source electrode 5 and a drain electrode 6 were formed based on the following procedure. A positive resist solution was dropped onto a silicon wafer with a thermal oxide film, applied using a spinner, and then dried on a hot plate at 90 ° C. to form a resist film. Subsequently, ultraviolet rays were irradiated through a photomask using an exposure machine. Next, the wafer with the resist film was immersed in an alkaline aqueous solution, the ultraviolet irradiation part was removed, and a resist film having a shape in which the comb-shaped electrode was removed was obtained. In vacuum deposition, chromium was deposited on the wafer with the resist film to a thickness of 5 nm, and then gold was deposited to a thickness of 45 nm. Next, the wafer with gold / chromium and resist was immersed in acetone, and the gold / chromium on the resist was removed by ultrasonic irradiation with an ultrasonic cleaner. In this manner, gold comb electrodes were formed on the wafer. The width (channel width) of both electrodes was 0.5 cm, the distance (channel length) between both electrodes was 20 μm, and the electrode height was 50 nm.

  Next, a thin film was formed on the insulating layer using (phenyl) trichlorosilane (manufactured by Tokyo Chemical Industry Co., Ltd., purity of 98% or more). The surface of the substrate having the insulating layer was subjected to UV ozone treatment, and then immersed in a chloroform solution of PTS adjusted to 10 mM in a nitrogen atmosphere for 1 hour. Thereafter, the substrate was subjected to ultrasonic cleaning with acetone for 15 minutes, then with pure water for 15 minutes, and the substrate dried in a vacuum oven was used.

  Next, the adjustment method of the conjugated polymer which forms a semiconductor layer is shown below. Aldrich (regular) poly-3-hexylthiophene (P3HT) was purified by reprecipitation and used as a conjugated polymer. For reprecipitation, 15 mL of chloroform was added to P3HT and dissolved, filtered through a membrane filter, and the filtrate was put into a mixed solution of 300 mL of methanol and 100 mL of 0.1N hydrochloric acid. The obtained polymer was collected by filtration, washed with methanol, and the solvent was removed by vacuum drying. This operation was repeated twice to purify P3HT.

  The FET element shown in FIG. 2 was fabricated using a substrate having a PTS thin film formed on the insulating layer and a polymer solution. 0.1 mL of the above-mentioned P3HT chloroform solution (3 g / L) was dropped on the substrate, and a semiconductor layer having a thickness of 30 nm was formed by spin coating (1000 rpm × 10 seconds). After attaching the lead wire to the electrode, heat the obtained element in a vacuum oven at 110 ° C for 2 hours, slowly cool it to 50 ° C or less, release it to the atmosphere, and move the FET element to the measurement box And again evacuated and allowed to stand for 18 hours.

Next, when the source-drain voltage (Vsd) of the FET element is kept constant at Vsd = -5 V and the gate voltage (Vg) is changed from +50 V to -50 V, or Vg is changed from -50 V to +50 V. The current-source-drain current (Id) -gate voltage (Vg) characteristics were measured. The measurement was performed under vacuum using a Hewlett Packard Picoammeter / Voltage Source 4140B. The mobility in the linear region was determined from the change in the value of Id at Vsd = −5 V when Vg = + 50 V → −50 V, and it was 5.7 × 10 ⁻⁴ cm ² / V · sec. When the gate voltage (Vg) is changed from +50 V to −50 V, the source-drain current is changed to Ia, and when the gate voltage (Vg) is changed from −50 V to +50 V, the source-drain current is changed to Ib. Then, the maximum value when the absolute value of the difference between Ia and Ib was obtained for each Vg was 3.59 × 10 ⁻⁸ . At this time, the values of Vg = −34V, Ia = −1.18 × 10 ⁻⁷ A, Ib = −8.21 × 10 ⁻⁸ A were observed, and the hysteresis was obtained from the above equation (3). .3.

Example 2
The same operation as in Example 1 was performed, except that a thin film was formed on the insulating layer using (phenethyl) trichlorosilane (manufactured by Aldrich, purity 95%).

The mobility in the linear region was determined from the change in the value of Id at Vsd = −5V when Vg = + 50V → −50V, and it was 1.5 × 10 ⁻³ cm ² / V · sec. Moreover, the maximum value when the absolute value of the difference between Ia and Ib was determined for each Vg was 9.7 × 10 ⁻⁸ . At this time, values of Vg = −31 V, Ia = −3.42 × 10 ⁻⁷ A, Ib = −2.45 × 10 ⁻⁷ A were observed, and when hysteresis was obtained from the above-described equation (3), 0 was obtained. .28.

Example 3
The following poly (3,3 ″ -dioctylterthiophene) used in Example 3 was synthesized according to the following method.

  Under an inert argon atmosphere, 0.8 g (4.9 mmol) of anhydrous iron (III) chloride was suspended in 20 mL of anhydrous chlorobenzene. To the stirred suspension, 1.07 g (2.3 mmol) of 3,3 ″ -dioctyl-2,2 ′, 5 ′, 2 ″ -terthiophene was added. The oil bath was brought to 70 ° C. and stirred for 100 hours. The obtained polymerization solution was diluted with 100 mL of chloroform and charged into a mixed solution of 1000 mL of methanol and 1000 mL of 10 wt% ammonia water. The resulting mixed solution was stirred for 2 hours and washed. After washing, it was filtered with a membrane filter. This operation was performed twice, and the filtrate obtained was subjected to Soxhlet extraction in the order of methanol, hexane, and chloroform, and the resulting chloroform solution was removed by an evaporator to obtain crude poly (3,3 ″ -dioctylterthiophene). 400 mg was obtained.

  Next, 60 mg of the obtained polymer was put into a Soxhlet apparatus, purified in order of methanol, hexane, and methylene chloride, and extracted with chloroform. The solvent of the obtained chloroform solution was removed by an evaporator. To the obtained polymer, 15 mL of chloroform was added and dissolved, filtered through a membrane filter, and the filtrate was put into a mixed solution of 300 mL of methanol and 100 mL of 10% aqueous ammonia. The obtained polymer was collected by filtration, washed with methanol, and the solvent was removed by vacuum drying. This operation was repeated twice to purify poly (3,3 ″ -dioctylterthiophene). The resulting poly (3,3 ″ -dioctylterthiophene) had a weight average molecular weight of 32,000, a number average molecular weight of 14400, and a molecular weight. The distribution was 2.22.

  An FET element was produced in the same manner as in Example 1 except that a thin film formed of P3T-8 was used for the organic semiconductor layer and PETS was used for the insulating layer. In addition, P3T-8 which is an organic semiconductor layer was formed and measured as follows. 0.1 mL of the above-mentioned P3T-8 chlorobenzene solution (3.8 g / L) was dropped on the substrate on which the electrode was formed, and a semiconductor layer having a thickness of 35 nm was formed by spin coating (1000 rpm × 30 seconds). After attaching the lead wire to the electrode, heat the obtained element in a vacuum oven at 80 ° C for 20 hours, slowly cool it to 50 ° C or less, release it to the atmosphere, and move the FET element to the measurement box And measured under the atmosphere.

When the mobility in the linear region was determined from the change in the value of Id at Vsd = −5 V when Vg = + 50 V → −50 V, it was 7.8 × 10 ⁻⁴ cm ² / V · sec. Moreover, the maximum value when the absolute value of the difference between Ia and Ib was determined for each Vg was 9.3 × 10 ⁻⁸ . At this time, values of Vg = −28 V, Ia = −3.23 × 10 ⁻⁷ A, Ib = −2.3 × 10 ⁻⁷ A were observed, and when hysteresis was obtained from the above-described equation (3), 0 was obtained. .29.

Comparative Example 1
The same operation as in Example 1 was performed except that no thin film was formed on the gate insulating layer. When the mobility in the linear region was determined from the change in the value of Id at Vsd = −5 V when Vg = + 50 V → −50 V, it was 3.5 × 10 ⁻⁴ cm ² / V · sec. Moreover, the maximum value when the absolute value of the difference between Ia and Ib was determined for each Vg was 5.62 × 10 ⁻⁸ . At this time, values of Vg = −31 V, Ia = −1.31 × 10 ⁻⁷ A, Ib = −7.48 × 10 ⁻⁸ A were observed, and the hysteresis was obtained from the above equation (3). .43.

Comparative Example 2
The same operation as in Example 1 was performed except that a thin film was formed on the insulating layer using (octadecyl) trichlorosilane (manufactured by Aldrich, purity 90% or more). When the mobility of the linear region was determined from the change in the value of Id at Vsd = −5 V when Vg = + 50 V → −50 V, it was 1.2 × 10 ⁻³ cm ² / V · sec. Moreover, the maximum value when the absolute value of the difference between Ia and Ib was determined for each Vg was 4.56 × 10 ⁻⁷ . At this time, the values of Vg = −22V, Ia = −6.2 × 10 ⁻⁷ A, Ib = −1.64 × 10 ⁻⁷ A were observed, and the hysteresis was obtained from the above-described equation (3). .74.

Comparative Example 3
The same operation as in Example 3 was performed except that a thin film was not formed on the gate insulating layer. When the mobility in the linear region was determined from the change in the value of Id at Vsd = −5V when Vg = + 50V → −50V, it was 4.6 × 10 ⁻⁴ cm ² / V · sec. The maximum value when the absolute value of the difference between Ia and Ib was determined for each Vg was 9.4 × 10 ⁻⁸ . At this time, the values of Vg = −25 V, Ia = −2.15 × 10 ⁻⁷ A, Ib = −1.21 × 10 ⁻⁷ A were observed, and the hysteresis was obtained from the above equation (3). .44.

  The results of Examples and Comparative Examples are shown in Table 1. Since Examples 1 to 3 have a thin film formed of PTS or PETS between the insulating layer and the semiconductor layer, the mobility was improved and the hysteresis was reduced. In Comparative Examples 3 and 4, when there is no thin film between the insulating layer and the semiconductor layer, or the thin film is formed of OTS, the hysteresis is large.

  Since the field effect transistor of the present invention has high mobility and can reduce hysteresis, it is used as a pixel switching element in an image display device or the like.

The schematic diagram which showed the Vg-Id characteristic. The schematic cross section which showed the FET element (bottom contact type) which is 1 aspect of this invention. The schematic cross section which showed the FET element (top contact type) which is another aspect of this invention. 1 is a schematic cross-sectional view showing a liquid crystal display device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 15 Board | substrate 2 Gate electrode 3 Insulating layer 4 Organic-semiconductor layer 5 Source electrode 6 Drain electrode 7 The thin film formed from the compound represented by General formula (1) 8 Address wiring 9 Data wiring 10 Pixel electrode 11, 13 Orientation film 12 Liquid crystal molecules 14 Counter electrode

Claims (6)

A field-effect transistor having an organic semiconductor layer provided between a source electrode and a drain electrode, an insulating layer, and a gate electrode, the compound represented by the general formula (1) between the insulating layer and the organic semiconductor layer Field effect transistor having a thin film formed from

(In general formula (1), R is selected from an aromatic group and a substituted aromatic group, A is selected from a silane residue, a titanium residue, and an organic acid residue, and n is in the range of 0-20. ) 2. The field effect transistor according to claim 1, wherein the organic semiconductor layer is a film having a conjugated polymer. The field effect transistor according to claim 1, comprising a thin film formed of a compound in which R in the general formula (1) is an aromatic hydrocarbon group or a substituted aromatic hydrocarbon group. The field effect transistor according to any one of claims 1 to 3, wherein the thin film formed from the compound represented by the general formula (1) is a monomolecular film. 3. The field effect transistor according to claim 2, wherein the conjugated polymer is a polythiophene polymer or a copolymer containing a polythiophene unit. An image display device comprising the field-effect transistor according to claim 1 and a pixel.

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