JP2007234883A - Solid-state imaging device, manufacturing method thereof, and camera - Google Patents

Abstract

A solid-state imaging device, a manufacturing method thereof, and a camera capable of locally controlling a potential distribution of a substrate region under a transfer electrode and having improved characteristics are provided.
A light receiving unit that is formed on a substrate and generates a signal charge corresponding to the amount of incident light, a first transfer channel that transfers the signal charge accumulated in the light receiving unit, and transfer by the first transfer channel. A second transfer channel for transferring the signal charge to the output unit, and a channel stop region 17 formed on the substrate around the light receiving unit and the first and second transfer channels to prevent the signal charge from flowing in and out The gate insulating film 18 formed on the first and second transfer channels and the channel stop region 17 and the transfer electrode 20 formed on the gate insulating film 18 have a film thickness difference. Is provided.
[Selection] Figure 4

Description

  The present invention particularly relates to a CCD (Charge Coupled Device) type solid-state imaging device, a manufacturing method thereof, and a camera.

  In a CCD solid-state imaging device, each pixel tends to be miniaturized. When each pixel is miniaturized, the vertical CCD and the channel stop region are also miniaturized. The miniaturization of the vertical CCD leads to a reduction in the amount of charge handled by the vertical CCD. Refinement of the channel stop region leads to depletion of the channel stop. When the channel stop region is depleted, a dark current is generated from the interface state, and noise due to the dark current flowing into the vertical CCD increases.

  As a technique for increasing the amount of charge handled by the vertical CCD, for example, boron is ion-implanted locally only in the central portion of the vertical CCD, so that the potential is locally shallow only in the central portion, and a flat potential is formed in the vertical CCD. There is technology. Alternatively, a technique is also known in which n-type impurities are ion-implanted locally only on both sides of a vertical CCD (see Non-Patent Document 1, for example). However, since impurities are diffused by the heat treatment for activation, if the width of the vertical CCD is narrowed, it becomes difficult to inject impurities locally only in the central part or both sides of the vertical CCD. In particular, boron is easily diffused by heat, so the above problem becomes remarkable.

  In order to prevent depletion of the channel stop region, it can be dealt with by setting the clock voltage to the negative side (for example, -1V / -8.5V), but it is necessary to prepare a new negative power source, This will increase the cost.

Compared with a vertical CCD, the size of a horizontal CCD is larger, so there is less problem with the horizontal CCD in reducing the amount of charge handled. However, there is a problem that the transfer efficiency is poor when the signal charge transferred from the vertical CCD is small.
A. Tanabe et al. “Dynamic Range Improvement by Narrow-Channel Effect Suppression and Smear Reduction Technologies in Small Pixel IT-CCD Image Sensors” IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL.47, NO.9, SEPTEMBER 2000

  As described above, it is desired to optimize each part of the solid-state imaging device by controlling the potential distribution of the substrate by a method other than impurity diffusion.

  The present invention has been made in view of the above circumstances, and an object thereof is to locally control the potential distribution of the substrate region under the transfer electrode, and to improve the characteristics of the solid-state imaging device and the manufacturing method thereof. And providing a camera.

  In order to achieve the above object, a solid-state imaging device of the present invention is formed on a substrate and generates a signal charge corresponding to the amount of incident light, and transfers the signal charge accumulated in the light receiving unit. A first transfer channel; a second transfer channel that transfers signal charges transferred by the first transfer channel toward an output unit; and the light receiving unit and the substrate around the first and second transfer channels. A channel stop region formed to prevent inflow and outflow of signal charges, the first and second transfer channels, a gate insulating film formed on the channel stop region, and a transfer electrode formed on the gate insulating film The gate insulating film has a film thickness difference.

  In order to achieve the above object, a method of manufacturing a solid-state imaging device according to the present invention includes a step of forming a light receiving unit that generates a signal charge in an amount corresponding to an incident light amount on a substrate, and the signal accumulated in the light receiving unit Forming a first transfer channel on the substrate for transferring charges; forming a second transfer channel on the substrate for transferring signal charges transferred by the first transfer channel toward an output unit; Forming a channel stop region for preventing inflow and outflow of signal charges on the substrate around the light receiving portion and the first and second transfer channels; and on the first and second transfer channels and the channel stop region. A step of forming a gate insulating film, and a step of forming a transfer electrode on the gate insulating film. In the step of forming the gate insulating film, a film thickness difference is formed between the gate insulating film and the gate insulating film. Provided.

  In order to achieve the above object, a camera of the present invention is formed on a substrate and generates a signal charge of an amount corresponding to the amount of incident light, and a first transfer of the signal charge accumulated in the light receiving unit. A transfer channel; a second transfer channel that transfers the signal charges transferred by the first transfer channel toward an output unit; and the substrate around the light receiving unit and the first and second transfer channels. A channel stop region that prevents signal charge from flowing in and out, a gate insulating film formed on the first and second transfer channels and the channel stop region, and a transfer electrode formed on the gate insulating film. And a thickness difference is provided in the gate insulating film.

  In the present invention, the potential of the first or second transfer channel or channel stop region under the transfer electrode is controlled by providing the gate insulating film with a film thickness difference. Thereby, the potential distribution of the first or second transfer channel or channel stop region under the transfer electrode is locally controlled.

  According to the present invention, the potential distribution in the substrate region under the transfer electrode can be locally controlled. Thereby, a solid-state imaging device and a camera with improved characteristics can be realized.

  Embodiments of the present invention will be described below with reference to the drawings. In each figure, the same components are denoted by the same reference numerals. In the present embodiment, an example in which the present invention is applied to an interline transfer type CCD (Charge Coupled Device) type solid-state imaging device will be described. However, there is no particular limitation on the transfer method.

(First embodiment)
FIG. 1 is a schematic configuration diagram of a solid-state imaging apparatus according to the present embodiment. The solid-state imaging device 1 according to the present embodiment includes an imaging unit 2, a horizontal transfer unit 3, and an output unit 4.

  The imaging unit 2 includes a plurality of light receiving units 5 arranged in a matrix for each pixel, a plurality of vertical transfer units 7 arranged for each vertical column of the light receiving unit 5, and the light receiving units 5 and the vertical transfer units 7. And a read gate portion 6 disposed between the two.

  The light receiving unit 5 includes, for example, a photodiode, and photoelectrically converts image light (incident light) incident from a subject into signal charges having a charge amount corresponding to the light amount and accumulates the signal light. The read gate unit 6 reads the signal charges accumulated in the light receiving unit 5 to the vertical transfer unit 7.

  The vertical transfer unit 7 is driven by four-phase clock signals φV1, φV2, φV3, and φV4, and transfers the signal charges read from the light receiving unit 5 in the vertical direction (downward in the figure). The clock signal is not limited to four phases. The clock signals φV1 to φV4 are, for example, 0V or −8.5V.

  The horizontal transfer unit 3 is driven by the two-phase clock signals φH1 and φH2, and transfers the signal charges vertically transferred from the vertical transfer unit 7 in the horizontal direction (left direction in the figure).

  The vertical transfer unit 7 and the horizontal transfer unit 3 include a transfer channel formed in the transfer direction formed on the substrate, and a plurality of transfer electrodes formed side by side in the transfer direction with an insulating film interposed on the transfer channel. Have.

  The output unit 4 includes, for example, a charge-voltage conversion unit 4a configured by floating diffusion, converts the signal charge horizontally transferred by the horizontal transfer unit 3 into an electric signal, and outputs the signal as an analog image signal.

  FIG. 2 is a plan view of the main part of the imaging unit 2.

  A transfer channel (first transfer channel) 14 extending in the transfer direction is formed adjacent to the light receiving portions 5 arranged in a matrix. On the transfer channel 14, the first transfer electrode 21 and the second transfer electrode 22 are alternately and repeatedly arranged in the transfer direction with an insulating film interposed therebetween. When there is no need to distinguish between the first transfer electrode 21 and the second transfer electrode 22, they are simply referred to as the transfer electrode 20. The vertical transfer unit 7 is configured by the transfer channel 14 and the transfer electrode 20. The first transfer electrode 21 and the second transfer electrode 22 arranged in the transfer direction are arranged so that the ends thereof overlap each other.

  The first transfer electrode 21 and the second transfer electrode 22 in the horizontal direction are connected to each other. The first transfer electrode 21 is formed of a first polysilicon layer, and the second transfer electrode 22 is formed of a second polysilicon layer. In this embodiment, an example of a transfer electrode having a two-layer structure will be described. However, a single-layer structure or a structure having three or more layers may be used.

  When a voltage is applied to the first transfer electrode 21 and the second transfer electrode 22, a potential well is formed in the transfer channel 14. The clock signals φV1, V2, V3, and V4 for forming the potential well are applied to the first transfer electrode 21 and the second transfer electrode 22 arranged in the transfer direction with a phase shift, so that the potential The distribution of the wells changes sequentially, and the charges in the potential well are transferred along the transfer direction.

  FIG. 3 is a cross-sectional view of one pixel of the solid-state imaging device according to the present embodiment. FIG. 3 corresponds to a cross-sectional view taken along the line A-A ′ of FIG. 2.

  For example, a p-type well 11 is formed on an n-type silicon substrate (hereinafter referred to as substrate 10). The p-type well 11 forms an overflow barrier.

The light receiving unit 5 includes an n-type signal charge storage region 12 formed in the p-type well 11 and a p ⁺ -type hole storage region 13 formed in the surface layer of the signal charge storage region 12. The hole accumulation region 13 is provided in order to suppress dark current that is generated near the surface of the signal charge accumulation region 12 and becomes a noise source.

  In the light receiving portion 5, an npn structure is formed by the signal charge accumulation region 12, the p-type well 11 and the substrate 10. This npn structure is a vertical overflow drain that discharges signal charges to the substrate 10 side when signal light generated excessively due to strong light incident on the light receiving section 5 exceeds an overflow barrier formed by the p-type well 11. Configure the structure.

  Further, the light receiving unit 5 has a function of an electronic shutter. That is, by setting the substrate potential supplied to the substrate 10 to a high level (for example, +12 V), the potential barrier of the p-type well 11 is lowered, and the charge accumulated in the signal charge accumulation region 12 overcomes the potential barrier, It is swept away in the vertical direction, that is, the substrate 10. Thereby, the exposure period can be adjusted.

  The vertical transfer unit 7 includes an n-type transfer channel 14 formed in the p-type well 11 at a predetermined interval from the signal charge storage region 12, and a gate insulating film 18 made of a silicon oxide film on the transfer channel 14. The transfer electrode 20 is made of, for example, polysilicon. A relatively high concentration p-type region 15 is formed under the transfer channel 14. The p-type region 15 forms a potential barrier under the transfer channel 14. For this reason, the signal charge photoelectrically converted in the deep portion of the substrate 10 is prevented from entering the transfer channel 14, and the occurrence of smear is suppressed.

  The read gate unit 6 includes a p-type read gate region 16 between the signal charge storage region 12 and the transfer channel 14 and a transfer electrode 20 formed on the read gate region 16 via a gate insulating film 18. ing. The read gate region 16 forms a potential barrier between the n-type signal charge storage region 12 and the transfer channel 14. At the time of reading, a positive read voltage (for example, 15 V) is applied to the transfer electrode, the potential barrier of the read gate region 16 is lowered, and the signal charge is transferred from the signal charge storage region 12 to the transfer channel 14.

  A p-type channel stop region 17 is formed on the side opposite to the reading side with respect to the signal charge storage region 12. The channel stop region 17 forms a potential barrier against the signal charge and prevents the signal charge from flowing in and out.

  A light shielding film 24 that covers the transfer electrode 20 is formed on the transfer electrode 20 via an insulating film 23 made of, for example, silicon oxide. The light shielding film 24 is made of a refractory metal such as tungsten, for example. The light shielding film 24 has an opening for allowing light to enter the light receiving portion 5.

  On the light shielding film 24, a first interlayer insulating film 25 made of, for example, BPSG (Boron Phosphorous Silicate glass) is formed. In the first interlayer insulating film 25, irregularities due to the surface step of the base are formed. A second interlayer insulating film 26 made of a material having a higher refractive index than that of the first interlayer insulating film 25 is formed on the first interlayer insulating film 25. The second interlayer insulating film 26 is made of, for example, silicon nitride. The surface of the second interlayer insulating film 26 is planarized. An inner lens is formed by the interface between the first interlayer insulating film 25 and the second interlayer insulating film 26.

  A color filter 30 is formed on the second interlayer insulating film 26. The color filter 30 is, for example, a primary color type, and includes a green color filter 31, a blue color filter 32, and a red color filter 33. In the case of the complementary color type, the color filter 30 is formed of cyan, magenta, yellow, and green color filters.

  On the color filter 30, a planarizing film 40 made of, for example, an acrylic thermosetting resin is formed. A micro lens 50 is formed on the planarizing film 40.

  The present embodiment is characterized in that a difference in film thickness is provided in the gate insulating film 18 below the transfer electrode 20. FIG. 4 is a diagram showing an example of a cross-section of the principal part and potential distribution of the transfer electrode 20 and the gate insulating film 18 therebelow.

  In the present embodiment, a part of the gate insulating film 18 on the transfer channel 14 is formed thinner than the other part. In this example, the thickness of the gate insulating film 18 in the central portion of the transfer channel 14 is thinner than other regions. For example, a region of about 1/3 of the central portion of the transfer channel 14 is thinner than other regions. Although the thickness of the gate insulating film 18 depends on the potential of the transfer channel 14, for example, the thickness of the gate insulating film 18 in the central portion of the transfer channel 14 is made 10% to 50% thinner than other regions.

  When the thickness of the gate insulating film 18 under the transfer electrode 20 is uniform, the potential distribution is E1 'due to the influence of the narrow channel effect. That is, the potential on both sides of the transfer channel 14 becomes low (shallow). When the potential is deep at the center of the transfer channel 14, the amount of charge handled decreases.

  On the other hand, in the present embodiment, since the thickness of the gate insulating film 18 at the central portion of the transfer channel 14 is thinner than other regions, the potential at the central portion of the transfer channel 14 is reduced. Is more affected by the potential of the transfer electrode 20 than in other regions. As a result, only the potential at the center of the transfer channel 14 becomes locally shallow, and the potential distribution of the transfer channel 14 becomes flat. Since the potential distribution of the transfer channel 14 becomes flat, the amount of charge handled by the transfer channel 14 can be increased.

  FIG. 5 is a diagram showing another example of a cross-section of the main part and potential distribution of the transfer electrode 20 and the gate insulating film 18 therebelow.

  In this embodiment, the gate insulating film 18 on both sides on the transfer channel 14 is formed thicker than the other portions. Although the film thickness of the gate insulating film 18 depends on the potential of the transfer channel 14, for example, the film thickness of the gate insulating film 18 on both sides of the transfer channel 14 is 10% to 50% thicker than other regions.

  When the thickness of the gate insulating film 18 under the transfer electrode 20 is uniform, the potential distribution is E2 'under the influence of the narrow channel effect. That is, the potential on both sides of the transfer channel 14 becomes low (shallow). When the potential is deep at the center of the transfer channel 14, the amount of charge handled decreases.

  On the other hand, in this embodiment, since the film thickness of the gate insulating film 18 on both sides of the transfer channel 14 is thicker than other regions, the portions on both sides of the transfer channel 14 Compared to the region, it is less affected by the potential of the transfer electrode 20. As a result, only the potential on both sides of the transfer channel 14 is locally deepened, and the potential distribution of the transfer channel 14 becomes flat. Since the potential distribution of the transfer channel 14 becomes flat, the amount of charge handled by the transfer channel 14 can be increased.

  Next, an example of a method for providing a difference in film thickness in the gate insulating film 18 will be described with reference to FIG.

  As shown in FIG. 6A, a first insulating film 18a made of silicon oxide is formed on the substrate 10 by thermal oxidation.

  Next, as shown in FIG. 6B, the first insulating film 18a in a desired region is removed by etching using a resist mask. The region to be removed is a region where the gate insulating film 18 is thinned.

  Next, as shown in FIG. 6C, a second insulating film 18b made of silicon oxide is formed on the substrate 10 and the first insulating film 18a by, for example, a thermal oxidation method or a CVD method. Thereby, the gate insulating film 18 composed of the first insulating film 18a and the second insulating film 18b is formed.

  Finally, the transfer electrode 20 is formed on the gate insulating film 18 on the thinned region and its peripheral region.

  The advantages of the method for forming the gate insulating film 18 will be described. The width of the opening of the first insulating film 18a is W1 (see FIG. 6B). The width W1 of the opening of the first insulating film 18a is determined by the resolution limit of lithography. On the other hand, the width W2 (see FIG. 6C) of the final thinned region is narrower by twice the thickness of the second insulating film 18b than the width W1. As a result, a region finer than the resolution limit of lithography can be thinned, and the potential of the fine region can be locally controlled.

  Another example of a method of providing a thickness difference in the gate insulating film 18 will be described with reference to FIG.

  As shown in FIG. 7A, a gate insulating film 18 made of silicon oxide is formed on the substrate 10 by thermal oxidation.

  Next, as shown in FIG. 7B, the gate insulating film 18 in a desired region is removed to an intermediate depth by etching using a resist mask. At this time, etching is performed so that the remaining film of the gate insulating film 18 has a desired thickness. The region to be removed is a region where the gate insulating film 18 is thinned.

  Finally, as shown in FIG. 7C, the transfer electrode 20 is formed on the gate insulating film 18 on the thinned region and its peripheral region.

  According to the method for forming the gate insulating film 18 described above, a fine region determined by the resolution limit of lithography can be thinned. As a result, the potential of the fine region can be locally controlled.

  Another example of a method for providing a difference in film thickness in the gate insulating film 18 will be described with reference to FIG. In the present embodiment, an example in which the gate insulating film 18 has a three-layer structure of a silicon oxide film, a silicon nitride film, and a silicon oxide film will be described.

  As shown in FIG. 8A, a first insulating film 18a made of silicon oxide is formed on the substrate 10 by thermal oxidation. Subsequently, a second insulating film 18b made of silicon nitride is formed on the first insulating film 18a by a CVD method.

  Next, as shown in FIG. 8B, the second insulating film 18b in a desired region is removed by etching using a resist mask. The region to be removed is a region where the gate insulating film 18 is thinned.

  Next, as shown in FIG. 8C, a third insulating film 18c made of silicon oxide is formed on the first insulating film 18a and the second insulating film 18b by, eg, thermal oxidation or CVD. Thereby, the gate insulating film 18 composed of the first insulating film 18a, the second insulating film 18b, and the third insulating film 18c is formed.

  Finally, as shown in FIG. 8D, the transfer electrode 20 is formed on the gate insulating film 18 on the thinned region and its peripheral region.

  According to the method for forming the gate insulating film 18 described above, a fine region determined by the resolution limit of lithography can be thinned. As a result, the potential of the fine region can be locally controlled.

  The advantages of the method for forming the gate insulating film 18 will be described. In the case where an ONO film (a laminated film of silicon oxide film / silicon nitride film / silicon oxide film) is employed as the gate insulating film 18, a film thickness difference can be formed by using this layer structure. Can be suppressed.

  The width of the opening of the second insulating film 18b is W1 (see FIG. 8B). The width W1 of the opening of the second insulating film 18b is determined by the resolution limit of lithography. On the other hand, the final width W2 (see FIG. 8C) of the thinned region is narrower by twice the thickness of the second insulating film 18b than the width W1. As a result, a region finer than the resolution limit of lithography can be thinned, and the potential of the fine region can be locally controlled.

  Next, a method for manufacturing the solid-state imaging device according to the above-described embodiment will be described with reference to FIGS.

  As shown in FIG. 9A, a p-type well 11, an n-type signal charge storage region 12, an n-type transfer channel 14, and a p-type region 15 are formed on a substrate 10 made of n-type silicon by ion implantation. , A p-type read gate region 16 and a p-type channel stop region 17 are formed. Subsequently, a gate insulating film 18 having a film thickness difference is formed on the substrate 10 by the method shown in FIGS. For simplification of the drawings, the film thickness difference of the gate insulating film 18 is not illustrated in FIGS.

  Next, as shown in FIG. 9B, the transfer electrode 20 is formed on the gate insulating film 18. The transfer electrode 20 is formed by depositing polysilicon and then etching the polysilicon using a resist. When the transfer electrode 20 has a two-layer structure, an insulating film is formed between the first and second transfer electrodes. After the transfer electrode 20 is formed, an insulating film 23 made of silicon oxide that covers the transfer electrode 20 is formed by, for example, a CVD method. Subsequently, the p-type hole accumulation region 13 is formed in the surface layer of the signal charge accumulation region 12 by ion implantation using the transfer electrode 20 as a mask. As a result, the light receiving portion 5, the read gate portion 6 and the vertical transfer portion 7 are formed on the substrate 10.

  Next, as shown in FIG. 10A, a light shielding film 24 having an opening 24 a at the position of the light receiving portion 5 and covering the transfer electrode 20 is formed. The light shielding film 24 is formed, for example, by depositing a refractory metal film such as tungsten on the substrate 10 and processing the refractory metal film by dry etching using a resist mask.

  Next, as illustrated in FIG. 10B, for example, BPSG is deposited on the substrate 10, and a first interlayer insulating film 25 is formed by performing a reflow process. Subsequently, a silicon nitride film is deposited on the first interlayer insulating film 25 by a plasma CVD method, and the second interlayer insulating film 26 is formed by planarizing the surface of the silicon nitride film.

  Next, as shown in FIG. 11A, the color filter 30 is formed on the second interlayer insulating film 26. The color filter 30 is formed using, for example, a color resist method. For example, after the green color resist is formed on the second interlayer insulating film 26, the green color resist is exposed and developed to form a pattern of the green color filter 31. Similarly, the blue color filter 32 and the red color filter 33 are formed by performing color resist formation, exposure, and development. Note that the order of forming the color filters 30 is not limited.

  Next, as shown in FIG. 11B, a transparent flattening film 40 is formed on the color filter 30 for the purpose of flattening the surface unevenness of the color filter 30. As the planarization film 40, for example, an acrylic thermosetting resin is used.

  Finally, the solid-state imaging device 1 is completed by forming the microlens 50 on the planarizing film 40.

  The solid-state imaging device is used for a camera such as a video camera, a digital still camera, or an electronic endoscope camera, for example.

  FIG. 12 is a schematic configuration diagram of a camera in which the above-described solid-state imaging device is used.

  The camera 100 includes the solid-state imaging device 1 described above, an optical system 102, a drive circuit 103, and a signal processing circuit 104.

  The optical system 102 forms image light (incident light) from the subject on the imaging surface of the solid-state imaging device 1. As a result, in each light receiving unit 5 of the solid-state imaging device 1, incident light is converted into a signal charge corresponding to the amount of incident light.

  The drive circuit 103 supplies various timing signals such as the above-described four-phase clock signals φV1, φV2, φV3, φV4 and two-phase clock signals φH1, φH2 to the solid-state imaging device 1. As a result, various types of driving such as signal charge readout, vertical transfer, and horizontal transfer of the solid-state imaging device 1 are performed. Further, by this driving, an analog image signal is output from the output unit 4 of the solid-state imaging device 1.

  The signal processing circuit 104 performs various kinds of signal processing such as noise removal or conversion into a digital signal on the analog image signal output from the solid-state imaging device 1. After the signal processing by the signal processing circuit 104 is performed, it is stored in a storage medium such as a memory.

  Next, the solid-state imaging device according to the present embodiment, the manufacturing method thereof, and the effects of the camera will be described.

  In the solid-state imaging device according to this embodiment, the potential of the transfer channel 14 is flattened by providing a film thickness difference in the gate insulating film on the transfer channel 14. As a result, the amount of charge handled by the transfer channel 14 can be increased. By using a solid-state imaging device with improved handling charge, the characteristics of the camera can be improved.

  In the manufacturing method of the solid-state imaging device according to the present embodiment, the gate insulating film 18 in which a region finer than the resolution limit of lithography is thinned can be formed. As a result, it can be applied to a fine pixel as compared with the case where the substrate potential is controlled by introducing impurities.

(Second Embodiment)
FIG. 13 is a diagram illustrating an example of a cross-section of a main part and a potential distribution of the transfer electrode 20 and the gate insulating film 18 therebelow in the solid-state imaging device according to the second embodiment.

  In the present embodiment, the thickness of the gate insulating film 18 on the channel stop region 17 is formed thinner than other portions. Although the film thickness of the gate insulating film 18 depends on the potential of the transfer channel 14, for example, the film thickness of the gate insulating film 18 in the channel stop region 17 is made 10% to 50% thinner than other regions. The method for providing the gate insulating film 18 with a film thickness difference is as described with reference to FIGS.

  When the gate insulating film 18 on the channel stop region 17 is thick, the potential distribution is E3 '. That is, the channel stop region 17 is depleted under the influence of the miniaturization of the channel stop region 17. When the channel stop region 17 is depleted, a dark current is generated, and noise is generated due to the dark current flowing into the transfer channel 14.

  On the other hand, in this embodiment, since the film thickness of the gate insulating film 18 on the channel stop region 17 is thinner than other regions, the potential of the channel stop region 17 is lower than that of other regions. Thus, it is more influenced by the potential of the transfer electrode 20. As a result, only the potential of the channel stop region 17 becomes locally shallow, and the channel stop region 17 can be brought close to 0 V (see potential distribution E3 in the figure). Therefore, depletion of the channel stop region 17 can be suppressed by bringing the channel stop region 17 close to 0 V, and thus generation of dark current can be suppressed.

  As described above, in the solid-state imaging device according to the second embodiment, depletion of the channel stop region 17 is suppressed by making the gate insulating film on the channel stop region 17 thinner than on the transfer channel 14. ing. As a result, the generation of dark current can be suppressed without changing the clock voltage. By using a solid-state imaging device that suppresses dark current, the characteristics of the camera can be improved.

  In the manufacturing method of the solid-state imaging device according to the present embodiment, the gate insulating film 18 in which a region finer than the resolution limit of lithography is thinned can be formed. As a result, it can be applied to a fine pixel as compared with the case where the substrate potential is controlled by introducing impurities.

(Third embodiment)
14A and 14B are diagrams for explaining the solid-state imaging device according to the third embodiment. FIG. 14A is a plan view of the main part of the horizontal transfer unit, and FIG. 14B is a cross-sectional view of the main part of the horizontal transfer unit and the potential distribution. It is a figure which shows an example. FIG. 14B corresponds to a cross section taken along line BB ′ in FIG.

  As shown in FIG. 14A, the transfer channel (second transfer channel) 70 of the horizontal transfer unit 3 extends in the horizontal direction. One end of the transfer channel 70 is connected to the output unit 4. The transfer channel 70 may be formed simultaneously with the transfer channel 14 or separately. Although not shown in FIG. 14A, a plurality of transfer electrodes 72 are formed on the transfer channel 70 via a gate insulating film 71. The gate insulating film 71 may be formed simultaneously with the gate insulating film 18 or separately. The transfer electrode 72 may be formed simultaneously with the transfer electrode 20 or may be formed separately.

  In this embodiment, the gate insulating film 71 on the transfer channel 70 has a film thickness difference. For example, the gate insulating film 71 is thickened in a partial region 70 a in the transfer channel 70. The method of providing the gate insulating film 71 with a film thickness difference is as described with reference to FIGS.

  In the present embodiment, since the gate insulating film 71 in a part of the region 70a on the transfer channel 70 of the horizontal transfer unit 3 is thicker than other regions, the potential of the region 70a Compared with the region of the transfer channel 70, the potential of the transfer electrode 72 is less affected. As a result, only the region 70a has a locally deep potential (see potential distribution E4 in the figure). Therefore, by forming the region 70a having a deep potential partially, charges are collected in this region 70a when the transfer charge is small. As a result, the transfer efficiency can be improved by the charge repulsion effect.

  The horizontal transfer unit 3 is larger than the vertical transfer unit 7. Therefore, a similar potential distribution can be formed by selectively implanting impurities. However, a reduction in charge mobility caused by impurity scattering can be suppressed by providing a desired potential distribution by providing a difference in film thickness in the gate insulating film 18.

  As described above, in the solid-state imaging device according to the third embodiment, in the horizontal transfer unit 3, the gate insulating film 71 on the partial region 70 a of the transfer channel 70 is thickened so that the potential is partially increased. A deep region 70a is formed. As a result, the transfer efficiency can be improved particularly when the charge is small. By using a solid-state imaging device with improved transfer efficiency, the camera characteristics can be improved.

The present invention is not limited to the description of the above embodiment.
The present invention can be applied to a solid-state imaging device of a frame transfer system or a frame interline transfer system in addition to the interline transfer system. In addition to providing the gate insulating film 18 with a film thickness difference, the potential of the substrate may be controlled by implanting impurities.
In addition, various modifications can be made without departing from the scope of the present invention.

It is a schematic block diagram which shows an example of the solid-state imaging device concerning this embodiment. It is a principal part top view of an imaging part. It is sectional drawing of the solid-state imaging device concerning this embodiment. It is a figure which shows an example of the principal part cross section and electric potential distribution of a vertical transfer part. It is a figure which shows the other example of the principal part cross section of a vertical transfer part, and electric potential distribution. It is process sectional drawing which shows an example of the preparation methods of a gate insulating film. It is process sectional drawing which shows the other example of the preparation methods of a gate insulating film. It is process sectional drawing which shows the other example of the preparation methods of a gate insulating film. It is process sectional drawing of the manufacturing method of a solid-state imaging device. It is process sectional drawing of the manufacturing method of a solid-state imaging device. It is process sectional drawing of the manufacturing method of a solid-state imaging device. It is a block diagram which shows schematic structure of the camera which concerns on this embodiment. In the solid-state imaging device concerning a 2nd embodiment, it is a figure showing an example of important section and potential distribution of a perpendicular transfer part. In the solid-state imaging device according to the third embodiment, (a) is a plan view of a main part of a horizontal transfer unit, and (b) is a diagram showing an example of a cross section of a main part of the horizontal transfer unit and a potential distribution.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Solid-state imaging device, 2 ... Imaging part, 3 ... Horizontal transfer part, 4 ... Output part, 4a ... Charge-voltage conversion part, 5 ... Light-receiving part, 6 ... Read-out gate part, 7 ... Vertical transfer part, 10 ... Board | substrate 11 ... p-type well, 12 ... signal charge storage region, 13 ... hole storage region, 14 ... transfer channel, 15 ... p-type region, 16 ... read gate region, 17 ... channel stop region, 18 ... gate insulating film, 18a ... 1st insulating film, 18b ... 2nd insulating film, 18c ... 3rd insulating film, 20 ... Transfer electrode, 21 ... 1st transfer electrode, 22 ... 2nd transfer electrode, 23 ... Insulating film, 24 ... Light shielding film, 24a ... opening, 25 ... first interlayer insulating film, 26 ... second interlayer insulating film, 30 ... color filter, 31 ... green color filter, 32 ... blue color filter, 33 ... red color filter, 40 ... flattening film, 50 ... Microlens, 0 ... transparent protective film, 70 ... transfer channel 71 ... gate insulating film, 72 ... transfer electrodes, 100 ... camera, 102 ... optical system, 103 ... driving circuit, 104 ... signal processing circuit

Claims (7)

A light receiving portion that is formed on the substrate and generates an amount of signal charge corresponding to the amount of incident light;
A first transfer channel for transferring the signal charge accumulated in the light receiving unit;
A second transfer channel for transferring the signal charge transferred by the first transfer channel toward the output unit;
A channel stop region formed on the substrate around the light receiving portion and the first and second transfer channels to prevent inflow and outflow of signal charges;
A gate insulating film formed on the first and second transfer channels and the channel stop region;
A transfer electrode formed on the gate insulating film,
A solid-state imaging device in which a thickness difference is provided in the gate insulating film. The solid-state imaging device according to claim 1, wherein a part of the gate insulating film on the first transfer channel is thinner than another region. The solid-state imaging device according to claim 2, wherein a film thickness of the gate insulating film at a central portion of the first transfer channel is thinner than other regions. The solid-state imaging device according to claim 1, wherein a film thickness of the gate insulating film on the channel stop region is thinner than other regions. The solid-state imaging device according to claim 1, wherein a part of the gate insulating film on the second transfer channel is thicker than other regions. Forming a light receiving portion on the substrate for generating an amount of signal charge corresponding to the amount of incident light;
Forming a first transfer channel in the substrate for transferring the signal charge accumulated in the light receiving portion;
Forming a second transfer channel on the substrate for transferring the signal charges transferred by the first transfer channel toward an output unit;
Forming a channel stop region for preventing inflow and outflow of signal charges on the substrate around the light receiving portion and the first and second transfer channels;
Forming a gate insulating film on the first and second transfer channels and the channel stop region;
Forming a transfer electrode on the gate insulating film,
In the step of forming the gate insulating film, a thickness difference is provided in the gate insulating film. A light receiving portion that is formed on the substrate and generates an amount of signal charge corresponding to the amount of incident light;
A first transfer channel for transferring the signal charge accumulated in the light receiving unit;
A second transfer channel for transferring the signal charge transferred by the first transfer channel toward the output unit;
A channel stop region formed on the substrate around the light receiving portion and the first and second transfer channels to prevent inflow and outflow of signal charges;
A gate insulating film formed on the first and second transfer channels and the channel stop region;
A transfer electrode formed on the gate insulating film,
A camera in which a film thickness difference is provided in the gate insulating film.

Images