JP2007158916A - Infrared sensor and method for driving the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an infrared amplifier capable of storing sufficient electrical charges in the gate of an amplification transistor, during on-periods of a sampling transistor. <P>SOLUTION: This infrared sensor 100 is provided with a row selection circuit 5 for selecting an effective pixel row 120 or non-sensitive pixel row 110, a signal line 31 connected to pixels arrayed in the column direction of an imaging area, the amplification transistor 20 for amplifying the signal of the signal line, a coupling capacity 21 being between the signal line and the amplification transistor, the sampling transistor 25 connected between the gate and the drain of the amplification transistor, a storage capacity 221 connected to the drain of the amplification transistor, and a readout circuit 6 for reading a signal voltage stored in the storage capacity. A first selection period for the row selection circuit to select the non-sensitive pixel row is longer than a second selection period for the row selection circuit to select the effective pixel row. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an infrared sensor and a driving method thereof.

  Since infrared rays have a feature of being more permeable to smoke and fog than visible light, infrared imaging is possible regardless of day or night. In addition, since infrared imaging can also obtain temperature information of a subject, it has a wide range of applications such as surveillance cameras and fire detection cameras in the defense field.

  In recent years, the development of “uncooled infrared solid-state imaging devices” that do not require a cooling mechanism has become active. An uncooled type or thermal type infrared solid-state imaging device converts incident infrared rays having a wavelength of about 10 μm into heat by an absorption structure, and converts the temperature change of the heat-sensitive part caused by the weak heat into an electrical signal by some thermoelectric conversion means. Convert. The uncooled infrared solid-state imaging device obtains infrared image information by reading out this electrical signal.

  For example, there is an infrared sensor using a silicon pn junction that converts a temperature change into a voltage change by applying a constant forward current (Patent Document 1). This infrared sensor has a feature that it can be mass-produced using a silicon LSI manufacturing process by using an SOI (Silicon on Insulator) substrate as a semiconductor substrate. In addition, since the row selection function is realized by utilizing the rectification characteristics of the silicon pn junction which is the thermoelectric conversion means, there is also a feature that the pixel structure can be configured extremely simply.

One index representing the performance of the infrared sensor is NETD (Noise Equivalent Temperature Difference) that expresses the temperature resolution of the infrared sensor. It is important to reduce NETD, that is, to reduce the temperature difference of the infrared sensor corresponding to noise. For this purpose, it is necessary to increase the sensitivity of the signal and reduce the noise.
JP 2002-300475 A

  In Patent Document 1, a sampling transistor is provided between the drain and gate of the amplification transistor in each column, and the amplification transistor is turned on in the first period in which the reference pixel row is selected. The gate voltage is converged to the threshold value, and then the sampling transistor is turned off in the second period. This is called Vth clamp processing. At this time, a coupling capacitor is provided between the gate of the amplification transistor and the signal line. When the bias voltage applied to the reference pixel is Vdd, the voltage drop at the reference pixel is Vref, and the threshold of the amplification transistor is Vth, Vth The coupling capacitance voltage after clamping is (Vdd−Vref) −Vth. Since the sampling transistor is turned off except during the first period, the coupling capacitance voltage is maintained at a constant value when the effective pixel is read, and the selection voltage difference between the effective pixel and the reference pixel is amplified by the column amplifier gate voltage become.

  As an effect of the Vth clamp processing, a minute signal voltage excluding a bias component can be read out in a high dynamic range, and the influence of fluctuation appearing on the amplification transistor gate can be reduced. Here, Vdd is a bias voltage applied to the pixel by the row selection circuit, Vref is an insensitive pixel voltage when the insensitive pixel is selected, and Vth is a threshold value of the amplification transistor.

  Conventionally, the period of the Vth clamp processing is equal to the selection period in which the row selection circuit applies the bias voltage Vdd to the insensitive pixel row and the effective pixel row. Further, when the gate potential of the amplification transistor gradually approaches the threshold voltage of the amplification transistor, the current drive capability of the amplification transistor gradually decreases. For this reason, it is difficult to converge the coupling capacitance voltage during the Vth clamp process. If the coupling capacitance voltage and the gate potential of the amplification transistor are not sufficiently converged, the substrate temperature component obtained when the insensitive pixel is selected cannot be accurately subtracted when the effective pixel is selected. For this reason, the gain of the amplification transistor greatly changes with respect to the change in the substrate temperature. Further, the variation in Vth due to the variation between the columns of the amplification transistors causes the vertical stripe noise.

  Therefore, an infrared sensor that can accurately monitor and subtract the change in substrate temperature and can secure a sufficient gain and dynamic range with respect to incident infrared rays and a driving method thereof are provided.

  An infrared sensor according to an embodiment of the present invention is arranged two-dimensionally on a semiconductor substrate and includes an effective pixel row including infrared detection pixels that detect infrared rays, and an insensitive pixel that does not have infrared sensitivity. An imaging region including an insensitive pixel row, a plurality of row selection lines arranged in a row direction in the imaging region, connected to the infrared detection pixel and the insensitive pixel, and connected to the row selection line, A row selection circuit for selecting an effective pixel row or the insensitive pixel row and applying a bias voltage, and a plurality of signal lines arranged in the column direction of the imaging region and connected to the infrared detection pixel and the insensitive pixel An amplification transistor connected to the signal line and amplifying a signal voltage generated on the signal line; a coupling capacitor connected between the signal line and a gate of the amplification transistor; A sampling transistor connected between the gate and drain of the transistor, a storage capacitor connected to the drain of the amplification transistor, and storing a signal charge, and a readout circuit for reading a voltage based on the signal charge stored in the storage capacitor The row selection circuit selects the insensitive pixel row, and the row selection circuit selects the effective pixel row during a first selection period in which the sampling transistor conducts the drain and gate of the amplification transistor. The signal charge selected and amplified by the amplification transistor is set longer than a second selection period in which the signal charge is stored in the storage capacitor.

  An infrared sensor according to another embodiment of the present invention includes an effective pixel row that is two-dimensionally arranged on a semiconductor substrate and includes infrared detection pixels that detect infrared rays, and an insensitive pixel that does not have infrared sensitivity. An imaging region including a plurality of insensitive pixel rows, a plurality of row selection lines arranged in a row direction in the imaging region, connected to the infrared detection pixels and the insensitive pixels, and connected to the row selection line A row selection circuit that selects the effective pixel row or the plurality of insensitive pixel rows and applies a bias voltage, and is arranged in a column direction of the imaging region, and is arranged in the infrared detection pixel and the plurality of insensitive pixels. A plurality of connected signal lines, an amplification transistor connected to the signal line and amplifying a signal voltage generated on the signal line, and a coupling connected between the signal line and the amplification transistor A sampling transistor connected between the gate and drain of the amplification transistor, a storage capacitor connected to the drain of the amplification transistor, and a signal charge stored in the storage capacitor. A first reading period in which the row selection circuit selects at least one of the insensitive pixel rows and the sampling transistor makes the drain and gate of the amplification transistor conductive. The row selection circuit selects the effective pixel row and is set longer than a second selection period in which the signal charge amplified by the amplification transistor is stored in the storage capacitor, and the first selection period is: The row selection circuit selects at least one insensitive pixel row from the plurality of insensitive pixel rows, and the sample. Wherein the grayed transistor includes a plurality of non-sensitivity pixel row selection period for conducting the drain and the gate of the amplifying transistor.

  An infrared sensor driving method according to an embodiment of the present invention includes an effective pixel row that is two-dimensionally arranged on a semiconductor substrate and includes infrared detection pixels that detect infrared rays, and insensitivity that does not have infrared sensitivity. An imaging region including insensitive pixel rows composed of pixels, a plurality of row selection lines arranged in the imaging region in the row direction, connected to the infrared detection pixels and the insensitive pixels, and connected to the row selection lines A row selection circuit that selects the effective pixel row or the insensitive pixel row and applies a bias voltage; and a plurality of rows that are arranged in the column direction of the imaging region and are connected to the infrared detection pixel and the insensitive pixel A signal line, an amplification transistor connected to the signal line and amplifying a signal voltage generated in the signal line, and a coupling capacitor connected between the signal line and the gate of the amplification transistor A sampling transistor connected between the gate and drain of the amplification transistor; a storage capacitor connected to the drain of the amplification transistor for storing signal charge; and a voltage based on the signal charge stored in the storage capacitor. An infrared sensor driving method including a readout circuit, wherein the row selection circuit selects the insensitive pixel row, and the sampling transistor makes the drain and gate of the amplification transistor conductive. A first selection period; and a second selection period in which the row selection circuit selects the effective pixel row and stores the signal charge amplified by the amplification transistor in the storage capacitor. The selection period is set longer than the second selection period.

  An infrared sensor driving method according to another embodiment of the present invention is two-dimensionally arranged on a semiconductor substrate and has no effective pixel row including infrared detection pixels that detect infrared rays, and does not have infrared sensitivity. An imaging region including a plurality of insensitive pixel rows composed of insensitive pixels, a plurality of row selection lines arranged in the imaging region in the row direction and connected to the infrared detection pixels and the insensitive pixels, and the row selection A row selection circuit that is connected to a line and selects the effective pixel row or the plurality of insensitive pixel rows and applies a bias voltage thereto, and is arranged in a column direction of the imaging region, and the infrared detection pixels and the plurality of non-sensing pixels A plurality of signal lines connected to the sensitivity pixel, an amplification transistor connected to the signal line for amplifying a signal voltage generated on the signal line, and connected between the signal line and the amplification transistor A coupling capacitor; a sampling transistor connected between the gate and drain of the amplification transistor; a storage capacitor connected to the drain of the amplification transistor; and a storage capacitor for storing signal charges; An infrared sensor driving method comprising a readout circuit for reading a voltage based on a signal charge, wherein the row selection circuit selects at least one of the insensitive pixel rows and the sampling transistor Includes a first selection period in which the drain and gate of the amplification transistor are electrically connected, and a second selection period in which the row selection circuit selects the effective pixel row and stores the signal charge amplified by the amplification transistor in the storage capacitor. The first selection period is set to be longer than the second selection period, and the first selection period is set to be longer than the second selection period. In the selection period, the row selection circuit selects at least one insensitive pixel row out of the plurality of insensitive pixel rows, and the sampling transistor has a plurality of insensitivities for conducting the drain and the gate of the amplification transistor. It includes a pixel row selection period.

  The infrared sensor and the driving method thereof of the present invention can accurately monitor and subtract the change in the substrate temperature, and can secure a sufficient gain and dynamic range for the incident infrared rays.

  Embodiments according to the present invention will be described below with reference to the drawings. This embodiment does not limit the present invention.

(First embodiment)
FIG. 1 is a circuit diagram showing a configuration of an infrared sensor 100 according to the first embodiment of the present invention. The infrared sensor 100 includes an imaging region including four pixels arranged in two rows and two columns on a semiconductor substrate, and amplification circuits AMPC1 and AMPC2 that amplify signals obtained from the imaging region. The imaging region usually includes more pixels, but here it is assumed to be four pixels for convenience.

  The first row of the imaging area is an insensitive pixel row 110 made up of insensitive pixels 11 having no infrared sensitivity. The second row of the imaging region is an effective pixel row 120 including infrared detection pixels 12 that detect infrared rays. Each pixel includes a pn junction 4. The insensitive pixel 110 may be either a thermal insensitive pixel or an optical insensitive pixel. The structure of the thermal insensitive pixel or the optical insensitive pixel will be described later.

  The row selection lines 301 and 302 are connected to pixels arranged in the row direction. Vertical signal lines (hereinafter also simply referred to as signal lines) 31 and 32 are connected to pixels arranged in the column direction. The row selection lines 301 and 302 are connected to one end (anode side) of the pn junction 4, and the signal lines 31 and 32 are connected to the other end (cathode side) of the pn junction 4.

  The row selection lines 301 and 302 are connected to the row selection circuit 5. The row selection circuit 5 sequentially selects the insensitive pixel row 110 and the effective pixel row 120 via the row selection lines 301 and 302 and applies the bias voltage Vd. The signal lines 31 and 32 are connected to the load transistor 41. The load transistor 41 operates in the saturation region, and supplies a constant current to the pixels in the selected row according to the gate voltage. That is, the load transistor 41 acts as a constant current source.

  When the row selection circuit 50 applies the bias voltage Vd to the pn junction 4 of the selected row, the pn junction 4 of the selected row is forward biased. As a result, a column voltage (Vd−Vref) obtained by subtracting the voltage drop Vref of the pn junction from the bias voltage Vd is generated on the signal line 6. On the other hand, the pn junctions 4 of the non-selected rows are all reverse-biased, so that the row selection line 5 is separated from the signal line 6. That is, the pn junction 4 may have a pixel selection function.

  When the infrared detection pixel 12 receives infrared rays, the pixel temperature rises. As a result, the voltage drop Vref is reduced, and the potential (Vd−Vref) of the vertical signal line 31 is increased. For example, when the subject temperature changes by 1K (Kelvin), the temperature of the infrared detection pixel 12 changes by about 5 mK. If the thermoelectric conversion efficiency is 10 mV / K, the potential of the vertical signal line 31 increases by about 50 μV. This is very small compared to the bias voltage Vd. In order to amplify such a low voltage signal, an amplification transistor is provided in each column. Here, since the amplifier circuit having the same configuration is connected to the signal line 31 and the signal line 32, only the configuration of the amplifier circuit AMPC1 connected to the signal line 31 will be described for convenience.

  In the amplifier circuit AMPC1, the coupling capacitor 21 is connected between the gate of the amplifier transistor 20 and the signal line 31. The coupling capacitor 21 DC separates the gate of the amplification transistor 20 and the signal line 31. A sampling transistor 25 is connected between the gate and drain of the amplification transistor 20. The drain of the amplification transistor 20 is connected to the node N1 through the switch transistor 26. The storage capacitor 221 is connected between the node N1 and the ground. The node N1 is connected to the read line 33 via the read transistor 24. The gate of the read transistor 24 is connected to the read circuit 6 via the wiring 341. The reset transistor 23 is connected between the reset voltage Vrs and the first electrode of the storage capacitor 221.

  The gate voltage Vg of the amplification transistor 20 rises according to the voltage of the signal line 31, whereby an amplification current flows between the source and the drain. The storage capacitor 221 integrates the current amplified by the amplification transistor 20. The signal voltage Vc1 is generated at the node N1 by the electric charge integrated in the storage capacitor 221. The signal voltage Vc1 is output as the output voltage Vout via the read line 33 when the read transistor 24 is selected by the read circuit 6. The read circuit 6 is configured to sequentially select the amplifier circuits AMPC1 and AMPC2. Accordingly, the infrared sensor 100 can sequentially read the signal voltages Vc1 and Vc2 as the output voltage Vout.

  FIG. 2 is a plan view showing the structure of the infrared detection pixel 12. FIG. 3 is a cross-sectional view of the infrared detection pixel 12 taken along line 3-3 in FIG. A sensor unit 161 including a pn junction for thermoelectric conversion is provided on the hollow structure 18 formed inside the single crystal silicon support substrate 17, and an infrared absorption layer 191 that absorbs incident infrared rays, a thermoelectric conversion unit, The pn junction (hereinafter referred to as a thermoelectric conversion part) inside the SOI layer 192 and the buried silicon oxide film layer 193 that supports the thermoelectric conversion part 192 are configured.

  In addition, a support portion 162 for supporting the sensor portion 161 on the hollow structure 18 and outputting an electric signal from the sensor portion 161 is provided. A wiring 163 is provided in the support portion 162, one is connected to the signal line 31 and the other is connected to the row selection lines 301 and 302, and the signal line 31 and the row selection lines 301 and 302 are connected to the thermoelectric conversion portion 192. And are electrically connected.

  As described above, by providing the sensor unit 161 and the support unit 162 on the hollow structure 18, the temperature of the sensor unit 161 is efficiently modulated by incident infrared rays. FIG. 2 shows a structure in which two pn junctions are connected in series.

  By having such a structure, the infrared detection pixel 12 can store heat generated according to incident infrared rays and output a voltage based on the heat to the signal line 31.

  The bias voltage Vd from the row selection line 301 or 302 is transmitted to the thermoelectric conversion unit 192 through the wiring 163. The signal that has undergone the voltage drop of the thermoelectric conversion unit 192 is transmitted to the vertical signal line 31 via the wiring 163.

  FIG. 4 is a plan view showing the structure of a thermally insensitive pixel as the insensitive pixel 11. FIG. 5 is a cross-sectional view of the thermally insensitive pixel along line 6-6 in FIG. The thermal insensitive pixel is different from the infrared detection pixel 12 in that it does not include the hollow structure 18 and the support portion 162. Therefore, in the thermal insensitive pixel, the thermoelectric conversion unit 192 is provided in the sensor unit 161 in contact with the support substrate 17. The heat generated at the pn junction is dissipated to the surrounding BOX layer 193 and the support substrate 17. That is, the thermal conductance between the thermoelectric converter 192 and the surrounding structure is higher than that of the infrared detection pixel 12. The other configuration of the thermal insensitive pixel is the same as the configuration of the infrared detection pixel 12, and thus the description thereof is omitted.

  Since the thermal insensitive pixel does not have the hollow structure 18, it does not have a heat storage function. Therefore, the thermal insensitive pixel reflects the temperature of the SOI substrate. Such a thermally insensitive pixel is also called a substrate temperature measuring pixel.

  FIG. 6 is a timing chart showing the driving means (driving method) of the infrared sensor 100. First, a reset operation is executed from t1 to t2. In the reset operation, the drive pulse RS rises and the reset transistor 23 shown in FIG. 1 is turned on. The reset transistor 23 makes the reset voltage Vrs and the node N1 conductive. At this time, the drive pulse HASEL also rises and the switch transistor 26 is turned on. The switch transistor 26 makes the node N1 and the drain 32 of the amplification transistor 20 conductive. Thereby, each potential of the node N1 and the drain of the amplification transistor 20 is set to the reset voltage Vrs. The storage capacitor 221 stores reset charges corresponding to the reset voltage Vrs. Hereinafter, a series of operations from t1 to t2 is referred to as a reset operation.

  The infrared sensor 100 detects a signal from the signal line 31 on the basis of the state after the reset operation. The reset operation is performed simultaneously on the amplifier circuits AMPC1 and AMPC2. The voltages of the storage capacitors 221 and 222 are Vc1 and Vc2, respectively.

  When the reset transistor 23 and the switch transistor 26 are turned off at t2, the drain 32 of the amplification transistor 20 enters a floating state. At this time, the drive pulse SMP rises and the sampling transistor 25 is turned on. The sampling transistor 25 makes the drain and gate of the amplification transistor 20 conductive. Thereby, the drain and gate of the amplification transistor 20 have the same potential. At the same time, the drive pulse ss rises and the source potential of the amplification transistor 20 is set to Vs. Further, the drive pulse VCLK is raised at t2, and the row selection circuit 5 in FIG. 1 applies the bias voltage Vd to the row selection line 301. That is, in the first selection period t2 to t3, the row selection circuit 5 selects the insensitive pixel row 110.

  Thereby, in the first selection period t2 to t3, as shown in FIG. 6, the voltage VSL of the signal line 31 gradually rises, and the gate voltage Vg of the amplification transistor 20 gradually falls. The reason for this operation is as follows. Since the gate and the drain of the amplification transistor 20 have the same potential, a current flows from the drain to the source until the difference between the gate voltage Vg (drain voltage) and the source voltage becomes Vth. The amplification transistor 20 operates in the saturation region due to the relationship of Vdrain = Vg> Vg−Vth. When the drain voltage Vdrain and the gate voltage Vg of the amplification transistor 20 become equal to the threshold value Vs + Vth, the current flow between the source and the drain of the amplification transistor 20 stops.

Here, since the current flowing between the source and drain of the amplification transistor 20 is proportional to (Vg− (Vs + Vth)) ² , it decreases as the gate voltage Vg approaches the threshold value Vs + Vth. Therefore, the gate voltage Vg gradually approaches the threshold value Vs + Vth as it shifts from t2 to t3.

  Assuming that the forward voltage of the insensitive pixel 11 corresponding to the constant current If is Vref, the voltage VSL of the signal line 31 is Vd−Vref when the sample transistor 25 is in the off state. Here, since the insensitive pixel 11 is a thermal insensitive pixel, that is, a substrate temperature measuring pixel, it does not include the self-heating component Vsh and the infrared signal component Vsig. The self-heating component Vsh is a voltage component that reflects self-heating due to Joule heat. The infrared signal component Vsig is a voltage component based on a temperature rise due to absorption of incident infrared rays.

  When the voltage VSL of the signal line 31 becomes Vd−Vref and the gate voltage Vg of the amplification transistor 20 becomes Vth + Vs, the current flowing through the gate → drain → source of the amplification transistor 20 is stopped. As described above, the gate voltage Vg Becomes closer to the threshold value Vs + Vth, the current drive capability of the amplification transistor 20 gradually decreases. Therefore, if the first selection period t2 to t3 is short, the negative charge cannot be sufficiently accumulated in the gate of the amplification transistor 20, and the expression 1 cannot be satisfied. Accordingly, the first selection period t2 to t3 is set to a long period so that the gate voltage Vg is substantially equal to the threshold value Vs + Vth. The first selection period t2 to t3 will be described later.

  After the first selection period, the signal SMP falls and the sampling transistor 25 is turned off. As a result, the gate of the amplification transistor 20 is in a floating state while satisfying Equation 1.

  During the period from t3 to t4, all the transistors are off, but the length of this period is preferably equal to the length of the later-described t6 to t7 in which the horizontal readout circuit 6 sequentially outputs Vout. The pulse period can be made constant. Although not shown, this period may be the same as the period from t6 to t7, and the drive pulses H1 and H2 may be operated.

  Next, at t4 to t5, a reset operation is performed, and the drain voltage of the amplification transistor 20 is set to the reset voltage Vrs again.

  Subsequently, the row selection circuit 5 applies the bias voltage Vd to the effective pixel row 120 in the second selection period t5 to t6. Thereby, a forward voltage (Vref−Vsh−Vsig) is applied to the pn junction of the infrared detection pixel 12. Here, since the temperature of the infrared detection pixel 12 is higher by the amount of the self-heating component Vsh and the infrared signal component Vsig, a voltage lower than Vref by (Vsh + Vsig) is applied to the pn junction. Therefore, the voltage VSL of the signal line 31 is VSL = Vd−Vref + Vsh + Vsig. The gate voltage Vg of the amplification transistor 20 is Vg = (Vd−Vref + Vsh + Vsig) − (Vd−Vref−Vth−Vs) = Vsh + Vsig + Vth + Vs. That is, the gate voltage Vg is a voltage obtained by adding the self-heating component Vsh and the infrared signal component Vsig to the threshold value Vth + Vs.

The current Ids flowing between the source and drain of the amplification transistor 20 is proportional to (Vg−Vth) ² = (Vsh + Vsig + Vs) ² . Note that in the second selection period, since Vs = 0, the current Ids can be controlled by changing the source voltage Vs.

  Since the signal HASEL rises in the second selection period t5 to t6, the switch transistor 26 is in the on state. Therefore, when the gate voltage Vg changes from the threshold value Vs + Vth, the storage capacitor 221 accumulates charges based on the change amount. In the second selection period t5 to t6, the gate voltage Vg is higher than the threshold value Vth by Vs + Vsh + Vsig. Therefore, the storage capacitor 221 stores the charge amount obtained by amplifying only the self-heating component Vsh and the infrared signal component Vsig with reference to the charge amount after the reset operation. Due to the change in the amount of charge in the storage capacitor 221, the voltage Vc1 at the node N1 changes by a voltage obtained by amplifying (Vsh + Vsig) with reference to the potential after the reset operation.

  Since the amplifier circuit AMPC2 operates in the same manner as the amplifier circuit AMPC1, the voltage Vc2 at the node N2 changes by a voltage obtained by amplifying (Vsh + Vsig) with reference to the potential after the reset operation.

  Signals H1 and H2 shown in FIG. 6 are voltages applied to the gate 341 of the read transistor 24 and the gate 342 of the read transistor 35, respectively. When the read circuit 6 outputs the signals H1 and H2 at different timings, the read transistors 24 and 35 are sequentially turned on. As a result, the voltage Vc1 at the node N1 and the voltage Vc2 at the node N2 are sequentially read as the output voltage Vout.

  Here, pay attention to the first selection periods t2 to t3 and the second selection periods t5 to t6 in FIG. The first selection period t2 to t3 is longer than the second selection period t5 to t6. For example, the first selection period t2 to t3 is a period from when the row selection circuit 5 applies the bias voltage Vd to when the gate voltage Vg of the amplification transistor 20 becomes substantially equal to the threshold value Vs + Vth. As a specific example, the first selection period is 100 μsec, and the second selection period is 25 μsec.

  As described above, the gate voltage Vg can be converged to the threshold value Vs + Vth by making the first selection period (also referred to as Vth clamp period or sampling period) longer than the second selection period. After the first selection period, when the gate voltage Vg is substantially equal to the threshold value Vs + Vth, the infrared sensor 100 can amplify only the self-heating component Vsh and the infrared signal component Vsig. As a result, the infrared sensor 100 can remove the forward voltage Vref of the insensitive pixel 11 and is hardly affected by the environmental temperature.

  A substrate temperature measurement pixel is employed as the insensitive pixel 11. Since the substrate temperature measurement pixel does not require a process of forming a hollow structure in the semiconductor substrate as shown in FIG. 5, it can be manufactured by a general-purpose CMOS manufacturing process. Therefore, the variation in the characteristics of the pn junction is small among the plurality of substrate temperature measurement pixels. Further, since the output voltage Vout does not include the threshold value Vth component of the amplification transistor 20, the dynamic range occupied by the infrared signal component Vsig can be expanded. Further, if the output voltage Vout does not include a component of the threshold value Vth of the amplification transistor 20, the output voltage Vout is not affected by variations in the threshold value of the amplification transistor 20. As a result, vertical streak noise appearing in the signal read from each amplifier circuit is suppressed.

  The source potential of the amplifying transistor 20 is different between the first selection period and the second selection period. Thus, the gain of the infrared sensor can be increased by making the source potential Vs adjustable.

(Second Embodiment)
The second embodiment employs an optical insensitive pixel as the insensitive pixel 11. FIG. 7 is a cross-sectional view of an optical insensitive pixel. Other configurations of the second embodiment may be the same as those of the first embodiment.

  The optical insensitive pixel is different from the infrared detection pixel 12 in that an infrared reflection layer 291 that reflects incident infrared rays is provided on the infrared absorption layer 191 or in place of the infrared absorption layer 191. Since the other configuration of the optical insensitive pixel is the same as that of the infrared detection pixel 12, the description thereof is omitted. The infrared reflecting layer 291 is made of a metal film having a high refractive index.

  The optically insensitive pixel does not absorb infrared rays by the infrared reflecting layer 291. Further, the optical insensitive pixel has a hollow structure 18 like the infrared detection pixel 12. Therefore, the optical insensitive pixel can reflect the self-heating component Vsh in the storage capacitor voltage in the first selection period (clamping period).

In the second selection period, the signal current Ids flowing between the source and the drain of the amplification transistor 20 is proportional to (Vg−Vth) ² = (Vsig + Vs) ² . When this current Ids equation is compared with the current Ids equation of the first embodiment, there is no self-heating component Vsh. That is, by adopting an optical insensitive pixel as the insensitive pixel 11, this embodiment removes not only the bias component Vd and the forward voltage Vref of the pn junction but also the self-heating component Vsh from the signal voltage. Can do. This signal current Ids is composed only of an infrared detection signal component Vsig and an adjustable bias component Vs. Therefore, the amplifier circuit of the second embodiment can further expand the dynamic range occupied by the infrared signal component Vsig. Further, the second embodiment can obtain the same effects as those of the first embodiment.

(Third embodiment)
FIG. 8 is a circuit diagram showing a configuration of an infrared sensor 300 according to the third embodiment of the present invention. The infrared sensor 300 is different from the first embodiment in that it includes a plurality of insensitive pixel rows 110. Since other configurations of the third embodiment are the same as those of the first embodiment, description thereof is omitted. For convenience, it is assumed that the infrared sensor 300 includes two insensitive pixel rows 110. Of course, the infrared sensor 300 may include three or more insensitive pixel rows 110.

  In the third embodiment, the row selection circuit 5 sequentially selects a plurality of insensitive pixel rows 110a and 110b sequentially. Thereby, the selection time of the insensitive pixel row 110 can be made substantially longer than the selection time of the effective pixel row 120.

  FIG. 9 is a timing chart showing the driving means (driving method) of the infrared sensor 300. From t11 to t12, the reset operation is executed as in the first embodiment. In the first insensitive pixel row selection period t12 to t13, the row selection circuit 5 selects the first insensitive pixel row 110a. The length of the first insensitive pixel row selection period t12 to t13 may be the same as the length of the effective pixel row selection period t18 to t19. In the first insensitive pixel row selection period t12 to t13, a sufficient current based on the signal line voltage VSL cannot be passed between the source and the drain of the amplification transistor 20. Therefore, although the gate voltage Vg is close to the threshold value Vs + Vth, it cannot be said to be equal to the threshold value Vs + Vth.

  During the period from t13 to t14, all the transistors are turned off, but it is desirable that the length of this period is equal to the length of the later-described t19 to t20 in which the horizontal readout circuit 6 sequentially outputs Vout. The pulse period can be made constant. Although not shown, this period may be the same as the period from t19 to t20, and the drive pulses H1 and H2 may be operated.

  Although the reset signal RS rises from t14 to t15, the drain potential of the amplification transistor 20 is not reset because the switch transistor 26 is off. This is to maintain the gate voltage Vg approaching the threshold value Vs + Vth in the first insensitive pixel row selection period t12 to t13.

  In the second insensitive pixel row selection period t15 to t16, the row selection circuit 5 selects the second insensitive pixel row 110b. The length of the second insensitive pixel row selection period t15 to t16 may be the same as the length of the effective pixel row selection period t18 to t19. In the second insensitive pixel row selection period t15 to t16, further current flows between the source and drain of the amplification transistor 20 based on the signal line voltage VSL. As a result, the gate voltage Vg that has approached the threshold value Vs + Vth in the first insensitive pixel row selection period t12 to t13 continues to approach the threshold value Vs + Vth. As a result, the gate voltage Vg becomes substantially equal to the threshold value Vs + Vth.

  From t16 to t17, as in t13 to t14, all the transistors are turned off, and the length is equal to the length of t19 to t20. Although not shown, this period may be the same as the period from t19 to t20 even if the drive pulses H1 and H2 are operated.

  Thereafter, the operation of the infrared sensor 300 from t17 to t20 is the same as the operation of the infrared sensor 100 from t4 to t7 in FIG.

  In the third embodiment, the first insensitive pixel row selection period, the second insensitive pixel row selection period, and the effective pixel row selection period can be made equal to each other. That is, the row selection circuit 5 may apply the bias voltage Vd to the row selection lines 301 to 303 with a constant clock. This makes it possible to employ a simple shift register as the row selection circuit 5. Therefore, the third embodiment can simplify the circuit configuration of the infrared sensor.

  Further, by selecting a plurality of insensitive pixel rows, the forward voltage Vref of the pn junction is averaged. Thereby, the manufacturing variation of an insensitive pixel can be averaged. The third embodiment can further obtain the effects of the first embodiment.

  As pixels in the insensitive pixel row 110, optical insensitive pixels may be employed. Thereby, 3rd Embodiment can also acquire the effect of 2nd Embodiment.

  The infrared sensor according to the above embodiment can be applied to an infrared camera. In the above-described embodiment, a shutter (fixed pattern removal) operation during imaging with a Peltier element or a camera circuit, which has been conventionally necessary for stabilizing the substrate temperature, is not necessary.

  For example, as shown in FIG. 10, the infrared camera includes an amplification device A, a background removal device, an amplification device B, an A / D conversion device, and an image processing arithmetic device at Vout of the infrared sensor 100 in FIG. 1. ing. As an operation method of the infrared camera, an output signal from Vout of the infrared sensor 100 is amplified by an amplification device A, a dark component is stored and removed by a background removal device, and the signal is amplified again by an amplification device B. The digital signal is converted into a digital signal by the D conversion device, the image processing operation device performs image correction processing or the like as necessary, and the result is output to a display device or the like.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the components without departing from the scope of the invention in the implementation stage. In addition, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined.

1 is a circuit diagram showing a configuration of an infrared sensor 100 according to a first embodiment of the present invention. FIG. 3 is a plan view showing the structure of an infrared detection pixel 12. FIG. 3 is a cross-sectional view of the infrared detection pixel 12 taken along line 3-3 in FIG. 2. The top view which shows the structure of the thermal insensitive pixel as the insensitive pixel 11. FIG. FIG. 6 is a cross-sectional view of a thermally insensitive pixel along line 6-6 in FIG. FIG. 3 is a timing chart showing a driving means (driving method) of the infrared sensor 100. Sectional drawing of an optical insensitive pixel. A circuit diagram showing composition of infrared sensor 300 according to a 3rd embodiment concerning the present invention. FIG. 5 is a timing chart showing a driving means (driving method) of the infrared sensor 300. The circuit diagram which shows the structure of the infrared camera using the infrared sensor in connection with this invention.

Explanation of symbols

100 Infrared sensor 110 Insensitive pixel row 120 Effective pixel row 5 Row selection circuit 6 Reading circuit 20 Amplifying transistor 21 Coupling capacitor 25 Sampling transistor 31 Signal line 221 Storage capacitor

Claims (13)

An imaging region including an effective pixel row that is two-dimensionally arranged on a semiconductor substrate and includes infrared detection pixels that detect infrared rays, and an insensitive pixel row that includes insensitive pixels that do not have infrared sensitivity;
A plurality of row selection lines arranged in a row direction in the imaging region and connected to the infrared detection pixels and the insensitive pixels;
A row selection circuit connected to the row selection line and selecting the effective pixel row or the insensitive pixel row and applying a bias voltage;
A plurality of signal lines arranged in the column direction of the imaging region and connected to the infrared detection pixels and the insensitive pixels;
An amplification transistor connected to the signal line and amplifying a signal voltage generated on the signal line;
A coupling capacitor connected between the signal line and the gate of the amplification transistor;
A sampling transistor connected between the gate and drain of the amplification transistor;
A storage capacitor connected to the drain of the amplification transistor for storing signal charges;
A readout circuit for reading out a voltage based on the signal charge accumulated in the storage capacitor,
In the first selection period in which the row selection circuit selects the insensitive pixel row and the sampling transistor makes the drain and gate of the amplification transistor conductive, the row selection circuit selects the effective pixel row, and An infrared sensor characterized by being set longer than a second selection period in which the signal charge amplified by the amplification transistor is stored in the storage capacitor. An imaging region that is two-dimensionally arranged on a semiconductor substrate and includes an effective pixel row composed of infrared detection pixels that detect infrared rays, and a plurality of insensitive pixel rows composed of insensitive pixels that do not have infrared sensitivity;
A plurality of row selection lines arranged in a row direction in the imaging region and connected to the infrared detection pixels and the insensitive pixels;
A row selection circuit which is connected to the row selection line and selects the effective pixel row or the plurality of insensitive pixel rows and applies a bias voltage;
A plurality of signal lines arranged in the column direction of the imaging region and connected to the infrared detection pixels and the plurality of insensitive pixels;
An amplification transistor connected to the signal line and amplifying a signal voltage generated on the signal line;
A coupling capacitor connected between the signal line and the amplification transistor;
A sampling transistor connected between the gate and drain of the amplification transistor;
A storage capacitor for storing signal charges connected to the drain of the amplification transistor;
A readout circuit for reading out a voltage based on the signal charge accumulated in the storage capacitor,
The row selection circuit selects the effective pixel row during a first selection period in which the row selection circuit selects at least one of the insensitive pixel rows and the sampling transistor makes the drain and gate of the amplification transistor conductive. And is set longer than a second selection period for storing the signal charge amplified by the amplification transistor in the storage capacitor,
In the first selection period, the row selection circuit selects at least one insensitive pixel row among the plurality of insensitive pixel rows, and the sampling transistor conducts a plurality of drains and gates of the amplification transistor. An insensitive pixel row selection period. A reset transistor connected to the drain of the amplification transistor and resetting the drain voltage;
3. The infrared sensor according to claim 1, wherein the drain voltage of the amplification transistor is reset before the first selection period and before the second selection period.   At least one of the plurality of insensitive pixel row selection periods is an effective pixel row selection period in which the row selection circuit selects the effective pixel row and stores the signal charge amplified by the amplification transistor in the storage capacitor. The infrared sensor according to claim 2, wherein A reset transistor connected to the drain of the amplification transistor and resetting the drain voltage;
The drain voltage of the amplification transistor is reset before the first period among the plurality of insensitive pixel row selection periods, and the drain voltage of the amplification transistor is not reset in the subsequent insensitive pixel row selection period. The infrared sensor according to any one of claims 1 to 4.   2. The infrared sensor according to claim 1, wherein a source potential of the amplification transistor is different between the first selection period and the second selection period.   An infrared camera comprising the infrared sensor according to any one of claims 1 to 6. An imaging region including an effective pixel row that is two-dimensionally arranged on a semiconductor substrate and includes infrared detection pixels that detect infrared rays, and an insensitive pixel row that includes insensitive pixels that do not have infrared sensitivity, and the imaging region A plurality of row selection lines arranged in a row direction and connected to the infrared detection pixels and the insensitive pixels, and connected to the row selection lines to select and bias the effective pixel row or the insensitive pixel row. A row selection circuit for applying a voltage, a plurality of signal lines arranged in the column direction of the imaging region, connected to the infrared detection pixels and the insensitive pixels, and connected to the signal lines and generated in the signal lines An amplification transistor for amplifying the signal voltage, a coupling capacitor connected between the signal line and the gate of the amplification transistor, and a connection between the gate and drain of the amplification transistor A method of driving an infrared sensor, comprising: a sampling transistor connected to the drain of the amplifying transistor; a storage capacitor for storing a signal charge; and a readout circuit for reading a voltage based on the signal charge stored in the storage capacitor. There,
The driving method is
A first selection period in which the row selection circuit selects the insensitive pixel row, and the sampling transistor makes the drain and gate of the amplification transistor conductive;
A second selection period in which the row selection circuit selects the effective pixel row and stores the signal charge amplified by the amplification transistor in the storage capacitor;
The method of driving an infrared sensor, wherein the first selection period is set longer than the second selection period. An imaging region that is two-dimensionally arranged on a semiconductor substrate and includes an effective pixel row composed of infrared detection pixels that detect infrared rays, and a plurality of insensitive pixel rows composed of insensitive pixels that do not have infrared sensitivity;
A plurality of row selection lines arranged in a row direction in the imaging region and connected to the infrared detection pixels and the insensitive pixels;
A row selection circuit which is connected to the row selection line and selects the effective pixel row or the plurality of insensitive pixel rows and applies a bias voltage;
A plurality of signal lines arranged in the column direction of the imaging region and connected to the infrared detection pixels and the plurality of insensitive pixels;
An amplification transistor connected to the signal line and amplifying a signal voltage generated on the signal line;
A coupling capacitor connected between the signal line and the amplification transistor;
A sampling transistor connected between the gate and drain of the amplification transistor;
A storage capacitor for storing signal charges connected to the drain of the amplification transistor;
A method for driving an infrared sensor comprising a readout circuit for reading out a voltage based on the signal charge accumulated in the storage capacitor,
The driving method is
A first selection period in which the row selection circuit selects at least one of the insensitive pixel rows and the sampling transistor makes a drain and a gate of the amplification transistor conductive;
A second selection period in which the row selection circuit selects the effective pixel row and stores the signal charge amplified by the amplification transistor in the storage capacitor;
The first selection period is set longer than the second selection period,
In the first selection period, the row selection circuit selects at least one insensitive pixel row among the plurality of insensitive pixel rows, and the sampling transistor conducts a plurality of drains and gates of the amplification transistor. An insensitive pixel row selection period. The infrared sensor further includes a reset transistor connected to a drain of the amplification transistor,
The infrared sensor driving method according to claim 8 or 9, wherein the drain voltage of the amplification transistor is reset before the first selection period and before the second selection period. .   At least one of the plurality of insensitive pixel row selection periods is an effective pixel row selection period in which the row selection circuit selects the effective pixel row and stores the signal charge amplified by the amplification transistor in the storage capacitor. The infrared sensor driving method according to claim 9, wherein: A reset transistor connected to the drain of the amplification transistor and resetting the drain voltage;
The reset transistor resets the drain voltage of the amplification transistor before the first period of the plurality of insensitive pixel row selection periods, and resets the drain voltage of the amplification transistor in the subsequent insensitive pixel row selection period. The infrared sensor driving method according to claim 8, wherein the infrared sensor driving method is not performed.   9. The infrared sensor driving method according to claim 8, wherein a source potential of the amplification transistor is different between the first selection period and the second selection period.

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