JP2007149410A - Flat display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a flat display device wherein distortion of an electron orbit caused by disturbance of an electric field in the vicinity of a spacer can be properly corrected even if it changes with the passage of time. <P>SOLUTION: The flat display device includes a plurality of beltlike first electrodes 13, and a plurality of beltlike second electrodes 11 positioned below the first electrodes 13, and is composed of a cathode panel CP having an electron discharge area EA and an anode panel AP having a phosphor area 22 and an anode electrode 24. These panels are connected at their peripheral fringe parts through a connecting member, a plurality of spacers 40 are disposed between the cathode panel CP and the anode panel AP, and a lower insulating film 52 and a lower auxiliary electrode layer 51 are provided from the cathode panel side between the lower end face of the spacer 40 and the cathode panel CP portion positioned below the lower end face of the spacer 40. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a flat display device.

  As an image display device that can replace the mainstream cathode ray tube (CRT), various types of flat display devices have been studied. Examples of such a flat display device include a liquid crystal display device (LCD), an electroluminescence display device (ELD), and a plasma display device (PDP). In addition, development of a flat display device incorporating a cathode panel equipped with an electron-emitting device is also in progress. Here, as the electron-emitting device, a cold cathode field electron-emitting device, a metal / insulating film / metal-type device (also called MIM device), and a surface conduction electron-emitting device are known. A flat display device incorporating a cathode panel provided with the electron-emitting device is attracting attention from the viewpoint of high-resolution, high-luminance color display and low power consumption.

  A cold cathode field emission display device (hereinafter sometimes abbreviated as a display device), which is a flat display device incorporating a cold cathode field electron emission device as an electron emission device, generally has a plurality of cold cathode field electron emission. A cathode panel CP provided with an element (hereinafter sometimes abbreviated as a field emission element) and an anode panel AP having a phosphor region that emits light when excited by collision with electrons emitted from the field emission element; The cathode panel CP and the anode panel AP are arranged to face each other through a space maintained in a high vacuum, and are joined to each other at a peripheral portion via a joining member. Here, the cathode panel CP has electron emission regions corresponding to the sub-pixels arranged in a two-dimensional matrix, and each electron emission region is provided with one or a plurality of field emission elements. Examples of field emission devices include Spindt type, flat type, edge type, and planar type.

  As an example, FIG. 34 shows a schematic partial end view of a display device having a Spindt-type field emission device, and a schematic view of a part of the cathode panel CP and the anode panel AP when the cathode panel CP and the anode panel AP are disassembled. FIG. 36 shows an exploded perspective view. The Spindt-type field emission device constituting this display device was formed on the cathode 10 formed on the support 10, the insulating layer 12 formed on the support 10 and the cathode 11, and the insulating layer 12. A gate electrode 13 and an opening 14 provided in the gate electrode 13 and the insulating layer 12 (a first opening 14A provided in the gate electrode 13 and a second opening 14B provided in the insulating layer 12); It is composed of a conical electron emission portion 15 formed on the cathode electrode 11 located at the bottom of the opening 14.

  Alternatively, FIG. 35 shows a schematic partial end view of a display device having a so-called flat field emission device having a substantially planar electron emission portion 15A. The field emission device includes a cathode electrode 11 formed on a support 10, an insulating layer 12 formed on the support 10 and the cathode electrode 11, a gate electrode 13 formed on the insulating layer 12, a gate An opening 14 provided in the electrode 13 and the insulating layer 12 (a first opening 14A provided in the gate electrode 13 and a second opening 14B provided in the insulating layer 12) and a bottom of the opening 14 The electron emission portion 15A is formed on the cathode electrode 11 positioned. The electron emission portion 15A is composed of, for example, a large number of carbon nanotubes partially embedded in a matrix.

  An interlayer insulating layer 16 is provided on the insulating layer 12 and the gate electrode 13, and the interlayer insulating layer 16 has an opening (third opening 14C) communicating with the first opening 14A provided in the gate electrode 13. Furthermore, a converging electrode 17 is provided over the interlayer insulating layer 16 and over the side wall of the third opening 14C. In FIGS. 35 and 36, the interlayer insulating layer and the focusing electrode are not shown.

  In these display devices, the cathode electrode 11 has a strip shape extending in the Y direction, and the gate electrode 13 has a strip shape extending in the X direction different from the Y direction. In general, the cathode electrode 11 and the gate electrode 13 are each formed in a strip shape in a direction in which the projected images of both the electrodes 11 and 13 are orthogonal to each other. An overlapping region where the strip-shaped cathode electrode 11 and the strip-shaped gate electrode 13 overlap is an electron emission region EA, which corresponds to one subpixel. The electron emission area EA is an effective area EF of the cathode panel CP (a central display area that performs a display function that is a practical function as a flat display device, and the ineffective area NE corresponds to the effective area EF. They are usually arranged in a two-dimensional matrix within the outer area and surrounding the effective area EF in a frame shape.

  On the other hand, the anode panel AP has phosphor regions 22 having a predetermined pattern on the substrate 20 (specifically, a red light-emitting phosphor region 22R, a green light-emitting phosphor region 22G, and a blue light-emitting phosphor region 22B). The phosphor region 22 is formed and covered with the anode electrode 24. In addition, a space between these phosphor regions 22 is embedded with a light absorbing layer (black matrix) 23 made of a light absorbing material such as carbon to prevent the occurrence of color turbidity and optical crosstalk in the display image. ing. In addition, each of the phosphor regions 22 constituting one subpixel is surrounded by a partition wall 21, and the planar shape of the partition wall 21 is a lattice shape (cross-beam shape). In the figure, reference numeral 140 represents a spacer, reference numeral 25 represents a spacer holding portion, and reference numeral 26 represents a joining member. In FIGS. 35 and 36, the illustration of the partition walls, the spacers, and the spacer holding portions are omitted.

One subpixel is constituted by an electron emission area EA on the cathode panel side and a phosphor area 22 on the anode panel side facing (facing to) the electron emission area EA. In the effective area EF, such pixels are arranged in an order of several hundred thousand to several million, for example. In a display device for color display, one pixel (one pixel) includes a set of a red light emitting subpixel, a green light emitting subpixel, and a blue light emitting subpixel. Then, the anode panel AP and the cathode panel CP are arranged so that the electron emission region EA and the phosphor region 22 are opposed to each other, joined at the peripheral portion via the joining member 26, and then exhausted and sealed. Thus, a display device can be manufactured. A space surrounded by the anode panel AP, the cathode panel CP, and the bonding member 26 is in a high vacuum (for example, 1 × 10 ⁻³ Pa or less).

Therefore, unless the spacer 140 is disposed between the anode panel AP and the cathode panel CP, the display device is damaged by the atmospheric pressure. Incidentally, an antistatic film (not shown in FIG. 34) made of, for example, CrO _x or CrAl _x O _y is usually formed on the side surface of the spacer 140.

  In general, the spacer 140 is made of a ceramic having conductivity. For example, in the spacer disclosed in JP-T-11-500856, as shown in FIG. 34, an edge metal covering strip 140A is formed on the upper end surface of the spacer 140, and the edge metal covering strip is formed on the lower end surface of the spacer 140. 140B is formed. The metal-coated strip 140A is connected to the anode electrode control circuit 34, and the metal-coated strip 140B is connected to the convergence electrode control circuit 33. Specifically, a connection portion is provided at the longitudinal end portion of the spacer 140, and the wiring extending from the anode electrode control circuit 34 and the wiring extending from the convergence electrode control circuit 33 and the metal-coated strips 140A and 140B are connected to the connector ( (Not shown). By forming such edge metallized strips 140A and 140B, the potential of the upper portion of the spacer 140 becomes equal to the potential of the anode electrode 24, the potential of the lower portion of the spacer 140 becomes equal to the potential of the focusing electrode 17, and the spacer 140 A small current always flows through. Thus, the distortion of the electron beam trajectory due to the disturbance of the electric field in the vicinity of the spacer due to the presence of the spacer is corrected.

  If the distortion of the electron beam trajectory in the vicinity of the spacer 140 is not corrected, the light emission state of the phosphor region 22 located near the spacer 140 and the phosphor located away from the spacer 140 There is a difference between the emission state of the region 22 and the presence of the spacer 140 may be visually recognized.

11-500856

  By the way, a long-term operation of the display device causes a change in the charged state of the surface of the spacer 140 or a change with time in the electrical resistance value of the spacer 140, resulting in distortion of the electron beam trajectory in the vicinity of the spacer 140. A change with time may occur, and the distortion of the electron beam trajectory in the vicinity of the spacer 140 may not be appropriately corrected. In addition, for example, due to variations in the quality of the spacer 140 and variations in manufacturing the display device, the electric field distribution (electric field distribution design value) in the vicinity of the spacer at the time of designing the display device, and the spacer 140 in the actually manufactured display device. There may be a difference between the distribution of the electric field in the vicinity of (the initial value of the electric field distribution).

  However, in general, the voltage applied to the anode electrode 24 and the focusing electrode 17 is constant. Therefore, in the technique disclosed in JP-T-11-500856, the voltage applied to the spacer 140 is also constant. Therefore, it is extremely difficult to correct the change over time in the distortion of the electron beam trajectory in the vicinity of the spacer 140 described above, or to correct the difference generated between the electric field distribution design value and the electric field distribution initial value. Have difficulty.

  Therefore, the object of the present invention is to appropriately correct even if the distortion of the electron beam trajectory due to the disturbance of the electric field in the vicinity of the spacer due to the presence of the spacer changes over time. It is possible to appropriately correct the difference between the distribution of the electric field in the vicinity of the spacer (electric field distribution design value) and the distribution of the electric field in the vicinity of the spacer in the actually manufactured flat display device (initial value of the electric field distribution). An object of the present invention is to provide a flat display device having a configuration and structure.

In order to achieve the above object, a flat display device according to the first aspect of the present invention includes:
(A) A plurality of strip-shaped first electrodes extending in the first direction and a plurality of strip-shaped second electrodes extending in a second direction different from the first direction and positioned below the first electrode. A cathode panel having an electron emission region composed of an overlapping region of the first electrode and the second electrode, and
(B) an anode panel having a phosphor region and an anode electrode;
A flat panel display device in which a cathode panel and an anode panel are bonded to each other at a peripheral portion thereof via a bonding member,
A plurality of spacers are arranged between the cathode panel and the anode panel,
A lower insulating film and a lower auxiliary electrode layer are provided from the cathode panel side between the lower end surface of the spacer and the portion of the cathode panel located below the lower end surface of the spacer.

  In the flat display device according to the first aspect of the present invention, the upper end surface of the spacer is in contact with the anode electrode, and as a form of contact, the spacer is in contact via the electrode formed on the upper end surface of the spacer. However, it is desirable to adopt a contact form between the anode electrode and the upper end face of the spacer in the flat display device according to the second aspect of the present invention to be described later.

  In the flat display device according to the first aspect of the present invention, the lower auxiliary electrode layer is formed on the lower end surface of the spacer, and the lower insulating film is formed on the cathode panel located below the lower end surface of the spacer. In this case, each spacer is preferably composed of a single spacer member. Alternatively, it is possible to adopt a mode in which a lower auxiliary electrode layer and a lower insulating film are formed on the lower end surface of the spacer (hereinafter sometimes referred to as a 1B mode). It is preferable that the spacer member is composed of a single spacer member. Alternatively, a mode in which a lower insulating film is formed on a portion of the cathode panel located below the lower end surface of the spacer, and a lower auxiliary electrode layer is formed on the lower insulating film (hereinafter referred to as mode 1C). In this case, each spacer is preferably composed of one spacer member, or is preferably composed of a plurality of spacer members. Alternatively, a lower insulating film is formed on a portion of the cathode panel located below the lower end surface of the spacer, and the lower auxiliary electrode layer includes a lower first auxiliary electrode layer formed on the lower end surface of the spacer, and a lower portion It is possible to adopt a mode (hereinafter, sometimes referred to as a 1D mode) composed of the lower second auxiliary electrode layer formed on the insulating film. In this case, each spacer has one line. It is preferable that the spacer member is composed of a spacer member or a plurality of spacer members. Here, if each spacer is configured from a plurality of spacer members, the length of the spacer members can be shortened, and the manufacture of the spacer members becomes easy.

In the flat display device according to the first aspect of the present invention including the above preferred embodiments, configurations, and aspects, the voltage applied to the lower auxiliary electrode layer is V _DN (volts), and the voltage applied to the first electrode Is V ₁ (volt), satisfying −100 ≦ (V _DN −V ₁ ) ≦ 100 is a correction to the change over time of the distortion of the electron beam trajectory in the vicinity of the spacer, and the electric field distribution design value This is desirable from the viewpoint of more reliably correcting the difference between the initial value of the electric field distribution. The electron beam trajectory distortion in the vicinity of the spacer can be corrected by adjusting the value of V _DN .

Alternatively, in the flat display device according to the first aspect of the present invention including the preferred form, configuration, and aspect described above, a converging electrode electrically insulated from the first electrode is provided under the lower insulating film. In this case, when the voltage applied to the lower auxiliary electrode layer is V _DN (volts) and the voltage applied to the focusing electrode is V _F (volts), −100 ≦ (V _DN −V _F ) ≦ 100 satisfies the correction for the change over time in the distortion of the electron beam trajectory in the vicinity of the spacer and the correction of the difference between the electric field distribution design value and the electric field distribution initial value. It is desirable from the viewpoint of performing more reliably. The electron beam trajectory distortion in the vicinity of the spacer can be corrected by adjusting the value of V _DN .

In order to achieve the above object, a flat display device according to the second aspect of the present invention includes:
(A) A plurality of strip-shaped first electrodes extending in the first direction and a plurality of strip-shaped second electrodes extending in a second direction different from the first direction and positioned below the first electrode. A cathode panel having an electron emission region composed of an overlapping region of the first electrode and the second electrode, and
(B) an anode panel having a phosphor region and an anode electrode;
A flat panel display device in which a cathode panel and an anode panel are bonded to each other at a peripheral portion thereof via a bonding member,
A plurality of spacers are arranged between the cathode panel and the anode panel,
An upper insulating film and an upper auxiliary electrode layer are provided from the anode panel side between the upper end surface of the spacer and the portion of the anode electrode located above the upper end surface of the spacer.

  In the flat display device according to the second aspect of the present invention, the lower end surface of the spacer is in contact with the cathode panel, and as a form of contact, the spacer is in contact via an electrode formed on the lower end surface of the spacer. However, it is desirable to employ a contact form between the cathode panel and the lower end surface of the spacer in the flat display device according to the first aspect of the present invention described above.

  In the flat display device according to the second aspect of the present invention, the upper auxiliary electrode layer is formed on the upper end surface of the spacer, and the upper insulating film is formed on the portion of the anode electrode located above the upper end surface of the spacer. In this case, it is preferable that each spacer is composed of one spacer member. Alternatively, a mode in which an upper auxiliary electrode layer and an upper insulating film are formed on the upper end surface of the spacer (hereinafter may be referred to as a second B mode) can be adopted. It is preferable that the spacer member is composed of a single spacer member. Alternatively, an aspect in which an upper insulating film is formed on a portion of the anode electrode located above the upper end surface of the spacer, and an upper auxiliary electrode layer is formed on the upper insulating film (hereinafter referred to as a second C aspect). In this case, each spacer is preferably composed of one spacer member, or is preferably composed of a plurality of spacer members. Alternatively, an upper insulating film is formed on a portion of the anode electrode located above the upper end surface of the spacer, and the upper auxiliary electrode layer includes an upper first auxiliary electrode layer formed on the upper end surface of the spacer and an upper portion. It is possible to adopt a mode (hereinafter sometimes referred to as a 2D mode) composed of the upper second auxiliary electrode layer formed on the insulating film. It is preferable that the spacer member is composed of a spacer member or a plurality of spacer members. Here, if each spacer is configured from a plurality of spacer members, the length of the spacer members can be shortened, and the manufacture of the spacer members becomes easy.

In the flat display device according to the second aspect of the present invention including the above preferred form, configuration, and aspect, the voltage applied to the upper auxiliary electrode layer is V _UP (kilovolts) and the voltage applied to the anode electrode is When V _A (kilovolts) is satisfied, satisfying −0.5 ≦ (V _UP −V _A ) ≦ 0.5 is a correction to the change over time in the distortion of the electron beam trajectory in the vicinity of the spacer and the electric field distribution. This is desirable from the viewpoint of more reliably correcting the difference between the design value and the electric field distribution initial value. The electron beam trajectory distortion in the vicinity of the spacer can be corrected by adjusting the value of V _UP .

  Here, as described above, the flat display device according to the second aspect of the present invention including the above preferred form, configuration, and aspect is changed to the first aspect of the present invention including the above preferable form, configuration, and aspect. It can also be combined with such a flat display device. The flat display devices according to the first and second aspects of the present invention including such a combination and including the preferred configurations described above may be collectively referred to simply as the present invention hereinafter. is there.

In the present invention, chromium (Cr), aluminum (Al), tungsten (W), niobium (Nb), tantalum (Ta), molybdenum (Mo), copper as materials constituting the lower auxiliary electrode layer and the upper auxiliary electrode layer (Cu), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), cobalt (Co), zirconium (Zr), iron (Fe), platinum (Pt), zinc (Zn), etc. Various metals including metals; alloys (such as MoW) or compounds including these metal elements (such as nitrides such as TiN, silicides such as WSi ₂ , MoSi ₂ , TiSi ₂ , TaSi ₂ ); silicon (Si), etc. Examples thereof include: carbon thin films such as diamond; conductive metal oxides such as ITO (indium oxide-tin), indium oxide, and zinc oxide. In addition, as a method of forming the lower auxiliary electrode layer and the upper auxiliary electrode layer, depending on the material constituting the lower auxiliary electrode layer and the upper auxiliary electrode layer, for example, vacuum evaporation method such as electron beam evaporation method or hot filament evaporation method, Physical vapor deposition method (PVD method) including sputtering method, ion plating method, laser ablation method; various chemical vapor deposition methods (CVD method); screen printing method; inkjet printing method; metal mask printing method; Examples thereof include plating methods (electroplating method and electroless plating method); lift-off method; sol-gel method and the like, and combinations of these methods and etching methods. Here, it is possible to directly form the patterned lower auxiliary electrode layer and upper auxiliary electrode layer by appropriately selecting the formation method.

  The lower auxiliary electrode layer and the upper auxiliary electrode layer are extended to the ineffective area, and connected to the lower auxiliary electrode layer and the wiring extending from the power source for applying a voltage to the upper auxiliary electrode layer by appropriate means (for example, a connector). Thus, a desired voltage can be applied to the lower auxiliary electrode layer and the upper auxiliary electrode layer.

  Here, the effective area is a central display area that performs a display function that is a practical function as a flat display device, and the ineffective area is located outside the effective area, and the effective area is framed. Besieged.

As constituent materials of the lower insulating film, the upper insulating film, the insulating layer and the interlayer insulating layer described later, SiO ₂ , BPSG, PSG, BSG, AsSG, PbSG, SiON, SOG (spin on glass), low melting glass, glass paste, etc. An insulating resin such as SiO ₂ material; SiN material; polyimide can be used alone or in appropriate combination. A known process such as a CVD method, a coating method, a sputtering method, or a screen printing method can be used to form the lower insulating film, the upper insulating film, the insulating layer, and the interlayer insulating layer.

  The spacer (including the spacer member) can be made of ceramics or glass, for example. When the spacer is made of ceramics, the ceramics include aluminum silicate compounds such as mullite, aluminum oxides such as alumina, barium titanate, lead zirconate titanate, zirconia (zirconium oxide), cordiolite, barium borosilicate, silicic acid. Examples thereof include iron, glass ceramic materials, titanium oxide, chromium oxide, magnesium oxide, iron oxide, vanadium oxide, nickel oxide added thereto, and the like. For example, in Japanese translations of PCT publication No. 2003-524280 The materials described can also be used. Moreover, soda-lime glass can be mentioned as glass which comprises a spacer. For example, the spacer may be fixed by being sandwiched between a partition wall (described later) and the partition wall. Alternatively, for example, a spacer holding part may be formed on the anode panel and / or the cathode panel and fixed by the spacer holding part. Good.

The spacer is, for example,
(A) Ceramic powder, conductivity imparting material powder as a dispersoid, adding a binder to prepare a slurry for green sheet,
(B) A green sheet slurry is formed to obtain a green sheet;
(C) firing the green sheet;
Can be manufactured. After cutting the green sheet fired product, the lower auxiliary electrode layer, the upper auxiliary electrode layer, the lower insulating film, and the upper insulating film may be formed, or the lower auxiliary electrode layer, the upper auxiliary electrode layer, and the lower part are formed on the green sheet fired product. After forming the insulating film and the upper insulating film, the green sheet fired product may be cut.

  The ceramics mentioned above can be mentioned as a material which comprises the ceramic powder used as the dispersoid of the slurry for green sheets. It should be noted that the conductivity imparting material that is the dispersoid of the green sheet slurry does not necessarily need to exhibit conductivity in the green sheet slurry. The conductivity-imparting material may have a chemical composition that changes when the green sheet is fired, or may have a chemical composition that does not change by firing. Specifically, by firing the green sheet, the conductivity-imparting material in the green sheet is also fired, but it is only necessary that the fired conductivity-imparting material exhibits conductivity. Examples of the conductivity imparting material used as the dispersoid of the slurry for green sheets include noble metals such as gold and platinum; metal oxides such as molybdenum oxide, niobium oxide, tungsten oxide, and nickel oxide; titanium carbide, tungsten carbide Metal carbides such as nickel carbide; metal salts such as ammonium molybdate. Furthermore, a mixture thereof may be used. That is, the conductivity imparting material may be an embodiment made of a single type of material or an embodiment made of a plurality of types of materials. In addition, as a material constituting the binder added to the slurry for the green sheet, an organic binder material (for example, acrylic emulsion, polyvinyl alcohol (PVA), polyethylene glycol, polyethylene glycol) or an inorganic binder material (for example, water glass) ).

It is preferable that an antistatic film is provided on the surface of the spacer (including the spacer member). The material constituting the antistatic film preferably has a secondary electron emission coefficient close to 1, and as the material constituting the antistatic film, a semimetal such as graphite, an oxide, a boride, a carbide, a sulfide, and A nitride or the like can be used. More specifically, for example, a compound containing a semimetal such as graphite and a semimetal element such as MoSe ₂ , CrO _x , CrAl _x O _y , Nd ₂ O ₃ , La _x Ba _2−x CuO ₄ , La _x Ba. _{2-x CuO 4, La x} Y 1-x CrO 3 , etc. oxide, AlB _2, TiB ₂ and the like borides, carbides such as SiC, MoS _2, WS sulfides such as _2, and, BN, TiN, Examples thereof include nitrides such as AlN, and further, for example, materials described in JP-T-2004-500688 can be used. The antistatic film may be composed of a single type of material, may be composed of a plurality of types of materials, may be a single layer structure, or may be a multilayer structure. May be. The antistatic film can also be composed of a mixture of (first metal oxide, second metal oxide). As combinations of (first metal oxide, second metal oxide), (chromium oxide, titanium oxide), (chromium oxide, indium oxide), (manganese oxide, titanium oxide), ( (Manganese oxide, indium oxide), (zinc oxide, titanium oxide) or (zinc oxide, indium oxide). The antistatic film can be formed by a known method such as sputtering, vapor deposition, or CVD. The antistatic film may be provided directly on the side surface portion of the spacer. For example, a base film for improving adhesion is formed on the spacer, and the antistatic film is formed on the base film. May be.

In the present invention, as a support constituting the cathode panel or as a substrate constituting the anode panel, a glass substrate, a glass substrate having an insulating film formed on the surface, a quartz substrate, and a quartz having an insulating film formed on the surface Examples of the substrate include a semiconductor substrate having an insulating film formed on the surface. From the viewpoint of reducing manufacturing costs, it is preferable to use a glass substrate or a glass substrate having an insulating film formed on the surface. As a glass substrate, high strain point glass, soda glass (Na ₂ O · CaO · SiO ₂ ), borosilicate glass (Na ₂ O · B ₂ O ₃ · SiO ₂ ), forsterite (2MgO · SiO ₂ ), lead glass (Na ₂ O · PbO · SiO ₂ ) and alkali-free glass can be exemplified.

  In the cathode panel according to the present invention, the projection image of the first electrode and the projection image of the second electrode are orthogonal to each other, that is, the first direction and the second direction are orthogonal to each other. This is preferable from the viewpoint of simplification of the structure.

  In the present invention, as combinations (N, M) of the number of second electrodes (N) and the number of first electrodes (M), specifically, VGA (640, 480), S-VGA (800, 600), XGA (1024, 768), APRC (1152, 900), S-XGA (1280, 1024), U-XGA (1600, 1200), HD-TV (1920, 1080), Q-XGA (2048, 1536), (1920, 1035), (720, 480), (1280, 960), and the like can be exemplified, but the present invention is not limited to these values.

  In the present invention, cold cathode field emission devices (hereinafter abbreviated as field emission devices), metal / insulating film / metal type devices (MIM devices), surface conduction electron emission are used as the electron emission devices constituting the electron emission region. An element can be mentioned. Further, as a flat display device, a flat display device (cold cathode field electron emission display device) provided with a cold cathode field emission device, a flat display device incorporating an MIM element, and a surface conduction electron emission device are incorporated. And a flat display device.

Here, in the case where the flat display device is a cold cathode field emission display device including a cold cathode field emission device (abbreviated as field emission device), the field emission device is
(A) a strip-shaped cathode electrode formed on a support;
(B) an insulating layer formed on the support and the cathode electrode;
(C) a strip-shaped gate electrode formed on the insulating layer;
(D) an opening provided in a portion of the gate electrode and the insulating layer located in an overlapping portion where the cathode electrode and the gate electrode overlap, and the cathode electrode exposed at the bottom; and
(E) an electron emission portion provided on the cathode electrode exposed at the bottom of the opening, the electron emission being controlled by application of a voltage to the cathode electrode and the gate electrode;
Consisting of
The electron emission region is composed of one or a plurality of field emission elements,
The gate electrode may correspond to the first electrode, and the cathode electrode may correspond to the second electrode.

  The type of the field emission device is not particularly limited, and a Spindt-type field emission device (a field emission device in which a conical electron emission portion is provided on the cathode electrode positioned at the bottom of the opening) or a flat type field emission device An element (a field emission element in which a substantially planar electron emission portion is provided on a cathode electrode positioned at the bottom of an opening) can be given. In the cathode panel, an overlapping portion (overlapping region) where the first electrode (gate electrode) and the second electrode (cathode electrode) overlap constitutes an electron emission region, and the electron emission region is arranged in a two-dimensional matrix. Each electron emission region is provided with one or a plurality of field emission elements.

  When the flat display device according to the first aspect of the present invention is a cold cathode field emission display device, the portion of the cathode panel located below the lower end surface of the spacer is specifically, for example, a gate electrode A portion of the insulating layer exposed between the gate electrode and, in this case, in the first A mode, the first C mode, or the first D mode, the insulating layer is a lower insulating film. The lower insulating film may be formed separately from the insulating layer. Alternatively, the portion of the cathode panel located below the lower end surface of the spacer is specifically the portion of the insulating layer exposed between the gate electrode and the gate electrode, specifically, for example, In this case, it is necessary to form a lower insulating film separately from the insulating layer so that a short circuit does not occur between the lower auxiliary electrode layer and the gate electrode. When the focusing electrode is provided, the portion of the cathode panel positioned below the lower end surface of the spacer is specifically the portion of the focusing electrode positioned below the lower end surface of the spacer, or alternatively This is the portion of the interlayer insulating layer exposed between the focusing electrode and the focusing electrode.

  On the other hand, when the flat-type display device according to the second aspect of the present invention is a cold cathode field emission display device, the cathode panel constituent member in contact with the lower end surface of the spacer specifically includes a gate electrode, a gate electrode, Or the portion of the insulating layer exposed between the gate electrode and the portion of the insulating layer exposed between the gate electrode and the gate electrode. In addition, when the focusing electrode is provided, the cathode panel constituent member in contact with the lower end surface of the spacer is specifically the focusing electrode, or alternatively, an exposed layer between the focusing electrode and the focusing electrode. It is a part of an insulating layer.

  In the cold cathode field emission display, a strong electric field generated by a voltage applied to the first electrode (gate electrode) and the second electrode (cathode electrode) is applied to the electron emission portion, resulting in a quantum tunnel effect. As a result, electrons are emitted from the electron emission portion. The electrons are attracted to the anode panel by the anode electrode provided on the anode panel, and collide with the phosphor region. As a result of the collision of electrons with the phosphor region, the phosphor region emits light and can be recognized as an image.

In the cold cathode field emission display, the cathode electrode is connected to the cathode electrode control circuit, the gate electrode is connected to the gate electrode control circuit, and the anode electrode is connected to the anode electrode control circuit. Note that these control circuits can be constituted by known circuits. During actual operation, the output voltage (anode voltage V _A ) of the anode electrode control circuit is normally constant, and can be, for example, 5 kilovolts to 15 kilovolts. Alternatively, when the distance between the anode panel and the cathode panel is D ₀ (where 0.5 mm ≦ D ₀ ≦ 10 mm), the value of V _A / D ₀ (unit: kilovolt / mm) is 0. It is desirable to satisfy 5 or more and 20 or less, preferably 1 or more and 10 or less, and more preferably 4 or more and 8 or less. In actual operation of the cold cathode field emission display, the voltage modulation method can be adopted as the gradation control method for the voltage V _C applied to the cathode electrode and the voltage V _G applied to the gate electrode.

A field emission device can be generally manufactured by the following method.
(1) forming a cathode electrode on a support;
(2) forming an insulating layer on the entire surface (on the support and the cathode electrode);
(3) forming a gate electrode on the insulating layer;
(4) forming an opening in the gate electrode and the insulating layer in the overlapping portion (overlapping region) of the cathode electrode and the gate electrode, and exposing the cathode electrode to the bottom of the opening;
(5) A step of forming an electron emission portion on the cathode electrode located at the bottom of the opening.

Alternatively, the field emission device can be manufactured by the following method.
(1) forming a cathode electrode on a support;
(2) forming an electron emission portion on the cathode electrode;
(3) forming an insulating layer on the entire surface (on the support and the electron emission portion or on the support, the cathode electrode and the electron emission portion);
(4) forming a gate electrode on the insulating layer;
(5) A step of forming an opening in a portion of the gate electrode and the insulating layer in an overlapping portion (overlapping region) of the cathode electrode and the gate electrode, and exposing the electron emission portion at the bottom of the opening.

  In the present invention, when a focusing electrode is provided, an interlayer insulating layer is further provided on the gate electrode and the insulating layer, and a focusing electrode is provided on the interlayer insulating layer, or above the gate electrode. The focusing electrode may be provided with a focusing electrode. Here, the focusing electrode is an electrode for converging the trajectory of emitted electrons that are emitted from the opening and directed toward the anode electrode, thereby improving the luminance and preventing optical crosstalk between adjacent pixels. It is. In a so-called high voltage type cold cathode field emission display, the potential difference between the anode electrode and the cathode electrode is on the order of several kilovolts or more and the distance between the anode electrode and the cathode electrode is relatively long. The electrode is particularly effective. A relatively negative voltage (for example, 0 volts) is applied to the focusing electrode from the focusing electrode control circuit. The focusing electrode does not necessarily have to be individually formed so as to surround each of the electron emission portion or the electron emission region provided in the overlapping region where the cathode electrode and the gate electrode overlap, for example, the electron emission portion or The electron emission regions may be extended along a predetermined arrangement direction, or the electron emission portion or the electron emission region may be surrounded by a single convergence electrode (that is, the convergence electrode may be formed in the entire effective region). In this case, a single sheet-like structure covering the plurality of electron emission portions or electron emission regions can be provided with a common convergence effect. Note that an opening (third opening) is provided in the focusing electrode and the interlayer insulating layer.

As constituent materials of the first electrode, the second electrode, the cathode electrode, the gate electrode, and the focusing electrode, chromium (Cr), aluminum (Al), tungsten (W), niobium (Nb), tantalum (Ta), molybdenum (Mo) , Copper (Cu), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), cobalt (Co), zirconium (Zr), iron (Fe), platinum (Pt), zinc (Zn) Various metals including such metals; alloys (for example, MoW) or compounds (for example, nitrides such as TiN, silicides such as WSi ₂ , MoSi ₂ , TiSi ₂ , TaSi ₂ ); silicon (Si And the like; carbon thin films such as diamond; and conductive metal oxides such as ITO (indium oxide-tin), indium oxide, and zinc oxide. In addition, as a method for forming these electrodes, for example, a vacuum deposition method such as an electron beam deposition method or a hot filament deposition method, a sputtering method, an ion plating method, a laser ablation method, a combination of a CVD method and an etching method; a screen printing method Metal mask printing method; plating method (electroplating method or electroless plating method); lift-off method; sol-gel method. According to the screen printing method or the plating method, it is possible to directly form, for example, strip-shaped first electrode, second electrode, cathode electrode, and gate electrode.

  In the Spindt-type field emission device, as the material constituting the electron emission portion, molybdenum, molybdenum alloy, tungsten, tungsten alloy, titanium, titanium alloy, niobium, niobium alloy, tantalum, tantalum alloy, chromium, chromium alloy, and And at least one material selected from the group consisting of silicon (polysilicon and amorphous silicon) containing impurities. The electron emission portion of the Spindt-type field emission device can be formed by, for example, a sputtering method or a CVD method in addition to the vacuum evaporation method.

In the flat field emission device, it is preferable that the material constituting the electron emission portion is composed of a material having a work function Φ smaller than that of the material constituting the cathode electrode. What is necessary is just to determine based on the work function of the material which comprises a cathode electrode, the electric potential difference between a gate electrode and a cathode electrode, the magnitude | size of the emission electron current density requested | required, etc. Alternatively, the material constituting the electron emission portion may be appropriately selected from materials in which the secondary electron gain δ of the material is larger than the secondary electron gain δ of the conductive material constituting the cathode electrode. In the flat type field emission device, carbon, more specifically, amorphous diamond or graphite, a carbon nanotube structure (carbon nanotube and / or graphite nanofiber), as a particularly preferable constituent material of the electron emission portion, Examples thereof include ZnO whiskers, MgO whiskers, SnO ₂ whiskers, MnO whiskers, Y ₂ O ₃ whiskers, NiO whiskers, ITO whiskers, In ₂ O ₃ whiskers, and Al ₂ O ₃ whiskers. In addition, the material which comprises an electron emission part does not necessarily need to be provided with electroconductivity.

  Planar shape of the first opening (opening formed in the gate electrode) or the second opening (opening formed in the insulating layer) (shape when the opening is cut in a virtual plane parallel to the support surface) ) Can be any shape such as a circle, an ellipse, a rectangle, a polygon, a rounded rectangle, a rounded polygon. The formation of the first opening can be performed by, for example, anisotropic etching, isotropic etching, a combination of anisotropic etching and isotropic etching, or, depending on the method of forming the gate electrode, The first opening can also be formed directly. The second opening can also be formed by, for example, anisotropic etching, isotropic etching, or a combination of anisotropic etching and isotropic etching. The formation of the third opening provided in the focusing electrode and the interlayer insulating layer can be performed in the same manner.

  In the field emission device, depending on the structure of the field emission device, one electron emission portion may exist in one opening, or a plurality of electron emission portions may exist in one opening. In addition, a plurality of first openings are provided in the gate electrode, one second opening communicating with the first opening is provided in the insulating layer, and one or more are provided in one second opening provided in the insulating layer. There may be an electron emission portion.

In the field emission device, a resistor thin film may be formed between the cathode electrode and the electron emission portion. By forming the resistor thin film, it is possible to stabilize the operation of the field emission device and make the electron emission characteristics uniform. As a material constituting the resistor thin film, a carbon resistor material such as silicon carbide (SiC) or SiCN, a semiconductor resistor material such as SiN or amorphous silicon, a high melting point such as ruthenium oxide (RuO ₂ ), tantalum oxide, or tantalum nitride. Examples thereof include metal oxides and refractory metal nitrides. Examples of the method for forming the resistor thin film include a sputtering method, a CVD method, and a screen printing method. The electrical resistance value per one electron emitting portion may be approximately 1 × 10 ⁶ to 1 × 10 ¹¹ Ω, preferably several tens of gigaΩ.

  In the flat display device, examples of the configuration of the anode electrode and the phosphor region include (1) a configuration in which the anode electrode is formed on the substrate and the phosphor region is formed on the anode electrode, and (2) on the substrate. The structure which forms a fluorescent substance area and forms an anode electrode on a fluorescent substance area can be mentioned. In the configuration (1), a so-called metal back film that is electrically connected to the anode electrode may be formed on the phosphor region. In the configuration (2), a metal back film may be formed on the anode electrode. The metal back film can also serve as the anode electrode.

The anode electrode may be composed of one anode electrode as a whole, or may be composed of a plurality of anode electrode units. In the latter case, it is preferable that the anode electrode unit and the anode electrode unit are electrically connected by an anode electrode resistor layer. The material constituting the anode electrode resistor layer includes carbon-based materials such as carbon, silicon carbide (SiC), and SiCN; SiN-based materials; ruthenium oxide (RuO ₂ ), tantalum oxide, tantalum nitride, chromium oxide, titanium oxide, and the like. Examples thereof include melting point metal oxides and high melting point metal nitrides; semiconductor materials such as amorphous silicon; ITO. It is also possible to realize a stable desired sheet resistance value by combining a plurality of films such as laminating a carbon thin film having a low resistance value on the SiC resistance film. Examples of the sheet resistance value of the anode electrode resistor layer include 1 × 10 ⁻¹ Ω / □ to 1 × 10 ¹⁰ Ω / □, preferably 1 × 10 ³ Ω / □ to 1 × 10 ⁸ Ω / □. it can. The number (Q) of anode electrode units may be two or more. For example, when the total number of phosphor regions arranged in a straight line is q columns, Q = q or q = k · Q (K is an integer of 2 or more, preferably 10 ≦ k ≦ 100, more preferably 20 ≦ k ≦ 50), or a number obtained by adding 1 to the number of spacers arranged at a constant interval. It can also be a number that matches the number of pixels or sub-pixels, or an integer fraction of the number of pixels or sub-pixels. The size of each anode electrode unit may be the same regardless of the position of the anode electrode unit, or may vary depending on the position of the anode electrode unit. An anode electrode resistor layer may be formed on one anode electrode as a whole. As described above, if the anode electrode is divided into anode electrode units having a smaller area, instead of being formed over almost the entire effective area, the static electricity between the anode electrode unit and the electron emission area is formed. The electric capacity can be reduced. As a result, the occurrence of discharge can be reduced, and the occurrence of damage to the anode electrode and the electron emission region due to the discharge can be effectively reduced.

  When the anode electrode is composed of an anode electrode unit and a partition wall (described later) is formed, the anode electrode unit may be formed so as to extend from each phosphor region to the partition wall side surface. it can. The anode electrode unit may be formed from each phosphor region to the middle of the side wall of the partition wall.

The anode electrode (including the anode electrode unit) may be formed using a conductive material layer. Examples of the method for forming the conductive material layer include various PVD methods such as vacuum deposition methods such as electron beam deposition method and hot filament deposition method, sputtering methods, ion plating methods and laser ablation methods; various CVD methods; screen printing methods; Examples include metal mask printing method; lift-off method; sol-gel method. That is, a conductive material layer is formed, and based on lithography technology and etching technology, this conductive material layer can be patterned to form an anode electrode. Alternatively, the anode electrode can be obtained by forming a conductive material based on a PVD method or a screen printing method through a mask or screen having an anode electrode pattern. The anode electrode resistor layer can also be formed by the same or similar method as the anode electrode. That is, an anode electrode resistor layer may be formed from a resistor material, and the anode electrode resistor layer may be patterned based on a lithography technique and an etching technique, or a mask or a screen having an anode electrode resistor layer pattern. The anode electrode resistor layer can be obtained by forming the resistor material through the PVD method or the screen printing method. 3 × 10 ⁻⁸ m (30 nm) to 5 as the average thickness of the anode electrode on the substrate (or above the substrate) (when the partition is provided as described later, the average thickness of the anode electrode on the top surface of the partition) Examples include x10 ⁻⁷ m (0.5 μm), preferably 5 × 10 ⁻⁸ m (50 nm) to 3 × 10 ⁻⁷ m (0.3 μm).

As the constituent material of the anode electrode, aluminum (Al), molybdenum (Mo), chromium (Cr), tungsten (W), niobium (Nb), tantalum (Ta), gold (Au), silver (Ag), titanium (Ti) ), Cobalt (Co), zirconium (Zr), iron (Fe), platinum (Pt), zinc (Zn), etc .; alloys or compounds containing these metal elements (for example, nitrides such as TiN, WSi ₂ Silicide such as MoSi ₂ , TiSi ₂ , and TaSi ₂ ); Semiconductor such as silicon (Si); Carbon thin film such as diamond; Conductive metal oxide such as ITO (indium oxide-tin oxide), indium oxide, and zinc oxide can do. When the anode electrode resistor layer is formed, the anode electrode is preferably made of a conductive material that does not change the resistance value of the anode electrode resistor layer. For example, the anode electrode resistor layer is made of silicon carbide (SiC). In this case, the anode electrode is preferably made of molybdenum (Mo).

  Each of the phosphor regions may be composed of monochromatic phosphor particles or may be composed of three primary color phosphor particles. The arrangement pattern of the phosphor regions is, for example, a dot shape. Specifically, when the flat display device is a color display, examples of the arrangement and arrangement of the phosphor regions include a delta arrangement, a stripe arrangement, a diagonal arrangement, and a rectangle arrangement. That is, one row of the phosphor regions arranged in a straight line is occupied by the row occupied by the red light emitting phosphor region, the row occupied by the green light emitting phosphor region, and the blue light emitting phosphor region. May be composed of a row in which a red light-emitting phosphor region, a green light-emitting phosphor region, and a blue light-emitting phosphor region are sequentially arranged. Here, the phosphor region is defined as a phosphor region that generates one bright spot on the anode panel. One pixel (one pixel) is composed of a set of one red light emitting phosphor region, one green light emitting phosphor region, and one blue light emitting phosphor region, and one subpixel is one phosphor. The region is composed of one red light emitting phosphor region, one green light emitting phosphor region, or one blue light emitting phosphor region. A gap between adjacent phosphor regions may be filled with a light absorption layer (black matrix) for the purpose of improving contrast.

  The phosphor region uses a luminescent crystal particle composition prepared from luminescent crystal particles. For example, a red photosensitive luminescent crystal particle composition (red phosphor slurry) is applied over the entire surface, exposed, Development is performed to form a red light-emitting phosphor region, and then green photosensitive light-emitting crystal particle composition (green phosphor slurry) is applied to the entire surface, exposed and developed to form a green light-emitting phosphor region. Further, it can be formed by a method in which a blue photosensitive luminescent crystal particle composition (blue phosphor slurry) is coated on the entire surface, exposed and developed to form a blue light emitting phosphor region. . Alternatively, each phosphor region may be formed by sequentially applying a red light emitting phosphor paste, a green light emitting phosphor paste, and a blue light emitting phosphor paste, and then sequentially exposing and developing each phosphor coating region. Each phosphor region may be formed by a screen printing method, an ink jet printing method, a float coating method, a sedimentation coating method, a phosphor film transfer method, or the like. Although the average thickness of the phosphor region on the substrate is not limited, it is desirably 3 μm to 20 μm, preferably 5 μm to 10 μm. The phosphor material constituting the luminescent crystal particles can be appropriately selected from conventionally known phosphor materials. In the case of color display, a phosphor material whose color purity is close to the three primary colors specified by NTSC, white balance is achieved when the three primary colors are mixed, the afterglow time is short, and the afterglow time of the three primary colors is almost equal. It is preferable to combine them.

  A light absorption layer that absorbs light from the phosphor region is preferably formed between adjacent phosphor regions or between the partition wall and the substrate from the viewpoint of improving the contrast of the display image. Here, the light absorption layer functions as a so-called black matrix. As a material constituting the light absorption layer, it is preferable to select a material that absorbs 90% or more of light from the phosphor region. Such materials include carbon, metal thin films (eg, chromium, nickel, aluminum, molybdenum, etc., or alloys thereof), metal oxides (eg, chromium oxide), metal nitrides (eg, chromium nitride), heat resistance Materials such as photosensitive organic resins, glass pastes, glass pastes containing conductive particles such as black pigments and silver, and specifically, photosensitive polyimide resins, chromium oxides, and chromium oxide / chromium laminated films Can be illustrated. In the chromium oxide / chromium laminated film, the chromium film is in contact with the substrate. For example, the light absorption layer is a combination of a vacuum vapor deposition method, a sputtering method and an etching method, a vacuum vapor deposition method, a sputtering method, a combination of a spin coating method and a lift-off method, a screen printing method, a lithography technique, etc. It can be formed by a method appropriately selected depending on the method.

  So-called back-scattered electrons such as electrons recoiled from the phosphor region or secondary electrons emitted from the phosphor region enter other phosphor regions, and so-called optical crosstalk (color turbidity) occurs. In order to prevent this, it is preferable to provide a partition wall.

  Examples of the partition wall forming method include a screen printing method, a dry film method, a photosensitive method, a casting method, and a sandblast forming method. Here, in the screen printing method, an opening is formed in a portion of the screen corresponding to a portion where a partition is to be formed, and the partition forming material on the screen is passed through the opening using a squeegee, and the partition is formed on the substrate. In this method, after the formation material layer is formed, the partition wall formation material layer is fired. The dry film method is a method of laminating a photosensitive film on a substrate, removing the photosensitive film at the part where the partition wall is to be formed by exposure and development, embedding the partition wall forming material in the opening generated by the removal, and baking. . The photosensitive film is burned and removed by baking, and the partition wall-forming material embedded in the openings remains to form partition walls. The photosensitive method is a method in which a barrier rib-forming material layer having photosensitivity is formed on a substrate, the barrier rib-forming material layer is patterned by exposure and development, and then fired (cured). The casting method (embossing molding method) refers to a method for forming a partition wall forming material layer by extruding a partition wall forming material layer made of a paste-like organic material or inorganic material onto a substrate from a mold (cast). In this method, the partition wall forming material layer is fired. The sand blast forming method is, for example, forming a partition wall forming material layer on a substrate using a screen printing or metal mask printing method, a roll coater, a doctor blade, a nozzle discharge type coater, etc. In this method, the part of the partition wall forming material layer to be covered is covered with a mask layer, and then the exposed part of the partition wall forming material layer is removed by sandblasting. After the partition wall is formed, the partition wall may be polished to flatten the top surface of the partition wall.

  As the planar shape of the part surrounding the phosphor region in the partition wall (corresponding to the inner contour line of the projected image of the partition wall side surface, which is a kind of opening region), rectangular shape, circular shape, elliptical shape, oval shape, triangular shape, Examples include pentagonal or more polygonal shapes, rounded triangular shapes, rounded rectangular shapes, rounded polygons, and the like. By arranging these planar shapes (planar shapes of the opening regions) in a two-dimensional matrix, a lattice-like partition is formed. This two-dimensional matrix-like arrangement may be arranged, for example, like a cross or like a zigzag.

Examples of the partition wall forming material include photosensitive polyimide resin, lead glass colored with a metal oxide such as cobalt oxide, SiO ₂ , and a low melting point glass paste. A protective layer (for example, made of SiO ₂ , SiON, or AlN) is provided on the surface (top surface and side surface) of the partition wall to prevent an electron beam from colliding with the partition wall and releasing gas from the partition wall. It may be formed.

The cathode panel and the anode panel are joined at the periphery, but the joining may be performed using a joining member made of an adhesive layer, or a rod-like or frame-like (frame-like) insulating material such as glass or ceramics. You may carry out using the joining member which consists of the frame body comprised from the rigid material, and the contact bonding layer. When using a joining member consisting of a frame and an adhesive layer, the height of the frame is appropriately selected, so that the space between the cathode panel and the anode panel is smaller than when using a joining member consisting only of the adhesive layer. Can be set longer. The material constituting the adhesive layer is generally a frit glass such as B ₂ O ₃ —PbO-based frit glass or SiO ₂ —B ₂ O ₃ —PbO-based frit glass, but has a melting point of about 120 to 400 ° C. These so-called low melting point metal materials may be used. Such low melting point metal materials include In (indium: melting point 157 ° C.); indium-gold based low melting point alloy; Sn ₈₀ Ag ₂₀ (melting point 220 to 370 ° C.), Sn ₉₅ Cu ₅ (melting point 227 to 370 ° C.) C) tin (Sn) type high temperature solder such as Pb _97.5 Ag _2.5 (melting point 304 ° C.), Pb _94.5 Ag _5.5 (melting point 304 to 365 ° C.), Pb _97.5 Ag _1.5 Sn _1.0 (melting point 309 ° C.), etc. Lead (Pb) high temperature solder; zinc (Zn) high temperature solder such as Zn ₉₅ Al ₅ (melting point 380 ° C.); Sn ₅ Pb ₉₅ (melting point 300 to 314 ° C.), Sn ₂ Pb ₉₈ (melting point 316 to 322) Tin-lead standard solder such as ° C); brazing material such as Au ₈₈ Ga ₁₂ (melting point 381 ° C) (the above subscripts all represent atomic%).

  When joining the three members of the cathode panel, the anode panel, and the joining member, the three members may be joined at the same time, or in the first stage, either the cathode panel or the anode panel and the joining member are joined, In the second stage, the other of the cathode panel or the anode panel and the joining member may be joined. If the three-party simultaneous bonding or the second stage bonding is performed in a high vacuum atmosphere, the space surrounded by the cathode panel, the anode panel, and the bonding member becomes a vacuum simultaneously with the bonding. Alternatively, after the three members are joined, the space surrounded by the cathode panel, the anode panel, and the joining member can be evacuated to create a vacuum. When exhausting after joining, the atmosphere pressure during joining may be either normal pressure or reduced pressure, and the gas constituting the atmosphere may be nitrogen gas or a gas belonging to Group 0 of the periodic table (for example, Ar gas) ) Is preferable, but it can also be performed in the atmosphere.

  When exhaust is performed, the exhaust can be performed through an exhaust pipe called a tip pipe connected in advance to the cathode panel and / or the anode panel. The exhaust pipe is typically a glass pipe, or a metal or alloy having a low coefficient of thermal expansion [for example, an iron (Fe) alloy containing 42 wt% nickel (Ni), 42 wt% nickel (Ni), A hollow tube made of an iron (Fe) alloy containing 6 wt% chromium (Cr)], and the above-mentioned frit glass or After being joined using a low melting point metal material and the space has reached a predetermined degree of vacuum, it is sealed off by thermal fusion or sealed by crimping. In addition, if the whole flat display device is once heated and then cooled before sealing, it is preferable because residual gas can be released into the space, and this residual gas can be removed out of the space by exhaust. .

  In the flat display device according to the first aspect of the present invention, the lower auxiliary electrode layer electrically insulated by the constituent elements of the cathode panel and the lower insulating film is formed on the lower end surface of the spacer. The voltage applied to the spacer can be applied independently of the voltage applied to the components of the cathode panel. In the flat display device according to the second aspect of the present invention, the upper auxiliary electrode layer electrically insulated by the anode electrode and the upper insulating film is formed on the upper end surface of the spacer. The voltage applied to the spacer can be applied independently of the voltage applied to the anode electrode. Therefore, even if the distortion of the electron beam trajectory due to the disturbance of the electric field in the vicinity of the spacer due to the presence of the spacer changes over time, it is easy to control the voltage applied to the lower auxiliary electrode layer or the upper auxiliary electrode layer. In addition, it is possible to reliably and appropriately modify the distribution of the electric field in the vicinity of the spacer at the time of designing the flat display device and the distribution of the electric field in the vicinity of the spacer in the actually manufactured flat display device (electric field). By adjusting the voltage applied to the lower auxiliary electrode layer or the upper auxiliary electrode layer during the inspection of the finished flat panel display device, the correction of the difference between the distribution initial value) can be easily and reliably performed. Can be done appropriately. As a result, the uniformity of the screen brightness in the flat display device can be ensured over a long period of time, and a high-quality display screen can be obtained.

  Hereinafter, the present invention will be described based on examples with reference to the drawings. Prior to that, a common outline of flat display devices in examples 1 to 4 will be described below. Here, the flat display devices in Examples 1 to 4 are cold cathode field emission display devices (hereinafter abbreviated as display devices). In the display devices according to the first to fourth embodiments, the band-shaped first electrode (for example, the scanning electrode) extending in the first direction is configured by the gate electrode 13 and extends in the second direction. The (for example, data electrode) is composed of the cathode electrode 11.

As shown in FIGS. 21 to 26, which are schematic partial end views of the display device along the second direction, the display devices in the first to fourth embodiments.
(A) A plurality of strip-shaped first electrodes (gate electrodes 13) extending in a first direction (see the X direction in the drawing) and a second direction (see the Y direction in the drawing) different from the first direction. A plurality of strip-shaped second electrodes (cathode electrodes 11) that extend and are positioned below the first electrodes, and are formed by overlapping regions of the first electrodes (gate electrodes 13) and the second electrodes (cathode electrodes 11). A cathode panel CP having an electron emission region EA, and
(B) an anode panel AP including a phosphor region 22 and an anode electrode 24;
The cathode panel CP and the anode panel AP are joined to each other through the joining member 26 at their peripheral portions.

Here, the display devices according to the first to fourth embodiments include the effective area EF and the invalid area NE surrounding the effective area EF. Note that the effective area EF is a display area located substantially in the center that performs a practical image display function as a display device, and the effective area EF is surrounded by an ineffective area NE surrounded by a frame. The space sandwiched between the cathode panel CP, the anode panel AP, and the joining member 26 is kept in a vacuum (pressure: for example, 10 ⁻³ Pa or less). A schematic partial exploded perspective view of a part of the anode panel AP and the cathode panel CP when the cathode panel CP and the anode panel AP are disassembled is basically the same as that shown in FIG.

In the first to fourth embodiments, the field emission device constituting the electron emission region is constituted by, for example, a Spindt type field emission device. Spindt-type field emission devices
(A) a cathode electrode (second electrode) 11 formed on the support 10;
(B) an insulating layer 12 formed on the support 10 and the cathode electrode 11;
(C) a gate electrode (first electrode) 13 formed on the insulating layer 12;
(D) An opening 14 (provided in the gate electrode 13) provided in the portion of the gate electrode 13 and the insulating layer 12 located in the overlapping portion where the cathode electrode 11 and the gate electrode 13 overlap, with the cathode electrode 11 exposed at the bottom. 14A of 1st opening parts, 2nd opening part 14B provided in the insulating layer 12, and,
(E) an electron emitting portion 15 provided on the cathode electrode 11 exposed at the bottom of the opening 14 and whose electron emission is controlled by applying a voltage to the cathode electrode 11 and the gate electrode 13;
It is composed of Here, the shape of the electron emission portion 15 is a conical shape.

Alternatively, in the first to fourth embodiments, the electron-emitting device is composed of, for example, a flat field emission device. That is, as shown in FIG.
(A) a cathode electrode (second electrode) 11 formed on the support 10;
(B) an insulating layer 12 formed on the support 10 and the cathode electrode 11;
(C) a gate electrode (first electrode) 13 formed on the insulating layer 12;
(D) An opening 14 (provided in the gate electrode 13) provided in the portion of the gate electrode 13 and the insulating layer 12 located in the overlapping portion where the cathode electrode 11 and the gate electrode 13 overlap, with the cathode electrode 11 exposed at the bottom. 14A of 1st opening parts, 2nd opening part 14B provided in the insulating layer 12, and,
(E) an electron emission portion 15A provided on the cathode electrode 11 exposed at the bottom of the opening 14 and whose electron emission is controlled by applying a voltage to the cathode electrode 11 and the gate electrode 13;
It is composed of Here, the electron emission portion 15A is composed of, for example, a large number of carbon nanotubes partially embedded in a matrix.

  In the cathode panel CP, the cathode electrode 11 has a strip shape extending in the second direction (see the Y direction in the drawing), and the gate electrode 13 is in a first direction (see the X direction in the drawing) different from the second direction. It is an elongated strip. The cathode electrode 11 and the gate electrode 13 are each formed in a strip shape in a direction in which the projected images of both the electrodes 11 and 13 are orthogonal to each other. The electron emission area EA corresponding to one subpixel is provided with a plurality of field emission elements, and the electron emission areas EA corresponding to one subpixel are arranged in a two-dimensional matrix in the effective area EF of the cathode panel CP. It is arranged.

  Further, as shown in FIGS. 24 to 26, depending on the display device, an interlayer insulating layer 16 is provided on the insulating layer 12 and the gate electrode 13, and further, the focusing electrode 17 has an electron emission region EA. It is provided on the interlayer insulating layer 16 so as to surround it, and a common convergence effect can be exerted on the plurality of electron emission regions EA. The converging electrode 17 and the interlayer insulating layer 16 are provided with a third opening 14C. The ineffective area NE of the cathode panel CP is provided with a through-hole (not shown) for evacuation, and in this through-hole, an exhaust pipe (not shown) called a tip tube that is sealed after evacuation. Is attached.

  In Example 1 to Example 4, as shown in FIG. 21 or FIG. 24, the anode panel AP includes a substrate 20 and a phosphor region 22 formed on the substrate 20 (in the case of color display, red light emission). The phosphor region 22R, the green light-emitting phosphor region 22G, the blue light-emitting phosphor region 22B), and the anode electrode 24 are included. A light absorption layer (black matrix) 23 is formed on the substrate 20 between the phosphor region 22 and the phosphor region 22 in order to prevent color turbidity of the display image and occurrence of optical crosstalk. ing. The anode electrode 24 is made of aluminum (Al) having a thickness of about 0.3 μm, is in the form of a thin sheet that covers the effective region EF, and is provided so as to cover the phosphor region 22.

  Alternatively, in the first to fourth embodiments, as shown in FIG. 22 or FIG. 25, in the anode panel AP, a grid-like partition wall 21 surrounding each phosphor region 22 is formed on the substrate 20. It can also be a structure. Here, one pixel (one pixel) is composed of a red light-emitting phosphor region 22R, a green light-emitting phosphor region 22G, and a blue light-emitting phosphor region 22B, and one sub-pixel is composed of the phosphor region 22. Has been. Each phosphor region 22 is surrounded by a partition wall 21. The planar shape (corresponding to the inner contour line of the projected image of the partition wall side surface and a kind of opening region) of the portion surrounding the phosphor region 22 in the lattice-shaped partition wall 21 is a rectangular shape (rectangle), and these planes The shape (planar shape of the opening region) is arranged in a two-dimensional matrix (more specifically, a cross beam), and a lattice-like partition wall 21 is formed.

  Alternatively, in Example 1 to Example 4, as shown in FIG. 23 or FIG. 26, the anode electrode 24 covers each phosphor region 22 and extends to the side surface of the partition wall 21. It is also possible to adopt a configuration and structure in which the anode electrode 24 is not formed on the top surface of the substrate. That is, the anode electrode 24 includes a plurality of anode electrode units 24A (more specifically, corresponding to subpixels). The adjacent anode electrode units 24A are electrically connected by the anode electrode resistor layer 27.

  Examples of arrangement states of the partition walls 21, the spacers 40, and the phosphor regions 22 in the first to fourth embodiments are schematically shown in FIGS. The arrangement of the phosphor regions and the like in the display device shown in FIGS. 22, 23, 25, and 26 is the configuration shown in FIG. 28 or FIG. 27 to 32, the anode electrode is not shown. The planar shape of the partition wall 21 is a lattice shape (cross-beam shape), that is, a shape corresponding to one subpixel, for example, a shape surrounding the four sides of the phosphor region 22 having a substantially rectangular shape (FIGS. 27, 28, 29, 30), or a belt-like shape extending in parallel with two opposing sides of the substantially rectangular (or belt-like) phosphor region 22 (see FIGS. 31 and 32). In the phosphor region 22 shown in FIG. 31, the phosphor regions 22R, 22G, and 22B can be formed in a strip shape extending in the vertical direction of FIG. A part of the partition wall 21 also functions as a spacer holding portion for holding the spacer 40.

A plurality of flat spacers 40 are disposed between the cathode panel CP and the anode panel AP. The spacer 40 extends along the first direction (see the X direction in the drawing) or the second direction (see the Y direction in the drawing). In FIG. 21 to FIG. 26, the spacer 40 extends along the first direction (the X direction and the direction perpendicular to the paper surface), and is disposed in a region surrounded by a dotted line in the drawing. The spacer 40 or the spacer member constituting the spacer is made of alumina (Al ₂ O ₃ , purity 99.8% by weight), and the resistance value between the top surface and the bottom surface of the spacer 40 (or spacer member) is: About 1 × 10 ¹⁰ Ω (about ¹⁰ GΩ, specific resistance is about 6 × 10 ⁷ Ω · m). Further, an antistatic film 41 made of chromium oxide (CrO _x ) having a thickness of 4 nm is formed on the side surface of the spacer 40 (or spacer member) based on the RF sputtering method. Chromium oxide has a relatively small secondary electron emission coefficient and is a very preferable material for the antistatic film under the condition that the spacer 40 (or spacer member) is positively charged.

In the display devices of Examples 1 to 4, when the cathode electrode 11 is connected to the cathode electrode control circuit 31, the gate electrode 13 is connected to the gate electrode control circuit 32, and the convergence electrode 17 is provided, The focusing electrode 17 is connected to a focusing electrode control circuit 33, a lower auxiliary electrode layer described later is connected to a lower auxiliary electrode layer control circuit (not shown), and an upper auxiliary electrode layer described later is an upper auxiliary electrode layer control circuit (FIG. The anode electrode 24 is connected to the anode electrode control circuit 34. These control circuits can be constituted by known circuits. During actual operation of the display device, the anode voltage V _A applied from the anode electrode control circuit 34 to the anode electrode 24 is usually constant, for example, 5 to 15 kilovolts, specifically, for example, 9 kilovolts ( For example, D ₀ = 2.0 mm). On the other hand, regarding the voltage V _C applied to the cathode electrode 11 and the voltage V _G applied to the gate electrode 13 during actual operation of the display device,
(1) A method in which the voltage V _C applied to the cathode electrode 11 is constant and the voltage V _G applied to the gate electrode 13 is changed. (2) The voltage V _C applied to the cathode electrode 11 is changed and applied to the gate electrode 13. the voltage V _G for changing the voltage V _C applied to the method (3) a cathode electrode 11, constant, and may employ any method to change the voltage V _G applied to the gate electrode 13.

During actual operation of the display device, a relatively negative voltage (V _C ) is applied to the cathode electrode 11 from the cathode electrode control circuit 31, and a relatively positive voltage (V _G ) is applied to the gate electrode 13 in the gate electrode control circuit. For example, 0 V is applied to the focusing electrode 17 from the focusing electrode control circuit 33, and a positive voltage (anode voltage V _A ) higher than that of the gate electrode 13 is applied to the anode electrode 24 from the anode electrode control circuit 34. Applied. When performing display in such a display device, for example, a scanning signal is input to the cathode electrode 11 from the cathode electrode control circuit 31, and a video signal is input to the gate electrode 13 from the gate electrode control circuit 32. Note that a video signal may be input to the cathode electrode 11 from the cathode electrode control circuit 31, and a scanning signal may be input to the gate electrode 13 from the gate electrode control circuit 32. Electrons are emitted from the electron emission portions 15 and 15A based on the quantum tunnel effect due to an electric field generated when a voltage is applied between the cathode electrode 11 and the gate electrode 13, and the electrons are attracted to the anode electrode 24. It passes through 24 and collides with the phosphor region 22. As a result, the phosphor region 22 is excited to emit light, and a desired image can be obtained. That is, the operation of this display device is basically controlled by the voltage V _G applied to the gate electrode 13 and the voltage V _C applied to the cathode electrode 11.

  Example 1 relates to the flat display device of the present invention according to the first aspect and the second aspect of the present invention, and more specifically, relates to the first A aspect and the second A aspect. The display device in Example 1 is the display device shown in FIG.

  In other words, if expressed in accordance with the first aspect of the present invention, the lower insulation is provided between the lower end surface of the spacer 40 and the portion of the cathode panel CP located below the lower end surface of the spacer 40 from the cathode panel side. A film 52 and a lower auxiliary electrode layer 51 are provided.

  Further, if expressed in accordance with the second aspect of the present invention, the upper insulating surface is formed between the upper end surface of the spacer 40 and the portion of the anode electrode 24 located above the upper end surface of the spacer 40 from the anode panel side. A film 62 and an upper auxiliary electrode layer 61 are provided.

  In the first embodiment, more specifically, an enlarged schematic partial end view in the vicinity of the spacer (however, an exploded view) is shown in FIG. An auxiliary electrode layer 51 is formed, and a lower insulating film 52 is formed on the cathode panel CP located below the lower end surface of the spacer 40. Here, in Example 1, the portion of the insulating layer 12 exposed between the gate electrode 13 and the gate electrode 13 corresponds to the lower insulating film 52, but the lower insulating film is separated from the insulating layer 12. 52 may be formed.

  On the other hand, an upper auxiliary electrode layer 61 is formed on the upper end surface of the spacer 40, and an upper insulating film 62 is formed on the anode electrode 24 located above the upper end surface of the spacer 40.

  Here, the lower auxiliary electrode layer 51 and the upper auxiliary electrode layer 61 are made of chromium (Cr) having a thickness of 1 μm, and the lower insulating film 52 and the upper insulating film 62 are made of SiON having a thickness of 5 μm. Each spacer 40 is composed of one spacer member. In the example shown in FIG. 1, the spacer 40 extends along the first direction (X direction).

The lower auxiliary electrode layer 51 and the upper auxiliary electrode layer 61 extend to the portion of the spacer 40 located in the ineffective region NE, and a power source for applying a voltage to the lower auxiliary electrode layer 51 and the upper auxiliary electrode layer 61 ( It is connected to wiring (not shown) extending from a not-shown connector, for example, by a connector (not shown). Thus, for example, the lower auxiliary electrode layer 51 has, for example,
V _DN = (V ₁ −100) to (V ₁ +100) volts is applied to the upper auxiliary electrode layer 61, for example,
V _UP = (V _A −0.5) kilovolts to (V _A +0.5) kilovolts is applied. In the actual operation of the display device, the voltage V ₁ (V _G ) applied to the first electrode (gate electrode 13) is, for example, 20 (volts), and the voltage V _A applied to the anode electrode 24 is For example, 9 (kilovolts). The same applies to Examples 2 to 4 below.

As described above, the voltages V _DN and V _UP applied to the lower auxiliary electrode layer 51 and the upper auxiliary electrode layer 61 are controlled independently of the voltages V ₁ (V _G ) and V _A applied to the gate electrode 13 and the anode electrode 24. Therefore, it is possible to easily and reliably appropriately correct the change over time in the distortion of the electron beam trajectory caused by the disturbance of the electric field in the vicinity of the spacer due to the presence of the spacer 40. The correction of the difference between the electric field distribution in the vicinity of the spacer when designing the display device (electric field distribution design value) and the electric field distribution in the vicinity of the spacer in the actually manufactured display device (electric field distribution initial value) is displayed. At the time of inspecting the finished product of the apparatus, it can be carried out easily, surely and appropriately.

More specifically, for example, when the invisibility of the spacer 40 is impaired as a result of the electron beam in the vicinity of the spacer 40 being deflected so as to approach the spacer side, the voltage applied to the first electrode (gate electrode 13). V ₁ (V _G ) or, when the focusing electrode 17 is provided as described later, a lower voltage V _DN than the voltage V _F applied to the focusing electrode is applied to the lower auxiliary electrode layer 51. May be applied. Alternatively, a voltage V _UP that is relatively negative with respect to the voltage V _A applied to the anode electrode 24 may be applied to the upper auxiliary electrode layer 61. Thereby, a force in a direction away from the spacer 40 acts on the electron beam, and as a result, the electron beam can collide with a predetermined phosphor region 22. When the electron beam in the vicinity of the spacer 40 is deflected away from the spacer side, a relatively positive voltage V _DN may be applied to the lower auxiliary electrode layer 51, and a relatively positive voltage V _UP may be applied. What is necessary is just to apply to the upper auxiliary electrode layer 61. The same applies to the following embodiments.

  In the first embodiment, the display device shown in FIG. 22 or FIG. 23 can be used as the display device.

  FIG. 2 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification Example 1 of the flat display device of Example 1. FIG. The display device in Modification 1 of Example 1 is the display device shown in FIG. 21. The difference from FIG. 1 is that the direction in which the spacer 40 extends is parallel to the second direction (Y direction). There is a point. The lower auxiliary electrode layer 51 is formed on the lower end surface of the spacer 40 in the same manner as in FIG. 1 except that the portion of the cathode panel located below the lower end surface of the spacer, specifically the gate electrode 13. 1 and that the lower insulating film 52 is formed on the portion of the insulating layer 12 exposed between the gate electrode 13 and the gate electrode 13.

FIG. 3 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification Example 2 of the flat display device of Example 1. In FIG. The display device in Modification-2 of Example 1 is the display device shown in FIG. Here, Modification-2 of the first embodiment is different from FIG. 1 in that an interlayer insulating layer 16 is formed on the gate electrode 13 and the insulating layer 12 in the cathode panel CP, and the interlayer insulating layer 16 is formed on the interlayer insulating layer 16. The convergence electrode 17 is formed, and the lower insulating film 52 is formed on the portion of the cathode panel located below the lower end surface of the spacer, specifically, the convergence electrode 17. The lower auxiliary electrode layer 51 and the upper auxiliary electrode layer 61 extend to the portion of the spacer 40 located in the invalid region NE, and are used to apply a voltage to the lower auxiliary electrode layer 51 and the upper auxiliary electrode layer 61. It is connected to wiring (not shown) extending from a power source (not shown) by, for example, a connector (not shown). Thus, for example, the lower auxiliary electrode layer 51 has, for example,
V _DN = (V _F −100) to (V _F +100) volts is applied to the upper auxiliary electrode layer 61, for example,
V _UP = (V _A −0.5) kilovolts to (V _A −0.5) kilovolts is applied. In the actual operation of the display device, the voltage V _F applied to the focusing electrode 17 is 20 (volts), for example, and the voltage V _A applied to the anode electrode 24 is 9 (kilovolts), for example. The same can be applied to display devices including the focusing electrodes of the following first to fourth embodiments.

  FIG. 4 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification-3 of the flat display device of Example 1. In FIG. The display device in Modification-3 of Example 1 is the display device shown in FIG. Here, the modification 3 of the embodiment 1 is different from the modification 2 of the embodiment 1 shown in FIG. 3 in that the spacer holding portion 25 constituted by a part of the partition wall 21 in the anode panel AP. Thus, the upper portion of the spacer 40 is held, and the upper insulating film 62 is formed on the spacer holding portion 25. In addition, the display apparatus in the modification-3 of this Example 1 can also be made into the display apparatus shown in FIG.

  FIG. 5 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification 4 of the flat display device of Example 1. In FIG. The display device in Modification 4 of Example 1 is the display device shown in FIG. Here, the fourth modification of the first embodiment is different from the second modification of the first embodiment shown in FIG. 3 in that the focusing electrode 17 is provided below the spacer 40 in the cathode panel CP. In other words, the interlayer insulating layer 16 is exposed, and the lower insulating film 52 is formed on the exposed portion of the interlayer insulating layer 16. In order to expose a part of the interlayer insulating layer 16 in this way, when forming the convergence electrode 17 by vapor deposition or the like, it may be masked with a wire or the like. The same applies to the modified examples of the following embodiments. The exposed portion of the interlayer insulating layer 16 may correspond to the lower insulating film 52. Further, the display device can be the display device shown in FIG. 25 or FIG.

  The second embodiment is a modification of the first embodiment, and more specifically, relates to the first B mode and the second B mode. The display device in Example 2 is also the display device shown in FIG.

  In the second embodiment, more specifically, an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer is shown in FIG. A layer 51 and a lower insulating film 52 are formed. On the other hand, an upper auxiliary electrode layer 61 and an upper insulating film 62 are formed on the upper end surface of the spacer 40.

  Here, the thicknesses and constituent materials of the lower auxiliary electrode layer 51, the upper auxiliary electrode layer 61, the lower insulating film 52, and the upper insulating film 62 can be the same as those in the first embodiment, and each spacer 40 has one spacer 40. In the example shown in FIG. 6, the spacer 40 extends along the first direction (X direction).

  Even in the second embodiment, the display device shown in FIG. 22 or FIG. 23 can be used as the display device.

  FIG. 7 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification Example 1 of the flat display device of Example 2. In FIG. The display device in Modification 1 of Example 2 is the display device shown in FIG. 21. The difference from FIG. 6 is that the direction in which the spacer 40 extends is parallel to the second direction (Y direction). There is a point.

  FIG. 8 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification Example 2 of the flat display device of Example 2. In FIG. The display device in Modification-2 of Example 2 is the display device shown in FIG. Here, Modification-2 of Example 2 is different from FIG. 6 in that, in the cathode panel CP, an interlayer insulating layer 16 is formed on the gate electrode 13 and the insulating layer 12, and the interlayer insulating layer 16 is formed on the interlayer insulating layer 16. The convergence electrode 17 is formed.

  FIG. 9 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification-3 of the flat display device of Example 2. In FIG. The display device in Modification-3 of Example 2 is the display device shown in FIG. Here, the modification 3 of the second embodiment is different from the modification 2 of the second embodiment shown in FIG. 8 in that the spacer holding portion 25 configured by a part of the partition wall 21 in the anode panel AP. Thus, the upper portion of the spacer 40 is held. In addition, the display apparatus in the modification 3 of this Example 2 can also be made into the display apparatus shown in FIG.

  FIG. 10 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification 4 of the flat display device of Example 2. In FIG. The display device in Modification 4 of Example 2 is the display device shown in FIG. Here, the modification 4 of the second embodiment is different from the modification 2 of the second embodiment shown in FIG. 8 in that the focusing electrode 17 is provided below the spacer 40 in the cathode panel CP. In other words, the interlayer insulating layer 16 is exposed. Further, the display device can be the display device shown in FIG. 25 or FIG.

  The third embodiment is also a modification of the first embodiment, and more specifically, relates to the first C mode and the second C mode. The display device in Example 3 is also the display device shown in FIG.

  In the third embodiment, more specifically, an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer is located below the lower end surface of the spacer 40 as shown in FIG. A lower insulating film 52 is formed on the cathode panel, and a lower auxiliary electrode layer 51 is formed on the lower insulating film 52. Here, in Example 3, the portion of the insulating layer 12 exposed between the gate electrode 13 and the gate electrode 13 corresponds to the lower insulating film 52, but the lower insulating film is separated from the insulating layer 12. 52 may be formed.

  On the other hand, an upper insulating film 62 is formed on the anode electrode 24 located above the upper end surface of the spacer 40, and an upper auxiliary electrode layer 61 is formed on the upper insulating film 62.

  Here, the thicknesses and constituent materials of the lower auxiliary electrode layer 51, the upper auxiliary electrode layer 61, the lower insulating film 52, and the upper insulating film 62 can be the same as those in the first embodiment, and each spacer 40 has one spacer 40. It is comprised from the spacer member, and the spacer 40 is extended along the 1st direction (X direction) in the example shown in FIG. Alternatively, each spacer 40 can be composed of a plurality of spacer members. The lower auxiliary electrode layer 51 and the upper auxiliary electrode layer 61 extend to the support 10 and the substrate 20 located in the invalid region NE, and apply a voltage to the lower auxiliary electrode layer 51 and the upper auxiliary electrode layer 61. For example, a connector (not shown) is connected to a wiring (not shown) extending from a power source (not shown).

  In the third embodiment, the display device shown in FIG. 22 or FIG. 23 can be used as the display device.

  FIG. 12 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification Example 1 of the flat display device of Example 3. In FIG. The display device in Modification 1 of Example 3 is the display device shown in FIG. 21. The difference from FIG. 11 is that the direction in which the spacer 40 extends is parallel to the second direction (Y direction). There is a point. Then, a portion of the cathode panel located below the lower end surface of the spacer, specifically, on the gate electrode 13 and on the portion of the insulating layer 12 exposed between the gate electrode 13 and the gate electrode 13. 11 is different from FIG. 11 in that the lower insulating film 52 is formed.

  FIG. 13 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification Example 2 of the flat display device of Example 3. FIG. The display device in Modification-2 of Example 3 is the display device shown in FIG. Here, Modification-2 of Example 3 is different from FIG. 11 in that an interlayer insulating layer 16 is formed on the gate electrode 13 and the insulating layer 12 in the cathode panel CP, and the interlayer insulating layer 16 is formed on the interlayer insulating layer 16. The convergence electrode 17 is formed, and the lower insulating film 52 is formed on the portion of the cathode panel located below the lower end surface of the spacer, specifically, the convergence electrode 17.

  FIG. 14 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification-3 of the flat display device of Example 3. In FIG. The display device in Modification-3 of Example 3 is the display device shown in FIG. Here, the third modification of the third embodiment is different from the second modification of the third embodiment shown in FIG. 13 in that the spacer holding portion 25 constituted by a part of the partition wall 21 in the anode panel AP. Thus, the upper portion of the spacer 40 is held, and the upper insulating film 62 is formed on the spacer holding portion 25. In addition, the display apparatus in the modification-3 of this Example 3 can also be made into the display apparatus shown in FIG.

  FIG. 15 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification 4 of the flat display device of Example 3. The display device in Modification 4 of Example 3 is the display device shown in FIG. Here, the fourth modification of the third embodiment is different from the second modification of the third embodiment shown in FIG. 13 in that the focusing electrode 17 is provided below the spacer 40 in the cathode panel CP. In other words, the interlayer insulating layer 16 is exposed, and the lower insulating film 52 is formed on the exposed portion of the interlayer insulating layer 16. The exposed portion of the interlayer insulating layer 16 may correspond to the lower insulating film 52. Further, the display device can be the display device shown in FIG. 25 or FIG.

  The fourth embodiment is also a modification of the first embodiment, and more specifically, relates to the first D mode and the second D mode. The display device in Example 4 is also the display device shown in FIG.

  In the fourth embodiment, more specifically, an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer is located below the lower end surface of the spacer 40 as shown in FIG. A lower insulating film 52 is formed on the cathode panel portion, and the lower auxiliary electrode layer includes a lower first auxiliary electrode layer 51A formed on the lower end surface of the spacer 40 and a lower portion formed on the lower insulating film 52. It consists of the second auxiliary electrode layer 51B. Here, in Example 4, the portion of the insulating layer 12 exposed between the gate electrode 13 and the gate electrode 13 corresponds to the lower insulating film 52, but the lower insulating film is separated from the insulating layer 12. 52 may be formed.

  On the other hand, an upper insulating film 62 is formed on the anode electrode 24 located above the upper end surface of the spacer 40, and the upper auxiliary electrode layer is an upper first auxiliary electrode layer 61 </ b> A formed on the upper end surface of the spacer 40. , And an upper second auxiliary electrode layer 61B formed on the upper insulating film 62.

  Here, the thickness and constituent materials of the lower first auxiliary electrode layer 51A, the lower second auxiliary electrode layer 51B, the upper first auxiliary electrode layer 61A, the upper second auxiliary electrode layer 61B, the lower insulating film 52, and the upper insulating film 62 are In addition, each spacer 40 is composed of one spacer member, and in the example shown in FIG. 16, the spacer 40 is along the first direction (X direction). It extends. Alternatively, each spacer 40 can be composed of a plurality of spacer members. The lower second auxiliary electrode layer 51B and the upper second auxiliary electrode layer 61B extend to the support 10 and the substrate 20 located in the ineffective region NE, and the lower second auxiliary electrode layer 51B and the upper second auxiliary electrode layer. The electrode layer 61B is connected to a wiring (not shown) extending from a power source (not shown) for applying a voltage, for example, by a connector (not shown).

  In the fourth embodiment, the display device shown in FIG. 22 or FIG. 23 can be used as the display device.

  FIG. 17 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification Example 1 of the flat display device of Example 4. In FIG. The display device in Modification-1 of Example 4 is the display device shown in FIG. 21. The difference from FIG. 16 is that the direction in which the spacer 40 extends is parallel to the second direction (Y direction). There is a point. Then, a portion of the cathode panel located below the lower end surface of the spacer, specifically, on the gate electrode 13 and on the portion of the insulating layer 12 exposed between the gate electrode 13 and the gate electrode 13. 16 is different from FIG. 16 in that the lower insulating film 52 is formed.

  FIG. 18 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification Example 2 of the flat display device of Example 4. FIG. The display device in Modification-2 of Example 4 is the display device shown in FIG. Here, Modification 2 of Example 4 differs from FIG. 16 in that an interlayer insulating layer 16 is formed on the gate electrode 13 and the insulating layer 12 in the cathode panel CP, and the interlayer insulating layer 16 is formed on the interlayer insulating layer 16. The convergence electrode 17 is formed, and the lower insulating film 52 is formed on the portion of the cathode panel located below the lower end surface of the spacer, specifically, the convergence electrode 17.

  FIG. 19 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification-3 of the flat display device of Example 4. In FIG. The display device in Modification-3 of Example 4 is the display device shown in FIG. Here, the modification 3 of the fourth embodiment is different from the modification 2 of the fourth embodiment shown in FIG. 18 in that the spacer holding portion 25 formed of a part of the partition wall 21 in the anode panel AP. Thus, the upper portion of the spacer 40 is held, and the upper insulating film 62 is formed on the spacer holding portion 25. In addition, the display apparatus in the modification-3 of this Example 4 can also be made into the display apparatus shown in FIG.

  FIG. 20 shows an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in Modification 4 of the flat display device of Example 4. In FIG. The display device in Modification-4 of Example 4 is the display device shown in FIG. Here, the fourth modification of the fourth embodiment is different from the second modification of the fourth embodiment shown in FIG. 18 in that the focusing electrode 17 is provided below the spacer 40 in the cathode panel CP. In other words, the interlayer insulating layer 16 is exposed, and the lower insulating film 52 is formed on the exposed portion of the interlayer insulating layer 16. The exposed portion of the interlayer insulating layer 16 may correspond to the lower insulating film 52. Further, the display device can be the display device shown in FIG. 25 or FIG.

  As mentioned above, although this invention was demonstrated based on the preferable Example, this invention is not limited to these Examples. The configurations and structures of the flat display device, the cathode panel and the anode panel, the cold cathode field emission display device and the cold cathode field emission device described in the embodiments are examples, and can be changed as appropriate. The display device has been described by taking color display as an example, but it may also be a single color display. The configuration and structure of the lower end surface of the spacer and the portion of the cathode panel CP described in the embodiment and the modifications thereof may be combined with the configuration and structure of the upper end surface of the conventional spacer and the portion of the anode panel AP. The configuration and structure of the upper end surface of the spacer and the portion of the anode panel AP described in the embodiments and the modifications thereof may be combined with the configuration and structure of the lower end surface of the spacer and the portion of the cathode panel CP.

  The configuration and structure of the lower end surface of the spacer and the cathode panel CP described in the first embodiment and the modification thereof are the same as the lower end surface of the spacer and the cathode panel CP described in the second to fourth embodiments and the modification. The configuration and structure of the lower end surface of the spacer and the cathode panel CP described in the second embodiment and the modifications thereof are the same as the first embodiment, the third embodiment, the fourth embodiment, and the second embodiment. It can be applied to the configuration and structure of the lower end surface of the spacer and the cathode panel CP described in the modification, and the configuration of the lower end surface of the spacer and the portion of the cathode panel CP described in the third embodiment and the modification. The lower end surface of the spacer and the part of the cathode panel CP whose structure is described in the first, second, fourth and modified examples. The structure and structure can be applied to the configuration and the structure, and the configuration and structure of the lower end surface of the spacer and the cathode panel CP described in the fourth embodiment and the modification thereof are described in the first to third embodiments and the modification thereof. It can be applied to the configuration and structure of the lower end surface of the spacer and the cathode panel CP.

  In addition, the configuration and structure of the upper end surface of the spacer and the anode panel AP described in the first embodiment and the modification thereof are the same as the upper end surface of the spacer and the anode panel AP described in the second to fourth embodiments and the modification. The configuration and structure of the upper end surface of the spacer and the anode panel AP described in the second embodiment and the modifications thereof can be applied to the first embodiment, the third embodiment, and the third embodiment. 4 and the configuration and structure of the upper end surface of the spacer and the anode panel AP described in the modification thereof, and the upper end surface of the spacer and the portion of the anode panel AP described in the third embodiment and the modification thereof. The upper end surface of the spacer and the anode panel AP described in the first embodiment, the second embodiment, the fourth embodiment, and the modified examples thereof are the same as the first embodiment. It can be applied to the structure and structure of the part, and the structure and structure of the upper end surface of the spacer and the part of the anode panel AP described in the fourth example and the modification thereof are the same as those in the first to third examples and the modification. It can be applied to the configuration and structure of the upper end surface of the spacer and the portion of the anode panel AP described in FIG.

  In the embodiment, the cross-sectional shape when the auxiliary electrode layer is cut in a virtual plane perpendicular to the axis of the spacer 40 is a thin plate shape or a “U” shape, but is not limited thereto. The cross-sectional shape of the auxiliary electrode layer can be essentially any shape. In addition, although the cross-sectional shape when the insulating film is cut in a virtual plane perpendicular to the axis of the spacer 40 is a thin plate shape or a “U” shape, it is not limited to this, and the cross-sectional shape of the insulating film is , Essentially any shape.

  In the embodiment, the shape of the spacer is an elongated plate, but the shape of the spacer is not limited to such a shape. As shown in the conceptual partial plan view of FIG. 33A, the cross-shaped spacer 40A and the plate-like spacer 40 may be combined, or the conceptual partial plan view of FIG. As shown in the figure, only the cross-shaped spacer 40A can be used. The basic configuration and structure of the cross-shaped spacer 40A may be the same as the elongated plate-like configuration and structure described in the first to fourth embodiments.

  The electron emission region is composed of an overlapping region of the first electrode and the second electrode, but a branch wiring (first branch wiring) extends from the first electrode, and a branch wiring (second branch wiring) extends from the second electrode. In which the overlapping region of the first branch wiring and the second branch wiring corresponds to the electron emission region, or the branch wiring (first branch wiring) extends from the first electrode, and the branch wiring extends from the second electrode. The (second branch wiring) extends, and an electron emission region is provided in a portion opposite to the first branch wiring and the second branch wiring (electrons straddling the end of the first branch wiring and the end of the second branch wiring). A mode in which an emission region is provided) or a mode in which a branch wiring (first branch wiring) extends from the first electrode and an overlapping region between the first branch wiring and the second electrode corresponds to an electron emission region. Alternatively, a branch wiring (first branch wiring) extends from the first electrode, and an electron emission region is provided at a portion where the first branch wiring and the second wiring are opposed to each other. (The electron emission region is provided across the end of the first branch wiring and the side of the second wiring), or the branch wiring (second branch wiring) extends from the second electrode. In the form in which the overlapping region of the second branch wiring and the first electrode corresponds to the electron emission region, the branch wiring (second branch wiring) extends from the second electrode, and the second branch wiring and the first wiring are connected to each other. The form in which the electron emission region is provided in the facing portion (the electron emission region is provided across the end portion of the second branch wiring and the side portion of the first wiring) is also “the electron emission region is the first electrode. It is comprised from the overlap area | region with a 2nd electrode.

  For example, a standard value (ie, elapsed time and variation data) of the amount of change over time of the distortion of the electron beam trajectory in the vicinity of the spacer is obtained in advance, and the energization time (the integrated value of the operation time) or If the applied voltage to the lower auxiliary electrode layer and the upper auxiliary electrode layer is automatically corrected according to the coulomb dose, good image quality can be maintained. Also, such correction can be performed while the user looks at the screen. Furthermore, the change in the electron beam trajectory due to the influence of the charge-up of the spacer during the operation of the display device, the disturbance of the potential distribution in the vicinity of the spacer due to the change in the physical properties of the spacer, etc. Further, for example, if the voltage applied to the lower auxiliary electrode layer or the upper auxiliary electrode layer is changed in accordance with the luminance, the electron beam is deflected minutely, and the deflection of the electron beam due to the charging of the spacer or heat can be corrected.

  In the field emission device, a mode in which one electron emission portion corresponds to one opening has been described. However, depending on the structure of the field emission device, a mode in which a plurality of electron emission portions correspond to one opening. Alternatively, one electron emission portion may correspond to a plurality of openings. Alternatively, a plurality of first openings may be provided in the gate electrode, a second opening connected to the plurality of first openings related to the insulating layer may be provided, and one or a plurality of electron emission portions may be provided. .

The electron emission region can also be constituted by an electron emission element commonly called a surface conduction electron emission element. This surface conduction electron-emitting device is formed on a support made of glass, for example, tin oxide (SnO ₂ ), gold (Au), indium oxide (In ₂ O ₃ ) / tin oxide (SnO ₂ ), carbon, palladium oxide ( A pair of electrodes made of a conductive material such as (PdO), having a very small area and arranged with a predetermined gap (gap) are formed in a matrix. A carbon thin film is formed on each electrode. The row direction wiring is connected to one electrode (for example, the first electrode) of the pair of electrodes, and the column direction wiring is connected to the other electrode (for example, the second electrode) of the pair of electrodes. It has a configuration. By applying a voltage to the pair of electrodes (first electrode and second electrode), an electric field is applied to the carbon thin films facing each other across the gap, and electrons are emitted from the carbon thin film. By causing the electrons to collide with the phosphor region on the anode panel, the phosphor region is excited to emit light, and a desired image can be obtained. Alternatively, the electron emission region can be formed from a metal / insulating film / metal type element.

FIG. 1 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of a spacer in the flat display device according to the first embodiment. FIG. 2 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification 1 of the flat display device according to the first embodiment. FIG. 3 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification Example 2 of the flat display device of Example 1. FIG. FIG. 4 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification-3 of the flat display device of Example 1. FIG. FIG. 5 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification Example 4 of the flat display device of Example 1. FIG. FIG. 6 is an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in the flat display device according to the second embodiment. FIG. 7 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification Example 1 of the flat display device of Example 2. FIG. FIG. 8 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification Example 2 of the flat display device of Example 2. FIG. FIG. 9 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification 3 of the flat display device of Example 2. FIG. FIG. 10 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification 4 of the flat display device according to the second embodiment. FIG. 11 is an enlarged schematic partial end view (however, an exploded view) in the vicinity of the spacer in the flat display device according to the third embodiment. FIG. 12 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification Example 1 of the flat display device of Example 3. FIG. FIG. 13 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification Example 2 of the flat display device of Example 3. FIG. FIG. 14 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification-3 of the flat display device of Example 3. FIG. 15 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification 4 of the flat display device according to the third embodiment. FIG. 16 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in the flat display device according to the fourth embodiment. FIG. 17 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification Example 1 of the flat display device of Example 4. FIG. FIG. 18 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification Example 2 of the flat display device of Example 4. FIG. 19 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification-3 of the flat display device of Example 4. FIG. FIG. 20 is an enlarged schematic partial end view (however, an exploded view) of the vicinity of the spacer in Modification Example 4 of the flat display device of Example 4. FIG. FIG. 21 is a partial end view of a flat display device according to the first to fourth embodiments, which includes a cold cathode field emission display having a Spindt type cold cathode field emission device. FIG. 22 is a partial end view of a flat display device according to the first to fourth embodiments, which is a modification of the cold cathode field emission display device having a Spindt-type cold cathode field emission device. FIG. 23 is a partial end view of the flat display device according to the first to fourth embodiments, which is another modification of the cold cathode field emission display device having a Spindt-type cold cathode field emission device. FIG. 24 is a partial end view of the flat display device according to the first to fourth embodiments, which includes a cold cathode field emission display device having a Spindt type cold cathode field emission device having a focusing electrode. FIG. 25 is a partial end view of a flat display device according to the first to fourth embodiments, which is a modification of the cold cathode field emission display device having a Spindt type cold cathode field emission device having a focusing electrode. . FIG. 26 is a partial end view of a flat display device according to the first to fourth embodiments, which is another modification of the cold cathode field emission display device having a Spindt type cold cathode field emission device having a focusing electrode. It is. FIG. 27 is a layout diagram schematically showing the layout of the partition walls, spacers, and phosphor regions in the anode panel constituting the flat display device. FIG. 28 is a layout diagram schematically showing the layout of the barrier ribs, spacers, and phosphor regions in the anode panel constituting the flat display device. FIG. 29 is a layout diagram schematically showing the layout of the partition walls, spacers, and phosphor regions in the anode panel constituting the flat display device. FIG. 30 is a layout diagram schematically showing the layout of the partition walls, spacers, and phosphor regions in the anode panel constituting the flat display device. FIG. 31 is a layout diagram schematically showing the layout of the partition walls, the spacers, and the phosphor regions in the anode panel constituting the flat display device. FIG. 32 is a layout diagram schematically showing the layout of the partition walls, the spacers, and the phosphor regions in the anode panel constituting the flat display device. FIGS. 33A and 33B are conceptual partial plan views showing modified examples of the shape of the spacer. FIG. 34 is a partial end view of a conventional flat display device including a cold cathode field emission display device having a Spindt type cold cathode field emission device. FIG. 35 is a conceptual partial end view of a conventional flat display device including a cold cathode field emission display device having a flat type cold cathode field emission device. FIG. 36 is a schematic exploded perspective view of a part of a cathode panel and an anode panel in a cold cathode field emission display.

Explanation of symbols

CP: cathode panel, AP: anode panel, EA: electron emission region, EF: effective region, NE: invalid region, 10: support, 11: cathode electrode, DESCRIPTION OF SYMBOLS 12 ... Insulating layer, 13 ... Gate electrode, 14 ... Opening part, 14A ... 1st opening part, 14B ... 2nd opening part, 14C ... 3rd opening part, 15, 15A ... Electron emission part, 16 ... Interlayer insulating layer, 17 ... Converging electrode, 20 ... Substrate, 21 ... Partition, 22, 22R, 22G, 22B ... Phosphor region, 23 ... Light absorption layer (black matrix), 24 ... Anode electrode, 24A ... Anode electrode unit, 26 ... Joint member, 27 ... Anode electrode resistor layer, 31 ... Cathode electrode control Circuit, 32... Gate electrode control circuit, 33. Electrode control circuit 34 ... Anode electrode control circuit 40 ... Spacer 41 ... Antistatic film 51 ... Lower auxiliary electrode layer 51A ... Lower first auxiliary electrode layer 51B Lower second auxiliary electrode layer, 52 ... lower insulating film, 61 ... upper auxiliary electrode layer, 61A ... upper first auxiliary electrode layer, 61B ... upper second auxiliary electrode layer, 62 ...・ Upper insulating film

Claims (18)

(A) A plurality of strip-shaped first electrodes extending in the first direction and a plurality of strip-shaped second electrodes extending in a second direction different from the first direction and positioned below the first electrode. A cathode panel having an electron emission region composed of an overlapping region of the first electrode and the second electrode, and
(B) an anode panel having a phosphor region and an anode electrode;
A flat panel display device in which a cathode panel and an anode panel are bonded to each other at a peripheral portion thereof via a bonding member,
A plurality of spacers are arranged between the cathode panel and the anode panel,
A planar type characterized in that a lower insulating film and a lower auxiliary electrode layer are provided from the cathode panel side between a lower end surface of the spacer and a portion of the cathode panel located below the lower end surface of the spacer. Display device. A lower auxiliary electrode layer is formed on the lower end surface of the spacer,
2. The flat display device according to claim 1, wherein a lower insulating film is formed on a portion of the cathode panel located below the lower end surface of the spacer.   The flat display device according to claim 1, wherein a lower auxiliary electrode layer and a lower insulating film are formed on a lower end surface of the spacer. A lower insulating film is formed on the cathode panel located below the lower end surface of the spacer,
2. The flat display device according to claim 1, wherein a lower auxiliary electrode layer is formed on the lower insulating film.   The flat display device according to claim 4, wherein each spacer includes a plurality of spacer members. A lower insulating film is formed on the cathode panel located below the lower end surface of the spacer,
The lower auxiliary electrode layer includes a lower first auxiliary electrode layer formed on a lower end surface of the spacer and a lower second auxiliary electrode layer formed on the lower insulating film. 2. A flat display device according to 1.   The flat display device according to claim 6, wherein each spacer includes a plurality of spacer members. When the voltage applied to the lower auxiliary electrode layer is V _DN (volt) and the voltage applied to the first electrode is V ₁ (volt), −100 ≦ (V _DN −V ₁ ) ≦ 100 is satisfied. A flat display device according to any one of claims 1 to 7.   8. The flat display device according to claim 1, further comprising a converging electrode electrically insulated from the first electrode under the lower insulating film. 9. When the voltage applied to the lower auxiliary electrode layer is V _DN (volts) and the voltage applied to the focusing electrode is V _F (volts), -100 ≦ (V _DN −V _F ) ≦ 100 is satisfied. 10. A flat display device according to claim 9, wherein (A) A plurality of strip-shaped first electrodes extending in the first direction and a plurality of strip-shaped second electrodes extending in a second direction different from the first direction and positioned below the first electrode. A cathode panel having an electron emission region composed of an overlapping region of the first electrode and the second electrode, and
(B) an anode panel having a phosphor region and an anode electrode;
A flat panel display device in which a cathode panel and an anode panel are bonded to each other at a peripheral portion thereof via a bonding member,
A plurality of spacers are arranged between the cathode panel and the anode panel,
An upper insulating film and an upper auxiliary electrode layer are provided from the anode panel side between the upper end surface of the spacer and the portion of the anode electrode located above the upper end surface of the spacer. Display device. An upper auxiliary electrode layer is formed on the upper end surface of the spacer,
12. The flat display device according to claim 11, wherein an upper insulating film is formed on a portion of the anode electrode located above the upper end surface of the spacer.   The flat display device according to claim 11, wherein an upper auxiliary electrode layer and an upper insulating film are formed on an upper end surface of the spacer. An upper insulating film is formed on the portion of the anode electrode located above the upper end surface of the spacer,
The flat display device according to claim 11, wherein an upper auxiliary electrode layer is formed on the upper insulating film.   The flat display device according to claim 14, wherein each spacer includes a plurality of spacer members. An upper insulating film is formed on the portion of the anode electrode located above the upper end surface of the spacer,
12. The upper auxiliary electrode layer includes an upper first auxiliary electrode layer formed on the upper end surface of the spacer and an upper second auxiliary electrode layer formed on the upper insulating film. 2. A flat display device according to 1.   The flat display device according to claim 16, wherein each spacer includes a plurality of spacer members. When the voltage applied to the upper auxiliary electrode layer is V _UP (kilovolts) and the voltage applied to the anode electrode is V _A (kilovolts), −0.5 ≦ (V _UP −V _A ) ≦ 0.5 The flat display device according to any one of claims 11 to 17, wherein the flat display device is satisfied.

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