JP2007133291A - Driving method of plasma display panel - Google Patents

Abstract

[PROBLEMS] To suppress the occurrence of crosstalk and the occurrence of unlit cells.
A method of driving a plasma display panel, in the address period, a selective address discharge in by applying a write pulse discharge cell to the data electrodes D ₁ to D _m is applied with a scan pulse to the scan electrodes is generated, in the sustain period, to generate a sustain discharge by applying a number of sustain pulses proportional to a luminance weight set for each subfield to the scan electrodes SC ₁ to SC _n and sustain electrodes SU ₁ to SU _n, In the address period of the subfield having the smallest luminance weight, the scan electrode to which the scan pulse is applied and the scan electrode to which the scan pulse is subsequently applied are adjacent, and in the address period of the subfield having the largest luminance weight, The scan pulse is applied to the scan electrode in the order that the scan electrode to which the scan pulse is applied and the scan electrode to which the scan pulse is subsequently applied are not adjacent to each other. It is applied to.
[Selection] Figure 4

Description

  The present invention relates to a method for driving a plasma display panel.

  A typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a large number of discharge cells formed between a front plate and a back plate arranged to face each other. In the front plate, a plurality of display electrode pairs each consisting of a pair of scan electrodes and sustain electrodes are formed in parallel with each other on the front glass substrate, and a dielectric layer and a protective layer are formed so as to cover the display electrode pairs. ing. The back plate has a plurality of parallel data electrodes on the back glass substrate, a dielectric layer so as to cover them, and a plurality of barrier ribs in parallel with the data electrodes formed on the back glass substrate. A phosphor layer is formed on the side walls of the barrier ribs. Then, the front plate and the back plate are arranged opposite to each other so that the display electrode pair and the data electrode are three-dimensionally crossed and sealed, and a discharge gas containing xenon is sealed in the internal discharge space. Here, a discharge cell is formed at a portion where the display electrode pair and the data electrode face each other. In the panel having such a configuration, ultraviolet light is generated by gas discharge in each discharge cell, and phosphors of RGB colors are excited and emitted by the ultraviolet light to perform color display.

  As a method of driving the panel, a subfield method, that is, a method of performing gradation display by combining subfields to emit light after dividing one field period into a plurality of subfields. Each subfield has an initialization period, an address period, and a sustain period. In the initialization period, an initialization discharge is generated, and wall charges necessary for the subsequent address operation are formed on each electrode. In the address period, address discharge is selectively generated in the discharge cells to be displayed to form wall charges. In the sustain period, a sustain pulse is alternately applied to the display electrode pair composed of the scan electrode and the sustain electrode, and a sustain discharge is generated in the discharge cell in which the address discharge is generated, and the phosphor layer of the corresponding discharge cell is caused to emit light. The image is displayed.

Among such driving methods, there is an erroneous discharge phenomenon (hereinafter referred to as “crosstalk”) in which an address discharge occurs in a discharge cell that does not perform display due to the influence of an address discharge of an adjacent discharge cell. Driving methods that can be avoided have been proposed. For example, in Patent Document 1, when scanning is performed by applying a scan pulse to the scan electrodes in each row in the writing period, the scan electrodes to be continuously scanned do not exist in the adjacent rows, and scanning is continued. A panel driving method is disclosed in which scan pulses applied to each of the scan electrodes overlap in time.
JP 2003-345290 A

  However, although the above-described driving method can suppress the occurrence of crosstalk, on the other hand, the discharge delay of the address discharge becomes large, the address discharge of the discharge cell for displaying becomes unstable, and the discharge does not generate the address discharge. A cell (hereinafter abbreviated as “non-lighted cell”) may occur.

  The present invention has been made in view of these problems, and an object of the present invention is to provide a panel driving method capable of suppressing the occurrence of crosstalk and the occurrence of unlit cells.

  The present invention includes a plurality of scan electrodes and sustain electrodes arranged in parallel and a plurality of data electrodes arranged in a direction intersecting the scan electrodes and sustain electrodes, and a large number of intersections between the scan electrodes, sustain electrodes, and data electrodes. A method of driving a panel in which a discharge cell is formed, wherein one field period of an image signal is composed of a plurality of subfields having an initialization period, an address period, and a sustain period, and in the initialization period, subsequent address discharge is performed. An initializing discharge is generated to form the necessary wall charges in the discharge cell. In the address period, a scan pulse is applied to the scan electrode and an address pulse is selectively applied to the data electrode to cause an address discharge in the discharge cell. In the sustain period, the number of sustain pulses proportional to the luminance weight set for each subfield is applied to the scan electrodes and sustain electrodes, and the address discharge In the address period of the subfield having the smallest luminance weight, the sustain electrode for causing the generated discharge cell to emit light is generated, and the scan electrode to which the scan pulse is applied is adjacent to the scan electrode to which the scan pulse is applied. Scan pulses are applied to the scan electrodes in order, and the scan electrodes to which the scan pulse is applied and the scan electrodes to which the scan pulse is applied subsequently are not adjacent to each other in the writing period of the subfield having the largest luminance weight. Apply a pulse. By this method, it is possible to provide a panel driving method capable of suppressing the occurrence of crosstalk and the occurrence of unlit cells.

  In the panel driving method of the present invention, the scan pulses may be temporally overlapped when the scan pulses are applied in the adjacent order. By this method, the writing time can be shortened.

  The plurality of subfields of the panel driving method of the present invention include a subfield having an initializing period for generating an initializing discharge in all discharge cells for image display, and a discharge in which a sustain discharge has been generated in the immediately preceding subfield. And a subfield having an initializing period for selectively generating an initializing discharge in the cell. By this method, it is possible to perform image display with good contrast.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the panel drive method which can suppress generation | occurrence | production of an unlit cell while suppressing generation | occurrence | production of crosstalk.

  Hereinafter, a panel driving method according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is an exploded perspective view showing a main part of a panel used in the embodiment of the present invention. The panel 10 is configured such that a glass front substrate 21 and a rear substrate 31 are arranged to face each other and a discharge space is formed therebetween. On the front substrate 21, a plurality of scanning electrodes 22 and sustaining electrodes 23 constituting a display electrode pair are formed in parallel with each other. A dielectric layer 24 is formed so as to cover the scan electrodes 22 and the sustain electrodes 23, and a protective layer 25 is formed on the dielectric layer 24. A plurality of data electrodes 32 covered with an insulating layer 33 are provided on the back substrate 31, and a grid-like partition wall 34 is provided on the insulating layer 33. A phosphor layer 35 is provided on the surface of the insulator layer 33 and the side surfaces of the partition walls 34. The front substrate 21 and the rear substrate 31 are arranged to face each other so that the scan electrode 22 and the sustain electrode 23 and the data electrode 32 intersect each other, and in the discharge space formed therebetween, for example, neon And a mixed gas of xenon. Note that the structure of the panel is not limited to the above-described structure, and for example, a structure having a stripe-shaped partition may be used.

FIG. 2 is an electrode array diagram of the panel used in the embodiment of the present invention. In the row direction, n scan electrodes SC _{1 to} SC _n (scan electrode 22 in FIG. 1) and n sustain electrodes SU _{1 to} SU _n (sustain electrode 23 in FIG. 1) are arranged, and m scan electrodes are arranged in the column direction. Data electrodes D _{1 to} D _m (data electrodes 32 in FIG. 1) are arranged. A discharge cell is formed at a portion where a pair of scan electrode SC _i and sustain electrode SU _i (i = 1 to n) intersects with one data electrode D _j (j = 1 to m). M × n are formed in the discharge space.

  FIG. 3 is a circuit block diagram of the plasma display device according to the embodiment of the present invention. The plasma display device includes a panel 10, an image signal processing circuit 51, a data electrode drive circuit 52, a scan electrode drive circuit 53, a sustain electrode drive circuit 54, a timing generation circuit 55, and a power supply circuit (not shown).

The image signal processing circuit 51 converts the image signal sig into image data for each subfield. Data electrode driving circuit 52 converts the signals corresponding to image data of each subfield to each of the data electrodes D ₁ to D _m for driving the data electrodes D ₁ to D _m. The timing generation circuit 55 generates various timing signals based on the horizontal synchronization signal H and the vertical synchronization signal V and supplies them to each circuit block. Scan electrode drive circuit 53 supplies drive voltage waveforms to scan electrodes SC _{1 to} SC _n based on timing signals, and sustain electrode drive circuit 54 supplies drive voltage waveforms to sustain electrodes SU _{1 to} SU _n based on timing signals. To do.

  Next, a driving voltage waveform for driving the panel and its operation will be described. FIG. 4 is a diagram showing drive voltage waveforms applied to the respective electrodes of the panel used in the embodiment of the present invention. One field is divided into a plurality of subfields, and each subfield has an initialization period, an address period, Has a maintenance period. In this embodiment, one field is divided into 10 subfields (first SF, second SF,..., 10th SF), and each subfield is (1, 2, 3, 6, 11, 18). , 30, 44, 60, 80). In the present embodiment, in the writing period of the subfield with a small luminance weight from the first SF to the sixth SF, the scan electrode to which the scan pulse is applied and the scan electrode to which the scan pulse is applied subsequently are arranged in the adjacent order. An address operation (hereinafter abbreviated as “sequential address operation”) is applied to the sub-field, and in the address period of the subfield having a large luminance weight from the seventh SF to the tenth SF, the scan electrode is continuously applied to the scan electrode. Thus, an address operation (hereinafter abbreviated as “interlaced address operation”) in which the scan pulse is applied is performed so that the scan electrodes to which the scan pulse is applied are not adjacent to each other.

  First, the operation of the first SF with the smallest luminance weight will be described in detail.

In a 1SF the initializing period, in its first half, the data electrodes _D 1 to D _m and sustain electrodes _SU 1 to SU _n held to 0V, and the discharge start voltage or less with respect to the scan electrodes _SC 1 to SC _n A ramp voltage that gradually rises from voltage Vi1 toward voltage Vi2 that exceeds the discharge start voltage is applied. Then, cause weak initializing discharge in all the discharge cells, the scan electrodes _SC 1 to SC _n negative wall voltage on is accumulated, the positive sustain electrode _SU 1 to SU _n and the data electrodes _D on 1 to D _m The wall voltage is accumulated. Here, the wall voltage on the electrode refers to a voltage generated by wall charges accumulated on a dielectric layer covering the electrode, a phosphor layer, or the like.

In the latter half portion of the subsequently initializing period, maintaining the sustain electrodes _SU 1 to SU _n to a positive voltage Ve1, and a ramp voltage that gently decreases from voltage Vi3 to the voltage Vi4 to the scan electrodes _SC 1 to SC _n . Then, cause again weak setup discharges in all the discharge cells, the wall voltage between the scan electrodes _SC 1 to SC _n and sustain electrodes _SU 1 to SU on _n is weakened, the data electrodes _D 1 to D _m The upper positive wall voltage is adjusted to a value suitable for the write operation.

  In the present embodiment, as described above, the initialization operation of the first SF has been described as an all-cell initialization operation in which initialization discharge is performed on all discharge cells that perform image display. It may be a selective initialization operation.

In the subsequent writing period, sequential writing operations are performed as described below. The sustain electrodes _SU 1 to SU _n to a voltage Ve2 First, holding the scan electrodes _SC 1 to SC _n to Vc. Then, while applying a negative scan pulse voltage Va to scan electrodes SC ₁ of the first row, the data electrodes _D 1 to D data electrode _D k of the discharge cells to be displayed on the first row of the _m (k = 1 To m), a positive write pulse voltage Vd is applied. Voltage of intersection of this time and the data electrode D _k and scan electrodes SC ₁ includes a wall voltage on the wall voltage between scan electrodes SC ₁ on the data electrode D _k is added to the externally applied voltage (Vd-Va) And exceeds the discharge start voltage. Then, an address discharge occurs between data electrode D _k and scan electrode SC ₁ and between sustain electrode SU ₁ and scan electrode SC _1, and a positive wall voltage is accumulated on scan electrode SC ₁ of this discharge cell. , negative wall voltage is accumulated on sustain electrode SU _1, negative wall voltage is also accumulated on data electrode D _k. In this manner, an address operation is performed in which address discharge is caused in the discharge cells to be displayed in the first row and wall voltage is accumulated on each electrode. On the other hand, the voltage at the intersection of the data electrodes D _{1 to} D _m and the scan electrode SC _{1 to} which the address pulse voltage Vd is not applied does not exceed the discharge start voltage, so that address discharge does not occur.

Subsequently, the scan pulse voltage Va is applied in the second row to the scan electrodes SC _2, the write pulse voltage Vd to data electrode D _k of the discharge cells to be displayed on the second line of the data electrodes D ₁ to D _m Apply. Writing between Then a voltage at an intersection of the data electrode D _k and scan electrode SC ₂ exceeds the discharge start voltage, and the data electrode D _k and between sustain electrode SU ₂ and scan electrode SC ₂ and scan electrode SC ₂ Discharge occurs. In this way, an address operation for accumulating wall voltage on each electrode of the discharge cell to be displayed in the second row is performed. In this address operation, the discharge delay is reduced by the influence of priming generated by the address discharge of the adjacent discharge cells in the first row, so that the address operation is stable and generation of unlit cells is suppressed.

  Thereafter, similarly, a scan pulse is sequentially applied to the scan electrodes such as the third row, the fourth row,..., The address operation is sequentially performed, and the address operation for the discharge cells in all rows is completed. In this address operation, the discharge delay is reduced due to the priming generated by the address discharge of the adjacent discharge cells, so that the address operation is stable and the generation of unlit cells is suppressed.

In the subsequent sustain period, the scan electrodes _SC 1 to SC _n first applies a positive sustain pulse voltage Vs, to sustain electrodes _SU 1 to SU _n and applies the ground potential, ie 0V. Then, in the discharge cell in which the address discharge has occurred, the voltage between scan electrode SC _i and sustain electrode SU _i is the sustain pulse voltage Vs, the wall voltage on scan electrode SC _i and the wall voltage on sustain electrode SU _i. Exceeds the discharge start voltage. Then, a sustain discharge occurs between the scan electrode SC _i and the sustain electrode SU _i, and the phosphor layer 35 emits light by the ultraviolet rays generated at this time. Then, a negative wall voltage is accumulated on scan electrode SC _i , and a positive wall voltage is accumulated on sustain electrode SU _i . Furthermore, a positive wall voltage is also accumulated on the data electrode _Dk . In the discharge cells in which no address discharge has occurred during the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained.

Then, the 0V is applied to scan electrodes _SC 1 to SC _n, respectively applied to sustain pulse voltage Vs to the sustain electrodes _SU 1 to SU _n. Then, in the discharge cell having undergone the sustain discharge, sustain discharge occurs between the sustain electrode SU _i again sustain electrode SU _i and the voltage exceeds the discharge start voltage between the scan electrodes SC _i and the scanning electrode SC _i Occurs, a negative wall voltage is accumulated on the sustain electrode SU _i , and a positive wall voltage is accumulated on the scan electrode SC _i . Similarly, by applying a sustain pulse voltage of the number corresponding to the alternating luminance weight and the scan electrode SC ₁ to SC _n and sustain electrodes SU ₁ to SU _n, by applying a potential difference between the electrodes of the display electrode pairs after, The sustain discharge is continuously performed in the discharge cells that have caused the address discharge in the address period.

  Subsequent initializing periods and sustaining periods of the second to sixth SFs are performed in substantially the same manner as the first SF, and the sequential writing operation is performed in the writing period as in the first SF.

  Next, the operation of the seventh SF having a large luminance weight and performing the interlaced writing operation will be described in detail.

In the initializing period of the seventh SF, the sustain electrodes _SU 1 to SU _n to a voltage Ve1, respectively hold the data electrodes _D 1 to D _m to 0V, and the direction from the voltage Vi3 'to voltage Vi4 to the scan electrodes _SC 1 to SC _n Apply a ramp voltage that falls slowly. Then, a weak initializing discharge is generated in the discharge cell in which the sustain discharge has been performed in the sustain period of the previous subfield, and the wall voltage on scan electrode SC _i and sustain electrode SU _i is weakened. For data electrode D _k , the positive wall voltage is sufficiently accumulated on data electrode D _k in the immediately preceding sustain period, so that an excessive portion of this wall voltage is discharged and suitable for the address operation. Adjusted to wall voltage. On the other hand, discharge cells that have not undergone sustain discharge in the previous subfield are not discharged, and the wall charges at the end of the initialization period of the previous subfield are maintained.

  As described above, the initialization operation of the seventh SF in the present embodiment is a selective initialization operation in which the initializing discharge is selectively performed on the discharge cells that have undergone the sustain operation in the sustain period of the immediately preceding subfield. Although described, an all-cell initialization operation may be performed.

In the subsequent writing period, an interlaced writing operation is performed as described below. First sustain electrodes _SU 1 to SU _n voltage Ve2, to hold the scan electrodes _SC 1 to SC _n to a voltage Vc. Then, while applying a negative scan pulse Va to the scan electrodes SC ₁ of the first row, positive address pulse to the data electrode D _k of the discharge cells to be displayed in the first row among data electrodes D ₁ to D _m Vd is applied. Writing between Then a voltage at an intersection of the data electrode D _k and scan electrodes SC ₁ exceeds the discharge start voltage, and the data electrode D _k and between sustain electrode SU ₁ and scan electrodes SC ₁ and the scan electrodes SC ₁ Discharge occurs. In this way, an address operation for accumulating wall voltage on each electrode of the discharge cell to be displayed in the first row is performed.

Then, the scan pulse Va time before application only time t from time to end of the first row of scan electrode SC _1, applied with a scan pulse Va to scan electrode SC ₃ of the third row, third row An address pulse Vd is applied to the data electrode _Dk of the discharge cell to be displayed on the eye. Writing between Then a voltage at an intersection of the data electrode D _k and scan electrode SC ₃ exceeds the discharge start voltage, and the data electrode D _k and between sustain electrode SU ₃ the scan electrodes SC ₃ and the scanning electrode SC ₃ Discharge occurs.

  Thus, in the address period of the seventh SF, an interlace address operation is performed in which the address operation of the discharge cell in the third row is performed following the address operation of the discharge cell in the first row. In general, when a bright image is displayed, a large amount of priming occurs in the sustain period in the subfield having a large luminance weight, and it remains in the subsequent writing period. Therefore, if excessive priming occurs during the writing period, crosstalk is likely to occur. However, in the present embodiment, as described above, since the interlaced address operation is not affected by the priming of the discharge cell that performed the address discharge immediately before, the stable address operation without causing crosstalk. It can be performed.

Also, a scan pulse Va applied to the scan pulse Va and third row of the scan electrodes SC ₃ applied to the scan electrodes SC ₁ in the first row are overlapped in time by time t. Therefore, the writing time can be shortened.

Next, in the third row of the scan pulse Va time applied earlier by time t than the time to end of the scanning electrodes SC _3, applied with a scan pulse Va to scan electrode SC ₅ row 5, line 5 An address pulse Vd is applied to the data electrode _Dk of the discharge cell to be displayed on the eye, and the address operation of the discharge cell in the fifth row is performed.

Similarly, the discharge operation of the odd-numbered discharge cells is performed by so-called interlaced scanning such as the seventh row, the ninth row,..., And then the second row, the fourth row,. An address operation of the discharge cells in the even-numbered rows is performed by interlaced scanning. The addressing operation at this time is also not affected by the priming of the discharge cell that performed the address discharge immediately before by performing the interlaced addressing operation, so that a stable addressing operation can be performed without causing crosstalk. it can. Further, with respect to the timing of applying the scan pulse Va, the scan pulse Va applied to each of the two scan electrodes SC _i and SC _{i + 2} of the discharge cell that performs the address operation successively overlaps with each other by time t. .

  As described above, the address operation for the discharge cells in all rows is completed.

  Since the operation in the subsequent sustain period is the same as that in the first SF except for the number of sustain pulses, the description thereof is omitted.

  Subsequent initialization periods and sustain periods of the eighth to tenth SFs also perform substantially the same operation as the first SF, and the writing period also performs the interlaced writing operation similar to the seventh SF.

  As described above, in this embodiment, in the address period of the subfield with a small luminance weight, the scan pulse is applied in the order that the scan electrode to which the scan pulse is applied and the scan electrode to which the scan pulse is subsequently applied are adjacent. In the writing period of the subfield having a large luminance weight, the scanning pulse is applied in the order in which the scanning electrode to which the scanning pulse is applied and the scanning electrode to which the scanning pulse is subsequently applied are not adjacent to each other. In particular, sequential writing operations are performed during the writing period of the subfield with the smallest luminance weight, and interlaced writing operations are performed during the writing period of the subfield with the largest luminance weight, thereby suppressing occurrence of crosstalk and non-lighting. High-quality image display that suppresses the generation of cells is performed.

  In order to perform high-quality image display, it is important to surely generate an address discharge in a discharge cell to emit light and not generate an address discharge in a discharge cell that does not emit light. On the other hand, the address discharge is greatly affected by priming. If too much priming occurs, the probability of crosstalk increases, and if too low, the probability of non-lighting increases. The amount of priming greatly depends on the image to be displayed.

  For example, when displaying an image with low luminance, the discharge cells are caused to emit light mainly in subfields with a small luminance weight, and the discharge cells are not caused to emit much light in subfields with a large luminance weight. . Therefore, although priming in the address period tends to be insufficient, in this embodiment, the address operation of the subfield with a small luminance weight is a sequential address operation, and when adjacent discharge cells perform the address operation immediately before, Since the generated priming can be used, the discharge delay can be shortened to prevent unlighting. In this way, the generation of unlit cells is suppressed by sequentially performing the writing of subfields with small luminance weights.

  On the other hand, when an image with high luminance is displayed, many discharge cells perform sustain discharge during the sustain period of the subfield having a large luminance weight, and many priming occurs accordingly. In the sub-field writing period following the sub-field having a large luminance weight, there is already sufficient priming that has occurred during these sustain periods. If excessive priming occurs, crosstalk may occur and image display quality may be degraded. is there. However, in this embodiment, the subfield write operation with a large luminance weight is an interlaced write operation and is not affected by the priming associated with the write discharge of the adjacent cell, so that the occurrence of crosstalk can be suppressed. In the present embodiment, the first SF is a subfield following the tenth SF having the largest luminance weight, but the initialization period of the first SF is a long-time all-cell initialization, so the first SF is in the sustain period of the tenth SF. The generated priming almost converges by the writing period of the first SF. Therefore, the write operation of the first SF may be a sequential write operation.

  Note that the overlap time in the interlaced address operation can be set to a time range shorter than the discharge delay time, for example, 400 ns, but the present invention is not limited to the overlap time and may not overlap.

  In the present embodiment, one field is divided into 10 subfields (first SF, second SF,..., 10th SF), and each subfield is (1, 2, 3, 6, 11, 18). , 30, 44, 60, 80). However, the number of subfields and the luminance weight are not limited to these, and can be freely set as necessary. In the present embodiment, the initialization operation of the first SF has been described as the all-cell initialization operation, and the initialization operation of the other subfields is the selective initialization operation. You may set it freely for each field. However, by mixing the subfield that performs the all-cell initializing operation and the subfield that performs the selective initializing operation, it is possible to suppress the light emission luminance associated with the initializing discharge, so that it is possible to display an image with good contrast. it can.

  Furthermore, in the present embodiment, the sequential address operation or the interlace address operation is selected depending on the luminance weight of the subfield, but the amount of priming by the sustain discharge is the ratio of the discharge cells that perform the sustain discharge in the subfield, that is, Since it also depends on the lighting rate, sequential writing operation or interlaced writing operation may be selected depending on the luminance weight of the subfield and the lighting rate.

  The panel driving method of the present invention is useful as a panel driving method because it can suppress the occurrence of crosstalk and the generation of unlit cells.

The disassembled perspective view which shows the principal part of the panel used for embodiment of this invention. Electrode arrangement diagram of panel used in the embodiment of the present invention Circuit block diagram of plasma display device in accordance with exemplary embodiment of the present invention The figure which shows the drive voltage waveform applied to each electrode of the panel used for embodiment of this invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Panel 22 Scan electrode 23 Sustain electrode 32 Data electrode 51 Image signal processing circuit 52 Data electrode drive circuit 53 Scan electrode drive circuit 54 Sustain electrode drive circuit 55 Timing generation circuit

Claims (3)

A plurality of scan electrodes and sustain electrodes arranged in parallel; and a plurality of data electrodes arranged in a direction intersecting with the scan electrodes and the sustain electrodes; and an intersection of the scan electrodes, the sustain electrodes and the data electrodes A method of driving a plasma display panel having a large number of discharge cells formed thereon,
One field period of the image signal is composed of a plurality of subfields having an initialization period, an address period, and a sustain period,
In the initialization period, an initialization discharge is generated to form wall charges necessary for subsequent address discharge in the discharge cells,
In the address period, a scan pulse is applied to the scan electrode and an address pulse is selectively applied to the data electrode to generate an address discharge in the discharge cell,
In the sustain period, a sustain discharge for causing a discharge cell that has generated an address discharge to emit light by applying a number of sustain pulses proportional to the luminance weight set for each subfield to the scan electrode and the sustain electrode. Is generated,
In the address period of the subfield having the smallest luminance weight, the scan pulse is applied to the scan electrode in the order in which the scan electrode to which the scan pulse is applied and the scan electrode to which the scan pulse is subsequently applied are adjacent,
In the writing period of the subfield having the largest luminance weight, the scan pulse is applied to the scan electrode in the order in which the scan electrode to which the scan pulse is applied and the scan electrode to which the scan pulse is applied are not adjacent to each other. Display panel drive method. The method of driving a plasma display panel according to claim 1, wherein the scan pulses are temporally overlapped when the scan pulses are applied in the adjacent order. The plurality of subfields are selectively initialized by a subfield having an initializing period in which an initializing discharge is generated in all discharge cells performing image display, and a discharge cell in which a sustain discharge has been generated in the immediately preceding subfield. The method of claim 1, further comprising: a subfield having an initialization period for generating the plasma display panel.

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