JP2007116110A - 窒化物系半導体素子の製造方法 - Google Patents
窒化物系半導体素子の製造方法 Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
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- H—ELECTRICITY
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- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/018—Bonding of wafers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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- H01L2221/6835—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
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- Recrystallisation Techniques (AREA)
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Abstract
【解決手段】窒化物系半導体素子の製造方法は、Inを含む剥離層を基板上に形成する工程と、剥離層上に窒化物系半導体層を形成する工程と、剥離層の温度上昇によって剥離層の分解を生じる工程と、レーザ光を剥離層に照射する工程と、基板から窒化物系半導体層を分離する工程とを含む。
【選択図】図1
Description
以下において、本発明の第1実施形態に係る発光ダイオードの製造方法について、図1〜7を参照しながら説明する。図1は、本発明の第1実施形態に係る発光ダイオードの製造方法のフロー図である。
以上説明した本発明に係る第1実施形態の発光ダイオードの製造方法によれば、剥離層10を成長基板50上に形成し、温度を上昇させることで剥離層10の分解が生じるため、剥離層10の組成比を調整することなくバンドギャップエネルギーを低くすることができる。
以下、本発明の第2実施形態に係る窒化物系半導体レーザの製造方法の各ステップについて図1及び図8〜図13を参照しながら更に説明する。
以下において、分解前の剥離層と分解後の剥離層とについて、剥離層に照射されるレーザ光の波長と吸収率との関係を比較した。図14は、分解前の剥離層と分解後の剥離層における波長と吸収率との関係を示す図である。なお、図14において、横軸は光の波長であり、縦軸は光の吸収率である。
本発明は上記の実施形態によって記載したが、この開示の一部をなす論述及び図面はこの発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施形態、実施形態及び運用技術が明らかとなろう。
13、23…n型クラッド層、14、24…活性層、15、25…p型キャップ層、
16、26…p型クラッド層、17、27…p型コンタクト層、18…p型電極、19…n型電極、
30…n型光ガイド層、31…p型光ガイド層、32…電流ブロック層、
33…p側オーミック電極、34…p側パッド電極、35…n側オーミック電極、
36…n側パッド電極、50、60…成長基板、51、61…支持基板、52、62…融着層
53、63…分離線、64…リッジ部、100、101…窒化物系半導体層、
200、201…窒化物系半導体素子
Claims (5)
- Inを含む剥離層を基板上に形成する工程と、
前記剥離層上に窒化物系半導体層を形成する工程と、
前記剥離層の温度上昇によって前記剥離層の分解を生じる工程と、
レーザ光を前記剥離層に照射する工程と、
前記基板から前記窒化物半導体を分離する工程とを含むことを特徴とする窒化物系半導体素子の製造方法。 - 前記剥離層は、組成比で18%以上のInを有するInGaNからなることを特徴とする請求項1に記載の窒化物系半導体素子の製造方法。
- 前記レーザ光のフォトンエネルギーは、前記基板のバンドギャップエネルギーよりも低いことを特徴とする請求項1又は請求項2に記載の窒化物系半導体素子の製造方法。
- 前記レーザ光のフォトンエネルギーは、前記窒化物系半導体層を形成する各層のバンドギャップエネルギーより低いことを特徴とする請求項1乃至請求項3のいずれかに記載の窒化物系半導体素子の製造方法。
- 前記レーザ光のフォトンエネルギーは、分解が生じた前記剥離層のバンドギャップエネルギーよりも大きいことを特徴とする請求項1乃至請求項4のいずれかに記載の窒化物系半導体素子の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006249883A JP2007116110A (ja) | 2005-09-22 | 2006-09-14 | 窒化物系半導体素子の製造方法 |
US11/524,258 US7759219B2 (en) | 2005-09-22 | 2006-09-21 | Method of manufacturing nitride semiconductor device |
CN2006101543636A CN1937271B (zh) | 2005-09-22 | 2006-09-22 | 氮化物类半导体元件的制造方法 |
AT06254913T ATE518256T1 (de) | 2005-09-22 | 2006-09-22 | Verfahren zur herstellung eines nitrid-halbleiter-bauelements |
EP06254913A EP1768194B1 (en) | 2005-09-22 | 2006-09-22 | Method of manufacturing nitride semiconductor device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005276854 | 2005-09-22 | ||
JP2006249883A JP2007116110A (ja) | 2005-09-22 | 2006-09-14 | 窒化物系半導体素子の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2007116110A true JP2007116110A (ja) | 2007-05-10 |
Family
ID=37429254
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006249883A Pending JP2007116110A (ja) | 2005-09-22 | 2006-09-14 | 窒化物系半導体素子の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7759219B2 (ja) |
EP (1) | EP1768194B1 (ja) |
JP (1) | JP2007116110A (ja) |
CN (1) | CN1937271B (ja) |
AT (1) | ATE518256T1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009027003A (ja) * | 2007-07-20 | 2009-02-05 | Sanyo Electric Co Ltd | 半導体レーザ素子およびその製造方法 |
JP2011233861A (ja) * | 2010-04-09 | 2011-11-17 | Sumitomo Electric Ind Ltd | 半導体デバイスの製造方法、エピ成長用積層支持基板およびデバイス用積層支持基板 |
JP2013128150A (ja) * | 2013-03-26 | 2013-06-27 | Toyoda Gosei Co Ltd | Iii族窒化物半導体からなる発光素子の製造方法 |
JP2016533034A (ja) * | 2013-08-08 | 2016-10-20 | ソイテック | 電磁照射によって基板から構造を分離するための、処理、スタック、およびアセンブリ |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080303033A1 (en) * | 2007-06-05 | 2008-12-11 | Cree, Inc. | Formation of nitride-based optoelectronic and electronic device structures on lattice-matched substrates |
US7915643B2 (en) * | 2007-09-17 | 2011-03-29 | Transphorm Inc. | Enhancement mode gallium nitride power devices |
JP2010177390A (ja) * | 2009-01-29 | 2010-08-12 | Sony Corp | 素子の移載方法および表示装置の製造方法 |
CN102699537B (zh) * | 2012-05-18 | 2015-11-04 | 杭州士兰明芯科技有限公司 | 激光剥离led衬底的系统及方法 |
CN106887505B (zh) * | 2017-04-24 | 2019-07-16 | 芜湖聚飞光电科技有限公司 | 一种单面发光芯片级led的制作方法 |
DE102018202707A1 (de) | 2018-02-22 | 2019-08-22 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Erzeugung von Panoramabildern |
Citations (4)
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JP2000101139A (ja) * | 1998-09-25 | 2000-04-07 | Toshiba Corp | 半導体発光素子及びその製造方法並びに半導体発光装置 |
JP2001119104A (ja) * | 1999-10-21 | 2001-04-27 | Matsushita Electric Ind Co Ltd | 半導体の製造方法 |
JP2002319702A (ja) * | 2001-04-19 | 2002-10-31 | Sony Corp | 窒化物半導体素子の製造方法、窒化物半導体素子 |
JP2005093988A (ja) * | 2003-08-08 | 2005-04-07 | Sumitomo Electric Ind Ltd | 半導体発光素子及びその製造方法 |
Family Cites Families (8)
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US5684309A (en) * | 1996-07-11 | 1997-11-04 | North Carolina State University | Stacked quantum well aluminum indium gallium nitride light emitting diodes |
US6071795A (en) | 1998-01-23 | 2000-06-06 | The Regents Of The University Of California | Separation of thin films from transparent substrates by selective optical processing |
JP4524953B2 (ja) | 2001-05-18 | 2010-08-18 | パナソニック株式会社 | 窒化物半導体基板の製造方法および窒化物半導体装置の製造方法 |
US6455340B1 (en) * | 2001-12-21 | 2002-09-24 | Xerox Corporation | Method of fabricating GaN semiconductor structures using laser-assisted epitaxial liftoff |
JP4117156B2 (ja) | 2002-07-02 | 2008-07-16 | 日本電気株式会社 | Iii族窒化物半導体基板の製造方法 |
JP2004072052A (ja) | 2002-08-09 | 2004-03-04 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US7056810B2 (en) * | 2002-12-18 | 2006-06-06 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor apparatus, and semiconductor apparatus and electric appliance |
US7341880B2 (en) | 2003-09-17 | 2008-03-11 | Luminus Devices, Inc. | Light emitting device processes |
-
2006
- 2006-09-14 JP JP2006249883A patent/JP2007116110A/ja active Pending
- 2006-09-21 US US11/524,258 patent/US7759219B2/en not_active Expired - Fee Related
- 2006-09-22 AT AT06254913T patent/ATE518256T1/de not_active IP Right Cessation
- 2006-09-22 CN CN2006101543636A patent/CN1937271B/zh not_active Expired - Fee Related
- 2006-09-22 EP EP06254913A patent/EP1768194B1/en not_active Not-in-force
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2000101139A (ja) * | 1998-09-25 | 2000-04-07 | Toshiba Corp | 半導体発光素子及びその製造方法並びに半導体発光装置 |
JP2001119104A (ja) * | 1999-10-21 | 2001-04-27 | Matsushita Electric Ind Co Ltd | 半導体の製造方法 |
JP2002319702A (ja) * | 2001-04-19 | 2002-10-31 | Sony Corp | 窒化物半導体素子の製造方法、窒化物半導体素子 |
JP2005093988A (ja) * | 2003-08-08 | 2005-04-07 | Sumitomo Electric Ind Ltd | 半導体発光素子及びその製造方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009027003A (ja) * | 2007-07-20 | 2009-02-05 | Sanyo Electric Co Ltd | 半導体レーザ素子およびその製造方法 |
JP2011233861A (ja) * | 2010-04-09 | 2011-11-17 | Sumitomo Electric Ind Ltd | 半導体デバイスの製造方法、エピ成長用積層支持基板およびデバイス用積層支持基板 |
JP2013128150A (ja) * | 2013-03-26 | 2013-06-27 | Toyoda Gosei Co Ltd | Iii族窒化物半導体からなる発光素子の製造方法 |
JP2016533034A (ja) * | 2013-08-08 | 2016-10-20 | ソイテック | 電磁照射によって基板から構造を分離するための、処理、スタック、およびアセンブリ |
Also Published As
Publication number | Publication date |
---|---|
EP1768194A2 (en) | 2007-03-28 |
CN1937271A (zh) | 2007-03-28 |
US20070066037A1 (en) | 2007-03-22 |
EP1768194B1 (en) | 2011-07-27 |
EP1768194A3 (en) | 2009-12-09 |
ATE518256T1 (de) | 2011-08-15 |
CN1937271B (zh) | 2011-03-09 |
US7759219B2 (en) | 2010-07-20 |
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