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JP2007088220A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
JP2007088220A
JP2007088220A JP2005275389A JP2005275389A JP2007088220A JP 2007088220 A JP2007088220 A JP 2007088220A JP 2005275389 A JP2005275389 A JP 2005275389A JP 2005275389 A JP2005275389 A JP 2005275389A JP 2007088220 A JP2007088220 A JP 2007088220A
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JP
Japan
Prior art keywords
connection
bonding
wire
ball
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005275389A
Other languages
Japanese (ja)
Inventor
Takahiro Nishi
孝洋 西
Kazuo Sudo
一雄 須藤
Takeshi Sato
健 佐藤
Akira Deura
晃 出浦
Iwamichi Kamishiro
岩道 神代
Hiroshi Ono
洋 小野
Sakae Kikuchi
栄 菊池
Toshiji Niitsu
利治 新津
Mamoru Ito
護 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
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Renesas Technology Corp
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Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2005275389A priority Critical patent/JP2007088220A/en
Publication of JP2007088220A publication Critical patent/JP2007088220A/en
Pending legal-status Critical Current

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    • H01L2224/0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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Abstract

<P>PROBLEM TO BE SOLVED: To improve the connection reliability of a semiconductor chip using wire bonding technology. <P>SOLUTION: A ball bonding operation 21a is carried out as a first connection 21 using a ball formed on the tip of a capillary at the side of a semiconductor chip 15a. A thermocompression bonding operation 22a that crushes and fixes the wire by pressure with the tip of the capillary is carried out as a second connection 22 at the side of a semiconductor chip 15b. Thereafter, a ball is formed on the tip of the capillary at the side of the second connection 22, and a ball bonding operation 22b is carried. As mentioned above, the ball bonding operation 22b is carried out last, whereby the thermocompression bonding 22a is improved in strength. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は半導体装置の製造に関し、特に、ワイヤボンディングの技術を用いてその接続信頼性を高めるのに適用して有効な技術である。   The present invention relates to the manufacture of a semiconductor device, and in particular, is a technique that is effective when applied to increase the connection reliability using a wire bonding technique.

以下に説明する技術は、本発明を研究、完成するに際し、本発明者によって検討されたものであり、その概要は次のとおりである。   The technology described below has been studied by the present inventors in researching and completing the present invention, and the outline thereof is as follows.

これまでの半導体装置の構成では、半導体チップとベース基板、あるいは半導体チップとリードフレームの電気的接続は、ワイヤボンディングによりなされている。   In the configuration of the conventional semiconductor device, the electrical connection between the semiconductor chip and the base substrate or between the semiconductor chip and the lead frame is made by wire bonding.

半導体装置の中には、複数の半導体チップを互いに接続する構成を必要とする場合がある。かかる場合には、上記ワイヤボンディングの手法がそのまま踏襲されていた。すなわち、半導体チップの回路同士を接続するに際して、一度、ベース基板側にワイヤボンディングで電気的接続を行い、その上でベース基板側と別の半導体チップとをワイヤボンディングにより電気的に接続し、その結果として半導体チップ同士の電気的接続が行われるものである。   Some semiconductor devices require a configuration in which a plurality of semiconductor chips are connected to each other. In such a case, the wire bonding method was followed as it was. That is, when connecting the circuits of the semiconductor chips, once the base substrate side is electrically connected by wire bonding, and then the base substrate side and another semiconductor chip are electrically connected by wire bonding, As a result, electrical connection between the semiconductor chips is performed.

一方、パッケージ内にロジックチップとメモリチップとを搭載した構成において、両者をワイヤボンディングで接続することで配線容量を少なくして、チップ間の高速なデータ転送を行えるようにした発明が、特許文献1には開示されている。
特開平11−86546号公報
On the other hand, in a configuration in which a logic chip and a memory chip are mounted in a package, an invention in which both are connected by wire bonding to reduce wiring capacitance and enable high-speed data transfer between chips is disclosed in Patent Literature 1 is disclosed.
JP 11-86546 A

本発明者は、ワイヤボンディングを用いたチップ間接続においては、以下の課題があることを見出した。   The present inventor has found that the following problems exist in interchip connection using wire bonding.

すなわち、一度ベース基板を介してチップ間を接続する方法は、確かにこれまでの接続技術をそのまま活かした技術で、技術の安定性という観点からはその接続信頼性は高い。しかし、かかる構成を採用していたのでは、その小型化が図れないという問題がある。   In other words, the method of connecting the chips once through the base substrate is certainly a technology that utilizes the connection technology so far, and its connection reliability is high from the viewpoint of the stability of the technology. However, if such a configuration is adopted, there is a problem that the size cannot be reduced.

一方、特許文献1には、チップ間接続をワイヤボンディングで行う構成が開示されてはいるが、しかし、ワイヤボンディングに際しての詳細な技術は示されていない。ワイヤボンディングに際しての技術的問題は、何ら説明されていない。   On the other hand, Patent Document 1 discloses a configuration for performing chip-to-chip connection by wire bonding, but does not disclose a detailed technique for wire bonding. No technical problem is described in wire bonding.

そこで、本発明者は、ベース基板を介することなく直接ワイヤボンディングで複数の半導体チップを接続することについて、その構成を具体的に考えて、その問題点の洗い出しを行った。   In view of this, the present inventor has identified the problem of concretely considering the configuration of connecting a plurality of semiconductor chips by direct wire bonding without using a base substrate.

先ず、半導体チップ間のワイヤボンディングによる接続を、これまでのワイヤボンディングの接続技術をそのまま踏襲する形で行った場合について考えた。すなわち、第一の接続側をボールボンディングで行い、第二の接続側をキャピラリでワイヤを潰して圧着する接続の場合である。   First, a case was considered in which connection by wire bonding between semiconductor chips was performed in the form of following the conventional wire bonding connection technology. That is, this is a case where the first connection side is performed by ball bonding, and the second connection side is a connection in which the wire is crushed and crimped by a capillary.

かかる接続方法では、ボールを使用して圧着する第一の接続側に比べて、キャピラリの先端で押し潰すようにして圧着する第二の接続側の強度が低下することが分かった。第二の接続側は、ベース基板に設けられる場合に比べて、チップ厚さ分、ワイヤ下に入り込む樹脂量が多くなり、封止樹脂の熱応力による影響が大きく出て、その分、接続信頼性が低下するのである。   In such a connection method, it was found that the strength of the second connection side, which is crimped by being crushed at the tip of the capillary, is lower than that of the first connection side, which is crimped using a ball. Compared to the case where the second connection side is provided on the base substrate, the amount of resin entering under the wire is increased by the chip thickness, and the influence of the thermal stress of the sealing resin is greatly increased. The nature is reduced.

一方、これまでのワイヤボンディングの方法をそのまま踏襲するのではなく、例えば、第二の接続側では、一度ボールボンディングを打ち、その上にワイヤボンディングを行う方法も考えられる。かかる接続方法を採用すれば、確かに、ボールボンディングを先に打っておくことで、第二の接続側での圧着強度の向上は図れる。   On the other hand, instead of following the conventional wire bonding method as it is, for example, a method of hitting ball bonding once on the second connection side and performing wire bonding thereon is also conceivable. If such a connection method is employed, the bonding strength on the second connection side can be improved by hitting ball bonding first.

しかし、封止樹脂がワイヤ下に入り込む量は、ボールボンディングを打った分さらに多くなり、封止樹脂の熱応力によるダメージをより受け易くなり、やはり接続信頼性の低下が起きるという問題がある。   However, the amount of the sealing resin that enters under the wire is further increased by hitting the ball bonding, which makes the sealing resin more susceptible to damage due to thermal stress, and there is a problem that connection reliability is lowered.

本発明者は、これまでのワイヤボンディングによる接続方法を基本的に踏襲しながらも、チップ間接続におけるワイヤボンディングの接続信頼性を向上させることができないかと考えた。また、かかる対策は、上記チップ間の接続だけではなく、通常の半導体チップとベース基板、あるいはリードフレーム等との接続にも応用できるものであればなお好ましい。   The present inventor thought that the connection reliability of wire bonding in chip-to-chip connection could be improved while basically following the conventional connection method by wire bonding. Further, it is preferable that such a countermeasure is applicable not only to the connection between the chips but also to the connection between a normal semiconductor chip and a base substrate, a lead frame or the like.

本発明の目的は、ワイヤボンディングの技術を用いた半導体チップの接続における接続信頼性の向上を図ることにある。   An object of the present invention is to improve connection reliability in connecting semiconductor chips using wire bonding technology.

本発明の前記ならびにその他の目的と新規な特徴は、本明細書の記述および添付図面から明らかになるであろう。   The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

本願において開示される発明のうち、代表的なものの概要を簡単に説明すれば、次のとおりである。   Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

すなわち、半導体チップのワイヤボンディングによる接続で、第二の接続の熱圧着後にボールボンディングを行ったり、あるいはワイヤループを下方に押し付けて曲げる等して、ワイヤ下方に入り込む封止樹脂の熱応力に対応できるようにした。   In other words, with the bonding of semiconductor chips by wire bonding, ball bonding is performed after thermocompression bonding of the second connection, or the wire loop is pressed downward and bent, etc., to cope with the thermal stress of the sealing resin entering under the wire I was able to do it.

本願において開示される発明のうち、代表的なものによって得られる効果を簡単に説明すれば以下のとおりである。   Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

半導体チップの第二の接続側の熱圧着後にボールボンディングを打つことにより、熱圧着だけで終了させる場合よりも、ワイヤ下方に入り込む封止樹脂による熱応力に勝る接続力を確保し、その接続信頼性を高めることができる。   By hitting ball bonding after thermocompression on the second connection side of the semiconductor chip, it is possible to secure a connection force that surpasses the thermal stress caused by the sealing resin that enters under the wire, compared to the case where it is terminated only by thermocompression. Can increase the sex.

半導体チップのワイヤループを押し下げて曲げることで、ワイヤ下方の樹脂量を少なくし、ワイヤ下方に入り込む封止樹脂による熱応力の影響を排除して、その接続信頼性を高めることができる。   By bending down the wire loop of the semiconductor chip, the amount of resin below the wire can be reduced, the influence of thermal stress due to the sealing resin entering below the wire can be eliminated, and the connection reliability can be improved.

半導体チップのパッド同士を隣接配置して、その両方に跨ぐようにボールボンディングを行うことで、ワイヤ下方の樹脂を実質的になくして、ワイヤ下方に入り込む封止樹脂による熱応力の影響を排除し、その接続信頼性を高めることができる。   By placing the pads of the semiconductor chip adjacent to each other and performing ball bonding so as to straddle both of them, the resin under the wire is substantially eliminated, and the influence of the thermal stress due to the sealing resin entering under the wire is eliminated. The connection reliability can be improved.

以下、本発明の実施の形態を図面に基づいて詳細に説明する。なお、実施の形態を説明するための全図において、同一の部材には原則として同一の符号を付し、その繰り返しの説明は省略する場合がある。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof may be omitted.

(実施の形態1)
図1は、本発明に係わる半導体装置をRFモジュールに構成した様子を模式的に示す断面図である。図2(a)、(b)は、第二の接続側で、熱圧着の後にボールボンディングを打つ手順を示す部分斜視図である。図3(a)、(b)は、本発明に際して検討されたチップ間接続にワイヤボンディングを用いた場合の問題点を示す部分斜視図である。
(Embodiment 1)
FIG. 1 is a cross-sectional view schematically showing a state in which a semiconductor device according to the present invention is configured as an RF module. FIGS. 2A and 2B are partial perspective views showing a procedure for hitting ball bonding after thermocompression bonding on the second connection side. 3 (a) and 3 (b) are partial perspective views showing problems when wire bonding is used for chip-to-chip connection studied in the present invention.

本発明の半導体装置10は、図1に示すように、RFモジュール10a等に構成されている。かかる半導体装置10は、次のようにして製造される。   As shown in FIG. 1, the semiconductor device 10 of the present invention is configured in an RF module 10a and the like. Such a semiconductor device 10 is manufactured as follows.

例えば、図1に示すように、複数枚の絶縁体板(本実施の形態では、5枚のセラミック基板11a〜11eを例示して説明する)を用意し、かかるセラミック基板11a〜11eに複数個のビア12を形成する。このビア12の内部に導電性材料、例えば銅(Cu)または銀を充填する。   For example, as shown in FIG. 1, a plurality of insulator plates (in this embodiment, five ceramic substrates 11a to 11e will be described as an example) are prepared, and a plurality of such ceramic substrates 11a to 11e are prepared. The via 12 is formed. The via 12 is filled with a conductive material such as copper (Cu) or silver.

次に、各々のセラミック基板11a〜11eの表面に導電性材料、例えば銅または銀からなる表面導体パターン13を印刷する。その後、これら5枚のセラミック基板11a〜11eを順次積層し、例えば800〜900℃程度の温度で焼成することにより、図1に示すように、積層基板11を形成する。   Next, a surface conductor pattern 13 made of a conductive material such as copper or silver is printed on the surface of each ceramic substrate 11a to 11e. Thereafter, these five ceramic substrates 11a to 11e are sequentially laminated and fired at a temperature of, for example, about 800 to 900 ° C., thereby forming the laminated substrate 11 as shown in FIG.

このようにして形成された積層基板11を洗浄した後、積層基板11の裏面に導電性材料、例えば銅または銀からなる導体ペーストを印刷する。続いて、例えば150℃以下の温度で導体ペーストを焼き固めることにより、積層基板11の裏面に裏面導体パターン14を形成する。   After cleaning the multilayer substrate 11 formed in this way, a conductive paste made of a conductive material, for example, copper or silver, is printed on the back surface of the multilayer substrate 11. Subsequently, the back conductor pattern 14 is formed on the back surface of the multilayer substrate 11 by baking and solidifying the conductor paste at a temperature of 150 ° C. or less, for example.

さらに、図1に示すように、積層基板11の部品搭載面に、能動素子が形成された半導
体チップ15および受動素子が形成されたチップ部品16等の表面実装部品を搭載する。その後、これら表面実装部品を絶縁性の樹脂17によって覆うことにより、RFモジュール10aが完成する。尚、半導体チップ15、チップ部品16は、半田18を介して搭載されている。
Further, as shown in FIG. 1, surface-mounted components such as a semiconductor chip 15 in which active elements are formed and a chip component 16 in which passive elements are formed are mounted on the component mounting surface of the multilayer substrate 11. Then, the RF module 10a is completed by covering these surface-mounted components with an insulating resin 17. The semiconductor chip 15 and the chip component 16 are mounted via solder 18.

半導体チップ15は、例えば、Si−MOSFET等の電界効果トランジスタに形成されている。半導体チップ15a(15)の主面に形成された複数のパッド(ボンディングパッド、電極等とも言う)と、これに対応する積層基板11の部品搭載面に形成された表面導体パターン13と、あるいは別の半導体チップ15b(15)の主面に形成された複数のパッドとは、接合材により接続されている。ここでは、接合材には、例えば金(Au)の細線からなるワイヤボンディング19が用いられている。   The semiconductor chip 15 is formed in a field effect transistor such as Si-MOSFET, for example. A plurality of pads (also referred to as bonding pads, electrodes, etc.) formed on the main surface of the semiconductor chip 15a (15) and the corresponding surface conductor pattern 13 formed on the component mounting surface of the multilayer substrate 11, or another The plurality of pads formed on the main surface of the semiconductor chip 15b (15) are connected by a bonding material. Here, for example, wire bonding 19 made of fine gold (Au) wires is used as the bonding material.

チップ部品16は、例えばコンデンサ、インダクタ、レジスタまたは空芯コイル等の受動素子に構成されている。チップ部品16の両端に形成された接続端子が、半田を介して、積層基板11の部品搭載面に形成された表面導体パターン13に接続されている。   The chip component 16 is configured as a passive element such as a capacitor, an inductor, a resistor, or an air core coil. Connection terminals formed at both ends of the chip component 16 are connected to the surface conductor pattern 13 formed on the component mounting surface of the multilayer substrate 11 via solder.

かかる構成の半導体装置10では、複数の半導体チップ15a、15b間のチップ間接続は、ワイヤボンディング19a(19)により行われている。かかるワイヤボンディング19aでは、半導体チップ15a側で第一の接続(1st側接続とも言う)21が、半導体チップ15b側で第二の接続(2nd側接続とも言う)22が行われる。   In the semiconductor device 10 having such a configuration, inter-chip connection between the plurality of semiconductor chips 15a and 15b is performed by wire bonding 19a (19). In the wire bonding 19a, the first connection (also referred to as 1st side connection) 21 is performed on the semiconductor chip 15a side, and the second connection (also referred to as 2nd side connection) 22 is performed on the semiconductor chip 15b side.

第一の接続21は、図2(a)に示すように、ボールボンディング21aにより行われている。すなわち、図示はしないが、キャピラリに通されたAuワイヤ等のワイヤ先端が、ボール形成用のトーチにより溶融されてボールが形成され、かかるボールが半導体チップ15aのAl電極等のパッド20上に加熱圧着されてボールボンディング21aが行われている。   As shown in FIG. 2A, the first connection 21 is made by ball bonding 21a. That is, although not shown, a wire tip such as an Au wire passed through the capillary is melted by a ball forming torch to form a ball, and the ball is heated on the pad 20 such as an Al electrode of the semiconductor chip 15a. The ball bonding 21a is performed by pressure bonding.

半導体チップ15a側でボールボンディング21aを行ったキャピラリは、ワイヤを切断することなく、ワイヤループ23を作りながら半導体チップ15bのAl電極等のパッド20上にて、第二の接続22を行う。かかる第二の接続22は、図2(a)、(b)に示すように、2回の工程に分けて行われる。   The capillary which has performed the ball bonding 21a on the semiconductor chip 15a side makes the second connection 22 on the pad 20 such as the Al electrode of the semiconductor chip 15b while forming the wire loop 23 without cutting the wire. The second connection 22 is performed in two steps as shown in FIGS. 2 (a) and 2 (b).

すなわち、図2(a)に示すように、第二の接続22の初めの工程では、キャピラリの先端でワイヤを潰しながら接続位置に、超音波をかけながら熱圧着22aを行う。このようにステッチボンデイングにより、キャピラリの周縁の一部分によりワイヤを圧接するのである。かかる工程で、ワイヤ切断が行われる。その後、第二の接続22では、終わりの工程として、熱圧着22a上に、ボールボンディング22bが行われる。   That is, as shown in FIG. 2A, in the first step of the second connection 22, thermocompression bonding 22a is performed while applying ultrasonic waves to the connection position while crushing the wire at the tip of the capillary. In this way, the wire is pressed by a part of the peripheral edge of the capillary by stitch bonding. In this process, wire cutting is performed. Thereafter, in the second connection 22, as a final step, ball bonding 22b is performed on the thermocompression bonding 22a.

熱圧着22aを行ったキャピラリはワイヤを一度切断し、その後にキャピラリ側のワイヤ先端をトーチにより溶融してボールを形成し、ボールボンディング22bを行う。このように、第二の接続22側では、同じキャピラリを用いて熱圧着22aと、ボールボンディング22bを行うこととなる。   The capillary that has undergone thermocompression bonding 22a cuts the wire once, and then melts the tip of the capillary side wire with a torch to form a ball, and performs ball bonding 22b. Thus, on the second connection 22 side, thermocompression bonding 22a and ball bonding 22b are performed using the same capillary.

第二の接続22では、熱圧着22aの上にボールボンディング22bが施されるため、第二の接続22の強度は高められる。その分、接続信頼性の向上が図られることとなる。   In the second connection 22, since the ball bonding 22b is applied on the thermocompression bonding 22a, the strength of the second connection 22 is increased. Accordingly, the connection reliability is improved.

一方、半導体チップ15aとベースの多層に構成された積層基板11との間の接続には、通常のワイヤボンディング19bが適用されている。すなわち、半導体チップ15側ではボールボンディングが、積層基板11側では熱圧着が行われている。   On the other hand, a normal wire bonding 19b is applied to the connection between the semiconductor chip 15a and the multilayer substrate 11 formed in the base multilayer. That is, ball bonding is performed on the semiconductor chip 15 side, and thermocompression bonding is performed on the laminated substrate 11 side.

図3(a)には、今回の発明において検討されたワイヤボンディング30によるチップ間接続の場合を示した。図3(a)に示すように、半導体チップ31aの側ではボールボンディング32aによる第一の接続32が行われ、半導体チップ31bの側では熱圧着33aで第二の接続33が行われている。ワイヤボンディング30では、接合材としてAuワイヤが用いられている。   FIG. 3A shows a case of chip-to-chip connection by wire bonding 30 studied in the present invention. As shown in FIG. 3A, the first connection 32 by ball bonding 32a is made on the semiconductor chip 31a side, and the second connection 33 is made by thermocompression bonding 33a on the semiconductor chip 31b side. In the wire bonding 30, an Au wire is used as a bonding material.

かかる構成では、第二の接続33側がベースの積層基板11側に接続される場合とは異なり、半導体チップ31bの厚さ分、その接続高さが高くなっている。かかる構成をそのまま樹脂封止した場合には、ワイヤループ34の下方に入り込む樹脂量が多くなり、結果として、かかる封止樹脂の熱応力による影響を大きく受けることとなる。   In such a configuration, unlike the case where the second connection 33 side is connected to the base laminated substrate 11 side, the connection height is increased by the thickness of the semiconductor chip 31b. When such a configuration is resin-sealed as it is, the amount of resin that enters the wire loop 34 increases, and as a result, it is greatly affected by the thermal stress of the sealing resin.

例えば、繰り返し行われる昇温、降温の温度サイクルによる封止樹脂の熱膨張、熱収縮に伴い、ワイヤループ34がかかる熱応力の影響を受け、最終的には熱圧着33a部分等からのワイヤ切断が起きる。   For example, the wire loop 34 is affected by the thermal stress applied by the thermal expansion and contraction of the sealing resin due to a temperature cycle of repeated temperature increase and decrease, and finally the wire is cut from the thermocompression bonding 33a portion. Happens.

すなわち、ボールを使用して圧着する第一の接続32側に比べて、キャピラリの先端で押し潰すようにして圧着する第二の接続33側の強度が弱くなり、接続信頼性が低下するのである。   That is, the strength of the second connection 33 that is crimped so as to be crushed at the tip of the capillary is weaker than that of the first connection 32 that is crimped using a ball, and connection reliability is reduced. .

しかし、図2に示すように、熱圧着22aの後にボールボンディング22bが施されていれば、かかる熱圧着22a部の強度補強が行われたと同様の効果が発揮され、ワイヤループ23の下方に入り込んだ樹脂17の量が多くても、その熱応力に対応したワイヤ切断等が発生しないのである。   However, as shown in FIG. 2, if ball bonding 22 b is applied after thermocompression bonding 22 a, the same effect as that of reinforcing the strength of the thermocompression bonding 22 a portion is exhibited, and enters below the wire loop 23. Even if the amount of the resin 17 is large, wire cutting or the like corresponding to the thermal stress does not occur.

(実施の形態2)
本実施の形態では、半導体チップ15bでの第二の接続22側の熱圧着22aを、ボールボンディング24の後に行うものである。すなわち、図4(a)、(b)に示すように、第二の接続22のボンディング工程では、最初にボールボンディング24を打ち、その後に熱圧着22aを行い、最後にボールボンディング22bを行うものである。半導体チップ15a側での第一の接続21は、前記実施の形態で述べたと同様、ボールボンディング21aが行われる。
(Embodiment 2)
In the present embodiment, the thermocompression bonding 22 a on the second connection 22 side in the semiconductor chip 15 b is performed after the ball bonding 24. That is, as shown in FIGS. 4A and 4B, in the bonding process of the second connection 22, the ball bonding 24 is first performed, the thermocompression bonding 22a is performed thereafter, and the ball bonding 22b is performed finally. It is. In the first connection 21 on the semiconductor chip 15a side, ball bonding 21a is performed as described in the above embodiment.

かかる構成は、図3(b)に示す今回の発明において検討されたワイヤボンディング30によるチップ間接続の場合に対応するものである。すなわち、図3(b)に示すように、半導体チップ31aの側ではボールボンディング32aによる第一の接続32が行われ、半導体チップ31bの側ではボールボンディング35の後に熱圧着33aで第二の接続33が行われている。   Such a configuration corresponds to the case of chip-to-chip connection by wire bonding 30 examined in the present invention shown in FIG. That is, as shown in FIG. 3B, the first connection 32 is made by ball bonding 32a on the semiconductor chip 31a side, and the second connection is made by thermocompression bonding 33a after the ball bonding 35 on the semiconductor chip 31b side. 33 is performed.

かかる第二の接続33側では、一度ボールボンディング35を打ち、その上から熱圧着33aが行われているので、確かに、第二の接続33側での圧着強度の向上は図られている。しかし、ボールボンディング35を打った分、第二の接続33側の高さが高くなり、ワイヤループ34の下に入り込む樹脂量が多くなっている。そのため、熱応力のダメージを受け易くなり、接続信頼性の低下という問題が発生する。   On the second connection 33 side, the ball bonding 35 is once struck, and the thermocompression bonding 33a is performed thereon. Therefore, the compression bonding strength on the second connection 33 side is certainly improved. However, as the ball bonding 35 is struck, the height on the second connection 33 side increases, and the amount of resin that enters under the wire loop 34 increases. Therefore, it becomes easy to receive the damage of a thermal stress, and the problem that connection reliability falls arises.

しかし、かかる問題は、図4(b)に示すように、第二の接続22側の最終の工程をボールボンディング22bで終了させることで熱圧着22aを補強し、ワイヤ下方に入り込む樹脂17の量が増えてもその熱応力に勝る接続力を得ることで解決することができる。   However, as shown in FIG. 4B, such a problem is that the final process on the second connection 22 side is finished with the ball bonding 22b to reinforce the thermocompression bonding 22a, and the amount of the resin 17 that enters below the wire. Even if it increases, it can be solved by obtaining a connecting force superior to the thermal stress.

(実施の形態3)
前記実施の形態では、ワイヤボンディング19aを半導体チップ15a、15bのチップ間接続に使用する場合を示したが、第二の接続22側をボールボンディング22bで補強する構成は、チップ間接続にのみ適用し得るものではない。
(Embodiment 3)
In the above embodiment, the case where the wire bonding 19a is used for inter-chip connection of the semiconductor chips 15a and 15b has been described. However, the configuration in which the second connection 22 side is reinforced by the ball bonding 22b is applied only for inter-chip connection. It is not possible.

すなわち、図5(a)、(b)に示すように、半導体チップ15とベース側となる積層基板11上のAuパッド等に構成されたパッド20とのワイヤボンディング19bにも、十分に適用できるものである。   That is, as shown in FIGS. 5A and 5B, the present invention can be sufficiently applied to the wire bonding 19b between the semiconductor chip 15 and the pad 20 formed as an Au pad or the like on the laminated substrate 11 on the base side. Is.

半導体チップ15側での接続は、ボールボンディング21aで第一の接続21を行う。第二の接続22は、積層基板11のパッド20上で行う。例えば、パッド20上での第二の接続22側を、最初に熱圧着22aで行った後に、ボールボンディング22bをその上から打てばよい。かかる構成を採用することにより、第二の接続22側での圧着強度を増すことができる。   For the connection on the semiconductor chip 15 side, the first connection 21 is made by ball bonding 21a. The second connection 22 is made on the pad 20 of the multilayer substrate 11. For example, after the second connection 22 side on the pad 20 is first made by the thermocompression bonding 22a, the ball bonding 22b may be hit from above. By adopting such a configuration, the pressure bonding strength on the second connection 22 side can be increased.

(実施の形態4)
前記実施の形態では、ワイヤループ23の下方に入り込む樹脂17による影響を、第二の接続22側をボールボンディング22bで強化することで対応する場合について説明した。本実施の形態ではワイヤループ23の下方に入り込む樹脂17の量を減らすことで、その対応を図るものである。
(Embodiment 4)
In the above-described embodiment, the case where the influence of the resin 17 entering below the wire loop 23 is dealt with by strengthening the second connection 22 side with the ball bonding 22b has been described. In the present embodiment, the amount of the resin 17 that enters the lower part of the wire loop 23 is reduced to cope with it.

本実施の形態の半導体装置10は、前記実施の形態1で説明したと同様にRFモジュール10a等に構成されている。半導体チップ15a、15b間のワイヤボンディング19aを除いては、図6に示すように、前記実施の形態1で説明したと同様の方法で製造される。繰り返しの説明は、省略する。   The semiconductor device 10 of the present embodiment is configured in the RF module 10a and the like as described in the first embodiment. Except for the wire bonding 19a between the semiconductor chips 15a and 15b, as shown in FIG. 6, it is manufactured by the same method as described in the first embodiment. The repeated description is omitted.

半導体チップ15a、15bを接続するワイヤボンディング19a(19)は、図6に示すように、ワイヤループ23の形状が上から下方に押し付け曲げられた形状に構成されている。すなわちワイヤループ23には、曲げ部分40が設けられている。   As shown in FIG. 6, the wire bonding 19a (19) for connecting the semiconductor chips 15a and 15b has a shape in which the shape of the wire loop 23 is bent by pressing downward from above. That is, the wire loop 23 is provided with a bent portion 40.

図7に、チップ間のワイヤボンディング19aの様子を拡大して示した。ワイヤループ23の下方に入り込む樹脂17の量を、ワイヤループ23を押し下げて曲げるように曲げ部分40を設けることで少なくすることができる。かかる構成を採用することで、ワイヤループ23の下方に入り込む樹脂17の熱膨張、熱収縮等の熱応力に対応した影響を抑えることができる。   FIG. 7 shows an enlarged view of the wire bonding 19a between the chips. The amount of the resin 17 entering below the wire loop 23 can be reduced by providing the bent portion 40 so that the wire loop 23 is pushed down and bent. By adopting such a configuration, it is possible to suppress the influence corresponding to thermal stress such as thermal expansion and thermal contraction of the resin 17 entering under the wire loop 23.

かかる構成を採用しない場合には、例えば、チップ間接続では、第二の接続22を形成する側は、ベースの積層基板11に接続する場合より、半導体チップ15bの厚み分その高さが高く設定されることとなる。そのため、ワイヤループ23の下方に入り込む樹脂量がどうしても多くなり、樹脂17の熱応力の影響を受けることとなる。   When such a configuration is not adopted, for example, in the chip-to-chip connection, the height of the side on which the second connection 22 is formed is set higher by the thickness of the semiconductor chip 15b than in the case of connecting to the base laminated substrate 11. Will be. Therefore, the amount of resin that enters the lower portion of the wire loop 23 inevitably increases and is affected by the thermal stress of the resin 17.

図6に示すように、ワイヤループ23に曲げ部分40を形成することで、入り込む樹脂量を少なくして、その熱応力による影響を抑えることの有効性は、例えば、チップ間接続の第二の接続22側で顕著に確認することができる。   As shown in FIG. 6, by forming the bent portion 40 in the wire loop 23, the effectiveness of reducing the amount of resin entering and suppressing the influence due to the thermal stress is, for example, the second connection between chips. This can be confirmed remarkably on the connection 22 side.

かかる構成では、図8に示すように、半導体チップ15a側の第一の接続21はボールボンディング21aで行われ、半導体チップ15b側の第二の接続22は熱圧着22aで行われている。半導体チップ15a、15b間のワイヤボンディング19aには、Auワイヤ等の接合材が使用されている。   In this configuration, as shown in FIG. 8, the first connection 21 on the semiconductor chip 15a side is made by ball bonding 21a, and the second connection 22 on the semiconductor chip 15b side is made by thermocompression bonding 22a. A bonding material such as an Au wire is used for the wire bonding 19a between the semiconductor chips 15a and 15b.

このように、かかる構成を採用すれば、ワイヤループ23の形状のみを変更することで、半導体チップ15a、15bでのワイヤボンディング19aのボンディング技術は何ら変更することなく、これまでの方法を踏襲することができる。   In this way, by adopting such a configuration, by changing only the shape of the wire loop 23, the bonding technique of the wire bonding 19a with the semiconductor chips 15a and 15b is not changed, and the conventional method is followed. be able to.

ワイヤループ23を押し下げて曲げ部分40を作る構成は、例えば、図9に示すように、ワイヤボンディング19aに使用するツールのキャピラリ50の側方に、ワイヤガイド51を設けることで行うことができる。かかるワイヤガイド51は、例えば、キャピラリ50と同様に下降することができるように、キャピラリ50に一体に設けておけばよい。   For example, as shown in FIG. 9, the wire loop 23 is pushed down to form the bent portion 40 by providing a wire guide 51 on the side of the capillary 50 of the tool used for the wire bonding 19a. For example, the wire guide 51 may be provided integrally with the capillary 50 so that the wire guide 51 can be lowered similarly to the capillary 50.

例えば、ワイヤガイド51は、ワイヤループ23を作る際に移動するキャピラリ50の移動方向に対して、キャピラリ50の後続位置に設けられている。さらに、ワイヤガイド51は、キャピラリ50が移動する際に引きだすワイヤを、キャピラリ50の先端近くの位置で上方から押さえるように、横方向に延ばされた腕部分52の下方を通るように構成されている。   For example, the wire guide 51 is provided at a position subsequent to the capillary 50 with respect to the moving direction of the capillary 50 that moves when the wire loop 23 is formed. Further, the wire guide 51 is configured to pass below the arm portion 52 that is extended in the lateral direction so that the wire drawn when the capillary 50 moves is pressed from above at a position near the tip of the capillary 50. ing.

かかる構成のキャピラリ50、ワイヤガイド51を用いて、先ず、図9に示すように、半導体チップ15a側では第一の接続21でボールボンディング21aを行う。キャピラリ50に通されたAuワイヤ等のワイヤの先端は、ボール形成用のトーチにより溶融されてボールが形成され、かかるボールが半導体チップ15aのAl電極等に構成されたパッド20上に加熱圧着されてボールボンディング21aが行われる。   Using the capillary 50 and the wire guide 51 having such a configuration, first, as shown in FIG. 9, ball bonding 21a is performed with the first connection 21 on the semiconductor chip 15a side. The tip of a wire such as an Au wire passed through the capillary 50 is melted by a ball forming torch to form a ball, and the ball is heated and pressure-bonded onto the pad 20 formed on the Al electrode or the like of the semiconductor chip 15a. Thus, ball bonding 21a is performed.

半導体チップ15a側でボールボンディング21を行ったキャピラリ50は、ワイヤを切断することなく、第一の接続21の位置より上方に持ち上げられ、さらに第二の接続22側に向けて下降することとなる。この際に、ワイヤループ23を作りながら半導体チップ15bのパッド20上で、第二の接続22が行われる。   The capillary 50 that has performed the ball bonding 21 on the semiconductor chip 15a side is lifted upward from the position of the first connection 21 and further lowered toward the second connection 22 side without cutting the wire. . At this time, the second connection 22 is made on the pad 20 of the semiconductor chip 15 b while forming the wire loop 23.

かかる場合に、キャピラリ50の側方にはワイヤガイド51が設けられているため、キャピラリ50に引きずられるワイヤは、ワイヤガイド51の横方向に延ばされた腕部分52の下方にガイドされて、下方に押し下げられた状態にワイヤループ23は曲げ加工されることとなる。   In this case, since the wire guide 51 is provided on the side of the capillary 50, the wire dragged by the capillary 50 is guided below the arm portion 52 extending in the lateral direction of the wire guide 51, The wire loop 23 is bent while being pushed downward.

ワイヤループ23は、キャピラリ50の側方に設けられたワイヤガイド51の腕部分52の下を通されているので、キャピラリ50が下降する際には、ワイヤループ23も下方に押し下げられて、曲げ部分40が形成されることとなる。これにより、ワイヤループ23の下方に入り込む樹脂量を少なく抑えることができる。その結果、ワイヤループ23の下方に入り込んだ樹脂17の熱膨張、熱収縮による熱応力の影響を小さく抑えることができる。   Since the wire loop 23 is passed under the arm portion 52 of the wire guide 51 provided on the side of the capillary 50, when the capillary 50 is lowered, the wire loop 23 is also pushed downward and bent. A portion 40 will be formed. As a result, the amount of resin entering the lower portion of the wire loop 23 can be reduced. As a result, the influence of thermal stress due to thermal expansion and thermal contraction of the resin 17 that has entered the wire loop 23 can be suppressed to a low level.

かかる曲げ部分40を設けない構成では、図10に示すように、ワイヤループ23の箇所で、その下方に入り込んだ樹脂17の熱膨張、熱収縮による熱応力の影響を受け、例えばワイヤループ23に切断等のダメージ53を受けることとなる。しかし、ワイヤループ23を下方に押し下げた状態に曲げ加工することで、ワイヤループ23の下方に入り込む樹脂量を少なくすることができ、かかる問題の解消を図ることができる。   In the configuration in which the bent portion 40 is not provided, as shown in FIG. 10, the wire loop 23 is affected by thermal stress due to thermal expansion and thermal contraction of the resin 17 that has entered under the wire loop 23. Damage 53 such as cutting is received. However, by bending the wire loop 23 so as to be pushed down, the amount of resin that enters the wire loop 23 can be reduced, and this problem can be solved.

本実施の形態では、第一の接続21はボールボンディング21aで行われ、第二の接続22は熱圧着22aで行われるが、第二の接続22側は、例えば、熱圧着22aの後にボールボンディング22bを施してもよい。さらには、ボールボンディング24、熱圧着22a、ボールボンディング22bとから、第二の接続22を構成しても構わない。   In the present embodiment, the first connection 21 is made by ball bonding 21a, and the second connection 22 is made by thermocompression bonding 22a, but the second connection 22 side is, for example, ball bonding after thermocompression bonding 22a. 22b may be applied. Further, the second connection 22 may be constituted by the ball bonding 24, the thermocompression bonding 22a, and the ball bonding 22b.

このように構成すれば、ワイヤループ23に曲げ部分40を設けることで直接的に樹脂量を少なくし、併せてボールボンディング22bを打つことでワイヤループ23の下方に入り込む樹脂17の熱応力に対する接続強度を強化して、第二の接続22側の樹脂17による影響を抑えることができる。   If comprised in this way, the amount of resin will be decreased directly by providing the bending part 40 in the wire loop 23, and also the connection with respect to the thermal stress of the resin 17 which will enter under the wire loop 23 by hitting the ball bonding 22b Strength can be strengthened and the influence of the resin 17 on the second connection 22 side can be suppressed.

(実施の形態5)
前記実施の形態では、キャピラリ50の側方に設けたワイヤガイド51により、ワイヤループ23を下方に押し下げるように曲げ部分40を形成したが、キャピラリ50でワイヤループ23を形成した後で、上方からワイヤループ23を下方に押し下げで曲げ部分40を形成しても構わない。
(Embodiment 5)
In the above embodiment, the bent portion 40 is formed by the wire guide 51 provided on the side of the capillary 50 so as to push the wire loop 23 downward. You may form the bending part 40 by pushing down the wire loop 23 below.

かかる構成では、半導体チップ15a側では、図11(a)に示すように、キャピラリ50によるボールボンディング21aで第一の接続21を行う。その後、キャピラリ50で、Auワイヤ等でワイヤループ23を形成しながら、半導体チップ15b側で第二の接続22を行う。   In such a configuration, on the semiconductor chip 15a side, as shown in FIG. 11A, the first connection 21 is made by ball bonding 21a by the capillary 50. Thereafter, the second connection 22 is made on the semiconductor chip 15b side while forming the wire loop 23 with an Au wire or the like with the capillary 50.

その後、図11(b)に示すように、ワイヤボンディング19aが終了した時点で、ワイヤループ23に曲げ加工を施す。すなわち、第二の接続22が形成された後で、圧着ピン54の腕部分52をワイヤループ23に押し当てて下方に押し下げ、曲げ部分40を設ければよい。かかる構成でも、ワイヤループ23を下方に押し下げた形状に曲げ加工することができ、ワイヤループ23の下方に入り込む樹脂量を少なく抑えることができる。   After that, as shown in FIG. 11B, the wire loop 23 is bent when the wire bonding 19a is completed. That is, after the second connection 22 is formed, the arm portion 52 of the crimping pin 54 is pressed against the wire loop 23 and pushed downward to provide the bent portion 40. Even in such a configuration, the wire loop 23 can be bent into a shape pushed down, and the amount of resin entering the lower portion of the wire loop 23 can be reduced.

(実施の形態6)
本実施の形態では、半導体チップ15とベース側の積層基板11とのワイヤボンディング19bに、ワイヤループ23に曲げ部分40を設けた構成を適用したものである。ワイヤループ23の形状を変化させることで、ワイヤループ23の下方に入り込む樹脂量を抑え、樹脂17による熱膨張、熱収縮の影響を少なくする構成は、図12に示すように、半導体チップ15とベースの積層基板11との接続においても同様にその効果を有するものである。
(Embodiment 6)
In the present embodiment, a configuration in which a bent portion 40 is provided in the wire loop 23 is applied to the wire bonding 19 b between the semiconductor chip 15 and the base-side laminated substrate 11. By changing the shape of the wire loop 23, the amount of resin entering the lower portion of the wire loop 23 is suppressed, and the influence of thermal expansion and contraction due to the resin 17 is reduced. As shown in FIG. The same effect is obtained in connection with the base laminated substrate 11.

すなわち、半導体チップ15のパッド20に、ボールボンディング21aによる第一の接続21を行う。その後、積層基板11のAuパッド等のパッド20上に、ワイヤボンディング19bの第二の接続22を行う。かかる第二の接続22の際に、あるいは形成後に、実施の形態4、5等の技術を用いてワイヤループ23に曲げ部分40を設ければよい。   That is, the first connection 21 by ball bonding 21 a is made to the pad 20 of the semiconductor chip 15. Thereafter, the second connection 22 of the wire bonding 19b is made on the pad 20 such as the Au pad of the multilayer substrate 11. The bent portion 40 may be provided in the wire loop 23 using the technique of the fourth, fifth, etc., at the time of the second connection 22 or after the formation.

かかる構成を採用することにより、これまでの構成に比べてワイヤループ23の下方に入り込む樹脂量が少なくなり、樹脂17の熱応力の影響を受けなくなり、よりその接続信頼性が向上する。   By adopting such a configuration, the amount of resin that enters the lower portion of the wire loop 23 becomes smaller than in the conventional configuration, and is not affected by the thermal stress of the resin 17 and the connection reliability is further improved.

(実施の形態7)
本実施の形態は、ワイヤループ23の下方に入り込む樹脂17を実質的になくすことで、樹脂17による影響を解消しようとするものである。前記実施の形態で示すように、半導体チップ15a、15bの接続は、これまでは、例えば、図13に示すように、全てワイヤボンディング19により接続されている。
(Embodiment 7)
The present embodiment intends to eliminate the influence of the resin 17 by substantially eliminating the resin 17 that enters the lower part of the wire loop 23. As shown in the above-described embodiment, the semiconductor chips 15a and 15b are conventionally connected by wire bonding 19 as shown in FIG.

かかる構成では、ワイヤループ23の下方に入り込む樹脂17の熱応力による影響をさけるために、前記実施の形態で述べたように、第二の接続22側をボールボンディング22bで補強する構成を採用する必要がある。あるいは、ワイヤループ23を下方に押し下げたように曲げ部分40を構成して、直接的に下方に入り込む樹脂量を低減することでその対応を考える必要がある。   In such a configuration, in order to avoid the influence of the thermal stress of the resin 17 entering under the wire loop 23, a configuration in which the second connection 22 side is reinforced by the ball bonding 22b as described in the above embodiment is adopted. There is a need. Alternatively, it is necessary to consider the countermeasure by configuring the bent portion 40 so as to push down the wire loop 23 and reducing the amount of resin directly entering the lower portion.

しかし、前記実施の形態で述べた構成では、その多寡はあるものの、ワイヤループ23の下方に樹脂17が入り込むことでは共通の構成を有している。かかる構成では、樹脂種の熱膨張率等により、その熱応力は多様に変化し、その対応は複雑とならざるを得ない。   However, in the configuration described in the above embodiment, although there are many variations, the resin 17 enters the lower part of the wire loop 23 and has a common configuration. In such a configuration, the thermal stress varies in various ways depending on the thermal expansion coefficient of the resin species, and the response must be complicated.

そこで、本実施の形態では、図14に示すように、接続する半導体チップ15a、15bを隣接配置することで、ワイヤループ23の下方に入り込む樹脂17を無くす構成を採用した。これにより、樹脂17の熱応力の影響を排除することができる。併せて、隣接配置した半導体チップ15a、15bの接続するパッド60a、60b同士も隣接配置し、両パッド60a、60bに跨がるようにボールボンディング25を打つのである。   Therefore, in the present embodiment, as shown in FIG. 14, a configuration is adopted in which the semiconductor chips 15 a and 15 b to be connected are arranged adjacent to each other so that the resin 17 that enters below the wire loop 23 is eliminated. Thereby, the influence of the thermal stress of the resin 17 can be eliminated. In addition, the pads 60a and 60b to which the adjacent semiconductor chips 15a and 15b are connected are also arranged adjacent to each other, and the ball bonding 25 is hit so as to straddle both the pads 60a and 60b.

図14に示すように、半導体チップ15a、15bの厚みは同一に構成され、ベースの積層基板11からの接着高さは同一レベルの高さに揃えられている。かかる構成の半導体チップ15a、15bは、図15に示すように、互いに接続するパッド60a、60bが隣接配置するように並べて設けられている。   As shown in FIG. 14, the semiconductor chips 15a and 15b have the same thickness, and the adhesion height from the base laminated substrate 11 is set to the same level. As shown in FIG. 15, the semiconductor chips 15a and 15b having such a configuration are arranged side by side so that pads 60a and 60b connected to each other are adjacently arranged.

このようにして隣接配置されたパッド60a、60bの両方にかかるように、ボールボンディング25が打たれ、両パッド60a、60bが接続されている。かかる構成では、半導体チップ15a、15bは隣接配置されているので、両パッド60a、60bを接続するボールボンディング25の下方には、実質的に樹脂17が入り込まず、樹脂17の熱膨張、熱収縮等の熱応力の影響を受けることがない。   In this way, the ball bonding 25 is hit so that both the pads 60a and 60b arranged adjacent to each other are applied, and both the pads 60a and 60b are connected. In such a configuration, since the semiconductor chips 15a and 15b are arranged adjacent to each other, the resin 17 does not substantially enter below the ball bonding 25 connecting the pads 60a and 60b, and the resin 17 is thermally expanded and contracted. It is not affected by thermal stress such as.

また、隣接配置される半導体チップ15a、15bの間に、万が一にも樹脂17が入り込んでも、その熱応力に対しては、ボールボンディング25はワイヤボンディング19のワイヤのような影響を受けることがなく接続強度が安定しており、接続信頼性を確保することができる。   In addition, even if the resin 17 enters between the adjacent semiconductor chips 15a and 15b, the ball bonding 25 is not affected by the thermal stress like the wire of the wire bonding 19. Connection strength is stable, and connection reliability can be ensured.

かかる構成を採用するについては、これまでの半導体チップ15におけるパッド位置を、より周縁側に配置する等の対策が必要となる場合もある。   In order to adopt such a configuration, it may be necessary to take measures such as disposing the pad positions on the semiconductor chip 15 so far on the peripheral side.

一方、ベースの積層基板11からの設置高さが異なる半導体チップ15a、15cでは、その設置高さを揃えた状態で、ボールボンディング25を施すことが必要となる。すなわち、図16に示すように、厚い半導体チップ15a側をキャビティ61に収納して、半導体チップ15cとの高さを揃えてある。   On the other hand, in the semiconductor chips 15a and 15c having different installation heights from the base multilayer substrate 11, it is necessary to perform ball bonding 25 in a state where the installation heights are aligned. That is, as shown in FIG. 16, the thick semiconductor chip 15a side is accommodated in the cavity 61, and the height with the semiconductor chip 15c is made uniform.

かかる状態で、両半導体チップ15a、15cは、ボールボンディング25により接続されている。積層基板11側と半導体チップ15a、15cとの接続は、これまでのAuワイヤ等を用いたワイヤボンディング19bが施されている。   In this state, both semiconductor chips 15 a and 15 c are connected by ball bonding 25. The connection between the laminated substrate 11 and the semiconductor chips 15a and 15c has been performed by wire bonding 19b using Au wires or the like so far.

また、図17に示す場合には、深さの異なるキャビティ62、63に半導体チップ15a、15cを設け、両者の高さを揃えた状態で、ボールボンディング25が打たれている。積層基板11側とは、半導体チップ15a、15cは、Auワイヤ等を用いてワイヤボンディング19bで接続されている。   In the case shown in FIG. 17, the semiconductor chips 15a and 15c are provided in the cavities 62 and 63 having different depths, and the ball bonding 25 is struck in a state in which the heights of both are aligned. The semiconductor chips 15a and 15c are connected to the laminated substrate 11 side by wire bonding 19b using Au wires or the like.

かかる構成では、半導体チップ間の接続を、ワイヤボンディングで使用するキャピラリを利用してボールボンディングにより行えるので、新たな装置導入も必要なく、既存の設備で対応することができ、極めて有利な構成である。   In such a configuration, since the connection between the semiconductor chips can be performed by ball bonding using a capillary used for wire bonding, it is not necessary to introduce a new device and can be handled by existing equipment, which is an extremely advantageous configuration. is there.

以上、本発明者によってなされた発明を実施の形態に基づき具体的に説明したが、本発明は前記実施の形態に限定されるものではなく、その要旨を逸脱しない範囲で種々変更可能であることはいうまでもない。   As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

前記実施の形態では、第二の接続側にボールボンディングを打つことと、ワイヤループの曲げ部分を設けることと、接続する半導体チップを隣接配置して両接続をボールボンディングで行うこととは、それぞれ独立して説明したが、かかる構成は互いに併用しても構わない。すなわち、第二の接続にボールボンディングを用いる構成とワイヤループに曲げ部分を設ける構成とを併用したり、あるいは隣接配置した半導体チップの接続をボールボンディングで行うとともに、基板側と半導体チップ側との接続にワイヤループに曲げ部分を設ける構成を採用する等しても構わない。   In the embodiment, hitting the ball bonding on the second connection side, providing a bent portion of the wire loop, and arranging the semiconductor chip to be connected adjacently and performing both connections by ball bonding, respectively, Although described independently, such configurations may be used together. In other words, a configuration in which ball bonding is used for the second connection and a configuration in which a bent portion is provided in the wire loop are used together, or adjacent semiconductor chips are connected by ball bonding, and the substrate side and the semiconductor chip side are connected. For connection, a configuration in which a bent portion is provided in the wire loop may be adopted.

前記実施の形態では、半導体装置としてRFモジュールに構成した場合を例に挙げて説明したが、例えば、パワーモジュール等のマルチチップ型半導体装置に対しても当然に適用できるものである。さらには、半導体装置をモジュールに構成しないで、複数の半導体チップを搭載するものであっても構わない。   In the above-described embodiment, the case where the semiconductor device is configured as an RF module has been described as an example. However, the present invention is naturally applicable to, for example, a multichip semiconductor device such as a power module. Further, the semiconductor device may be mounted on a plurality of semiconductor chips without being configured as a module.

前記実施の形態では、ベースとなる基板側を積層基板に構成した場合を例に挙げて説明したが、かかるベース基板は、積層基板ではなくても勿論構わない。   In the above-described embodiment, the case where the base substrate side is configured as a laminated substrate has been described as an example. However, such a base substrate may not be a laminated substrate.

本発明は、半導体装置の製造方法として把握したが、例えば、ワイヤボンディング方法、ワイヤボンディングを用いた接続方法、チップ間接続方法等と把握することもできるものである。   Although the present invention has been grasped as a method for manufacturing a semiconductor device, it can also be grasped as, for example, a wire bonding method, a connection method using wire bonding, an inter-chip connection method, or the like.

本発明の技術は、半導体チップの接続への封止樹脂の影響を抑制するのに有効に適用することができる。   The technology of the present invention can be effectively applied to suppress the influence of the sealing resin on the connection of the semiconductor chip.

本発明の一実施の形態の半導体装置をRFモジュールに構成した場合を模式的に示す一実施例の断面図である。It is sectional drawing of the Example which shows typically the case where the semiconductor device of one embodiment of this invention is comprised in RF module. (a)、(b)は、第二の接続側で、熱圧着の後にボールボンディングを行う手順を示す部分斜視図である。(A), (b) is a fragmentary perspective view which shows the procedure which performs ball bonding after thermocompression bonding by the 2nd connection side. (a)、(b)は、本発明に際して検討されたチップ間接続にワイヤボンディングを用いた場合の問題点を示す部分斜視図である。(A), (b) is a fragmentary perspective view which shows the problem at the time of using wire bonding for the chip-to-chip connection examined in the present invention. (a)、(b)は、第二の接続側で、ボールボンディング、熱圧着、ボールボンディングの順にボンディングを行う手順を示す部分斜視図である。(A), (b) is a fragmentary perspective view which shows the procedure which performs bonding in order of ball bonding, thermocompression bonding, and ball bonding in the 2nd connection side. (a)、(b)は、半導体チップとベース基板とのワイヤボンディングに第二の接続側でボールボンディングを行った様子を模式的に示す部分斜視図である。(A), (b) is a fragmentary perspective view which shows typically a mode that ball bonding was performed by the 2nd connection side for wire bonding with a semiconductor chip and a base substrate. 本発明の一実施の形態の半導体装置をRFモジュールに構成した場合を模式的に示す一実施例の断面図である。It is sectional drawing of the Example which shows typically the case where the semiconductor device of one embodiment of this invention is comprised in RF module. ワイヤループの形状を変化させる様子を模式的に拡大して示す部分断面図である。It is a fragmentary sectional view which expands and shows a mode that the shape of a wire loop is changed typically. ワイヤループの形状を変化させる様子を模式的に拡大して示す部分斜視図である。It is a fragmentary perspective view which expands and shows a mode that the shape of a wire loop is changed typically. ワイヤループの曲げを行う方法を模式的に示す部分斜視図である。It is a fragmentary perspective view which shows typically the method of bending a wire loop. ワイヤループの下方に入り込む樹脂の影響を示す部分断面説明図である。It is a partial cross section explanatory drawing which shows the influence of the resin which enters under a wire loop. (a)、(b)は、ワイヤループの曲げを行う変形例の方法を模式的に示す部分斜視図である。(A), (b) is a fragmentary perspective view which shows typically the method of the modification which bends a wire loop. ワイヤループの形状を変化させる構成の適用の変形例を模式的に拡大して示す部分斜視図である。It is a fragmentary perspective view which expands and shows typically the modification of the application of the structure which changes the shape of a wire loop. 本発明に際して検討されたチップ間接続にワイヤボンディングを用いた場合の問題点を示す部分断面図である。It is a fragmentary sectional view which shows the problem at the time of using wire bonding for the chip-to-chip connection examined in the present invention. チップ間接続にボールボンディングを用いて行う構成を模式的に示す断面図である。It is sectional drawing which shows typically the structure performed using ball bonding for chip connection. チップ間接続にボールボンディングを用いて行う構成を模式的に示す部分斜視図である。It is a fragmentary perspective view which shows typically the structure performed using ball bonding for chip connection. チップ間接続にボールボンディングを用いて行う構成を模式的に示す部分断面図である。It is a fragmentary sectional view showing typically the composition performed using ball bonding for chip connection. チップ間接続にボールボンディングを用いて行う構成を模式的に示す部分断面図である。It is a fragmentary sectional view showing typically the composition performed using ball bonding for chip connection.

符号の説明Explanation of symbols

10 半導体装置
10a RFモジュール
11 積層基板
11a セラミック基板
11b セラミック基板
11c セラミック基板
11d セラミック基板
11e セラミック基板
12 ビア
13 表面導体パターン
14 裏面導体パターン
15 半導体チップ
15a 半導体チップ
15b 半導体チップ
15c 半導体チップ
16 チップ部品
17 樹脂
18 半田
19 ワイヤボンディング
19a ワイヤボンディング
19b ワイヤボンディング
20 パッド
21 第一の接続
21a ボールボンディング
22 第二の接続
22a 熱圧着
22b ボールボンディング
23 ワイヤループ
24 ボールボンディング
25 ボールボンディング
30 ワイヤボンディング
31a 半導体チップ
31b 半導体チップ
32 第一の接続
32a ボールボンディング
33 第二の接続
33a 熱圧着
34 ワイヤループ
35 ボールボンディング
40 曲げ部分
50 キャピラリ
51 ワイヤガイド
52 腕部分
53 ダメージ
54 圧着ピン
60a パッド
60b パッド
61 キャビティ
62 キャビティ
63 キャビティ
DESCRIPTION OF SYMBOLS 10 Semiconductor device 10a RF module 11 Laminated substrate 11a Ceramic substrate 11b Ceramic substrate 11c Ceramic substrate 11d Ceramic substrate 11e Ceramic substrate 12 Via 13 Surface conductor pattern 14 Back surface conductor pattern 15 Semiconductor chip 15a Semiconductor chip 15b Semiconductor chip 15c Semiconductor chip 16 Chip component 17 Resin 18 Solder 19 Wire bonding 19a Wire bonding 19b Wire bonding 20 Pad 21 First connection 21a Ball bonding 22 Second connection 22a Thermocompression bonding 22b Ball bonding 23 Wire loop 24 Ball bonding 25 Ball bonding 30 Wire bonding 31a Semiconductor chip 31b Semiconductor Chip 32 First connection 32a Ball bonding 3 3 Second Connection 33a Thermocompression 34 Wire Loop 35 Ball Bonding 40 Bending Part 50 Capillary 51 Wire Guide 52 Arm Part 53 Damage 54 Crimping Pin 60a Pad 60b Pad 61 Cavity 62 Cavity 63 Cavity

Claims (5)

半導体チップをワイヤボンディングにより接続する半導体装置の製造方法であって、
前記ワイヤボンディングによる前記半導体チップの接続は、第一の接続と、前記第一の接続に引き続いて行われる第二の接続とからなり、
前記第二の接続では、その最終工程がボールボンディング工程であることを特徴とする半導体装置の製造方法。
A method of manufacturing a semiconductor device for connecting semiconductor chips by wire bonding,
The connection of the semiconductor chip by the wire bonding consists of a first connection and a second connection performed subsequent to the first connection,
In the second connection, the final process is a ball bonding process.
半導体チップをワイヤボンディングにより接続する半導体装置の製造方法であって、
前記ワイヤボンディングによる前記半導体チップの接続は、第一の接続と、前記第一の接続に引き続いて行われる第二の接続とからなり、
前記第二の接続では、ワイヤ圧着後にボールボンディングを行うことを特徴とする半導体装置の製造方法。
A method of manufacturing a semiconductor device for connecting semiconductor chips by wire bonding,
The connection of the semiconductor chip by the wire bonding consists of a first connection and a second connection performed subsequent to the first connection,
In the second connection, ball bonding is performed after wire crimping.
複数の半導体チップ間をワイヤボンディングで接続する半導体装置の製造方法であって、
前記ワイヤボンディングによる前記半導体チップ間の接続は、第一の接続と、前記第一の接続に引き続いて行われる第二の接続とからなり、
前記第二の接続では、その最終工程はボールボンディング工程であることを特徴とする半導体装置の製造方法。
A method of manufacturing a semiconductor device for connecting a plurality of semiconductor chips by wire bonding,
The connection between the semiconductor chips by the wire bonding consists of a first connection and a second connection performed subsequent to the first connection,
In the second connection, the final process is a ball bonding process.
半導体チップをワイヤボンディングにより接続する半導体装置の製造方法であって、
前記ワイヤボンディングにより形成されるワイヤループを下方に押し付けて変形させることを特徴とする半導体装置の製造方法。
A method of manufacturing a semiconductor device for connecting semiconductor chips by wire bonding,
A method of manufacturing a semiconductor device, wherein a wire loop formed by the wire bonding is pressed downward to be deformed.
複数の半導体チップ間をワイヤボンディングで接続する半導体装置の製造方法であって、
複数の半導体チップのパッド同士を隣接させ、隣接させた前記パッド間をボールボンディングで接続することを特徴とする半導体装置の製造方法。
A method of manufacturing a semiconductor device for connecting a plurality of semiconductor chips by wire bonding,
A method of manufacturing a semiconductor device, wherein pads of a plurality of semiconductor chips are adjacent to each other, and the adjacent pads are connected by ball bonding.
JP2005275389A 2005-09-22 2005-09-22 Manufacturing method of semiconductor device Pending JP2007088220A (en)

Priority Applications (1)

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JP2007088220A true JP2007088220A (en) 2007-04-05

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Country Link
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014120778A (en) * 2012-12-14 2014-06-30 Lg Innotek Co Ltd Light-emitting element package
JP2015220429A (en) * 2014-05-21 2015-12-07 ローム株式会社 Semiconductor device
JP2020025034A (en) * 2018-08-08 2020-02-13 ローム株式会社 LED package, LED display device
CN114765188A (en) * 2021-01-15 2022-07-19 格科微电子(上海)有限公司 CMOS image sensor packaging structure

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014120778A (en) * 2012-12-14 2014-06-30 Lg Innotek Co Ltd Light-emitting element package
JP2015220429A (en) * 2014-05-21 2015-12-07 ローム株式会社 Semiconductor device
JP2020025034A (en) * 2018-08-08 2020-02-13 ローム株式会社 LED package, LED display device
CN110828641A (en) * 2018-08-08 2020-02-21 罗姆股份有限公司 LED assembly and LED display device
CN114765188A (en) * 2021-01-15 2022-07-19 格科微电子(上海)有限公司 CMOS image sensor packaging structure

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