JP2007088002A - Cmos image sensor ic - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a CMOS image sensor which can suppress a variance in bonding leak current in the diffused part of a MOS transistor or degradation of characteristic due to an increase in total capacity of wiring accumulating optical electric charge. <P>SOLUTION: A source area and a drain area of a MOS transistor which is connected with a node holding and accumulating signal electric charge is formed at such a position that is apart from a channel stop layer and is aligned with a contact area, in a manner that it may be nearly equal in area to the contact area at an extremely smaller area (volume) than heretofore. Thus, fixed noises due to bonding leak current, a loss of optical signals, or a variance of leak among a plurality of sensors can be suppressed, thereby increasing sensitivity to light. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a CMOS image sensor IC used in an apparatus for reading and transmitting image information, a facsimile, an image scanner, and an electronic camera.

  FIG. 2 is a circuit diagram showing an example of a conventional image sensor. In the sensor circuit 10 of the CMOS image sensor, a photodiode 12 using a PN junction, a reset transistor 11 which is a switching element for resetting the photodiode 12 to an appropriate voltage, and light accumulated in the photodiode 12 are used. An amplifying circuit 13 for amplifying the electric charge is connected.

  A reset operation in which the reset transistor 11 is turned on and the photodiode 12 has a sufficient reset voltage, a storage operation in which the reset transistor 11 is turned off and the photocharge is accumulated in the photodiode 12 for a certain period of time, and the amplifier circuit 13 is turned on and The optical information stored in the diode 12 is amplified and read to read out optical information continuously.

  In addition, the signal amplified after the read operation can be temporarily stored using the holding circuit 20 including the capacitor element and the two switch transistors.

  During the read operation, the switch transistor 22A is turned on, the signal is stored in the holding capacitor 21 by the amplifier circuit 13 as an electric charge, the switch transistor 22A is turned off, and the switch transistor 22B is turned on and read from the holding capacitor 21 after an arbitrary holding time. Can do.

  A series of operations of reset, accumulation, and readout can be collectively processed for a plurality of photodiodes and arbitrarily read out individually from the holding circuit.

  FIG. 3 is a cross-sectional view of the diffusion region of the drain or source portion of the reset transistor connected to the photodiode of the conventional image sensor and the switch transistor connected to the storage capacitor.

  A P-type channel stop layer 2 and a LOCOS oxide film 3 are formed on the P-type silicon substrate 1 so as to overlap each other, and an N-type source region 4 and an N-type drain region 5 are in contact therewith. Under the end portion of the LOCOS oxide film 3, the P-type channel stop layer 2, the N-type source region 4 and the N-type drain region 5 are in contact. A gate 6 is provided between the N-type source region 4 and the N-type drain region 5 via a gate insulating layer 7. In general, the P-type channel stop layer 2, the N-type source region 4 and the N-type drain region 5 are formed in a self-aligned manner with respect to the LOCOS oxide film 3. On the N-type source region 4 and N-type drain region 5, a contact region 9 for electrical connection with the metal wiring 30 is formed so as to penetrate the intermediate insulating film 8 made of, for example, BPSG.

In addition, in order to reduce the junction leakage current of the diffusion part of the MOS transistor that is the switching element of the CMOS image sensor, there is an example in which the drain and source regions of the MOS transistor that is the switching element are separated from the inverting element diffusion region. . (For example, refer to Patent Document 1.)
Japanese Patent Laid-Open No. 2002-124656 (FIG. 1)

  However, in such a COMS image sensor, under the end portion of the LOCOS oxide film 3, the N-type source region 4 and the N-type drain region 5 and the P-type channel stop layer 2 which are relatively high-concentration diffusion layers are disposed. As a result, the junction leakage current is generated from this portion, and the circuit characteristics are likely to vary in manufacturing. Loss of optical signal due to gradual leakage from the junction of the source or drain region of the MOS transistor, which is a switching element to which the signal charge stored in the photodiode during the accumulation time and the capacitive element during the retention time is connected In addition, there is a problem that fixed noise is generated due to variations in leaks among a plurality of sensors. In addition, a junction having a relatively high impurity concentration is formed between the N-type source region 4 and the N-type drain region 5 and the P-type channel stop layer 2, thereby increasing the capacity of the entire wiring for storing the amount of photocharge and lowering the sensitivity. There was a problem of doing.

  The contact region 9 for electrical connection with the metal wiring 30 formed after the formation of the N-type source region 4 and the N-type drain region 5 is prevented from short-circuiting with the gate electrode 6 and the N-type source region. 4 and the N-type drain region must be formed in consideration of a predetermined patterning misalignment so that they do not protrude from the N-type drain region, and the areas of the N-type source region 4 and the N-type drain region 5 are in contact with each other. It had to be formed with a size that allowed for the misalignment of region 9. For this reason, the bottom area and the side area of the N-type source region 4 and the N-type drain region 5 are increased, increasing the capacity of the entire wiring for storing the amount of photocharge, resulting in a decrease in sensitivity.

  As an improvement measure for the above problem, even in the case where the drain region and the source region of the MOS transistor which is a switching element and the inverting element diffusion region are separated from each other, the extra area considering the misalignment of the contact region 9 is not sufficient. Since it is necessary for the drain and the drain, the junction capacitance cannot be reduced sufficiently, and there is a problem that a sufficient function cannot be exhibited particularly in a CMOS image sensor having a fine light receiving element.

  In order to solve the above problems, the present invention has a CMOS image sensor configured as follows.

  In a CMOS image sensor IC in which elements such as photodiodes and MOS transistors are formed on the same silicon substrate, the source region and drain region of the MOS transistor connected to the element that holds and accumulates signal charges are electrically connected to the metal wiring. The structure is formed with a very small area substantially equal to the contact region at a position aligned with the contact region for connection.

  The N-type source region 4 and the N-type drain region 5 and the P-type channel stop layer 2 are separated from each other.

  As described above, the present invention has a structure in which a source region and a drain region of a MOS transistor are formed with a substantially equal area to a contact region at a position aligned with a contact region for electrical connection with a metal wiring. did. Further, the N-type source region 4 and the N-type drain region 5 and the P-type channel stop layer 2 are separated from each other. As a result, parasitic capacitance in the source and drain regions can be significantly reduced compared to conventional MOS transistors, junction leakage current can be reduced, and fixed noise due to optical signal loss and leakage variations among multiple sensors can be suppressed. , The sensitivity to light increases, and a CMOS image sensor with low noise and high sensitivity can be supplied regardless of the accumulation time and holding time.

  FIG. 1 is a schematic cross-sectional view showing an embodiment of a MOS transistor which is a switching element connected to a photodiode and a storage capacitor of a CMOS image sensor according to the present invention.

  A P-type channel stop layer 2 and a LOCOS oxide film 3 are formed on the P-type silicon substrate 1 so as to overlap with each other and are located away from the P-type channel stop layer 2 and are used for electrical connection with the metal wiring 30. An N-type source region 4 and an N-type drain region 5 having an area substantially equal to the contact region 9 are formed at a position aligned with the contact region 9.

  Further, the side wall portion of the contact region 9 is surrounded by a side spacer insulating film 202 made of a silicon nitride film or the like formed on the side wall of the gate electrode 6 made of polysilicon or the like and the spacer 203 made of the same material as the gate electrode. .

  A gate electrode 6 made of polysilicon or the like is provided on the gate insulating layer 7 between the N-type source region 4 and the N-type drain region 5. Although the description overlaps, the contact region 9 for electrical connection with the metal wiring 30 is formed on the N-type source region 4 and the N-type drain region 5, and the side wall of the spacer 203 made of the same material as the gate electrode 6 and the gate electrode. It is formed in a shape surrounded by the side spacer insulating film 202 formed in the above.

  A gate mask insulating film 201 made of a silicon nitride film or the like used for patterning the gate electrode 6 and the spacer 203 made of the same material as the gate electrode is formed on the gate electrode 6 and the spacer 203 made of the same material as the gate electrode. Has been.

  The N-type source region 4 and the N-type drain region 5 having the above-described structure and positional relationship include, for example, the gate electrode 6 made of polysilicon or the like, the spacer 203 made of the same material as the gate electrode, and the like after the contact region 9 is formed. The N-type source region 4 and the N-type drain are formed by ion implantation or the like using the side spacer insulating film 202 made of a silicon nitride film or the like formed on the side wall of the semiconductor substrate and the gate mask insulating film 201 as a mask material for alignment. It can be formed by introducing an N-type impurity into the region 5. As a result, the N-type source region 4 and the N-type drain region 5 are formed in a self-aligned manner with the contact region 9, and are automatically insulated from the gate electrode 6 through the narrow side spacer insulating film 202. Therefore, it is not necessary to consider the misalignment of the contact region 9 which has been necessary conventionally.

  As described above, the N-type source region 4 and the N-type drain region 5 are spaced apart from the P-type channel stop layer 2 and aligned with the contact region 9 and have substantially the same size as the contact region 9. It is formed with an extremely small area (volume) compared to the conventional case.

  As a result, the parasitic capacitance in the N-type source region 4 and the N-type drain region 5 of the MOS transistor can be remarkably reduced, so that the junction leakage current is reduced and the fixed noise due to the loss of the optical signal and the variation in leakage among a plurality of sensors. And the sensitivity to light increases.

  As described above, in the first embodiment, the CMOS image sensor configured with the N-type source region and the N-type drain region on the P-type silicon substrate has been described. However, the effect is the same even if the structure of the conductor is inverted.

It is typical sectional drawing which shows the Example of the MOS transistor which is a switching element connected to the photodiode of the CMOS image sensor of this invention, and a retention capacity. It is a circuit diagram which shows an example of the conventional image sensor. It is typical sectional drawing which shows an example of the MOS transistor which is a switching element connected to the photodiode and retention capacity of the conventional image sensor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 P-type silicon substrate 2 P-type channel stop layer 3 LOCOS oxide film 4 N-type source region 5 N-type drain region 6 Gate 7 Gate oxide film 8 Intermediate insulating film 9 Contact region 10 Sensor circuit 11 Reset transistor 12 Photo diode 13 Amplifier circuit 20 holding circuit 21 holding capacitor 22A, 22B switch transistor 30 metal wiring 201 gate mask insulating film 202 side spacer insulating film 203 spacer made of the same material as the gate electrode

Claims (5)

  In a CMOS image sensor IC in which elements such as photodiodes and MOS transistors are formed on the same silicon substrate, the source region and drain region of the MOS transistor connected to the element that holds and accumulates signal charges are electrically connected to a metal wiring. The surface area of the MOS transistor is substantially equal to the surface area of the contact region, and the source region and the drain region of the MOS transistor are separated from each other by an element isolation region. A CMOS image sensor IC, wherein the CMOS image sensor IC is formed apart from a diffusion region, that is, a so-called channel stop region, for preventing electrical conduction due to conductivity inversion.   2. The CMOS image sensor IC according to claim 1, wherein the MOS transistor is a reset transistor for resetting the photodiode.   2. The CMOS image sensor IC according to claim 1, wherein the MOS transistor is a switch transistor connected to a capacitor for holding a charge of the photodiode.   2. The CMOS image sensor IC according to claim 1, wherein the contact region is surrounded by a side spacer insulating film formed on a side wall of a spacer made of the same material as the gate electrode of the MOS transistor and the gate electrode. .   5. The CMOS image sensor IC according to claim 4, wherein the gate electrode and the spacer are made of polysilicon, and the side spacer insulating film is made of a silicon nitride film.

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