JP2007074835A - Voice coil motor drive circuit and magnetic disk memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a voice coil motor drive circuit and a magnetic disk memory wherein it is possible to accomplish both the enhancement of accuracy of magnetic head positioning control in tracking and access acceleration by shortening of a seek time. <P>SOLUTION: The magnetic disk memory includes:a voice coil motor (108) that moves a magnetic head and the voice coil motor drive circuit (110) that drives a driving current for the voice coil motor by PWM, detects a current of the coil and carries out feedback control, and thereby controls the positioning of the magnetic head. An output of an amplifier (113) for detecting a coil current of the voice coil motor is supplied to an error amplifier (114) without being subjected to sample-and-hold operation. The magnetic disk memory is further provided with a circuit (PWM comparator) that controls the slew rate of a driving voltage applied to a terminal of a coil of the voice coil motor during PWM driving. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a control technique for a magnetic disk storage device, and more particularly to a control technique for a voice coil motor that moves a magnetic head for reading / writing information with respect to a storage track on a magnetic storage disk that is rotationally driven.

  A magnetic disk storage device includes a magnetic head for reading / writing information on a storage track on a rotationally driven magnetic storage disk, a voice coil motor for moving the magnetic head on the disk, and the magnetic head And a voice coil motor drive control device for positioning the magnetic head by controlling the drive current of the voice coil motor while monitoring the lead state.

  The information storage density of magnetic disk storage devices has been increasing year by year. Accordingly, the magnetic head positioning control has been required to have very high accuracy. Therefore, the magnetic head is positioned by feedback control of the drive current of the voice coil motor based on the detected value of the drive current. For driving the voice coil motor that moves the magnetic head, generally, a linear drive system in which the drive current amount of the voice coil motor is continuously changed has been adopted.

  However, magnetic disk storage devices are required to increase access speed and access speed. In order to realize high-speed access, it is necessary to shorten a time required to move the magnetic head to a predetermined storage track, that is, a seek time. To this end, it is necessary to increase the drive current of the voice coil motor. However, when the voice coil motor drive current is increased, power loss for linearly controlling the drive current increases, and accordingly, the amount of heat generation increases. The heat generated during the seek has an adverse effect on the operation and characteristics of the magnetic head and the magnetic storage disk, thereby causing adverse effects such as a read / write error.

  Therefore, instead of continuously changing the amount of the voice coil motor drive current, a pulse drive system that performs pulse width modulation control (hereinafter referred to as PWM control) that changes the energization / non-energization time ratio of the drive current is applied. An invention relating to a voice coil motor driving apparatus has been proposed (Patent Document 1). Further, since the CMRR (common-mode input voltage rejection ratio) possessed by the current detection amplifier used in this PWM drive system is a finite value, when the drive voltage applied to the terminal of the coil as a load fluctuates up and down. There is a problem that noise occurs in the output of the current detection amplifier. In order to solve this problem, an invention has been proposed in which current detection is performed by sampling and holding the current flowing through the coil at the midpoint of one cycle of PWM driving (Patent Document 2).

  However, the PWM drive method is effective in suppressing the amount of heat generated by reducing power loss, but even when sampling and holding to detect current, the amount of movement of the magnetic head is small compared to the linear drive method. There is a problem that it is difficult to sufficiently guarantee the magnetic head positioning accuracy. Therefore, an invention has been proposed in which PWM driving is performed during a seek operation where positioning control accuracy is not a concern, and the voice coil motor is driven by linear control during tracking where high positioning accuracy is required (Patent Document 3).

In addition, in the PWM drive method, there is a possibility that EMI (electromagnetic interference) noise generated when the drive voltage is subjected to pulse control jumps into a magnetic head or wiring, thereby causing a read error in position information and causing a tracking error. There is a problem of becoming higher. In order to improve this, an invention has been proposed in which, when performing PWM driving during seeking, one terminal of the coil is PWM driven and the other terminal is linearly driven to reduce EMI noise. (Patent Document 4).
U.S. Pat. No. 5,917,720 US Pat. No. 6,061,258 JP 2002-358742 A JP 2003-052194 A

  Since both the invention described in Patent Document 3 and the invention described in Patent Document 4 use the sample and hold method for current detection, there is a problem that a current detection error occurs due to a sampling timing shift. Also, when the voice coil motor drive circuit and the PWM drive type spindle motor drive circuit are formed on the same semiconductor chip, the noise of the spindle motor drive circuit during sampling of the PWM drive in the voice coil motor drive circuit. As a result, a current detection error occurs and the positioning accuracy is lowered.

  Specifically, as indicated by reference numeral T2 in FIG. 10, when the timing of the sampling clock SCK coincides with, for example, the rise timing of the U phase of the spindle motor driving circuit, the output of the current sense amplifier after the holding becomes high. turn into. As a result, the coil current Ivcm of the voice coil motor fluctuates irregularly as shown in FIG. In the case of FIG. 10, at timing T1, Ivcm does not fluctuate irregularly because the timing of the sampling clock SCK and the rising and falling timings of the U phase do not match.

  Further, due to the sampling timing delay, as shown in FIG. 11A, the gain frequency characteristic of the current detection amplifier during PWM driving and the gain frequency characteristic of the current detection amplifier during linear driving shift. In FIG. 11A, symbol A is the gain frequency characteristic of the current detection amplifier during PWM driving, and symbol B is the gain frequency characteristic of the current detection amplifier during linear driving. FIG. 11A shows that the gain frequency characteristic of the current detection amplifier at the time of PWM driving has a gain peak near 35 kHz. If there is such a shift in frequency characteristics, there is a problem that the settling time when switching from the PWM driving during seeking to the linear driving during tracking becomes long.

  An object of the present invention is to provide a drive control technology for a voice coil motor that enables high-precision positioning control of a magnetic head during head movement by PWM drive.

  Another object of the present invention is to provide a voice coil that enables high-precision positioning control of a magnetic head even when a voice coil motor driving circuit and a spindle motor driving circuit are formed on the same semiconductor chip. The object is to provide motor drive control technology.

Still another object of the present invention is a voice coil motor drive control technique capable of preventing the settling time when switching the drive mode from being long when PWM drive is performed during seek and linear drive is performed during tracking. It is to provide.
The above and other objects and features of the present invention will be apparent from the description of this specification and the accompanying drawings.

Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.
That is, a voice coil motor that moves the magnetic head, and a voice coil motor driving circuit that controls the positioning of the magnetic head by driving the driving current of the voice coil motor in a PWM manner and detecting the coil current and performing feedback control The output of the amplifier that detects the coil current of the voice coil motor is supplied to the error amplifier without being sampled and held. Also, a slew rate control circuit is provided for controlling the slew rate of the drive voltage applied to the coil terminal of the voice coil motor during PWM drive.

  According to the above-described means, the output of the amplifier that detects the coil current is supplied to the error amplifier without being sampled and held, so there is no possibility that a current detection error due to a sampling timing shift will occur. Also, when the voice coil motor drive circuit and the PWM drive type spindle motor drive circuit are formed on the same semiconductor chip, the spindle motor drive circuit is used when sampling the PWM drive in the voice coil motor drive circuit. Since no noise is picked up and held, no current detection error occurs. Therefore, the positioning control accuracy of the magnetic head can be improved. On the other hand, by not sampling and holding, the output of the current detection amplifier may fluctuate due to the swing of the coil terminal voltage during PWM drive, and the fluctuation may cause a decrease in control accuracy, but this is suppressed by slew rate control. can do.

  Here, desirably, a second drive mode is provided in which one terminal of the coil of the voice coil motor is driven by PWM control and the other terminal is driven by linear control. In this second drive mode, the two terminals of the coil are provided. Of the terminals, the terminal near the current detection resistor is linearly driven. As a result, the head can be moved at a higher speed with less power loss than when both of the two terminals are driven linearly, and noise generation is suppressed more than when both of the two terminals are driven by PWM control. The head can be moved. Further, since the terminal closer to the current detection resistor among the two terminals of the coil is linearly driven, fluctuations in the output of the current detection amplifier caused by the coil terminal voltage swinging during PWM driving than in the reverse case And the head positioning control accuracy can be improved.

  Further, in a magnetic disk storage device having a drive mode in which both ends of a coil of a voice coil motor are driven by PWM control, a voltage for controlling a current flowing through the coil based on an output of an amplifier for detecting a coil current and a current command value is set. A phase compensation circuit composed of a resistor and a capacitor in series is provided after the error amplifier to be generated. A second capacitor is connected in parallel with the series resistor and capacitor of the phase compensation circuit. As a result, fluctuations appearing in the output of the error amplifier due to noise generated in the output of the coil current detection amplifier by PWM driving can be suppressed, and the positioning accuracy of the magnetic head can be improved.

  More preferably, a mode in which both ends of the coil of the voice coil motor are driven by pulse width control (first drive mode) and a mode in which both ends of the coil are driven by linear control (second drive mode) are provided. The output of the amplifier that detects the coil current of the voice coil motor is supplied to the error amplifier without being sampled and held, the seek operation of the magnetic head is performed in the first drive mode, and the tracking operation is performed in the second drive mode. Do it.

  According to the above-described means, the output of the amplifier for detecting the coil current is supplied to the error amplifier without being sampled and held. Therefore, the gain frequency characteristic of the current detection amplifier at the time of PWM driving and the linear driving are caused by the sampling timing delay. There will be no deviation from the gain frequency characteristics of the current detection amplifier. As a result, it is possible to avoid an increase in settling time when switching from PWM driving during seeking to linear driving during tracking.

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
That is, according to the present invention, it is possible to increase the accuracy of the positioning control of the magnetic head when the head is moved by PWM driving.

Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows an outline of a magnetic disk storage device to which the technique of the present invention is applied.
The magnetic disk storage device shown in FIG. 1 includes a magnetic storage disk 100, a spindle motor 102 that rotationally drives the magnetic storage disk 100, and a magnetic head 106 that reads / writes information from / to storage tracks on the magnetic storage disk 100. And a voice coil motor 108 for moving the magnetic head 106 in the radial direction on the disk 100. Further, the magnetic disk storage device includes a motor drive circuit 110 that drives the voice coil motor 108, a signal processing circuit (signal processing IC) 230 that reads position information from a read signal of the magnetic head 106, and the signal processing circuit 230 reads the position information. And a controller 260 for sending a drive current command value CRNT to the motor drive circuit 110 based on the positional information. Although not particularly limited, in this embodiment, the motor drive circuit 110 is configured as a semiconductor integrated circuit on one semiconductor chip.

  Here, the controller 260 is a microcomputer (CPU) 261 that controls the operation of the entire magnetic disk storage device, a position command (target track position information) from the microcomputer 261, and head position information from the signal processing circuit 230. And a compensation circuit 262 for generating a drive current command value CRNT based on the above. The drive current command value CRNT generated by the compensation circuit 262 is sent to the motor drive circuit 110 as described above.

  As shown in FIG. 2, the motor drive circuit 110 includes a serial port 111 that serially transmits and receives data to and from the controller 260, and a triangle wave generation circuit 112 that generates a triangle wave necessary for PWM drive. Have The voice coil motor 108 is represented as an equivalent circuit by a coil inductance L and an internal resistance RL.

  Further, the motor drive circuit 110 is in a PWM operation with a current detection circuit 113 that detects a current flowing through the coil Lvcm of the voice coil motor 108, an input voltage VCMIN corresponding to the drive current command value CRNT sent from the controller 260, and the like. And an error amplifier 114 that compares the difference with the detection voltage Sout of the current detection circuit 113 that is continuously detected and outputs a voltage corresponding to the potential difference. When the drive current command value CRNT is an analog signal, CRNT = VCMIN. When CRNT is a digital signal, a value obtained by D / A converting CRNT is used as VCMIN.

  The current detection circuit 113 includes a differential amplifier (hereinafter referred to as a current sense amplifier) AMP0, input resistors R3 and R5, a feedback resistor R6, and the like. The voltage of both terminals of the sense resistor Rs provided in series with the coil Lvcm is obtained. By detecting the inter-terminal voltage as an input, a detection voltage Sout proportional to the current is output. This detection voltage Sout becomes a negative voltage with reference to Vref when a current flows in the direction of the arrow (in the direction from VCMP to VCMN) shown in the figure, and in the direction opposite to the arrow (in the direction from VCMN to VCMP). ) Is positive when current is flowing. Thus, when added to the input voltage VCMIN via the resistors R1 and R2, the difference between VCMIN and Sout is input to the error amplifier 114 and compared with Vref.

  Further, the motor driving circuit 110 compares the output of the error amplifier 114 with the triangular wave TRW generated by the triangular wave generating circuit 112 and outputs a current for PWM pulse driving, and the error amplifier 114. And a VCM driver 116 for supplying a drive current to the voice coil motor 108 according to the output of the pulse control circuit 115.

  In addition to the above, the motor drive circuit 110 is provided with a flip-flop 117 that latches the mode control signal MODE generated based on the control code sent from the controller 260 to the serial port 111. Further, an AND gate 118 that receives the mode control signal MODE and the second mode control signal SGLPWM indicating whether to perform one-side PWM driving, a phase compensation circuit 119 connected to the subsequent stage of the error amplifier 114, and the like are provided. Yes. The phase compensation circuit 119 includes a series resistor Rx, a capacitor Cx, and a capacitor Cx2 provided in parallel thereto, and external elements are used for these elements.

  When the drive current command value is sent as a digital signal from the controller 260, the motor drive circuit 110 is provided with a D / A converter that converts the digital drive current command value into an analog drive current command value. The motor drive circuit 110 A / D converts the back electromotive voltage detection circuit that detects the back electromotive voltage induced in the coil of the voice coil motor 108 and the back electromotive voltage detected by the back electromotive voltage detection circuit. An A / D conversion circuit and a reference voltage generation circuit that generates a reference voltage Vref required by the VCM driver 116 may be incorporated. The back electromotive voltage converted into digital data by the A / D conversion circuit is sent to the controller 260 via the serial port 111, and the controller 260 can be configured to recognize the moving speed of the head from the received back electromotive voltage. it can.

  Although not particularly limited, the controller 260 commands the motor drive circuit 110 in a drive mode corresponding to the moving speed, and the VCM driver 116 drives the voice coil motor 108 in accordance with the designated drive mode. Specifically, during tracking when the moving amount of the magnetic head 106 is small, a “linear drive mode” for linearly controlling the drive current of the voice coil motor 108 is designated and the coil is driven by the VCM driver 116.

  When seeking the magnetic head 106 with a large amount of movement, a “bilateral PWM drive mode” in which the coil terminal of the voice coil motor 108 is PWM-driven in both directions or one terminal of the coil is PWM-driven and the other terminal is linearly driven. The “one-side PWM drive mode” to be driven is designated. The VCM driver 116 is configured to drive the coil in accordance with a designated mode. Whether to use the “bilateral PWM drive mode” or the “single side PWM drive mode” is determined according to the system to be applied, and the controller 260 outputs information indicating the mode.

  The contents of each mode will be described in detail later. The serial port 111 is provided with a register REG for setting a control code or the like for designating the mode. The controller 260 can select any mode by setting a mode designation code in the register REG. It is configured as follows. The serial port 111 is configured to capture data DATA in synchronization with the serial clock SCK during a period when the load enable signal Dload from the controller 260 is at an effective level.

  Since the motor drive circuit 110 has the above-described configuration, high tracking accuracy can be obtained by linearly controlling the drive current of the voice coil motor during tracking when the moving amount of the magnetic head 106 is small. On the other hand, when seek is performed with a large amount of movement of the magnetic head 106, if the “both sides PWM drive mode” is selected, the drive current of the voice coil motor is PWM-controlled from both terminals of the coil, resulting in a large power loss. The magnetic head 106 can be moved at a high speed without any problems. When “one-side PWM drive mode” is selected, the drive current of the voice coil motor is PWM-controlled from one terminal of the coil and linearly controlled from the other terminal. As a result, the head is moved at a high speed with an intermediate power loss between the “linear drive mode” and the “pulse drive mode”, and the magnetic head 106 can be moved at a high speed while suppressing the power loss to some extent.

  This makes it possible to achieve both high-precision magnetic head positioning control during tracking and high-speed access by shortening seek time while effectively reducing heat generation and EMI that induce read / write errors. It becomes. That is, in the magnetic head drive system, the “linear drive mode” is executed during tracking when the magnetic head 106 traces a predetermined storage track in a read / write state, and the seek is performed in which the magnetic head 106 moves across the storage track. Sometimes the “both sides PWM drive mode” or “one side PWM drive mode” is executed. As a result, it is possible to optimize the high-speed access and the suppression of EMI noise according to the system while improving the positioning accuracy of the magnetic head during tracking.

  The pulse control circuit 115 includes an inverting circuit 150 that inverts the output VCTL of the error amplifier 114 with reference to the reference voltage Vref and outputs -VCTL. Here, −VCTL, which is the output of the inverting circuit 150, is attached with “−” in the sense of negative polarity with respect to VCTL with reference to the reference voltage Vref. For example, if the reference voltage Vref is 2V and VCTL is 2.5V, -VCTL = 1.5V. The pulse control circuit 115 further compares the output VCTL of the error amplifier 114 with the triangular wave TRW generated by the triangular wave generation circuit 112 and outputs a current for driving the VCMP terminal in PWM, and the inverting circuit 150. The second PWM comparator 152 outputs a current for PWM driving the VCMN terminal by comparing the output -VCTL and the triangular wave TRW.

  The first PWM comparator 151 and the second PWM comparator 152 output a source current when the potential of the non-inverting input terminal is higher than the potential of the inverting input terminal, and the potential of the non-inverting input terminal is the potential of the inverting input terminal. When it is lower than that, a sink current (drawn current) is output. Thus, by providing the inverting circuit 150 and the PWM comparators 151 and 152, the phase of the output VCMP of one output amplifier 161 and the output VCMN of the other output amplifier 162 are shifted by 180 degrees, and both the coils Lvcm of the voice coil motor are set. It can be driven from the terminal.

  The VCM driver 116 has a first output amplifier 161 that receives the output VCTL of the error amplifier 114 and the output of the first PWM comparator 151 as input, and a second output amplifier that receives the output VCTL of the error amplifier 114 and the output of the second PWM comparator 152 as inputs. 162. In this embodiment, the output current of the PWM comparators 151 and 152 is changed stepwise according to the value set in the register REG in the serial port 111, so that the drive voltages of the terminals VCMP and VCMN of the coil are changed. The slew rate is configured to be controllable.

  FIG. 3 shows a more specific configuration of the PWM comparators 151 and 152, and FIG. 4 shows a more specific configuration of the output amplifiers 161 and 162 constituting the VCM driver 116. Since the PWM comparators 151 and 152 have the same configuration and the output amplifiers 161 and 162 also have the same configuration, only one circuit 151 and 161 will be described below.

  As shown in FIG. 3, the PWM comparator 151 converts the N-bit (N is an integer of 2 or more) slew rate setting value SR set in the register REG in the serial port 111 into an analog current Id. It has a D / A converter DAC1. The PWM comparator 151 includes a diode-connected P-channel MOS transistor M1 that converts the output current Id of the D / A converter DAC1 into a voltage, and MOS transistors M2 and M3 that are current-mirror connected to M1. The MOS transistors M1 to M3 have the same size, and the same current as the drain current Id of M1 flows through M2 and M3.

  The PWM comparator 151 includes a diode-connected N-channel MOS transistor M5 that is connected in series with the MOS transistor M2 and converts the current Id from M2 into a voltage, and a MOS transistor M6 that is current-mirror connected to M5. The MOS transistors M5 and M6 are formed to have a size ratio such that the gate width is 1: 2, and a current 2Id that is twice the drain current Id of M5 flows through M6.

  Further, the PWM comparator 151 is provided with a MOS transistor M4 connected in parallel with the MOS transistor M5 and a voltage input-voltage output type comparator CMP1. The output VCTL of the error amplifier 114 or its inverted signal −VCTL is input to the non-inverting input terminal of the comparator CMP1, and the triangular wave TRW generated by the triangular wave generating circuit 112 is input to the inverting input terminal of the comparator CMP1. The output of the comparator CMP1 is applied to the gate terminal of the MOS transistor M4, and M4 is configured to be turned on or off according to the output of the comparator CMP1.

  Thus, in the PWM comparator 151 of FIG. 3, when the output of the comparator CMP1 is low level, the MOS transistor M4 is turned off, the current Id from M2 is allowed to flow through M5 as it is, and the current 2Id that is twice that of the current IId is passed through M6. Washed away. Therefore, the current IpwmP corresponding to the difference Id−2Id = −Id with respect to the current Id of the transistor M3 is output from the output terminal coupled to the connection node between M3 and M6.

  Here, outputting a negative current means drawing a current. On the other hand, when the output of the comparator CMP1 is at a high level, the MOS transistor M4 is turned on so that the current Id from M2 flows to M4 and no current flows to M5 and M6. A current IpwmP corresponding to the difference Id−0 = Id from Id is caused to flow toward the output terminal.

  As described above, the output current IpwmP can be changed stepwise by changing the current Id flowing through the MOS transistor M1 stepwise according to the slew rate setting value SR. The output current IpwmP is changed stepwise, so that the slope of the output voltage waveform can be controlled during PWM driving, and the noise on the output of the current detection circuit 113 is reduced by reducing the slew rate. Can be made. However, since the power loss in the output MOS transistor increases when the slew rate is reduced, the optimum slew rate is determined by the trade-off between noise and power loss. The optimum value varies depending on the applied system.

  As shown in FIG. 4, the output amplifier 161 is a voltage Vin (+) obtained by dividing the potential difference between the output VCTL of the error amplifier 114 and the reference voltage VCMREF by the ratio of resistors R7 and R8 (see FIG. 2). And a first-stage differential amplifier AMP1 that receives a voltage Vin (−) obtained by dividing a potential difference between the reference voltage VCMREF and the voltage of the coil terminal VCMP by a ratio of resistors R9 and R10 (see FIG. 2). The first-stage differential amplifier AMP1 outputs a current corresponding to the potential difference between Vin (+) and Vin (−).

  The output amplifier 161 is controlled by the mode control signal PWM / LIN that is the output of the AND gate 118, and outputs the current IpwmP output from the first-stage differential amplifier AMP1 or output from the PWM comparator 151 and input to the output amplifier 161. A changeover switch SW1 for selecting either one is provided. Here, when the changeover switch SW1 selects the output of the first-stage differential amplifier AMP1, the output amplifier 161 performs linear driving. When the changeover switch SW1 selects the output IpwmP of the PWM comparator 151, the output amplifier 161 performs PWM driving.

  In FIG. 4, M11 and M12 are output transistors that respectively drive the terminals of the coils of the voice coil motor, and are configured by N-channel MOSFETs. The two output transistors M11 and M12 are connected so that the channel is in series between the positive power supply terminal and the negative power supply terminal, and output (VCMP) is output from the intermediate connection point (node). A push-pull type output circuit (final stage) is formed.

  A base of a bipolar transistor Q1 forming a grounded emitter amplifier circuit is connected to the fixed side terminal of the changeover switch SW1. In the bipolar transistor Q1, an emitter is grounded via a resistor R13, and a collector is connected to a constant current source I1 to form a so-called grounded emitter amplifier circuit. A capacitor C1 is connected between the base and the collector. The capacitor C1 functions as an integration capacitor that performs phase compensation.

  When the output current of the first-stage differential amplifier AMP1 is input to the base of the transistor Q1 via the switch SW1, the collector voltage V1 is determined by the Miller integrating circuit including the transistor Q1 and the capacitor C1. The collector voltage V1 changes linearly according to the change of the input current. That is, the transistor Q1 linearly amplifies the relatively small signal output current of the first-stage differential amplifier AMP1 and outputs it as a voltage signal.

  On the other hand, when the output current IpwmP of the PWM comparator 151 is input to the base of the transistor Q1 via the switch SW1, the collector voltage V1 is determined by the Miller integrating circuit including the transistor Q1 and the capacitor C1. Since the current IpwmP is a constant value, the voltage V1 appearing at the collector of the transistor Q1 rises with a substantially constant slope (= Ipwmp / C1 [V / s]) until the power supply voltage Vcc is reached, as shown in FIG. To do. The collector voltage V1 of Q1 is input to the non-inverting input terminal (+) of the differential amplifier AMP2.

  The differential amplifier AMP2 is an amplifier having a differential voltage input terminal (non-inversion and inversion) and a two-phase current output terminal (positive phase and negative phase). The differential amplifier AMP2 has characteristics set such that the output current changes substantially linearly according to the change in the collector voltage V1 of Q1. That is, it is configured to perform a linear operation. The voltage of the output terminal OUT of the circuit, that is, the coil drive voltage VCMP is fed back to the inverting input terminal (−) of the differential amplifier AMP2 via the resistor R15. The entire circuit including the differential amplifier AMP2 and the amplifiers AMP3 and AMP4 and output transistors M1 and M2 connected to the subsequent stage amplifies the collector voltage V1 as an input voltage with a gain (= 1 + R15 / R14), A drive voltage VCMP that changes in proportion to the change in V1 is output.

  Thus, in the PWM drive mode in which the switch SW1 is switched to input the current IpwmP from the PWM comparator to the output amplifier, as described above, the current value of the output current IpwmP of the comparator is the slew rate setting value SR. When the value is set, the output voltage VCMP is also changed with a slope corresponding to the slew rate. In addition, in this embodiment, as can be seen from the configuration of the PWM comparator in FIG. 3, when the rising slew rate of the output voltage VCMP is changed, the falling slew rate is also changed accordingly. As a result, the noise (see FIG. 7B) on the output Sout of a current amplifier, which will be described later, when the output of the PWM drive is changed is made substantially the same on the positive side and the negative side. The positive side and the negative side are uniformly smoothed by the connected external capacitor Cx2. This means that the magnitude of noise after smoothing can be minimized with respect to a certain value of Cx2. That is, it is possible to suppress an increase in noise synchronized with the PWM drive pulse in the drive current.

Next, the circuit portion including the buffer amplifiers AMP3 and AMP4 provided between the differential amplifier AMP2 and the output transistors M11 and M12 in FIG. 4 will be described.
As shown in FIG. 4, the positive phase output (+) of the differential amplifier AMP2 is input to the non-inverting input terminal of the buffer amplifier AMP3. The output voltage of the buffer amplifier AMP3 is applied to the gate of the output transistor M11. The buffer amplifier AMP3 operates as a voltage follower by feeding back its output voltage to its inverting input terminal. The reason why such a buffer amplifier is provided is that the output transistor M11 is large in size and has a large gate capacity, and the driving power is required to directly drive M11 with the output of the differential amplifier AMP2 while maintaining the desired characteristics. This is because there is not enough.

  In this embodiment, the positive phase output terminal of the differential amplifier AMP2 and the output terminal OUT to which the coil of the voice coil motor is connected, that is, between the input of the buffer amplifier AMP3 and the output terminal OUT. The resistor R11 and the MOS transistor M15 are connected in series. The source side of the MOS transistor M15 is connected to the output terminal OUT, the drain side is connected to the input of the buffer amplifier AMP3 via the resistor R11 in series, and the gate is connected to the input of the buffer amplifier AMP3.

  Since the buffer amplifier AMP3 operates as a voltage follower, the voltage applied to the gate of the MOS transistor M15 and the gate of the output transistor M11 is the same. Thereby, M11 and M15 form a current mirror circuit. Accordingly, when the size ratio of the MOS transistors M11 and M15 is N, the output transistor M11 is driven to pass a current N times the drain current of M15.

  Similarly, the negative phase output (−) of the differential amplifier AMP2 is input to the non-inverting input terminal of the buffer amplifier AMP4, and the output voltage of the amplifier AMP4 is applied to the gate of the output transistor M12. . The buffer amplifier AMP4 operates as a voltage follower by feeding back its output voltage to its inverting input terminal. A resistor R12 and a MOS transistor M16 are also connected in series between the input of the buffer amplifier AMP4 and the output terminal OUT. The source side of the MOS transistor M16 is connected to the ground point, the drain side is connected to the input of the buffer amplifier AMP4 via the resistor R12 in series, and the gate is connected to the input of the buffer amplifier AMP4.

  Here, the voltage applied to the gate of the MOS transistor M16 and the gate of the output transistor M12 is the same, and M12 and M16 constitute a current mirror circuit as in the above case. Accordingly, the output transistor M12 is driven so as to pass N times the current, where N is the size ratio of the MOS transistors M12 and M16 of the drain current of M16.

  When a large current IpwmP is input from the PWM comparator 151 in the pulse drive mode and a large current flows through the transistors M15 and M16, the resistors R11 and R12 provided in series with the transistors M15 and M16 are turned on. In order to prevent the rise rate of the voltage between the gate and the source of the transistor from being limited by the diode connection, M15 and M16 are inserted to perform an ON resistance operation. Due to the above operation, the output amplifier 161 (162) operates at a relatively high slew rate in the pulse drive mode operating at a large amplitude, and operates at a relatively low slew rate in an output linear drive mode operating at a small amplitude. To do.

Further, in the circuit of the embodiment of FIG. 4, a switch SW3 and a constant current source I2 are provided in series with the resistor R11 and the transistor M15, and a switch SW4 and a constant current source I3 are provided in series with the resistor R12 and the transistor M16. Yes. The switches SW3 and SW4 are turned on and off by, for example, the mode switching signal PWM / LIN, and the currents of the current sources I2 and I3 are directed to the resistors R13 and R14 when idling to hold the head in the linear drive mode. Controlled to flow. In the linear drive mode, the N-fold current of the current sources I2 and I3 becomes the idling current (through current) of the power MOSs M11 and M12, and the zero-cross distortion of the output OUT is reduced. That is, the amplifiers AMP3 and AMP4 operate in class AB. The idling current value may be a relatively small value.
In the PWM drive mode, SW3 and SW4 are open so that no idling current flows. At this time, the amplifiers AMP3 and AMP4 operate in class B.

In this embodiment, the amplifiers AMP3 and AMP4 in the linear drive mode are operated in class AB, so that switching noise of the output circuit can be avoided and the drive current of the voice coil motor can be controlled with high accuracy and high stability. it can. Accordingly, tracking movement for finely controlling the head position can be performed with high accuracy and high stability.
In the PWM drive mode, the amplifiers AMP3 and AMP4 are operated in class B, so that a through current with a large amplitude and a high slew rate can be avoided.

  The motor drive circuit 110 according to the present embodiment is based on the first mode control signal MODE and the second mode control signal SGLPWM, and “a double-sided PWM drive mode” in which both terminals of the coil are PWM-driven, and one terminal of the coil is PWM-driven. One of the “one-side PWM drive mode” for linearly driving the other and the “linear drive mode” for linearly driving both terminals of the coil are set. FIG. 6 shows a timing chart showing changes in signals of main parts in the motor drive circuit 110 when each mode is set. Among these, “both sides PWM drive mode” and “one side PWM drive mode” are used during head seek, and “linear drive mode” is used during tracking.

  FIG. 6 shows three drive modes. In general, a combination of “double-side PWM drive mode” and “linear drive mode”, or a combination of “one-side PWM drive mode” and “linear drive mode”. Therefore, it is sufficient to control to shift from the seek operation to the tracking operation. However, it is also possible to switch the three drive modes in the order shown in FIG.

  By the way, even in the “one-side PWM drive mode”, the “VCMP” side terminal in FIG. 2 is PWM-driven and the other terminal (VCMN) is linearly driven, and the “VCMP” -side terminal is linearly driven. It is conceivable that the other terminal (VCMN) is PWM driven.

  In the voice coil motor drive circuit of this embodiment, as shown in the one-side PWM drive period of the timing chart of FIG. 6, the latter, that is, the “VCMP” side terminal is linearly driven, and the “VCMN” side terminal is set. PWM driving is performed. Both methods are the same in that the magnetic head is moved at a high speed while suppressing power loss, but the noise on the output of the differential amplifier (current sense amplifier) AMP0 of the current detection circuit 113 is the same. In this respect, it is preferable to linearly drive the “VCMP” side terminal to which the sense resistor Rs is connected and PWM drive the opposite “VCMN” side terminal as in this embodiment. is there.

  Specifically, when the terminal on the “VCMP” side is PWM-driven, both terminal voltages of the coil are greatly swung in conjunction with the falling edge of the PWM pulse. When this voltage is input to the current sense amplifier, the current sense amplifier is a differential amplifier and can remove common-mode components, so an ideal differential amplifier should have no effect on the output. Since an actual differential amplifier has a finite CMRR, noise is added to the output of the current sense amplifier, which causes a reduction in control accuracy.

  In this embodiment, since the terminal on the “VCMP” side to which the sense resistor Rs is connected is linearly driven, the common mode voltage of the current sense amplifier is fixed when the PWM pulse falls as described above. The noise on the output of the current sense amplifier can be reduced.

  In the voice coil motor drive circuit of the embodiment of FIG. 2, the phase compensation circuit 119 provided on the output side of the error amplifier 114 that amplifies the difference between the output of the current sense amplifier and the drive current command VCMIN is connected in series. Resistor Rx, capacitor Cx, and capacitor Cx2 provided in parallel therewith. Thereby, the noise of the output of the error amplifier 114 at the time of PWM drive can be suppressed effectively.

  FIG. 7 shows changes in the coil drive voltages VCMP and VCMN, the output Sout of the current sense amplifier 113, the output VCTL of the error amplifier 114, and the current Ivcm that flows through the coil during both-side PWM drive. 7A and 7B, it can be seen that noise appears in the output Sout of the current sense amplifier 113 in accordance with the rise and fall of the coil drive voltages VCMP and VCMN. This noise is proportional to the slew rates of the coil drive voltages VCMP and VCMN, and the output Sout of the current sense amplifier 113 when the slew rate control is not performed as in this embodiment is indicated by a broken line in FIG. As shown, a relatively large noise appears, and as a result, noise appears on the output VCTL of the error amplifier 114.

  On the other hand, when the slew rate control is performed by applying this embodiment, the noise is reduced as shown by the solid line in FIG. If noise appears in the output Sout of the current sense amplifier 113, noise appears in the output VCTL of the error amplifier 114 as it is. On the other hand, in this embodiment, the phase compensation circuit 119 composed of the series resistor Rx, the capacitor Cx, and the capacitor Cx2 provided in parallel thereto is provided on the output side of the error amplifier 114. As shown by a solid line in FIG. 7C, noise at the output of the error amplifier 114 can be effectively suppressed.

  In FIG. 7C, the output waveform of the error amplifier 114 when the phase compensation circuit 119 does not have the capacitor Cx2, that is, when the phase compensation circuit 119 includes the resistor Rx and the capacitor Cx in series, is indicated by a broken line. In the invention described in Patent Document 3 described above, the phase compensation circuit 119 provided on the output side of the error amplifier 114 is configured only by the series resistor Rx and the capacitor Cx, and is not provided with the parallel capacitor Cx2. Therefore, the broken line in FIG. 7C can be regarded as representing the output waveform of the error amplifier in the invention described in Patent Document 3. Comparing the solid line and the broken line in FIG. 7C, it can be seen that the noise of the output of the error amplifier 114 can be effectively suppressed only by providing the phase compensation circuit 119 with the parallel capacitor Cx2.

  FIG. 8 shows the frequency characteristics of the phase compensation circuit 119. The horizontal axis is frequency and the vertical axis is gain. In FIG. 8, the solid line indicates the frequency characteristic of the phase compensation circuit 119 of this embodiment configured by the series resistor Rx and the capacitor Cx and the capacitor Cx2 provided in parallel thereto, and the broken line does not have the parallel capacitor Cx2 and is in series. This is a frequency characteristic of a phase compensation circuit composed of only the resistor Rx and the capacitor Cx.

  As shown in FIG. 8, when the parallel capacitor Cx2 is not provided, the characteristic shown by a broken line is as shown by a solid line having a pole newly at f2 = 1 / 2π · Cx2 · Rx by providing the parallel capacitor Cx2. It turns out that it has a characteristic. If the values of Cx2 and Rx are set so that the frequency f2 of this pole is lower than the PWM drive frequency, noise on the output of the error amplifier 114 through the current sense amplifier 113 can be reduced by PWM drive. it can.

  As described above, in the voice coil motor drive circuit of this embodiment, the output of the current sense amplifier 113 for detecting the coil current of the voice coil motor is supplied to the error amplifier 114 without being sampled and held. . As a result, a current detection error does not occur due to a sampling timing shift. Also, since the output of the current sense amplifier is not sampled and held, when the voice coil motor driving circuit is formed on the same semiconductor chip as the spindle motor driving circuit of the PWM driving method, PWM driving in the voice coil motor driving circuit is performed. In this sampling, noise in the spindle motor drive circuit is picked up and a current detection error occurs, so that the control accuracy does not deteriorate.

  Specifically, in the motor drive circuit that samples and holds the output of the current sense amplifier, the timing of the sampling clock SCK and the U of the spindle motor drive circuit, for example, as shown by reference numeral T2 in FIG. When the phase rising timings coincide, the current sense amplifier output after the holding becomes high. As a result, the coil current Ivcm of the voice coil motor may fluctuate irregularly as shown in FIG.

  On the other hand, in the voice coil motor drive circuit of this embodiment, since the output of the current sense amplifier is supplied to the error amplifier without being sampled and held, the coupling noise due to a sharp change of the spindle motor drive end is sampled and held. The circuit will not hold. As a result, as shown in FIG. 9, there is an advantage that the coil current Ivcm of the voice coil motor does not fluctuate irregularly. For this reason, the magnetic head positioning control accuracy is improved.

  In the voice coil motor drive circuit of this embodiment, a slew rate control circuit for controlling the slew rate of the drive voltage applied to the coil terminal of the voice coil motor during PWM drive is provided. By not sampling and holding, the output of the current detection amplifier may fluctuate due to the swing of the coil terminal voltage during PWM driving, and the fluctuation may cause a reduction in control accuracy. By controlling the slew rate of the applied drive voltage, the occurrence of fluctuation can be suppressed. As a result, the head positioning control accuracy can be improved.

  Further, in the voice coil motor drive circuit in which the output of the current sense amplifier is sampled and held, the gain frequency characteristic A of the current sense amplifier during PWM drive as shown in FIG. Has a gain peak and is greatly deviated from the gain frequency characteristic B of the current sense amplifier during linear driving. On the other hand, in the voice coil motor driving circuit of this embodiment, as shown in FIG. 11B, the gain frequency characteristic of the current sense amplifier at the time of PWM driving does not have a gain peak, and the current at the time of PWM driving is The gain frequency characteristic A of the sense amplifier and the gain frequency characteristic B of the current sense amplifier during linear driving substantially coincide. As a result, there is an advantage that the settling time when switching from the PWM driving during seeking to the linear driving during tracking is shortened.

  By the way, in a circuit having a plurality of drive modes, such as the voice coil motor drive circuit of the present embodiment, when the coil current Ivcm changes when the mode is switched, the position of the head is shifted, and the time required for correction to the correct position May become longer. Therefore, in order to prevent such a displacement, it is desirable to perform the following control. FIG. 12 shows a value obtained by normalizing the VCM coil drive current difference ΔIvcm generated between the both-side PWM drive mode and the linear drive mode with the maximum instruction value Ivcmmax of the VCM coil in the voice coil motor drive circuit of this embodiment. Is indicated with the horizontal axis representing the instruction value Ivcm of the drive current of the VCM coil.

  FIG. 12 shows that the error current ΔIvcm is close to zero when the coil current Ivcm is in the range of −0.2 mA to 0.4 mA. The timing for changing the drive mode is easier to design if the absolute values are the same point. Thus, the timing for changing the drive mode is the point at which the coil current Ivcm is -0.2 mA, 0.2 mA. The controller 260 in FIG. 1 may change the mode control signal MODE when giving the above value as a current command value to the voice coil motor drive circuit 110.

  Here, if the one-side PWM drive mode is used as the PWM drive mode and the one-side PWM drive mode is shifted to the linear drive mode, the fluctuation of the common mode voltage of the current sense amplifier is suppressed, and the difference ΔIvcm in the coil drive current is set. Since it can be almost eliminated, a more effective effect can be expected in this respect. Therefore, the combined use of the one-side PWM drive mode and the linear drive mode is effective. However, currently, in hard disk storage devices, the current control during tracking is ± 60 μA, which is possible in the linear drive mode, but this requirement cannot be satisfied even in the one-side PWM drive mode as well as the two-sided PWM drive mode. The effect of reducing power consumption in the PWM drive mode is half that in the double-sided PWM drive mode.

  Therefore, it is preferable to use the one-side PWM drive mode or the two-side PWM drive mode as the PWM drive mode depending on the system to be applied. For example, in a system that prioritizes low power consumption, a combination of both-side PWM drive mode and linear drive mode is applied, and in a system that requires higher density recording, one-side PWM drive mode and linear that have a small coil current error when changing the drive mode are applied. A combination of drive modes may be applied.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Not too long. For example, in the above embodiment, when three drive modes are used, it has been described that the seek operation is performed in the “bilateral PWM drive mode” and the “one-side PWM drive mode” and the tracking operation is performed in the “linear drive mode”. However, the present invention is not limited to this. When shifting from the seek operation to the tracking operation, the drive mode is changed in the order of “both sides PWM drive mode” → “one side PWM drive mode” → “linear drive mode”, and conversely, the tracking operation is changed to the seek operation. When shifting to the operation, the drive mode may be changed in the order of “linear drive mode” → “double-side PWM drive mode”. This is because, when shifting from the tracking operation to the seek operation, higher accuracy is not required than in the reverse case.

  In the embodiment, the serial port 111 is provided as a port for inputting / outputting data to / from the controller 260. However, a port for inputting / outputting data in parallel may be provided. However, the number of external terminals can be reduced by using a serial port. Furthermore, in the embodiment, as an example of data received via the serial port 111, data specifying the mode, data for controlling the slew rate of the drive voltage, current command value supplied to the error amplifier 114, and the like are given. You may comprise so that data other than these can be transmitted / received. Further, this port may be a bidirectional port (input port) for receiving data sent from the controller 260 to the voice coil motor drive circuit 110 instead of being bidirectional.

  In the above description, the case where the invention made by the present inventor is applied to a magnetic disk storage device using a hard disk as a storage medium, which is a field of use as a background, has been described. However, the present invention is not limited thereto. However, the present invention can be generally used for a device using a voice coil motor such as a magnetic disk storage device using a flexible disk as a storage medium.

1 is a block diagram showing an outline of a magnetic disk storage device to which the present invention is applied. It is a circuit block diagram which shows the Example of the voice coil motor drive circuit which comprises the magnetic disc memory | storage device to which this invention is applied. It is a circuit block diagram which shows the Example of the PWM comparator which comprises the voice coil motor drive circuit of the Example of FIG. It is a circuit block diagram which shows the Example of the output amplifier which comprises the voice coil motor drive circuit of the Example of FIG. FIG. 5 is a timing chart showing changes in each signal in a PWM drive mode of an output amplifier constituting the VCM driver shown in FIG. 4. FIG. 5 is a timing chart illustrating changes in signals of main parts when the “PWM drive mode” is switched to the “linear drive mode” in the VCM driver shown in FIG. 4. FIG. 3 is a timing chart showing changes in signals of essential parts in a both-side PWM drive mode in the voice coil motor drive circuit of the embodiment of FIG. 2. FIG. It is a characteristic view which shows the frequency characteristic of the phase compensation circuit which comprises the voice coil motor drive circuit of the Example of FIG. 2 shows the relationship between the coil terminal voltage of the spindle motor, the current sense amplifier output in the voice coil motor driving circuit, and the coil current in the semiconductor integrated circuit incorporating the voice coil motor driving circuit and spindle motor driving circuit of the embodiment of FIG. FIG. The relationship between the coil terminal voltage of the spindle motor, the current sense amplifier output in the voice coil motor driving circuit, and the coil current in a semiconductor integrated circuit incorporating a voice coil motor driving circuit and a spindle motor driving circuit without a sampling hold circuit is shown. FIG. FIG. 11A is a characteristic diagram showing input / output gain frequency characteristics at the time of PWM driving and input / output gain frequency characteristics at the time of linear driving in a voice coil motor driving circuit having no sampling hold circuit, and FIG. 6 is a characteristic diagram showing input / output gain frequency characteristics during PWM driving and input / output gain frequency characteristics during linear driving in the voice coil motor driving circuit of FIG. In the voice coil motor driving circuit of the present embodiment, a value obtained by normalizing the error current ΔIvcm generated between the both-side PWM driving mode and the linear driving mode by the maximum driving current Ivcmmax of the coil, with the coil current Ivcm as the horizontal axis. .

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Magnetic storage disk 102 Spindle motor 106 Magnetic head 108 Voice coil motor 110 Voice coil motor drive circuit 111 Serial port 112 Triangular wave generation circuit 113 Current detection circuit (current sense amplifier)
114 Error Amplifier 115 Pulse Control Circuit 116 VCM Driver 119 Phase Compensation Circuit 150 Inverting Amplifier 151, 152 PWM Comparator 161, 162 Output Amplifier 230 Signal Processing Circuit (Signal Processing IC)
260 controller 261 microcomputer 262 compensation circuit

Claims (11)

An output circuit for generating a drive voltage to be applied to both terminals of the coil of the voice coil motor;
A current detection circuit for detecting a voltage between terminals of a current detection resistor connected in series with the coil and detecting a magnitude of a current flowing through the coil;
A voice coil motor drive circuit comprising an error amplifier that generates a voltage according to a potential difference between an output of the current detection circuit that outputs a continuous signal and a current command value from a control device during PWM operation,
In accordance with the output of the error amplifier, the output circuit has a mode in which the terminal of the coil is driven by the PWM control to flow current,
A voice coil motor drive circuit, wherein a slew rate of the drive voltage of the coil is configured to be programmable, and output fluctuation of the current detection circuit generated by the PWM drive is controllable. 2. The first terminal according to claim 1, wherein the first terminal connected to one of the current detection resistors, the second terminal connected to one of the coils, and the first and second terminals are driven by the PWM control. And a second mode in which the first terminal is driven by linear control and the second terminal is driven by the PMW control,
A voice coil motor drive circuit, wherein the other of the current detection resistor and the other of the coil are connected.   3. The inverting circuit for inverting the output of the error amplifier, the first comparator for comparing the output of the error amplifier and a waveform signal having a predetermined frequency and outputting a source current or a sink current, and the inverting circuit according to claim 2. And a second comparator that compares a waveform signal having a predetermined frequency and outputs a source current or a sink current, and the output circuit is configured to output the first comparator and the second comparator according to output currents of the first comparator and the second comparator. 1. A voice coil motor drive circuit for generating a drive voltage applied to the first and second terminals or the first terminal. An output circuit for generating a drive voltage to be applied to both terminals of the coil of the voice coil motor;
A current detection circuit for detecting a voltage between terminals of a current detection resistor connected in series with the coil and detecting a magnitude of a current flowing through the coil;
An error amplifier that generates a voltage according to a potential difference between an output of the current detection circuit that outputs a continuous signal and a current command value from a control device during PWM operation;
A voice coil motor driving circuit capable of flowing current by driving the terminal of the coil by PWM control by the output circuit according to the output of the error amplifier;
A phase compensation circuit having a series-connected resistor and a first capacitor is provided between the output terminal of the error amplifier and a reference potential point, and a second circuit is provided in parallel with the series-connected resistor and the first capacitor. A voice coil motor drive circuit, wherein a capacitor is connected, and a fluctuation signal of the current detection circuit generated by the PWM drive flows through the second capacitor. 5. The first terminal connected to one of the current detection resistors, the second terminal connected to one of the coils, and the first and second terminals driven by the PWM control according to claim 4. And a second mode in which the first terminal is driven by linear control and the second terminal is driven by PMW control,
A voice coil motor drive circuit, wherein the other of the current detection resistor and the other of the coil are connected. An output circuit for generating a drive voltage to be applied to both terminals of the coil of the voice coil motor;
A current detection circuit for detecting a voltage between both terminals of a current detection resistor connected in series with the coil and detecting a magnitude of a current flowing through the coil;
An error amplifier that generates a voltage according to a potential difference between an output of the current detection circuit that outputs a continuous signal and a current command value from a control device during PWM operation;
A voice coil motor driving circuit capable of flowing current by driving the terminal of the coil by PWM control by the output circuit according to the output of the error amplifier;
A first terminal connected to one of the current detection resistors; a second terminal connected to one of the coils; a first mode for PWM controlling the first and second terminals; and the first terminal. The second terminal is driven by the PMW control, and the third mode is driven by the linear control of the first and second terminals. A voice coil motor drive circuit, wherein the other and the other of the coils are connected, and one of the first to third modes is selected according to information indicating a mode supplied from the control device. A magnetic head for reading information from a storage track on a rotationally driven magnetic storage disk, a voice coil motor for moving the magnetic head on the disk, and a current flowing through the coil of the voice coil motor are monitored. A magnetic disk storage device having a voice coil motor drive circuit formed on one semiconductor substrate for moving the magnetic head by feedback controlling the drive current of the coil,
The voice coil motor drive circuit detects a voltage between terminals of a current detection resistor connected in series with the coil to detect a magnitude of a current flowing through the coil, and a continuous signal during PWM operation. An error amplifier that generates a voltage corresponding to the potential difference between the output of the current detection circuit that outputs the current and a current command value from the control device, and a first mode that drives both terminals of the coil of the voice coil motor by PWM control; And a second mode in which both terminals of the coil are driven by linear control, and the first mode is executed when seeking the magnetic head to move across the storage track, and the magnetic head moves adjacent storage tracks. 2. The magnetic disk storage device according to claim 1, wherein the second mode is executed during tracking for sequential scanning. The first terminal connected to one of the current detection resistors, the second terminal connected to one of the coils, and the first terminal driven by linear control according to claim 7, A third mode driven by PMW control,
The other of the current detection resistor and the other of the coil are connected, and the first and second terminals are driven by the PWM control in the first mode, and the first and second terminals are driven in the second mode. A magnetic disk storage device driven by linear control. In claim 8,
The voice coil motor drive circuit includes: an inverting circuit that inverts the output of the error amplifier; a first comparator that compares the output of the error amplifier with a triangular wave having a predetermined frequency and outputs a source current or a sink current; A second comparator that compares the output of the inverting circuit with a triangular wave of a predetermined frequency and outputs a source current or a sink current;
The magnetic disk storage device according to claim 1, wherein the output circuit generates a drive voltage applied to the first and second terminals or the first terminal in accordance with output currents of the first comparator and the second comparator.   8. The phase compensation circuit including a series-connected resistor and a first capacitor is provided between the output terminal of the error amplifier and a reference potential point, and the series-connected resistor and the first capacitor A magnetic disk storage device, wherein a second capacitor is connected in parallel, and a fluctuation signal of the current detection circuit generated by the PWM drive flows through the second capacitor.   8. The input / output port according to claim 7, further comprising an input / output port for transmitting / receiving data to / from the host control device, wherein the input / output port is provided with a register for holding information indicating a mode supplied from the control device. A magnetic disk storage device.

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