JP2007048184A - Memory card - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To raise performance of a memory card by shortening writing processing time in the memory card. <P>SOLUTION: Address conversion tables for managing conversion from logical addresses specified by host equipment into physical addresses of nonvolatile semiconductor memories are stored in the nonvolatile semiconductor memories 3a, 3b provided to the memory card 1, respectively. The address conversion table stored in the nonvolatile semiconductor memory 3a is information about the nonvolatile semiconductor memory 3b and the address conversion table stored in the nonvolatile semiconductor memory 3b is information about the nonvolatile semiconductor memory 3a. For example, when writing is performed to the nonvolatile semiconductor memory 3a, a controller 4 performs update processing of the address conversion table stored in the nonvolatile semiconductor memory 3b while performing writing to the nonvolatile semiconductor memory 3a to shorten the write processing time of the memory card 1. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a technique for improving data reliability in a memory card, and more particularly to a technique that is effective when applied to relief of data block stress associated with data writing / reading processing.

  As storage devices such as personal computers and multi-function terminals, for example, memory cards such as a multimedia card (registered trademark) and a CF (Compact Flash) card (registered trademark) are widely used.

  With the recent demand for higher performance, as a semiconductor memory mounted on a memory card, for example, a non-volatile memory such as a flash memory that can be electrically erased and rewritten electrically and can hold a large amount of data. It is used.

  As such a memory card, one having an address conversion table for converting a logical address designated by a host into a physical address of a memory area in the nonvolatile semiconductor memory is known.

  The information in the address conversion table is written as system information in, for example, a nonvolatile semiconductor memory, and the information in the address conversion table is updated each time data is written to the memory card.

  When writing / reading from / to the nonvolatile semiconductor memory, the controller that controls the memory card converts the logical address designated by the host based on the address conversion table into the physical address of the nonvolatile semiconductor memory, and Write / read data.

  However, the present inventors have found that the data writing technique in the memory card as described above has the following problems.

  That is, in the writing process to the memory card, writing is not performed on the block to be written indicated in the address conversion table, and the data to be written is written to the unused block. At this time, the data of the block to be written remains held.

  When the data is normally written in the unused block, the data in the original writing target block is erased, and the block can be used as an unused block thereafter. After that, since the block which was an unused block to be written is replaced in the address conversion table, the information is updated.

  As described above, the information update process in the address conversion table is a write process to the non-volatile semiconductor memory. Therefore, when viewed from the outside such as a user, the extra data other than the write data is written. Therefore, there is a problem that the writing speed of the memory card is lowered.

  An object of the present invention is to provide a technique capable of greatly improving the writing speed in a memory card and improving the performance of the memory card.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The present invention includes a plurality of nonvolatile semiconductor memories having a plurality of nonvolatile memory cells and capable of storing predetermined information, and a controller for instructing the operation of the nonvolatile semiconductor memory based on a command issued from the outside. The memory card has a logical address supplied from the outside for each physical address of the memory area in the nonvolatile semiconductor memory, and can register the address of the address assigned area in the memory area An address conversion table is provided, and the controller performs parallel writing of data to the nonvolatile semiconductor memory and update processing of the address conversion table when writing data.

  Further, according to the present invention, an address conversion table corresponding to any one nonvolatile semiconductor memory that is a data writing target is stored in any one other nonvolatile semiconductor memory that is not a data writing target, The controller writes data to one nonvolatile semiconductor memory that is a data writing target, and addresses corresponding to the nonvolatile semiconductor memory that is a data writing target to the non-volatile semiconductor memory that is not a data writing target The conversion table is updated.

  Furthermore, in the present invention, the address conversion table is stored in a system area of a nonvolatile semiconductor memory.

  In addition, the present invention includes an address conversion table storage unit that stores an address conversion table corresponding to each of a plurality of nonvolatile semiconductor memories in the controller, and the controller includes any one nonvolatile semiconductor that is a data write target. The address conversion table stored in the address conversion table storage unit is updated while data is written to the memory.

  Furthermore, the outline | summary of the other invention of this application is shown briefly.

  The present invention includes a non-volatile semiconductor memory having a plurality of non-volatile memory cells and capable of storing predetermined information, and a controller for instructing operation of the non-volatile semiconductor memory based on an externally issued command. The memory card can associate a logical address supplied from the outside with each physical address of the memory area in the nonvolatile semiconductor memory, and register the address of the allocated area in the memory area. The controller includes a simple address conversion table, and performs data writing to the nonvolatile semiconductor memory and update processing of the address conversion table in parallel when writing data.

  According to the present invention, the controller further includes an address conversion table storage unit that stores an address conversion table corresponding to the nonvolatile semiconductor memory, and the controller stores the address conversion table while writing data to the nonvolatile semiconductor memory. The address conversion table stored in the section is updated.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  (1) At the time of data writing in the memory card, the time for data writing processing can be shortened.

  (2) With the above (1), the performance of the memory card can be improved.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  FIG. 1 is a block diagram of a memory card according to an embodiment of the present invention, FIG. 2 is an explanatory diagram showing a configuration example of a memory array and an address conversion table provided in the memory card of FIG. 1, and FIG. FIG. 2 is a sequence diagram showing a writing process in the memory card of FIG. 1.

  In the present embodiment, as shown in FIG. 1, the memory card 1 is configured such that a host device 2 can be connected to the outside of the memory card 1, for example, a digital video camera, a mobile phone, a portable music player. It is used as an external storage medium for the host device 2 such as a personal computer.

  The memory card 1 is composed of nonvolatile semiconductor memories 3 a and 3 b, which can be electrically rewritten and erased as exemplified by a flash memory, and a controller 4. Here, the configuration includes two nonvolatile semiconductor memories 3a and 3b, but the number of the nonvolatile semiconductor memories may be two or more.

  The controller 4 includes a host side interface 5, a control unit 6, a storage unit side interface 7, and the like. The controller 4 is connected to the host device 2 and controls the non-volatile semiconductor memories 3a and 3b. The controller 4 reads programs and data stored in the non-volatile semiconductor memories 3a and 3b and outputs them to the host device 2. Or, an instruction to write a program or data input from the host device 2 is issued.

  The host side interface 5 is an interface between the host device 2 and the control unit 6. The control unit 6 manages all the controls in the controller 4. The storage unit side interface 7 is an interface between the control unit 6 and the nonvolatile semiconductor memories 3a and 3b.

  FIG. 2 is an explanatory diagram showing a configuration example of the memory array MA and the address conversion table ATT in the nonvolatile semiconductor memories 3a and 3b.

  As shown in the figure, the memory array MA includes a data block area DBA and a system area SA. The data block area DBA is composed of a plurality of data blocks (for example, 256). A data block is an erasing unit that can collectively erase a plurality of nonvolatile memory cells connected to a word line. The data block area DBA is a user area that can be accessed by the user and stores user data and the like.

  The system area SA is composed of a data block substitution area DBTA and a table block area TBA. The data block replacement area DBTA is an area having a capacity that exceeds the capacity determined as the specification of the entire memory card in anticipation of replacement of a defective data block, and has not previously assigned a physical address corresponding to a logical address. It is an address unallocated area.

  The table block area TBA is an area in which the address conversion table ATT is stored. The address conversion table ATT is a table for managing conversion from a logical address designated by the host device 2 to a physical address of the nonvolatile semiconductor memory 3.

  In this case, the address conversion table ATT provided in the nonvolatile semiconductor memory 3a indicates table information of the nonvolatile semiconductor memory 3b, and the address conversion table ATT provided in the nonvolatile semiconductor memory 3b is nonvolatile. The table information of the semiconductor memory 3a is shown.

  In FIG. 2, for example, the logical address “0” indicates that it is assigned to the physical address “B” as shown in the address conversion table ATT.

  Next, the writing process of the memory card 1 in the present embodiment will be described.

  FIG. 3 is an explanatory diagram showing a sequence of write processing of the memory card 1.

  In FIG. 3, the operation of the host device 2, the controller 4, the nonvolatile semiconductor memory 3a, and the operation sequence of the nonvolatile semiconductor memory 3b are shown from the top to the bottom. Here, a process for writing data to the nonvolatile semiconductor memory 3a will be described.

  First, when the memory card 1 receives a write command from the host device 2, the controller 4 refers to the information of the address conversion table ATT from the nonvolatile semiconductor memories 3a and 3b, and the physical addresses of the write destination block and the unused block. Are acquired respectively (step S101).

  Subsequently, the controller 4 erases the unused block in the corresponding nonvolatile semiconductor memory 3a based on the acquired physical address of the unused block (step S102).

  At this time, the host device 2 transfers data to be written to the controller 4 (step S103). After confirming the end of erasure of the unused block in the nonvolatile semiconductor memory 3a, the controller 4 transfers the data transferred in step S103 to the nonvolatile semiconductor memory 3a to which writing is performed (step S104).

  Subsequently, the host device 2 transfers the next write data to the controller 4 (step S105). Further, the controller 4 writes the data transferred in the process of step S104 into the nonvolatile semiconductor memory 3a (step S106).

  After confirming the end of writing (step S106) in the nonvolatile semiconductor memory 3a, the controller 4 transfers the next data transferred in step S105 to the nonvolatile semiconductor memory 3a (step S107).

  And the controller 4 writes the data transferred by the process of step S107 to the non-volatile semiconductor memory 3a (step S108). Subsequently, the controller 4 transfers update data of the address conversion table ATT accompanying the writing process to the nonvolatile semiconductor memory 3b (step S109), and the address conversion table ATT of the nonvolatile semiconductor memory 3b is updated based on the data. (Step S110).

  Therefore, since the data writing process (step S108) and the address conversion table ATT update (steps S109 and S110) can be processed in parallel, the writing process time in the memory card 1 can be shortened. .

  On the other hand, for example, when the address conversion table of the non-volatile semiconductor memory 3a is provided in the table block area of the non-volatile semiconductor memory 3a, as shown by the dotted line block in FIG. After the write process is completed, the update data of the address conversion table is transferred to the nonvolatile semiconductor memory 3a (step S1001), and then the address conversion table of the nonvolatile semiconductor memory 3a is updated (step S1002). Extra writing time due to processing will occur.

  Thereby, according to the present embodiment, the writing time of the nonvolatile semiconductor memories 3a and 3b can be reduced, so that the writing speed in the memory card 1 can be improved.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the above embodiment, the address conversion table is provided in the nonvolatile semiconductor memory. However, as shown in FIG. 4, the nonvolatile semiconductor memories 3a and 3b are connected to the control unit 6 in the controller 4, respectively. You may make it provide the address conversion table storage part 6a which stores a corresponding address conversion table.

  In this case, the address conversion table storage unit 6a is configured by, for example, a nonvolatile semiconductor memory exemplified by a flash memory.

  With the configuration of FIG. 4, even if the memory card 1 has only one nonvolatile semiconductor memory connected to the controller 4, the address conversion table is updated while data is written to the nonvolatile semiconductor memory. It can be performed in parallel.

  The present invention is suitable for a technique for reducing the time for data writing processing to a memory card and improving the performance of the memory card.

1 is a block diagram of a memory card according to an embodiment of the present invention. FIG. 2 is an explanatory diagram illustrating a configuration example of a memory array and an address conversion table provided in the memory card of FIG. 1. FIG. 2 is a sequence diagram showing a writing process in the memory card of FIG. 1. It is a block diagram of the memory card by other embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Memory card 2 Host apparatus 3 Non-volatile semiconductor memory 4 Controller 5 Host side interface 6 Control part 6a Address conversion table storage part 7 Storage part side interface MA Memory array KU Management unit DBA Data block area SA System area DBEA Data block empty area TBA Table block area

Claims (6)

A memory having a plurality of nonvolatile memory cells and capable of storing predetermined information, and a controller for instructing operation of the nonvolatile semiconductor memory based on a command issued from the outside A card,
The memory card is
Corresponding to a logical address supplied from the outside for each physical address of the memory area in the nonvolatile semiconductor memory, comprising an address conversion table capable of registering the address of the address assigned area in the memory area,
The controller is
A memory card, wherein data writing to the nonvolatile semiconductor memory and update processing of the address conversion table are performed in parallel at the time of data writing. The memory card according to claim 1,
An address conversion table corresponding to any one of the nonvolatile semiconductor memories to be written with data is stored in any other one of the nonvolatile semiconductor memories not to be written with data,
The controller is
The data corresponding to the nonvolatile semiconductor memory that is the data writing target in the nonvolatile semiconductor memory that is not the data writing target while writing the data to the one nonvolatile semiconductor memory that is the data writing target A memory card that updates an address conversion table. The memory card according to claim 2, wherein
The address conversion table is:
A memory card stored in a system area of the nonvolatile semiconductor memory. The memory card according to claim 1,
The controller is
An address conversion table storage unit for storing an address conversion table corresponding to each of the plurality of nonvolatile semiconductor memories;
The controller is
A memory card, wherein the address conversion table stored in the address conversion table storage unit is updated while data is written to any one of the nonvolatile semiconductor memories to be written. Memory having one nonvolatile semiconductor memory having a plurality of nonvolatile memory cells and capable of storing predetermined information, and a controller for instructing operation of the nonvolatile semiconductor memory based on a command issued from the outside A card,
The memory card is
Corresponding to a logical address supplied from the outside for each physical address of the memory area in the nonvolatile semiconductor memory, comprising an address conversion table capable of registering the address of the address assigned area in the memory area,
The controller is
A memory card, wherein data writing to the nonvolatile semiconductor memory and update processing of the address conversion table are performed in parallel at the time of data writing. The memory card according to claim 5, wherein
The controller is
An address conversion table storage unit for storing an address conversion table corresponding to the nonvolatile semiconductor memory;
The controller is
A memory card that updates the address conversion table stored in the address conversion table storage unit while writing data to the nonvolatile semiconductor memory.

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