JP2006339491A - Method for reflow soldering of semiconductor package and circuit board, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and a method for reflow soldering of the same for improving fatigue resistance of the soldering part of the semiconductor device by making the soldering angle of a solder bump an obtuse angle to form the solder bump to be almost in a shape of a drum by a simple method. <P>SOLUTION: Between the semiconductor package and a circuit board, a spacer member is arranged. Thus, in the case of the reflow soldering, a gap between the semiconductor package and the circuit board is expanded longer than that before the reflow soldering by thermal expansion of the spacer member and thereafter, the solder is solidified with the gap kept therein, so that the soldering angle of the solder bump is made to be the obtuse angle to form the solder bump almost in the shape of the drum. The semiconductor device has a structure where stress and strain at the solder bump is dispersed during operation, so that the fatigue resistance strength at the soldering is improved in the fatigue life and reliability of the semiconductor device. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor package and a semiconductor device in which the semiconductor package is mounted on a circuit board, and more particularly, a semiconductor device in which a semiconductor package having solder bumps as external connection terminals is electrically and mechanically connected to the circuit board, and a semiconductor The present invention relates to a reflow soldering method for a package and a circuit board.

  Conventionally, BGA (Ball Grid Array) and CSP (Chip Size Package or Chip Scale Package) are known as semiconductor packages using solder bumps for external connection terminals. These semiconductor packages were developed in response to miniaturization, weight reduction, and high functionality of electronic devices. By arranging solder bumps in an area array, the semiconductor package aims to reduce the mounting area and increase the density. The package is light, thin and small. FIG. 3 shows a schematic structure of a so-called semiconductor device in which the semiconductor package is electrically and mechanically connected to a circuit board by a reflow soldering method. Briefly, the semiconductor element 1 is mounted on the central portion of one surface of the insulating member 2 by a die bond material 4, and the wiring pattern 3 for electrically connecting to the semiconductor element 1 is formed on the surface of the insulating member 2. Is formed. The bonding pad 6 provided along the periphery of one surface of the semiconductor element 1 and the wiring pattern 3 are electrically connected by the bonding wire 7, and the periphery of the semiconductor element 1 is sealed with the sealing resin material 8. The solder bumps 9 are arranged on the other surface of the insulating member 2 in a state of being connected to the wiring pattern 3. Corresponding to the arrangement of the solder bumps 9, the wiring electrodes 11 provided on the insulating substrate 10 constituting the circuit board 60 are arranged in an area array, and at least the solder bumps 9 are subjected to reflow soldering on the wiring electrodes 11. A part is melt | dissolved and the wiring electrode 11 and the solder bump 9 are joined, and it completes. Due to the structure of this semiconductor device, the stress and strain generated due to the difference in the thermal expansion coefficient between the components of the semiconductor package and circuit board during the large temperature change during operation of the electronic equipment and the start / stop of the power supply When repeatedly concentrated on the solder bumps, there is a concern that the solder bumps are cracked to break and stop functioning as a semiconductor device. Therefore, it is necessary to improve the fatigue life of the semiconductor package and the semiconductor device in which the semiconductor package is mounted on the circuit board by taking measures to improve the fatigue strength at the solder joint.

  As one of the countermeasures for this, it is known to improve the anti-fatigue strength of the solder joint portion by forming the solder bump so that the joint angle becomes an obtuse angle. As shown in FIG. 6, in the conventional reflow soldering method, the semiconductor package descends due to the weight of the semiconductor package, so that the solder bump shape after reflow soldering is a drum-shaped shape, that is, the solder bump joint angle is an acute angle, and the solder joint portion There is a problem that solder bumps are easily broken because stress and strain tend to concentrate on the surface. Therefore, by forming the solder bumps into a shape that makes the bonding angle obtuse, that is, a drum shape, it is possible to disperse the stress and strain applied to the solder bonding portion and make it difficult to break.

For example, in Japanese Patent Laid-Open No. 11-274682, an elastic member is interposed between a semiconductor package and a circuit board as shown in FIGS. 4 and 5, and solder bumps are formed in a drum shape using the compressive deformation of the elastic member. A method is disclosed. That is, as shown in FIG. 4, when the semiconductor package 50 is mounted on the circuit board 60, the elastic member 20 is interposed between the semiconductor package 50 and the circuit board 60, and the position of the wiring pattern 3 is located on the circuit board 60. First, the semiconductor package 50 is positioned and mounted on the circuit board 60 by being held by the suction tool 21 so as to correspond to the wiring electrode 11, and then the semiconductor package 50 is pressed by the suction tool 21 to compressively deform the elastic member 20. As shown in FIG. 5, while the solder bump 9 is heated and melted in this state, the suction tool 21 is released to release the compression deformation of the elastic member 20, thereby reducing the shape of the solder bump 9. It is comprised by the 2nd process formed in a mold shape.
JP 11-274682 A

  However, the above-described conventional method requires a large-scale and complicated suction device for controlling the deformation of the elastic member by pressurizing, holding, and releasing the semiconductor package to form the solder bump into a drum shape. Will also increase.

  SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and is intended to improve the fatigue strength of a solder joint portion of a semiconductor device by making the solder bump joint angle an obtuse angle and forming a generally drum shape by a simple method. An object of the present invention is to provide a semiconductor device and a reflow soldering method thereof.

  The configuration of the present invention that achieves the above object of the present invention is a reflow soldering method in which a semiconductor package is solder-connected to a circuit board by reflow, and a spacer member is disposed between the semiconductor package and the circuit board. In reflow soldering, the space between the semiconductor package and the circuit board is expanded more than before reflow soldering due to thermal expansion of the spacer member, and then the solder is solidified while maintaining the space. This is a reflow soldering method for a package and a circuit board.

  According to the present invention, the solder bumps connecting the semiconductor package and the circuit board are solder bumps up to the height of the expanded spacer member due to the thermal expansion of the spacer member disposed between the semiconductor package and the circuit board during reflow soldering. Is stretched and solidified in a state where the joining angle becomes an obtuse angle and is formed in a generally drum shape, so that it is possible to form a solder bump having high reliability and high strength against fatigue. Further, it is possible to provide a simple reflow soldering method that does not require a large-scale and complicated device such as a suction device.

  Also, a reflow soldering method for soldering a semiconductor package to a circuit board by reflow, wherein the weight of the semiconductor package is P, the elastic modulus of the spacer member is E, and the cross-sectional area (if there are a plurality of spacer members, each spacer When the total cross-sectional area of the member is A and the reflow temperature difference during reflow soldering is Δt, the thermal expansion coefficient α of the spacer member is P / (A · E) / Δt <α <(2+ ( A · E)) / Δt is a reflow soldering method for a semiconductor package and a circuit board.

  According to the present invention, the solder bump height and the solder bump shape can be optimally formed by setting the shape of the spacer member, the thermal expansion coefficient, and the like to appropriate values.

  Further, the semiconductor device includes a circuit board and a semiconductor package mounted on a surface of the circuit board by a reflow soldering method, wherein a spacer member is disposed between the semiconductor package and the circuit board, and reflow When soldering, the space between the semiconductor package and the circuit board becomes wider than before reflow soldering due to thermal expansion of the spacer member, and then the solder is solidified while maintaining the space. It is.

  According to the present invention, the solder bumps connecting the semiconductor package and the circuit board are solder bumps up to the height of the expanded spacer member due to the thermal expansion of the spacer member disposed between the semiconductor package and the circuit board during reflow soldering. Is stretched, the joint angle becomes an obtuse angle, and it is solidified in a state of being formed in a generally drum shape. The semiconductor device configured by the above reflow soldering has a structure in which stress and strain generated due to the difference in thermal expansion coefficients of the components of the semiconductor package and the circuit board are dispersed, and the generation of cracks may be hindered. In addition, reliability and fatigue strength at the solder joint are improved, and the life of the semiconductor device is improved. In addition, it is possible to provide a highly reliable semiconductor device by a simple method without using a costly large-scale and complicated device such as an adsorption tool.

  The semiconductor device includes a circuit board and a semiconductor package mounted on a surface of the circuit board by a reflow soldering method, wherein the weight of the semiconductor package is P, the elastic modulus of the spacer member is E, When the area (sum of cross-sectional areas of each spacer member when there are a plurality of spacer members) is A, and the reflow temperature difference during reflow soldering is Δt, the thermal expansion coefficient α of the spacer member is P / (A E) / Δt <α <(2+ (A · E)) / Δt The semiconductor device is characterized by being set.

  According to the present invention, by setting the shape of the spacer member, the thermal expansion coefficient, etc. to appropriate values, the semiconductor is formed in a state where the solder bump height and the solder bump shape are optimal for reliability and fatigue resistance. An apparatus can be provided.

  As described above, according to the present invention, it is possible to perform reflow soldering that realizes improvement of reliability and fatigue resistance of the solder joint portion, and the fatigue life of the semiconductor device constituted thereby can be dramatically extended. .

  As described above, the solder bumps connecting the semiconductor package and the circuit board are solder bumps up to the height of the expanded spacer member due to the thermal expansion of the spacer member disposed between the semiconductor package and the circuit board during reflow soldering. Is stretched and solidified in a state where the joining angle becomes an obtuse angle and is formed in a generally drum shape, so that it is possible to form a solder bump having high reliability and high strength against fatigue. Further, it is possible to provide a simple reflow soldering method that does not require a large-scale and complicated device such as a suction device.

  In addition, by setting the spacer member shape, the thermal expansion coefficient, etc. to appropriate values, the solder bump height and the solder bump shape can be formed in an optimum state.

  In addition, the solder bump connecting the semiconductor package and the circuit board is extended to the height of the expanded spacer member due to the thermal expansion of the spacer member disposed between the semiconductor package and the circuit board during reflow soldering. Then, the joint angle becomes an obtuse angle and is solidified in a state of being formed in a generally drum shape. The semiconductor device configured by the above reflow soldering has a structure in which stress and strain generated due to the difference in thermal expansion coefficients of the components of the semiconductor package and the circuit board are dispersed, and the generation of cracks may be hindered. In addition, reliability and fatigue strength at the solder joint are improved, and the life of the semiconductor device is improved. In addition, it is possible to provide a highly reliable semiconductor device by a simple method without using a costly large-scale and complicated device such as an adsorption tool.

  By setting the shape of the spacer member and the coefficient of thermal expansion to appropriate values, it is possible to provide a semiconductor device in which the solder bump height and the solder bump shape are optimally set for reliability and fatigue resistance. It becomes possible.

  As described above, according to the present invention, it is possible to perform reflow soldering that realizes improvement of reliability and fatigue resistance of the solder joint portion, and the fatigue life of the semiconductor device constituted thereby can be dramatically extended. .

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description of the drawings, the same symbols are assigned to the same or similar parts.

  FIG. 1 is a schematic cross-sectional view of a semiconductor device constructed by a method of soldering a semiconductor package and a circuit board according to the first embodiment of the present invention, and FIG. 8 is a first embodiment of the present invention. It is a schematic diagram which shows the semiconductor package which concerns on, and the soldering method of a circuit board. FIG. 7 is an enlarged view of a solder joint portion in the semiconductor device configured by the method of soldering the semiconductor package and the circuit board according to the first embodiment of the present invention. As shown in FIGS. 1 and 8, in the semiconductor package according to the first embodiment of the present invention, the semiconductor element 1 is mounted on the central portion of one surface of the insulating member 2 by the die bond material 4. The periphery is sealed with a sealing resin material 8. A plurality of bonding pads 6 are provided along the periphery of one surface of the semiconductor element 1, and the bonding pads 6 and the plurality of wiring patterns 3 provided on one surface of the insulating member 2 are bonded wires 7 respectively. Electrically connected. Then, the wiring pattern 3 provided on the insulating member 2 and the solder bump 9 are electrically joined.

  The insulating member 2 is specifically a polyimide resin which is an insulating elastomer. Any material other than polyimide resin may be used as long as it is an electrically insulating material. For example, there are an epoxy resin, a glass epoxy resin, a BT (bismaleide triazine) resin, an aramid resin, and the like. A part of the solder bump 9 is electrically bonded to and solidified by an electrode part which is a part of the wiring pattern 3 by melting at the time of annealing.

  The wiring pattern 3 is made of copper which is a low resistance conductive material. The bonding wire 7 is also made of gold or aluminum which is a low resistance conductive material. As described above, as the material of the wiring pattern 3 or the bonding wire 7, a conductor that has good wettability with solder and low electrical resistance is preferably used.

  Specifically, the sealing resin material 8 is an epoxy resin. Any material other than an epoxy resin may be used as long as it is an electrically insulating material. For example, there are polyimide resin and phenol resin, and the same material as the insulating member 2 may be used.

  The solder bumps 9 are Sn-Ag series, specifically Sn-3.0Ag-0.5Cu. In addition, any Pb-free solder such as Sn—Zn, Sn—Bi, Sn—Au, or Sn—Al may be used, and a lead eutectic Sn—Pb may be used.

  The semiconductor package having the above configuration has an external dimension of 13 mm × 13 × 1.2 and a mass of about 0.5 g.

  The circuit board according to the first embodiment of the present invention will be described below. In the circuit board according to the first embodiment of the present invention, the wiring electrode 11 is arranged on one surface of the insulating substrate 10 corresponding to the arrangement of the solder bumps 9 of the semiconductor package, and the one surface of the insulating substrate 10 is insulative. It is coded with a protective layer 12.

  Specifically, the insulating substrate 10 is a glass epoxy resin which is an insulating material. The wiring electrode 11 is made of copper, which is a low resistance conductive material.

  The material of the insulating substrate 10 may be anything as long as it is an electrically insulating material. Examples thereof include paper phenol resin, glass epoxy resin, polyimide resin, and BT (bismaleide triazine) resin.

  As a material for the wiring electrode 11, a conductor that has good solder and wettability and is electrically low in resistance is preferably used.

  The material of the insulating protective layer 12 may be any material having electrical insulation, and may be the same material as the insulating member 2 constituting the semiconductor package.

  A semiconductor package and circuit board reflow soldering method and a semiconductor device constituted by the semiconductor package and the circuit board according to the first embodiment of the present invention will be described below with reference to FIG. The reflow soldering method for the semiconductor package and the circuit board according to the first embodiment of the present invention is to print the cream solder 15 on the wiring electrode 11 by the method of moving the squeegee with the mask in close contact with the circuit board 60 described above. Then, an adhesive (not shown) is applied thereon with a dispenser, and the spacer member 13 is placed at an appropriate position on the circuit board 60. At this time, the spacer member 13 is installed using an adhesive at a position where it does not come into contact with the solder bumps 9 during thermal expansion during reflow in the reflow apparatus (a). In this embodiment, one spacer member is provided on the circuit board 60 so as to be located at the center of the semiconductor package 50. However, when solder bumps are arranged at the center of the semiconductor package 50, FIG. As shown, four spacer members may be provided on the circuit board 60 so as to be positioned at the corners of the semiconductor package 50. The height of the spacer member is set to be the same as the height of the solder bump 9 before reflow soldering. As described above, the shape, position, and number of the spacer members 13 are optimized and arranged in accordance with the structure of the semiconductor package and the positional relationship between the semiconductor package and the circuit board (a). Then, the semiconductor package is mounted by a mounter or the like so that the solder bump 9 of the semiconductor package 50 described above is positioned on the wiring electrode 11 (b). Then, the solder bump 9 is transported into the reflow apparatus in that state, and at least a part of the solder bump 9 is heated and melted by hot air irradiation by heat rays such as infrared rays and laser light or electric heat from a heated atmosphere. The maximum value of the reflow temperature during reflow soldering when the solder bump 9 is Sn-3.0Ag-0.5Cu is set to about 260 ° C. (C). At this time, the spacer member 13 disposed between the semiconductor package 50 and the circuit board 60 extends vertically upward due to thermal expansion. Since the force that pushes the semiconductor package 50 upward in the vertical direction due to this thermal expansion is greater than the weight of the semiconductor package 50, the distance between the semiconductor package 50 and the circuit board 60 becomes wider than before reflow soldering. In this process, since the solder bumps are stretched vertically upward, as shown in FIG. 7, a drum-shaped shape is formed in which the solder bump has an obtuse angle and a narrow central portion (d). Then, after the solder bumps are solidified in the state of the drum shape in the cooling process, the solder bumps are taken out from the cooling device, and the semiconductor device in which the semiconductor package is mounted on the circuit board is completed (e).

The spacer member in the 1st Embodiment of this invention is demonstrated. The spacer member 13 disposed between the semiconductor package 50 and the circuit board 60 during reflow soldering has a weight P of the semiconductor package 50, an elastic modulus E of the spacer member 13, and a cross-sectional area (when there are a plurality of spacer members). Is the sum of the cross-sectional areas of the spacer members) and A is the reflow temperature difference during reflow soldering (the difference between the temperature at the start of reflow and the maximum temperature at the reflow) is Δt. The thermal expansion coefficient α is set within the range of P / (A · E) / Δt <α <(2+ (A · E)) / Δt. The setting within the range of the coefficient of thermal expansion is as follows. That is, the spacer member 13 contracts vertically downward by ΔL1 = L · P / (A · E) due to the weight of the semiconductor package 50 (L is the vertical height of the spacer member before reflow soldering). On the other hand, the spacer member 13 extends vertically upward by ΔL2 = L · α · Δt due to the temperature load during reflow soldering. Then, the height of the spacer member after reflow soldering becomes the difference ΔL2−ΔL1 between them, thereby defining the distance between the semiconductor package 50 and the circuit board 60. Accordingly, the distance between the semiconductor package 50 after reflow soldering and the circuit board 60 is wider than the height L of the spacer member before reflow soldering, and is three times (3L) the height L of the spacer member before reflow soldering. In order to form the spacer member so as to be narrower, the thermal expansion coefficient α of the spacer member may be in the range of P / (A · E) / Δt <α <(2+ (A · E)) / Δt. If it is smaller than this range, the amount of shrinkage of the spacer member due to the weight of the semiconductor package is larger than the amount of expansion of the spacer member due to thermal expansion during reflow soldering, so the semiconductor package falls and the solder bumps after reflow soldering are It has a drum shape, and stress and strain tend to concentrate on the solder joints and break easily. On the other hand, if it is larger than this range, during reflow soldering, the solder bumps are stretched along with the extension amount of the spacer member, and the area of the center part of the solder bumps after reflow soldering becomes very narrow, and the vertical direction There is a risk that the mechanical strength against the load is not ensured and the electrical connection between the semiconductor package and the circuit board cannot be secured. For example, when the material of the spacer member 13 is an epoxy resin having an elastic coefficient E = 18.0 GPa, a thermal expansion coefficient α = 15 × 10 ⁻⁶ / ° C., and a cross-sectional area A = 0.05 mm ² , In the embodiment, the thermal expansion coefficient α to be satisfied by the spacer member is 2.42 × 10 ⁻⁹ / ° C. <α <8.89 × 10 ⁻³ / ° C., and the thermal expansion coefficient of the epoxy resin is within the above range. It is possible to achieve the object in the present invention. Of course, the spacer member 13 may be any metal or non-metal as long as its thermal expansion coefficient α is in the range of P / (A · E) / Δt <α <(2+ (A · E)) / Δt. It goes without saying that it is good.

  According to the first embodiment of the present invention, the solder bump connecting the semiconductor package and the circuit board expands due to the thermal expansion of the spacer member disposed between the semiconductor package and the circuit board during reflow soldering. The solder bumps are extended to the height of the spacer member, the joint angle becomes obtuse, and the solder bumps are solidified in a generally drum-shaped shape as shown in FIG. High solder bumps can be formed. Further, it is possible to provide a simple reflow soldering method that does not require a large-scale and complicated device such as a suction device. The semiconductor device having the above structure has a structure in which stress and strain generated due to differences in thermal expansion coefficients of the components of the semiconductor package and the circuit board are dispersed, which can inhibit the occurrence of cracks, and solder joints The reliability and fatigue strength of the semiconductor device are improved, and the life of the semiconductor device is improved.

  FIG. 2 is a schematic cross-sectional view of a semiconductor device configured by a method of soldering a semiconductor package and a circuit board according to the second embodiment of the present invention, and FIG. 10 is a second embodiment of the present invention. It is a schematic diagram which shows the semiconductor package which concerns on, and the soldering method of a circuit board. FIG. 2 shows a semiconductor device in which a fixing member is installed between the semiconductor package 50 and the circuit board 60 in addition to the spacer member. Other configurations are the same as those in the first embodiment.

  Hereinafter, a semiconductor package and circuit board reflow soldering method according to a second embodiment of the present invention, and a semiconductor device constituted thereby will be described with reference to FIG. The reflow soldering method of the semiconductor package and the circuit board in the second embodiment of the present invention is to print the cream solder 15 on the wiring electrode 11 by a method of moving the squeegee while bringing the mask into close contact with the circuit board 60, An adhesive (not shown) is applied thereon with a dispenser, and the spacer member is placed at an appropriate position on the circuit board 60. This spacer member may be the same as in the first embodiment. At this time, the four fixing members 14 are installed on the circuit board 60 by using an adhesive so as to be positioned at the corners of the semiconductor package 50. The fixing member 14 may be anywhere as long as it does not come into contact with the solder bump during thermal expansion during reflow in the reflow apparatus. The fixing member 14 may be anything as long as it has sufficient rigidity to support the weight of the semiconductor package 50. For example, copper, aluminum, steel, or the like is used. The height of the fixing member is set to be the same as the height of the solder bump 9 before reflow soldering. As described above, the shape, position, and number of the fixing members 14 are optimized and arranged in accordance with the structure of the semiconductor package, the positional relationship between the semiconductor package and the circuit board, and the position of the space member (a). Then, the semiconductor package is mounted by a mounter or the like so that the solder bump 9 of the semiconductor package 50 is positioned on the wiring electrode 11 (b). Then, it is conveyed into the reflow apparatus in that state, and at least a part of the solder bump 9 is heated and melted by hot-air irradiation with heat rays such as infrared rays or laser light or electric heat from a heated atmosphere (c). At this time, the fixing member 14 prevents the semiconductor package from dropping due to its own weight, so that the distance between the semiconductor package 50 and the circuit board 60 does not become narrower than before reflow. The spacer member 13 disposed between the semiconductor package 50 and the circuit board 60 extends vertically upward due to thermal expansion. Due to this thermal expansion, the semiconductor package 50 is pushed vertically upward, and the distance between the semiconductor package 50 and the circuit board 60 becomes wider than before reflow soldering. In this process, since the solder bumps are stretched vertically upward, as shown in FIG. 7, a drum-shaped shape is formed in which the solder bump has an obtuse angle and a narrow central portion (d). Then, after the solder bumps are solidified in the state of the drum shape in the cooling process, the solder bumps are taken out from the cooling device, and the semiconductor device in which the semiconductor package is mounted on the circuit board is completed (e).

  According to the second embodiment of the present invention, the solder bump connecting the semiconductor package and the circuit board expands due to the thermal expansion of the spacer member disposed between the semiconductor package and the circuit board during reflow soldering. The solder bumps are extended to the height of the spacer member, the joint angle becomes obtuse, and the solder bumps are solidified in a generally drum-shaped shape as shown in FIG. High solder bumps can be formed. Further, when the fixing member disposed between the semiconductor package and the circuit board is subjected to reflow soldering, the distance between the semiconductor package and the circuit board can be surely increased in order to prevent the semiconductor package from dropping due to its own weight. Is possible. The semiconductor device having the above structure has a structure in which stress and strain generated due to differences in thermal expansion coefficients of the components of the semiconductor package and the circuit board are dispersed, which can inhibit the occurrence of cracks, and solder joints The reliability and fatigue strength of the semiconductor device are improved, and the life of the semiconductor device is improved.

  As described above, according to the present invention, it is possible to perform reflow soldering that realizes improvement of reliability and fatigue resistance of the solder joint portion, and the fatigue life of the semiconductor device constituted thereby can be dramatically extended. .

  The above-described embodiment is an example of a preferred embodiment of the present invention. However, the present invention is not limited to this, and various modifications can be made without departing from the scope of the present invention.

1 is a schematic cross-sectional view showing a semiconductor device according to a first embodiment of the present invention. It is a typical sectional view showing a semiconductor device concerning a 2nd embodiment of the present invention. It is typical sectional drawing which shows the outline of a semiconductor device. It is typical sectional drawing which shows the conventional semiconductor device. It is typical sectional drawing which shows the conventional semiconductor device. It is an enlarged view of a solder joint in a conventional semiconductor device. It is an enlarged view of the solder joint part in the semiconductor device of this invention. It is a schematic diagram which shows the reflow soldering method of the semiconductor package and circuit board which concern on the 1st Embodiment of this invention. It is a schematic diagram which shows the reflow soldering method of the semiconductor package and circuit board which concern on the 1st Embodiment of this invention. It is a schematic diagram which shows the reflow soldering method of the semiconductor package and circuit board which concern on the 2nd Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Insulating member 3 Wiring pattern 4 Die bond material 5 Insulating protective film 6 Bonding pad 7 Bonding wire 8 Sealing resin material 9 Solder bump 10 Insulating substrate 11 Wiring electrode 12 Insulating protective layer 13 Spacer member 14 Fixing member 15 Cream solder 20 Elastic member 21 Adsorption device 50 Semiconductor package 60 Circuit board

Claims (4)

  A reflow soldering method for solder-connecting a semiconductor package to a circuit board by reflow, wherein a spacer member is disposed between the semiconductor package and the circuit board, and the reflow soldering causes the thermal expansion of the spacer member to A reflow soldering method for a semiconductor package and a circuit board, wherein the distance between the semiconductor package and the circuit board is larger than that before reflow soldering, and then the solder is solidified while maintaining the distance.   A reflow soldering method in which a semiconductor package is solder-connected to a circuit board by reflow, wherein the weight of the semiconductor package is P, the elastic modulus of the spacer member is E, and the cross-sectional area (if there are a plurality of spacer members, When the total cross-sectional area) is A and the reflow temperature difference during reflow soldering is Δt, the thermal expansion coefficient α of the spacer member is P / (A · E) / Δt <α <(2+ (A · 2. The reflow soldering method for a semiconductor package and a circuit board according to claim 1, wherein the reflow soldering is set within a range of E)) / Δt.   A semiconductor device comprising a circuit board and a semiconductor package mounted on the surface of the circuit board by a reflow soldering method, wherein a spacer member is disposed between the semiconductor package and the circuit board, and reflow soldering is performed. In this case, the space between the semiconductor package and the circuit board becomes larger than that before reflow soldering due to thermal expansion of the spacer member, and then the solder is solidified while maintaining the space.   A semiconductor device comprising a circuit board and a semiconductor package mounted on the surface of the circuit board by a reflow soldering method, wherein the weight of the semiconductor package is P, the elastic modulus of the spacer member is E, and the cross-sectional area ( When there are a plurality of spacer members, the thermal expansion coefficient α of the spacer member is P / (A · E) where A is the sum of the cross-sectional areas of the spacer members and Δt is the reflow temperature difference during reflow soldering. 4. The semiconductor device according to claim 3, wherein the semiconductor device is set within a range of:) / Δt <α <(2+ (A · E)) / Δt.

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