JP2006333990A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a gaming machine having a bias in the probability of determining a random number to be sampled by a sampling circuit, improving a game, and improving a defense against an illegal act that intentionally changes a random number value. To do.
A gaming machine 1 of the present invention includes a dip switch 37a for setting a sampling period for sampling a random number generated by a random number generator 36 by a sampling circuit 37. The sampling circuit 37 is set to the dip switch 37a. One random number is acquired at a specific cycle.
[Selection] FIG. 30

Description

  The present invention includes display means for variably displaying and stopping a plurality of symbols necessary for a game, control means such as a microcomputer for controlling the display means, and notification means for performing notification related to the game. The present invention relates to slot machines, pachislot machines, pachinko machines, and other game machines.

  For example, pachislot machines that are currently mainstream have a plurality of types of winning modes. This winning mode is called a display combination. In particular, when a certain display combination is displayed, the gaming state is better in condition than the normal state for a predetermined period. As such a display combination, a display combination (big bonus, hereinafter referred to as “BB”) capable of playing a game that gives a relatively large profit to the player a predetermined number of times, and a relatively small profit to the player There is a display combination (regular bonus, hereinafter referred to as “RB”) capable of playing a given game a predetermined number of times. Hereinafter, BB and RB are collectively referred to as a bonus.

  In the mainstream models, a display combination is established in which a combination of predetermined symbols is arranged along a validated winning line of a plurality of reels where a plurality of symbols necessary for a game are arranged, and medals are paid out. In order to do this, the symbol combination that indicates the display of the winning display combination (hereinafter referred to as “winning combination”) is won by the internal lottery process, and the predetermined winning line on which the reel is activated is displayed. The player is required to perform a stop operation at a timing at which the player can stop. In other words, no matter how much you win, if the timing of the player's stop operation is bad, the winning combination cannot be displayed. That is, a gaming machine that requires a technique for performing a stop operation in a timely manner (having a high specific gravity of technical intervention called “to push”) is currently the mainstream.

In the current mainstream model, the random number used when determining the winning combination is determined by the sampling circuit acquiring the random number generated by the random number generator at a constant cycle.
Japanese Patent Publication No. 3-72313

  However, in the gaming machine as described above, since the sampling circuit samples the random number generated by the random number generator at a constant cycle, each random number is determined with a substantially uniform probability, and the probability bias There is no improvement in playability. Moreover, the defense against the fraud which changed the value of a random number intentionally was low.

  In view of the above problems, the present invention provides a bias in the probability of determining a random number for ring circuit sampling, improves game playability, and protects against fraudulent acts that intentionally change the value of the random number. Provide enhanced gaming machines.

  Specifically, the present invention provides the following.

  Display means (for example, reels 3L, 3C, 3R, etc.) that display and stop display of a plurality of symbols, and winning combination determination probability management means (for example, probability lottery table (FIG. 9)) that manages the determined probabilities And a ROM 32 for storing the random number), random number generating means for generating random numbers at a predetermined cycle (for example, random number generator 36), and one random number from the random numbers generated by the random number generating means at a specific cycle. Based on the random number acquisition means (for example, sampling circuit 37) to be acquired, the one random number acquired by the random number acquisition means, and the determination probability managed by the winning combination determination probability management means A winning combination determining means for determining a combination (for example, S6 (FIG. 18), CPU 31 for executing a probability lottery process (FIG. 21), etc.), A gaming machine comprising specific cycle setting means (for example, a dip switch 37a) for setting the specific cycle, and acquiring the one random number at a specific cycle set in the specific cycle setting means .

  According to the present invention, the random number acquisition unit includes the specific cycle setting unit for setting the specific cycle, and acquires one random number at the specific cycle set in the specific cycle setting unit, so that one random number is determined. The probability that the winning combination is determined can be biased, and thus the probability that the winning combination determining means determines the winning combination can be biased, which leads to an improvement in the interest of the game. In addition, it is possible to improve the prevention of illegal acts that intentionally change the value of one random number.

  According to the present invention, it is possible to give a bias to the probability that one random number is determined, and thus it is possible to give a bias to the probability that the winning combination determining means determines the winning combination, thereby improving the interest of the game. Connected. In addition, it is possible to improve the prevention of illegal acts that intentionally change the value of one random number.

  Hereinafter, an embodiment of the present invention will be described with reference to FIGS.

  First, with reference to FIG. 1, the external appearance of the gaming machine 1 according to the embodiment of the present invention will be described. FIG. 1 is a perspective view showing an appearance of the gaming machine 1. The gaming machine 1 is a so-called pachislot machine. The gaming machine 1 is a gaming machine that uses a coin, a medal, a token, or the like as a game medium, and will be described below using a medal.

  A front surface of the cabinet 2 forming the entire gaming machine 1 is formed with a substantially vertical surface composed of the panel display unit 2a and the liquid crystal display device 5, and at the approximate center of the display screen 5a of the liquid crystal display device 5. Vertical rectangular display windows 4L, 4C, 4R are provided. A predetermined effect image is displayed on the display screen 5 a of the liquid crystal display device 5.

  Inside the cabinet 2, three reels 3L, 3C, and 3R each having a symbol row composed of a plurality of types of symbols on each outer peripheral surface are rotatably provided in a horizontal row, and the plurality of types of symbols are provided. The display means for performing the change display and the stop display is formed. The symbols of the reels 3L, 3C, 3R can be observed through the display windows 4L, 4C, 4R. The reels 3L, 3C, 3R rotate at a constant speed (for example, 80 rotations / minute). By this rotation, the symbols in the symbol row are variably displayed, and by stopping this rotation, the symbols in the symbol row are stopped and displayed.

  A horizontal base 10 is formed below the display windows 4L, 4C, 4R. A medal slot 22 is provided on the right side of the upper surface portion of the pedestal portion 10, and a 1-BET switch 11 (hereinafter referred to as “BET switch 11”), 2- A BET switch 12 (hereinafter referred to as “BET switch 12”) and a maximum BET switch 13 (hereinafter referred to as “BET switch 13”) are provided. The BET switch 11 bets one of the credited medals on the game by a single pressing operation, and the BET switch 12 has two of the credited medals by a single pressing operation. Bet on the game, and the BET switch 13 bets the maximum number of medals that can be bet on one game. By operating these BET switches 11, 12, and 13, a predetermined pay line described later is validated.

  A C / P switch 14 is provided on the left side of the front surface of the pedestal 10 to switch the credit / payout of medals obtained by the player in the game by a push button operation. By the switching of the C / P switch 14, medals are paid out from the medal payout opening 15 at the lower front, and the paid out medals are stored in the medal receiving portion 16. On the right side of the C / P switch 14, there is a start lever 6 for rotating the reels 3L, 3C, 3R by the player's operation and starting the display of symbol variation in the display windows 4L, 4C, 4R. It is mounted so as to be rotatable within an angular range.

  Three stop switches 7L, 7C, and 7R for stopping the rotation of the three reels 3L, 3C, and 3R are provided at the right side of the start lever 6 and in the center of the front surface of the pedestal 10, respectively. Yes.

  Here, in the embodiment, the reel stop operation (operation of any one of the stop switches 7L, 7C, 7R) performed when all the reels 3L, 3C, 3R are rotating is referred to as “first stop operation”, The stop operation performed after the first stop operation is referred to as “second stop operation”, and the stop operation performed after the second stop operation is referred to as “third stop operation”. The third stop operation is the last stop operation.

  Speakers 21 </ b> L and 21 </ b> R are provided on the left and right below the main body of the gaming machine 1. A predetermined effect sound is generated from the speakers 21L and 21R.

  The LEDs 101 are provided on the left and right of the top of the main body of the gaming machine 1, and the lamps 102 are provided so as to be sandwiched between the LEDs 101. These LED 101 and lamp 102 are lit and blinked for a predetermined effect.

  In the embodiment, the player inserts medals or operates the BET switches 11, 12, and 13, the player operates the start lever 6, the reels 3L, 3C, and 3R start rotation, and the players stop switches 7L and 7C. A series of processes in the gaming machine 1 configured by performing the operation of 7R and the rotation stop of the reels 3L, 3C, and 3R once is called a game or a unit game.

  Next, with reference to FIG. 2, a substantially vertical plane constituted by the panel display unit 2 a and the liquid crystal display device 5 on the front surface of the cabinet 2 will be described.

  The panel display 2a includes a 1-BET lamp 9a (hereinafter referred to as “BET lamp 9a”), a 2-BET lamp 9b (hereinafter referred to as “BET lamp 9b”), and a maximum BET lamp 9c (hereinafter referred to as “BET lamp 9c”). And an information display unit 18 are provided.

  Display windows 4L, 4C, and 4R are positioned substantially at the center of the display screen 5a of the liquid crystal display device 5. The image display area of the liquid crystal display device 5 covers the entire display screen 5a including the areas of the display windows 4L, 4C, and 4R. In the area of the display windows 4L, 4C, and 4R of the display screen 5a, the change display and stop display of the reels 3L, 3C, and 3R can be observed through the display windows 4L, 4C, and 4R, respectively. It is possible to display an image having continuity and integrity outside the 4R region. That is, the display windows 4L, 4C, and 4R in the display screen 5a are displayed on the normal display screen included in the display screen 5a, except that the change display and stop display of the reels 3L, 3C, and 3R can be observed. It is. In other words, it can be said that the display screen 5a of the liquid crystal display device 5 is partially transparent in the areas of the display windows 4L, 4C, and 4R.

  The display window 4L is divided into display windows 4LU, 4LC, and 4LD, the display window 4C is divided into display windows 4CU, 4CC, and 4CD, and the display window 4R is divided into display windows 4RU, 4RC, and 4RD. The generic name of the display windows 4LU, 4LC, 4LD is the display window 4L, the generic name of the display windows 4CU, 4CC, 4CD is the display window 4C, and the generic name of the display windows 4RU, 4RC, 4RD is the display window 4R.

  The display windows 4L, 4C and 4R are provided with a top line 8b, a center line 8c and a bottom line 8d in the horizontal direction as winning lines, and a cross-up line 8a and a cross-down line 8e in the diagonal direction. The cross-up line 8a, the top line 8b, the center line 8c, the bottom line 8d, and the cross-down line 8e are collectively referred to as a winning line 8. For example, the winning line 8a indicates the cross-up line 8a (the same applies to the top line 8b, the center line 8c, the bottom line 8d, and the cross-down line 8e). One, three, or five of these pay lines are activated by operating the BET switches 11, 12, and 13 or inserting medals into the medal insertion slot 22. Which winning line is activated is indicated by the lighting of the BET lamps 9a, 9b, 9c. Hereinafter, the activated winning line 8 is referred to as an “effective line”.

  The BET lamps 9a, 9b, and 9c are turned on according to the number of medals betted to play one game (hereinafter referred to as “BET number”). Here, in the embodiment, one game ends when all the reels stop or when the effect display on the liquid crystal display device 5 of the game ends. The BET lamp 9a is turned on when the number of BETs is 1 and one winning line is activated. The BET lamp 9b is turned on when the number of BETs is 2 and three pay lines are activated. The BET lamp 9c is turned on when the number of BETs is 3 and all (5) winning lines are activated. The information display unit 18 is composed of a display device capable of displaying numerical values such as a 7-segment LED, and the number of medals that are credited (stored and stored as being inserted into the gaming machine) and the number of occurrences of a BB1 gaming state described later. , The number of occurrences of the RB gaming state during the BB1 gaming state, the number of occurrences of the RB gaming state during the general gaming state, and the like are displayed.

  Next, the liquid crystal display device 5 having transparency in the display windows 4L, 4C, and 4R will be described with reference to FIGS. FIG. 3 is a perspective view showing a schematic configuration of the liquid crystal display device 5. FIG. 4 is a development view of a part of the configuration of the liquid crystal display device 5.

  The liquid crystal display device 5 includes a protective glass 132, a display plate 133, a liquid crystal panel 134, a light guide plate 135, a reflective film 136, fluorescent lamps 137a, 137b, 138a, 138b, which are white light sources (generally light sources that emit light in the visible range), lamps Holders 139a to 139h, a table carrier package (not shown) on which an IC for driving a liquid crystal panel is mounted, a flexible substrate (not shown) connected to a terminal portion of the liquid crystal panel 134, and the like. The liquid crystal display device 5 is provided on the player side from the reels 3L, 3C, 3R when viewed from the front. Further, a predetermined interval is provided between the reels 3L, 3C, and 3R and the liquid crystal display device 5.

  The protective glass 132 is attached so as to cover the entire area of the liquid crystal panel 134 in order to protect the entire player side of the liquid crystal display device 5.

  The display board 133 is comprised with the translucent member. On the display board 133, a predetermined figure or a picture is drawn in an area corresponding to the panel display unit 2a (see FIG. 2). Here, in FIG. 3 or FIG. 4, the illustration of an electric circuit for operating the information display unit 18 and the BET lamps 9a, 9b, 9c arranged on the back side of the area of the display plate 133 corresponding to the panel display unit 2a is omitted. ing.

  The liquid crystal panel 134 is formed by sealing liquid crystal in a gap between a transparent substrate such as a glass plate on which a thin film transistor layer is formed and a transparent substrate facing the transparent substrate. The display mode of the liquid crystal panel 134 is set to normally white. The normally white is a configuration in which white display (light goes to the display surface side, that is, transmitted light is visually recognized from the outside) in a state where the liquid crystal is not driven. By adopting the normally white liquid crystal panel 134, even if the liquid crystal cannot be driven, the symbols arranged on the reels 3L, 3C, 3R through the display windows 4L, 4C, 4R Can be visually recognized, and the game can be continued. That is, even when a situation in which the liquid crystal cannot be driven occurs, it is possible to play a game centering on the change display and stop display of the reels 3L, 3C, and 3R.

  The light guide plate 135 is provided on the back side of the liquid crystal panel 134 to introduce light from the fluorescent lamps 137a and 137b into the liquid crystal panel 134 (illuminate the liquid crystal panel 134), and has an acrylic resin having a thickness of about 2 cm, for example. It is comprised with translucent members (it has a light guide function).

  The reflective film 136 is, for example, a white polyester film or an aluminum thin film formed with a silver vapor deposition film, and reflects the light introduced into the light guide plate 135 toward the front side. Thereby, the liquid crystal panel 134 is illuminated. In the reflection film 136, rectangular holes 136BL, 136BC, and 136BR are formed. The holes 136BL, 136BC, and 136BR are formed so as to be positioned in front of the reels 3L, 3C, and 3R (regions corresponding to the reel sheets). The sizes and positions of the holes 136BL, 136BC, and 136BR are formed so as to coincide with the display windows 4L, 4C, and 4R (FIGS. 1 and 2). Further, in the reflective film 136, regions other than the hole portions 136BL, 136BC, and 136BR are defined as reflective regions 136A, and the light introduced into the light guide plate 135 by the reflective regions 136A is reflected toward the front side.

  The fluorescent lamps 137a and 137b are disposed along the upper and lower ends of the light guide plate 135, and both ends are supported by lamp holders 139a, 139b, 139c, and 139d. The fluorescent lamps 137a and 137b emit light to be introduced into the light guide plate 135.

  The fluorescent lamps 138a and 138b are disposed across the hole portions 136BL, 136BC, and 136BR at the upper position and the lower position on the back side of the reflective film 136, respectively. The light emitted from the fluorescent lamps 138a and 138b is reflected by the surfaces of the reels 3L, 3C, and 3R and enters the holes 136BL, 136BC, and 136BR. The incident light passes through the holes 136BL, 136BC, and 136BR to illuminate the liquid crystal panel 134.

  Next, with reference to FIG. 5, the symbol row | line by the multiple types of symbol arranged in the outer periphery of reel 3L, 3C, 3R is demonstrated. Each symbol is assigned a code number from 01 to 21, and is stored as a data table in a ROM 32 (FIG. 14) described later. On the outer peripheries of the reels 3L, 3C, 3R, Replay (symbol 61), watermelon (symbol 62), bell (symbol 63), cherry (symbol 64), red 7 (symbol 65), blue 7 (symbol 66), A symbol row composed of blank symbols (symbol 67) is shown. The reels 3L, 3C, and 3R are rotationally driven so that the symbol row moves in the direction of the arrow in FIG. Since the blank (symbol 67) has a high visual recognition degree and is positioned below the replay (symbol 61) or the bell (symbol 63), the bell (symbol 63) of the code number 09 in the reel 3L. ), The reel with the code number 01 for the reel 3C (symbol 61), and the reel 3R with the code number 19 for the bell (symbol 63) are stopped in the display windows 4L, 4C, 4R by the player. In some cases, it may be an aid to display. Thus, for example, the player can more easily perform a so-called replay handshake that avoids the establishment of a later-described replay (FIG. 7) in the BB general gaming state, which may contribute to the convenience of the game.

  Next, with reference to FIG. 6, the transition conditions, the end conditions, and the post-end destination game state of each gaming state of the gaming machine 1 will be described. The occurrence condition, end condition, and transfer destination game state of each game state are as illustrated in FIG.

  The gaming state of the gaming machine 1 includes the general gaming state, the internal winning state (including the RB internal winning state during the BB gaming state), the BB general gaming state, the RB gaming state (the RB gaming state during the BB gaming state, and the general gaming state). (Including RB gaming state). The BB gaming state is a gaming state configured by a predetermined combination of the BB general gaming state and the RB gaming state during the BB gaming state. BB and RB are collectively referred to as a bonus.

  The internal winning state is a gaming state that shifts from the general gaming state or the BB gaming state, and transitions by the internal winning of the BB or RB, or the internal winning of the RB in the BB gaming state, and the establishment of BB or RB, or BB The game ends when the gaming state ends or the RB gaming state starts during the BB gaming state (the establishment of RB). The internal winning state is a state in which BB or RB is carried over, that is, a state in which information won internally in BB or RB is carried over. In particular, a state where BB is carried over and a state where RB is carried over are referred to as a BB internal winning state and an RB internal winning state, respectively. The internal winning state shifts to the BB gaming state when finished with the establishment of BB, and transitions to the RB gaming state when finished with the establishment of RB.

  The BB gaming state is a gaming state that shifts from the general gaming state or the BB internal winning state, and is generated when the BB is established, and the number of acquired medals (the number of medals paid out to the player) becomes a predetermined number (for example, 466 or more). When finished, it shifts to the general gaming state.

  The BB general gaming state is a gaming state that shifts from the general gaming state, the BB internal winning state, or the RB gaming state in the BB gaming state, and is transitioned by BB establishment or RB termination in the BB gaming state, and the BB gaming state is terminated or BB. The game ends when the RB gaming state starts during the gaming state. The BB general gaming state shifts to the general gaming state when it ends when the BB gaming state ends, and shifts to the RB gaming state during the BB gaming state when it ends when the RB gaming state starts during the BB gaming state.

  Note that the RB won in the BB general gaming state is carried over until it is established. While this RB is carried over, the RB is not won. In the BB general gaming state, the probability lottery table used when the RB is carried over may have a higher probability of losing than the probability lottery table used when the RB is not carried over. At this time, the replay probability may be lowered, and the loss winning probability may be set higher accordingly. In this way, the symbol combinations corresponding to the RBs being carried over can be aligned relatively quickly, and the BB gaming state that ends when a predetermined number of medals are paid out can be smoothly terminated.

  The RB gaming state during the BB gaming state shifts when the RB is established during the BB gaming state, and ends when a predetermined number of times (for example, 12 times) a game is completed, a predetermined number of times (for example, eight times) a small role winning, or the end of the BB gaming state. To do. Transition from the BB general gaming state to the RB gaming state, the RB gaming state is completed, the transition to the BB general gaming state is repeated, and the transition to the RB gaming state is repeated until the payout number of medals reaches 466 or more. Is the BB gaming state. The RB gaming state during the BB gaming state shifts to the BB general gaming state or the general gaming state when the game is completed by a predetermined number of times (for example, 12 times) or after a predetermined number of times (for example, 8 times) small role winnings. Here, the small roles are watermelon, bell, upper / lower cherries, and middle cherries described later. The RB gaming state in the BB gaming state transitions to the BB general gaming state after the end of the BB gaming state after the termination of the BB gaming state, and the general gaming state when the termination condition for the BB gaming state is satisfied. Migrate to

  The RB gaming state in the general gaming state occurs when the RB is established in the general gaming state or in the RB internal winning state, and is ended by a predetermined number of times (for example, 12 times) game digestion or a predetermined number of times (for example, 8 times) small role winnings. . The RB gaming state in the general gaming state shifts to the general gaming state when the game is completed by a predetermined number of times (for example, 12 times) or by a small number of winnings of a predetermined number of times (for example, 8 times).

  Note that the RB gaming state is a first type special combination. The BB gaming state is an accessory continuous operation device according to the first type special accessory.

  The gaming machine 1 of the embodiment is configured so that an RB can win even in the RB gaming state (including the RB gaming state during the BB gaming state and the RB gaming state during the general gaming state).

  Note that the general gaming state is a gaming state that is not any of the internal winning state, the BB general gaming state, or the RB gaming state.

  Next, with reference to FIG. 7, the display combination, the symbol combination, and the payout which are different for each BET number will be described. The payout is a predetermined number of medals awarded (paid out) to the player when a predetermined symbol combination is displayed alongside one of the active lines. The information shown in FIG. 7 is stored in a ROM 32 (FIG. 14) described later as a display combination specifying table. The display combination of the embodiment includes BB, RB, watermelon, bell, cherry, replay, and loss. BB, RB, and replay become an internal winning combination by winning internally and become a winning combination by further winning. Watermelons, bells and cherries become internal winners by winning internally, and win by winning further. “Establishment” and “winning” means that a predetermined symbol or a combination of predetermined symbols corresponding to the internal winning combination is stopped and displayed side by side on one of the active lines. In the establishment, no medal is paid out at the time of establishment, and the medal is paid out in the winning. Loss is a display combination that is neither a winning combination nor a winning combination because a predetermined symbol or a combination of predetermined symbols corresponding to the internal winning combination is not stopped and displayed along the active line. Depending on the loss, the number of medals paid out is zero. The establishment and winning are collectively referred to as display. The winning combination and winning combination are collectively referred to as a display combination. The display mode of each display combination (a combination of predetermined symbols along the active line) and the payout at the time of display (hereinafter referred to as “medal payout number”) vary depending on the number of BETs as shown in FIG.

  The establishment of BB is realized by arranging red 7 (symbol 65) -red 7-red 7 along the active line in the general gaming state or the BB internal winning state. After the next game in which BB is established, the gaming state becomes the BB general gaming state. The BB gaming state is a gaming state that is relatively advantageous to the player. The number of medals paid out due to the establishment of BB is 0.

  RB is established by blue 7 (symbol 66) -blue 7-blue 7 being arranged along the active line in the general gaming state, the RB internal winning state, the BB general gaming state, or the RB internal winning state in the RB internal winning state. Realize. After the next game in which RB is established, the gaming state becomes the RB gaming state.

  The establishment of RB in the BB general gaming state may be referred to as JAC in.

  Watermelon, bell and cherry wins can be achieved in all gaming states. These roles are realized by arranging the illustrated symbol combinations along the effective lines. The number of medals paid out for these combinations is as shown in the figure, but differs depending on the number of BETs. Cherry is distributed to middle cherry or upper / lower cherry by stop control. The winning of the upper and lower cherries is realized by stopping and displaying the cherry (symbol 64) on the upper or lower stage of the display window 4L. Further, the winning of the middle cherry is realized by stopping and displaying the cherry in the middle of the display window 4L. Here, the upper part of the display window 4 is a part where the top line 8b is arranged in the display window 4, and the middle part of the display window 4 is a part where the center line 8c is arranged in the display window 4. The lower part of the display window 4 is a part where the bottom line 8d is arranged in the display window 4. Specifically, for example, the upper stage of the display window 4L refers to the display window 4LU, the middle stage refers to the display window 4LC, and the lower stage refers to the display window 4LD. The same applies to the display windows 4C and 4R.

  The establishment of the replay is realized by replay (symbol 61) -Replay-Replay being arranged along the active line in the game state excluding the RB game state. When the replay is established, the same number of medals as the number of medals inserted are automatically inserted (the game value is automatically given to the player and inserted into the gaming machine 1), so that the player consumes the medals. The next game can be played.

  Next, the “lottery count determination table” will be described with reference to FIG. The lottery number determination table is referred to in the process of step (hereinafter referred to as “S”) 51 of the probability lottery process (FIG. 19) described later. The lottery count determination table is stored in a ROM 32 (FIG. 14) described later as a predetermined data table.

  The number of lotteries means that a numerical value stored in a probability lottery table (FIG. 9) described later is subtracted sequentially from one random number extracted by a sampling circuit 37 (FIG. 14) described later, and the subtraction result is obtained for the first time. This is the maximum number of rows that can be searched up to a negative winning row. For example, when the gaming state is the general gaming state, according to the lottery count determination table, the lottery count is determined to be 6. Therefore, up to eight rows, the row of the winning lottery table for which the subtraction result is negative for the first time is limited. Search sequentially until the bottom.

  Specifically, when the gaming state is the general gaming state and the random number extracted by the sampling circuit 37 is 1000, first, 850 stored in the row of the winning number 1 is subtracted from this 1,000. This subtraction result is 150. Next, 4,800 stored in the row of winning number 2 is subtracted from 150. The subtraction result is −4,650, and the subtraction result becomes negative for the first time. Therefore, the winning number is determined to be 2. The winning probability at this time is 4,800, which is the lottery value corresponding to the winning number 2, divided by 65,536 which is the number of random numbers belonging to the range from 0 to 65,535 which is the random number extraction range. 800 / 65,536.

  The number of lotteries was limited to the number of winning numbers for which the subtraction result was negative for the first time until the row under the probability lottery table was searched. If the subtraction result did not become negative, the winning number was determined to be 0. Is done. When the winning number is 0, the internal winning combination is lost as will be described later. There are cases where the gameability is diversified by making the winning number determination probabilities different for each gaming state. In the case of other game states, the process for determining the winning number and the winning probability are the same.

  Next, the “probability lottery table” will be described with reference to FIG. The probability lottery table is referred to in the process of S54 in the probability lottery process (FIG. 19) described later. The probability lottery table is stored in a ROM 32 (FIG. 14) described later as a predetermined data table.

  Referring to the probability lottery table, the winning number is determined based on one random number extracted by a sampling circuit 37 (FIG. 14) described later. The numerical value stored in the probability lottery table is sequentially subtracted from top to bottom according to the gaming state, and a search is performed with the number of lotteries as a limit until the row of the winning number where the subtraction result is negative for the first time.

  For example, when the gaming state is the general gaming state, according to the lottery count determination table (FIG. 8), the lottery count is determined to be 8. Therefore, the probability that the subtraction result is negative for the first time is limited to 8 rows. Search sequentially until the bottom of the lottery table. At this time, from one random number extracted by the sampling circuit 37, 850, which are stored in association with winning numbers 1, 2, 3, 4, 5, 6, 7 and 8 in the general gaming state, respectively. The lottery values 4,800, 1,000, 9,000, 350, and 250 are sequentially subtracted, and the winning number when the subtraction result becomes negative for the first time is set as the determined winning number.

  Alternatively, when the gaming state is the internal winning state, the random numbers extracted by the sampling circuit 37 are stored in association with the winning numbers 1, 2, 3, and 4 in the internal winning state, respectively. The lottery values 4,800, 1,000, and 9,000 are subtracted sequentially, and the winning number when the subtraction result becomes negative for the first time is set as the determined winning number. The winning probability is a result of dividing each lottery value by 65,536 which is the number of random numbers belonging to the range of 0 to 65,535 which is the random number extraction range. For example, when the game state is the internal winning state, since the lottery value of 1,000 corresponds to the winning number 3, 1,000 / 65,536 is the winning probability. In the case of other game states, the process for determining the winning number is the same.

  Note that each gaming state column (vertical column) in the probability lottery table includes a row where a lottery value is stored and a row where no lottery value is stored. The rows in which the lottery values are stored are continuous from the top row of the probability lottery table, and the number of consecutive rows is determined according to the gaming state with reference to the lottery number determination table (FIG. 8). Matches. For example, in the internal game state column, lottery values are stored for winning numbers 1, 2, 3 and 4, respectively. The number of these winning numbers is 4, and the number of lotteries is 4. It corresponds. The same applies to other game states.

  In addition, the number of lotteries was limited to the number of winning numbers for which the subtraction result was negative for the first time until the row under the probability lottery table was searched. If the subtraction result did not become negative, the winning number was determined to be 0. Is done. When the winning number is 0, the internal winning combination is lost. The same applies to other game states.

  Next, the configuration of the bit string of the establishment flag will be described with reference to FIG. The establishment flag refers to the internal winning combination determination table (FIG. 11) described later, the internal winning combination determined as YES in the determination process of S55 through the processing of S54 of the probability lottery process (FIG. 19) described later. Is 8-bit information for storing.

  The establishment flag is expressed by an 8-digit bit string from bit1 to bit8. The lowest digit of the bit string is bit1, the digit is sequentially increased, and bit8 is the highest digit. When bit 1 is 1, it indicates that the internal winning combination contains cherry, when bit 2 is 1, it indicates that the internal winning combination includes bell, and bit 3 has the bit When it is 1, it indicates that the internal winning combination includes watermelon, when bit4 bit is 1, it indicates that internal winning combination includes replay, and when bit6 bit is 1, it is internal winning. It indicates that BB is included in the combination, and when bit 7 is 1, it indicates that RB is included in the internal winning combination. A predetermined combination of ON or OFF (0 or 1) of the bits of each digit is referred to as a bit pattern. Each internal winning combination is stored by storing the corresponding bit pattern in the establishment flag. In addition, when the bit of each digit is 0, it indicates that the internal winning combination corresponding to each digit is not included. In addition, bit5 and bit8 are unused bit storage areas that are not used. However, the number of display combinations set in the gaming machine 1 is further increased, and bit5 or bit8 indicates the internal winning of the increased display combination. May be used.

  If the formation flag is expressed by such a bit string configuration, winning of a plurality of internal winning combinations can be permitted at a time. Also, like BB and RB, the internal winning combination that can be carried over after the next game does not clear the bit 6 and bit 7 of the establishment flag by clearing the RAM at the end of the game or at the start of the next game. , You can remember the carry-over of internal winning combination. Note that the carry-over of the internal winning combination is not memorized by not clearing the bits 6 and 7 of the establishment flag, and a bit pattern having a bit string different from the establishment flag is provided and stored in this flag You may make it memorize by.

  When all the bits of the establishment flag are 0, it indicates that the establishment flag does not include any internal winning combination.

  Next, the “internal winning combination determination table” will be described with reference to FIG. The internal winning combination determination table is referred to in the process of S59 of the probability lottery process (FIG. 19) described later. The internal winning combination determination table is stored in a ROM 32 (FIG. 14) described later as a predetermined data table.

  The internal winning combination is sequentially incremented by 1 in the game state and the process of S56 of the probability lottery process (FIG. 19), and determined based on the lottery value determined with reference to the probability lottery table (FIG. 9) in the process of S54. Based on the winning number thus determined, the internal winning combination determination table is referred to and determined in the process of S59 of FIG. For example, when the gaming state is the general gaming state and the winning number is 4, the determined internal winning combination is the column of the internal winning combination in the column where the gaming state is the general gaming state and the winning number is 5 Replay is determined from the information stored at the intersection. At this time, the bit pattern of the establishment flag is “00001000” from the information stored in the intersection of the row where the winning number is 4 in the column of the establishment flag in the column of the general gaming state. Is determined. The process for determining the internal winning combination and the bit pattern of the establishment flag in other gaming states and other winning numbers is the same.

  Next, with reference to FIG. 12, the stop table group selected based on the gaming state and the internal winning combination will be described. The stop table group is a set of stop tables for determining the number of sliding symbols when the stop control of the reels 3L, 3C, and 3R is controlled in S102 of the sliding frame number determination processing (FIG. 22) described later. A specific example of the stop table will be described with reference to FIG.

  For example, when the gaming state is the general gaming state and the internal winning combination is BB, the stop table group selected corresponding to this is the BB establishment possible stop table group. The BB establishment possible stop table group is a set of BB establishment possible stop tables in which establishment of BB is permitted in accordance with a player's stop operation. The same applies to the process of selecting the stop table group according to the player's stop operation in the case of other game states and in the case of other internal winning combinations.

  The RB establishment possible stop table group is a set of RB establishment possible stop tables, and the RB establishment possible stop table is a stop table in which establishment of RB is permitted in accordance with a player's stop operation.

  The watermelon winning stop table group is a set of watermelon winning stop tables, and the watermelon winning stop table is a stop table in which watermelon winning is allowed in accordance with a player's stop operation.

  The bell winning possible stop table group is a set of bell winning possible stop tables, and the bell winning possible stop table is a stop table that allows a bell winning regardless of the player's stop operation.

  The cherry winning stop table group is a set of the middle cherry winning stop table and the upper / lower cherry winning stop table. The middle cherry winning stop table and the upper / lower cherry winning stop table are the player's stop operations. This is a stop table in which winning of the middle cherry or the upper / lower cherries is allowed by the stop control according to.

  The replay establishment possible stop table group is a set of replay establishment possible stop tables, and the replay establishment possible stop table is a stop table in which establishment of a replay is permitted regardless of a player's stop operation.

  The non-displayable stop table group is a set of non-displayable stop tables, and the non-displayable stop table is a stop table that does not allow display of any display combination regardless of the player's stop operation.

  Next, an example of a “stop table” stored in the ROM 32 (FIG. 14) of the main control circuit 71 described later will be described with reference to FIG.

  The stop table shows stop operation positions and stop control positions of the reels 3L, 3C, and 3R. The stop operation position is the symbol (specifically, the center of the symbol) that is located on the center line 8c when the stop switches 7L, 7C, 7R provided corresponding to the reels 3L, 3C, 3R are operated. Represents the code number of a symbol located above the center line 8c and whose center is closest to the position of the center line 8c. The stop control position represents a code number of a symbol that is stopped and displayed at the position of the center line 8c when the reel on which the stop operation is performed stops. Here, in the embodiment, the maximum number of so-called sliding frames is four. Referring to FIG. 13A, for example, when the stop switch 7R is operated when the cherry (symbol 64) of the code number 14 reaches the position of the center line 8c during the rotation of the reel 3R, the code number The number of sliding symbols can be determined so that the reel 3R is stopped and controlled so that 12 cherries (symbol 64) are stopped and displayed at the position of the center line 8c.

  The stop table includes a BB establishment possible stop table included in the BB establishment possible stop table group, an RB establishment possible stop table included in the RB establishment possible stop table group, a replay establishment possible stop table included in the replay establishment possible stop table group, The watermelon winning stop table included in the watermelon winning stop table group, the bell winning stop table included in the bell winning stop table group, the medium cherry winning stop table and the upper and lower cherries included in the cherry winning stop table group There are a non-displayable stop table included in the winning possible stop table and the non-displayable stop table group.

  FIG. 13A shows an example of a replay establishment possible stop table included in the replay establishment possible stop table group shown in FIG. This table is used when the reels 3L, 3C, and 3R are stopped and controlled so that replay is established when the internal winning combination is replay.

  In FIG. 13 (1), the stop control position of the reel 3L is any one of code numbers 01, 04, 09, 13, and 17. In the symbol array shown in FIG. 5, all symbols corresponding to positions one code number 01, 04, 09, 13, 17 are “Replay” (symbol 61).

  In FIG. 13A, the stop control position of the reel 3C is any one of code numbers 01, 04, 09, 13, and 18. In the symbol array shown in FIG. 5, all symbols corresponding to code numbers 01, 04, 09, 13, and 18 are “Replay” (symbol 61).

  In FIG. 13A, the stop control position of the reel 3R is any one of the code numbers 04, 08, 12, 16, and 21. In the symbol array shown in FIG. 5, symbols corresponding to the positions one code code 04, 08, 12, 16, 21 are all “Replay” (symbol 61).

  As described above, when the replay establishment possible stop table shown in FIG. 13 (1) is used for stop control of the reels 3L, 3C, 3R, the replay (symbol 61) along the validated cross-down line 8e. ) -Replay-Replay is stopped and displayed side by side, and replay can be established.

  When the replay establishment possible stop table is used for the stop control of the reels 3L, 3C, 3R, three replays (symbol 61) are stopped and displayed along the cross-down line 8e, and the replay is always established. be able to. In other words, in the embodiment, when a replay is won internally, the replay can always be established. This is related to the arrangement of replay (symbol 61) in the symbol array shown in FIG. In the embodiment, the maximum number of sliding frames is set to 4 frames, and if there is a symbol that can display a display combination in a range of 4 frames from the position where the stop operation is performed, it is possible to draw on the effective line. ing. Referring to FIG. 5, in the reels 3L, 3C, and 3R, the replay (symbol 61) has a symbol arrangement that is always arranged within the range of four frames. For this reason, when the replay establishment possible stop table is used for the stop control of the reels 3L, 3C, 3R, the Replay (symbol 61) is arranged along the effective line regardless of the stop operation at any position above. It is possible to stop display with. In other words, the replay basically does not cause so-called omission (inability to display the determined internal winning combination).

  FIG. 13 (2) shows an example of the non-displayable stop table included in the non-displayable stop table group shown in FIG. This table is used when the reels 3L, 3C, and 3R are stopped and controlled so that no winning combination is won when the internal winning combination is lost.

  In FIG. 13B, the stop control position of the reel 3L is any one of the code numbers 01, 04, 09, 13, and 17. In the symbol array shown in FIG. 5, all symbols corresponding to positions one code number 01, 04, 09, 13, 17 are “Replay” (symbol 61).

  In FIG. 13B, the stop control position of the reel 3C is any one of the code numbers 01, 04, 09, 13, and 18. In the symbol array shown in FIG. 5, all symbols corresponding to code numbers 01, 04, 09, 13, and 18 are “Replay” (symbol 61).

  Further, in FIG. 13B, the stop control position of the reel 3R is any one of the code numbers 02, 06, 10, 14, and 18. In the symbol array shown in FIG. 5, the symbols corresponding to the positions one code code 02, 06, 10, 14, 18 are all bells (symbol 63).

  As described above, when the non-displayable stop table shown in FIG. 13 (2) is used for stop control of the reels 3L, 3C, 3R, the replay (symbol 61) along the validated cross-down line 8e. ) -Replay-bells (symbol 63) are stopped and displayed side by side, and any combination cannot be won.

  A bell winning stop table (not shown) is used when the reels 3L, 3C, and 3R are stopped and controlled so that the bell wins when the internal winning combination is a bell. In the bell winning stop table, the bell can be won even if the stop operation is performed at any stop operation position on the reels 3L, 3C, 3R. This is related to the arrangement of the bell (symbol 63) in the symbol array shown in FIG.

  A cherry winning stop table (not shown) is used to stop and control the reel 3L so that the middle cherry or the upper / lower cherries win when the internal winning combination is cherry. In the middle cherry winning stop table and the upper / lower cherry winning stop table, the middle cherry or the upper / lower cherries can be awarded only when the stop operation is performed at the predetermined stop operation position on the reel 3L. When the stop operation is performed at a stop operation position other than the predetermined stop operation position, the middle cherry and the upper / lower cherries cannot be won.

  In the embodiment, even when watermelon and cherry are selected as the internal winning combination and the winning possible stop table is selected, it may not be possible to win. This is related to the arrangement of watermelons (symbol 62) and cherries (symbol 64) in the symbol array shown in FIG. Referring to FIG. 5, in reels 3L, 3C and 3R, the watermelon (symbol 62) is not necessarily arranged in a pattern such that it is arranged within the range of 4 frames. In reel 3L, code numbers 02, 07, 17, The reels 3C are arranged only at the code numbers 03, 07, and 15 and the reels 3R are arranged only at the code numbers 02, 10, and 18. For this reason, depending on the stop operation position, the watermelon (symbol 62) cannot be stopped along the effective line. In other words, the watermelon is a role that can cause a so-called oversight. Similarly, referring to FIG. 5, in the reel 3L, the cherry (symbol 64) is disposed only at the positions of the code numbers 11 and 20, and is necessarily disposed within the range of 4 frames. It is not an array. For this reason, depending on the stop operation position, the cherry (symbol 64) cannot be stopped and displayed on the display window 4L. In other words, the cherry is a display that can cause so-called missing.

  In the embodiment, watermelons and cherries have been described as examples of internal winning combinations that may be missed, but BB and RB are also internal winning combinations that may be missed. That is, referring to FIG. 5, red 7 (symbol 65) and blue 7 (symbol 66) are all in a symbol arrangement in which the reels 3L, 3C, and 3R are necessarily arranged within the range of four frames. Not. For this reason, depending on the stop operation position, red 7 (symbol 65) and blue 7 (symbol 66) may not be stopped at the active line.

  Next, referring to FIG. 14, the main control circuit 71 that controls the game processing operation in the gaming machine 1, peripheral devices (actuators) that are electrically connected to the main control circuit 71, and the main control circuit 71 A circuit configuration including the liquid crystal display device 5, the speakers 21 </ b> L and 21 </ b> R, the LED 101, and the sub-control circuit 72 that controls the lamp 102 based on the control command will be described.

  The main control circuit 71 includes a microcomputer 30 disposed on a circuit board as a main component, and is added with a circuit for random number sampling. The microcomputer 30 includes a CPU 31 that performs a control operation according to a preset program, and a ROM 32 and a RAM 33 that are storage means.

  Connected to the CPU 31 are a clock pulse generator 34 and a frequency divider 35 for generating a reference clock pulse, and a random number generator 36 and a sampling circuit 37 for generating a random number to be sampled. As a means for random number sampling, the random number sampling may be executed in the microcomputer 30, that is, on the operation program of the CPU 31. In that case, the random number generator 36 and the sampling circuit 37 can be omitted, or can be left as a backup for the random number sampling operation.

  In the ROM 32 of the microcomputer 30, a probability lottery table (FIG. 9) used in the processing of S54 of FIG. 19 described later, which is executed every time random number sampling is performed every time the start lever 6 is operated (start operation). A stop table group selection table (FIG. 12) used when a stop table group is selected in the process of S7 of FIG. 16 to be described later and one stop table (FIG. 13) is determined from the selected stop table group. ) And a stop table, a stop position search table (not shown) and a table number selection table (not shown) used when determining the stop mode of the reel according to the operation of the stop switches 7L, 7C and 7R by the player. 1), various control commands (commands) to be transmitted to the sub-control circuit 72 are stored. These commands include a demo display command, an initial screen display command, a BET command, a start command, a reel stop permission command, a reel stop command, an all reel stop command, a display combination command, a payout end command, and the like.

  In the circuit of FIG. 14, BET lamps 9 a, 9 b, 9 c, the information display unit 18, and medals are housed as main actuators whose operation is controlled by a control signal from the microcomputer 30. There are a hopper (including a payout driving unit) 40 as a game value giving means for paying out a predetermined number of medals according to a command, and stepping motors 49L, 49C, 49R for rotationally driving the reels 3L, 3C, 3R.

  Further, a motor driving circuit 39 for driving and controlling the stepping motors 49L, 49C and 49R, a hopper driving circuit 41 for driving and controlling the hopper 40, a lamp driving circuit 45 for driving and controlling the BET lamps 9a, 9b and 9c, and the information display unit 18 are provided. A display unit driving circuit 48 for driving control is connected to the output unit of the CPU 31 via an I / O port (not shown). Each of these drive circuits receives a control signal such as a drive command output from the CPU 31 and controls the operation of each actuator.

  The main input signal generating means for generating an input signal necessary for the microcomputer 30 to generate a control command includes a start switch 6S, BET switches 11, 12, and 13, a C / P switch 14, and a medal sensor 22S. A reel stop signal circuit 46, a reel position detection circuit 50, and a payout completion signal circuit 51. These are also connected to the CPU 31 via an I / O port (not shown).

  The start switch 6S detects the operation of the start lever 6. The medal sensor 22S detects medals inserted into the medal insertion slot 22. The reel stop signal circuit 46 outputs a stop signal in accordance with the operation of each stop switch 7L, 7C, 7R. The reel position detection circuit 50 receives the pulse signal from the reel rotation sensor and transmits a signal for detecting the position of the reels 3L, 3C, 3R to the CPU 31. The payout completion signal circuit 51 outputs a signal for detecting completion of the medal payout when the count value of the medal detection unit 40S (the number of medals paid out from the hopper 40) reaches the designated number data.

  In the circuit of FIG. 14, a random number generator 36 generates random numbers belonging to a certain numerical range. The sampling circuit 37 samples one random number at an appropriate timing after the start lever 6 is operated. Based on the random number sampled in this way and the probability lottery table stored in the ROM 32, one of the plurality of internal winning combinations is determined. After the internal winning combination is determined, random number sampling is performed again to select the stop position search table.

  A dip switch 37 a is connected to the sampling circuit 37. The DIP switch 37a may be directly connected to the CPU 31 without being connected to the sampling circuit 37. As will be described in detail later, the dip switch 37a can set various periods for sampling random numbers by the sampling circuit 37. As will be described later, it is determined whether or not to sample a random number every time a predetermined interrupt process executed by the CPU 31 is executed, and the random number is sampled according to the determination result. These determinations and determination results correspond to a specific period in which random numbers are sampled. The CPU 31 counts the number of executions of the predetermined interrupt process executed thereby, and when it is determined that the specific period in which the random number is sampled has been reached, the random number is sampled and stored as a sampling random number in a predetermined storage unit. . That is, even if a predetermined interrupt process is executed by the CPU 31, a random number is sampled only at a specific cycle timing.

  In this way, when the number of random numbers to be sampled is reduced, the distribution of random numbers to be sampled is biased. Probabilistically, when one random number is extracted from a predetermined population of random numbers that are theoretically assumed to follow a uniform distribution, the larger the number of actually sampled random numbers, the greater the number of sampled random numbers. The distribution converges to a theoretical uniform distribution. This is called the law of large numbers. Conversely, if the number of sampled random numbers is small, the distribution of the actually sampled random numbers follows a biased distribution that is far from the theoretical uniform distribution. When the distribution of the sampled random numbers is biased, the distribution of the internal winning combination determined based on the random numbers is naturally biased. In this way, according to the present invention, whether or not to converge to a theoretical distribution and whether to approach this theoretical distribution is determined according to the ideal number of sampled random numbers. It is characterized by the use of known natural laws. If the distribution of the determined internal winning combination can be biased by using such a natural law, specific internal winning combinations such as BB and RB that give a profit to the player are intensively determined. Opportunities are likely to appear. Accordingly, the player has a sense of expectation for the appearance of an opportunity for the specific internal winning role to be determined intensively, and the gaming property of the gaming machine 1 is improved, and the interest of the game is improved. There is.

  Further, if the cycle of random number sampling by the sampling circuit 37 can be set and changed by the dip switch 37a, an illegal act (in which a specific random number is sampled illegally and thus a specific internal winning combination is determined illegally ( This leads to prevention of so-called goto acts. This is because the player cannot see which set value is set in the dip switch 37a. If this set value is changed, the random number sampling period is unknown, and therefore illegal acts are performed. Even when trying to do so, the possibility that the random number intended by the fraudster can be obtained illegally becomes low. That is, even when the illegal act occurs, it is possible to easily cope with the situation where the illegal act is continuously performed again by changing the set value of the dip switch 37a.

  After the rotation of the reels 3L, 3C, 3R is started, the number of drive pulses supplied to each of the stepping motors 49L, 49C, 49R is counted, and the counted value is written in a predetermined area of the RAM 33. From the reels 3L, 3C, 3R, reset pulses are obtained every rotation, and these pulses are input to the CPU 31 via the reel position detection circuit 50. The count value of the drive pulse counted in the RAM 33 is cleared to 0 by the reset pulse thus obtained. As a result, the RAM 33 stores count values corresponding to the rotation positions within the range of one rotation for the reels 3L, 3C, and 3R.

  A symbol table (not shown) is stored in the ROM 32 in order to associate the rotational positions of the reels 3L, 3C, and 3R as described above with the symbols drawn on the outer peripheral surface of the reel. In this symbol table, the code numbers sequentially given for each fixed rotation pitch of the reels 3L, 3C, and 3R with respect to the rotation position where the reset pulse is generated are provided corresponding to each code number. A symbol code indicating a symbol is associated with the symbol.

  Further, in the ROM 32, a display symbol combination table (not shown) is stored. In the display symbol combination table, a combination of symbols to be displayed, a medal payout number at the time of display, and a display determination code representing the display are associated with each other. The display symbol combination table is referred to when the display combination of the reel 3L, the reel 3C, and the reel 3R is stopped and when the display combination is confirmed after all the reels are stopped.

  In the case of winning a specific internal winning combination by the probability lottery process based on the random number sampling, the CPU 31 sends a stop command sent from the reel stop signal circuit 46 at the timing when the player operates the stop switches 7L, 7C, 7R. Based on the signal and the selected stop position search table, a signal for controlling the stop of the reels 3L, 3C, 3R is transmitted to the motor drive circuit 39. Upon receiving this signal, the motor drive circuit 39 starts to excite the stepping motors 49L, 49C, 49R.

  If the winning combination is a winning combination with a payout, the CPU 31 supplies a payout command signal to the hopper driving circuit 41 to pay out a predetermined number of medals from the hopper 40. Do. At this time, the medal detection unit 40S counts the number of medals to be paid out from the hopper 40, and when the count value reaches a designated number, a medal payout completion signal is input to the CPU 31. As a result, the CPU 31 stops driving the hopper 40 via the hopper drive circuit 41 and ends the medal payout process.

  FIG. 15 is a block diagram showing a configuration of the sub control circuit 72. The sub-control circuit 72 includes an image control circuit 72a and a sound / lamp control circuit 72b. The image control circuit 72a or the sound / lamp control circuit 72b is configured on a circuit board different from the circuit board constituting the main control circuit 71.

  Communication between the main control circuit 71 and the image control circuit 72a is performed in one direction from the main control circuit 71 to the image control circuit 72a, and commands, information, and the like are transmitted from the image control circuit 72a to the main control circuit 71. Never happen. The communication between the image control circuit 72a and the sound / lamp control circuit 72b is also performed in one direction from the image control circuit 72a to the sound / lamp control circuit 72b, and from the sound / lamp control circuit 72b to the image control circuit 72a. No commands, information, etc. are sent to

  The image control circuit 72 a includes a sub control circuit microcomputer 81, serial port 82, ROM 83, work RAM 84, calendar IC 85, image control IC 86, control RAM 87, image ROM 88, and video RAM 89.

  The sub control circuit microcomputer 81 includes a CPU, an interrupt controller, and an input / output port (all not shown). The CPU provided in the sub control circuit microcomputer 81 performs various processes according to the control program stored in the ROM 83 based on the command transmitted from the main control circuit 71. The image control circuit 72a does not include a clock pulse generation circuit, a frequency divider, a random number generator, and a sampling circuit. However, if a random number is required to perform various processes, the sub control circuit microcomputer Random number sampling is executed on 81 operation programs.

  The serial port 82 receives various commands and information transmitted from the main control circuit 71.

  A ROM 83, an image ROM 88, a work RAM 84, and a calendar IC 85 are connected to the sub control circuit microcomputer 81.

  The ROM 83 stores a control program executed by the sub control circuit microcomputer 81, a determination table, and the like. The image ROM 88 stores image data, dot data, and the like for generating an image. The work RAM 84 is configured as temporary storage means for storing various information necessary for the sub control circuit microcomputer 81 to execute the control program.

  The calendar IC 85 stores date data. An operation unit 17 is connected to the sub control circuit microcomputer 81. In the embodiment, date setting and the like are performed by operating the operation unit 17 by an employee of a game hall or the like. The sub control circuit microcomputer 81 stores the date information set based on the input signal transmitted from the operation unit 17 in the calendar IC 85. The date information stored in the calendar IC 85 is backed up.

  The aforementioned work RAM 84 and calendar IC 85 are to be backed up. That is, even when the power supplied to the sub control circuit microcomputer 81 is cut off, the power is continuously supplied, and the stored information and the like are prevented from being erased.

  The image control IC 86 generates an image corresponding to the production content determined by the sub control circuit microcomputer 81 and outputs the image to the liquid crystal display device 5.

  The control RAM 87 is included in the image control IC 86. The sub control circuit microcomputer 81 writes and reads information and the like with respect to the control RAM 87. In the control RAM 87, a register of the image control IC 86, a sprite attribute table, and a color palette table are developed. The sub control circuit microcomputer 81 updates the register of the image control IC 86 and the sprite attribute table at every predetermined timing.

  The image control IC 86 is connected to the liquid crystal display device 5 and the video RAM 89.

  The video RAM 89 is configured as a temporary storage unit when the image control IC 86 generates an image.

  Further, the image control IC 86 transmits a signal to the sub control circuit microcomputer 81 (start of the next processing) every time transfer of the data in the video RAM 89 to the liquid crystal display device 5 ends (1/60 seconds).

  In the image control circuit 72a, the sub-control circuit microcomputer 81 also controls the sound and lamp effects. The sub-control circuit microcomputer 81 determines the type of sound / lamp and the output timing based on the determined effect. The sub control circuit microcomputer 81 transmits a command to the sound / lamp control circuit 72b via the serial port 82 at every predetermined timing. The sound / lamp control circuit 72b mainly outputs only the sound / lamp according to the command transmitted from the image control circuit 72a.

  The sound / lamp control circuit 72b includes a sound / lamp control microcomputer 91, a serial port 92, a program ROM 93, a work RAM 94, a sound source IC 95, a power amplifier 96, and a sound source ROM 97.

  The sound / lamp control microcomputer 91 includes a CPU, an interrupt controller, and an input / output port (all not shown). The CPU provided in the sound / lamp control microcomputer 91 performs sound / lamp output processing according to the control program stored in the program ROM 93 based on the command transmitted from the image control circuit 72a. The sound / lamp control microcomputer 91 is connected to an LED 101 and a lamp 102. The sound / lamp control microcomputer 91 transmits an output signal to the LED 101 and the lamp 102 in response to a command transmitted from the image control circuit 72a at a predetermined timing. Thereby, LED101 and the lamp | ramp 102 light-emit in the predetermined | prescribed aspect according to production.

  The serial port 92 receives various commands and information transmitted from the image control circuit 72a.

  The program ROM 93 stores a control program executed by the sound / lamp control microcomputer 91 and the like.

  The work RAM 94 is configured as temporary storage means for storing various information necessary when the sound / lamp control microcomputer 91 executes the control program.

  The sound source IC 95 generates a sound source based on the command transmitted from the image control circuit 72 a and outputs the sound source to the power amplifier 96.

  The power amplifier 96 is an amplifier, and speakers 21L and 21R are connected to the power amplifier 96. The power amplifier 96 amplifies the sound source output from the sound source IC 95 and outputs the amplified sound source from the speakers 21L and 21R.

  The sound source ROM 97 stores sound source data (phrase etc.) for generating a sound source.

  The sound / lamp control microcomputer 91 is connected to a volume control unit 103. The volume control unit 103 can be operated by employees of the game hall and the like, and the volume output from the speakers 21L and 21R is adjusted. The sound / lamp control microcomputer 91 performs control to adjust the sound output from the speakers 21L and 21R to the input volume based on the input signal transmitted from the volume control unit 103.

  Next, the external appearance of the dip switch 37a will be described with reference to FIG.

  FIG. 16 is a view of the dip switch 37a as viewed from above. The dip switch 37a is a substantially rectangular parallelepiped electronic component having a predetermined height, and a predetermined number of metal terminals for connection to an electronic circuit are provided on the lower surface thereof.

The dip switch 37a of the embodiment includes three switches. Each of the switches 37a-sw1, 37a-sw2, and 37a-sw3 can hold either the ON state or the OFF state. By any combination of the ON and OFF states of these three switches, 2 ³ = 8 different switch patterns can be expressed.

  Note that the number of switches provided in the dip switch 37a is not limited to three.

  Next, referring to FIG. 17, the set value that defines the random number sampling period of the sampling circuit 37, the dip switch 1 (switches 37a-sw1), the dip switch 2 (switches 37a-sw2), and the dip switch 3 (switch 37a) -Sw3) The relationship between each ON / OFF state combination and setting contents will be described.

  For example, if each of the DIP switch 1 (switches 37a-sw1), DIP switch 2 (switches 37a-sw2), and DIP switch 3 (switches 37a-sw3) is OFF, the set value is set to 0. The setting contents are as follows: “The sampling random number is updated once every time the periodic interruption process of 1.1 milliseconds shown in FIG. 29 described later is executed once by the CPU 31 (FIG. 14). It is. Also, when each of the dip switch 1 (switches 37a-sw1), dip switch 2 (switches 37a-sw2) and dip switch 3 (switches 37a-sw3) is ON, OFF, OFF, the set value is set to 1. The setting content is “Sampling random number is updated once every time a periodic interrupt process performed every 1.1 milliseconds in FIG. is there. Hereinafter, for the settings 2 to 7, the states and setting contents of the dip switch 1 (switches 37a-sw1), the dip switch 2 (switches 37a-sw2) and the dip switch 3 (switches 37a-sw3) are shown in the figure. It is as follows.

  The periodic interrupt processing every 1.1 milliseconds of FIG. 29 described later is executed every 1.1 milliseconds. The entire range of random numbers generated by the random number generator 36 (FIG. 14) is, for example, In the case of 0 to 16,383 and 16,384 random numbers, the update of the sampling random number is 16,384 times. With the setting 0, 1.1 milliseconds × 16,384 times × 1 = 18, It takes 022.4 milliseconds (18.0224 seconds), setting 1 takes 1.1 milliseconds × 16,384 ways × 2 times = 36,044.8 milliseconds (36.0448 seconds), and setting 2 takes 1.1 milliseconds × 16,384 ways × 4 times = 72,089.6 milliseconds (72.0896 seconds). With setting 3, 1.1 milliseconds × 16,384 ways × 8 times = 144,179 .2 milliseconds (144.1792 seconds), setting 4 is 1.1 milliseconds Seconds × 16,384 ways × 16 times = 288,358.4 milliseconds (288.3584 seconds). With setting 5, 1.1 milliseconds × 16,384 ways × 32 times = 576, 716.8 milliseconds (576.7168 seconds), setting 6 takes 1.1 milliseconds × 16,384 ways × 64 times = 1,153,433.6 milliseconds (1,153.4336 seconds), setting 7 takes 1 .1 milliseconds × 16,384 ways × 128 times = 2,306,867.2 milliseconds (2,306.6872 seconds). This makes it possible to bias the winning methods such as bonuses such as BB and RB, and jackpots as used in pachinko machines. In addition, even when a sensory machine hitting a specific random number occurs, it can be easily dealt with by changing the set value.

  Next, the main control operation of the CPU 31 (FIG. 14) of the main control circuit 71 will be described with reference to the flowchart of “reset interrupt processing by the CPU of the main control circuit” in FIG.

  First, the CPU 31 executes initialization at the start of the game (S1). Specifically, initialization of the storage contents of the RAM 33, initialization of communication data, and the like are performed. Subsequently, the CPU 31 clears the stored contents of the designated RAM 33 area at the end of the game (S2). Specifically, the data in the writable area of the RAM 33 used for the previous game is erased, the parameters necessary for the next game are written in the write area of the RAM 33, the start address of the sequence program of the next game, etc. I do.

  Next, the CPU 31 transmits an initial screen display command to the sub-control circuit 72 (S3). The initial screen display command is a predetermined display on the liquid crystal display device 5 before the game is started (that is, before various game operations (operations of the BET switches 11, 12, 13 and operation of the start lever 6) by the player). This command is transmitted to the sub control circuit 72 in order to display the effect image.

  Next, the CPU 31 executes “medal insertion and start check processing” (S4). Details of the “medal insertion and start check process” will be described later with reference to FIG.

  Next, the CPU 31 executes a “game state monitoring process” (S5). Details of the “game state monitoring process” will be described later with reference to FIG.

  Next, the CPU 31 executes “probability lottery processing” (S6). Details of the “probability lottery process” will be described later with reference to FIG.

  Next, the CPU 31 executes a stop table determination process (S7). In this stop table determination process, the stop table group selection table is based on the internal winning combination determined by the process of S59 in the probability lottery process (FIG. 19) and the stop operation timing of the stop switches 7L, 7C, 7R by the player. With reference to FIG. 12, a stop table group is selected by lottery, and one stop table is determined from the determined stop table group.

  Next, the CPU 31 executes a process of transmitting a start command to the sub control circuit 72 (S8). The start command includes information such as an internal winning combination, a winning combination for stoppage, and a gaming state. Subsequently, the CPU 31 executes a determination process for determining whether 4.1 seconds have elapsed since the start of rotation of the previous reels 3L, 3C, 3R (S9). In this process, it is determined whether 4.1 seconds have elapsed since the start of the variable display of the reels 3L, 3C, 3R in the previous game. When this determination is YES, the process moves to S11, and when it is NO, the process moves to S10.

  Next, the CPU 31 executes a 4.1 second wait process (S10). The CPU 31 counts the timer counter stored in the RAM 33 (FIG. 14) to measure 4.1 seconds, and stops executing the processing over this period.

  Next, the CPU 31 sets an automatic stop timer (S11). The automatic stop timer is a timer used by a predetermined timer counter stored in the RAM 33 (FIG. 14) that measures the elapse of a predetermined time (for example, 30 seconds) from the start of rotation of the reels 3L, 3C, 3R. is there. A predetermined timer counter of the automatic stop timer is counted down by the CPU 31. In this process, a value corresponding to, for example, 30 seconds is set as an initial value in a predetermined timer counter of the automatic stop timer. As will be described later, when the value of the automatic stop timer becomes 0 by the countdown, the fluctuation display (rotation) of the reels 3L, 3C, 3R is automatically performed regardless of the stop operation of the stop switches 7L, 7C, 7R by the player. To be stopped.

  Next, the CPU 31 outputs a rotation start request for all reels (reels 3L, 3C, 3R) (S12). In response to this output, the motor drive circuit 39 (FIG. 14) rotates the stepping motors 49L, 49C, 49R.

  Next, the CPU 31 transmits a reel stop permission command from the main control circuit 71 (FIG. 14) to the sub control circuit 72 (FIGS. 14 and 15) (S13).

  Next, the CPU 31 executes a “stop control process” (S14). Details of the “stop control process” will be described later with reference to FIG.

  Next, the CPU 31 executes a “display combination specifying process” (S15). Details of the “display combination specifying process” will be described later with reference to FIG.

  Next, the CPU 31 executes “error check processing” (S16). Details of the “error check process” will be described later with reference to FIG.

  Next, the CPU 31 executes a display combination command transmission process (S17). The display combination command is a command transmitted when a display combination is specified by the process of S113 in the display combination specifying process (FIG. 25) of S15.

  Next, the CPU 31 executes a medal payout process (S18). In this process, the CPU 31 controls the hopper drive circuit 41 (FIG. 14) to cause the hopper 40 (FIG. 14) to start paying out a predetermined number of medals.

  Next, the CPU 31 executes a payout end command transmission process (S19). The payout end command is a command transmitted when the medal payout started by the medal payout process in S18 is finished.

  Next, the CPU 31 determines whether or not the BB operating flag or the RB operating flag is on (S20). The BB operating flag and the RB operating flag are flags indicating whether the BB is operating (BB gaming state) or the RB is operating (RB gaming state), which is stored in the RAM 33 (FIG. 14). In this process, the CPU 31 determines whether the gaming state is the BB gaming state, the RB gaming state during the general gaming state, or the RB gaming state during the BB gaming state. When this determination is YES, the process proceeds to S22, and when this determination is NO, the process proceeds to S21.

  In S21, the CPU 31 executes a “bonus operation check process”. Details of the “bonus operation check process” will be described later with reference to FIG. When S21 ends, the process proceeds to S2.

  On the other hand, in S22, the CPU 31 executes a “bonus end check process”. Details of the “bonus end check process” will be described later with reference to FIG. When S22 ends, the process proceeds to S2.

  Next, the details of the “medal insertion and start check process” will be described with reference to FIG.

  First, the CPU 31 executes a medal sensor and BET switch check process (S31). In this process, it is checked whether a medal is inserted in the medal sensor 22S (FIG. 15) when one medal is inserted by the player, or whether one of the BET switches 11, 12, 13 is operated by the player.

  Next, the CPU 31 determines whether or not a medal insertion or a BET switch press is detected (S32). When this determination is YES, the process proceeds to S33, and when this determination is NO, the process proceeds to S31.

  Next, the CPU 31 executes medal insertion and BET number counter update processing (S33). In this process, the total number of medals inserted by the player and the total number of medals bet by operating any of the BET switches 11, 12, 13 is stored in the RAM 33 (FIG. 14). Count by counting up. When the total value here reaches 3, the number of inserted medals detected by the medal sensor 22S is added to the credit.

  Next, the CPU 31 executes a process for validating the number of pay lines 8 corresponding to the number of BETs (S34). In this process, the winning line 8 activated according to the number of BETs and the number thereof are specified and stored in the RAM 33. Which winning line 8 is activated according to the number of BETs is as described above. When this process ends, the process moves to S35.

  Next, the CPU 31 executes a BET command transmission process (S35). In this process, a BET command is transmitted from the main control circuit 71 (FIG. 14) to the sub-control circuit 72 (FIGS. 14 and 15).

  Next, the CPU 31 determines whether or not the start switch is on (S36). In this process, it is determined whether or not the start switch 6S has detected an operation of the start lever 6 by the player. When this determination is YES, this subroutine ends and the process proceeds to S5 in FIG. 16, and when it is NO, the process proceeds to S31.

  Next, details of the “game state monitoring process” will be described with reference to FIG.

  The gaming state is updated every time this gaming state monitoring process is executed. A transition is made to the gaming state corresponding to the flag indicating the gaming state stored in the RAM 33 (FIG. 14) (setting of the gaming state).

  First, the CPU 31 (FIG. 14) determines whether or not the RB operating flag is on (S41). The determination is made with reference to the RB operating flag indicating the RB gaming state stored in the RAM 33. When this determination is YES, the process proceeds to S42, and when it is NO, the process proceeds to S43. In S42, the CPU 31 sets the RB gaming state as the gaming state. When this process ends, this subroutine ends, and the process proceeds to S6 in FIG.

  In S43, the CPU 31 determines whether or not the BB operating flag is on. The determination is made with reference to the BB operating flag indicating the BB gaming state stored in the RAM 33. When this determination is YES, the process moves to S44, and when it is NO, the process moves to S45. In S44, the CPU 31 sets the BB general gaming state as the gaming state. When this process ends, this subroutine ends, and the process proceeds to S6 in FIG.

  In S45, the CPU 31 determines whether or not a carryover combination is set. With reference to the establishment flag stored in the RAM 33, it is determined whether any bit of the establishment flag indicating establishment of BB or RB is 1. When this determination is YES, the process proceeds to S46, and when this determination is NO, the process proceeds to S47. In S46, the CPU 31 sets the BB internal winning state or the RB internal winning state as the gaming state according to the carryover combination. When this process ends, this subroutine ends, and the process proceeds to S6 in FIG.

  On the other hand, in S47, the CPU 31 sets the general gaming state as the gaming state. When this process ends, this subroutine ends, and the process proceeds to S6 in FIG.

  Next, the details of the “probability lottery process” will be described with reference to FIG.

  First, the CPU 31 (FIG. 14) refers to the lottery count determination table (FIG. 8) and executes a process of determining the lottery count based on the gaming state (S51).

  Next, the CPU 31 executes a process of extracting random numbers for lottery (S52). In this process, the CPU 31 extracts one random number generated by the random number generator 36 (FIG. 14) and sampled by the sampling circuit 37 (FIG. 14).

  Next, the CPU 31 sets 1 as the initial value of the winning number (S53). The CPU 31 sets 1 as an initial value in the winning number counter stored in the RAM 33 (FIG. 14).

  Next, the CPU 31 refers to the probability lottery table (FIG. 9) and acquires a lottery value based on the gaming state and the winning number (S54). This lottery value is a numerical value that is subtracted from the one random number extracted by the process of S52. For example, when one random number is 13,000, the gaming state is the general gaming state, and the winning number is 1, a lottery value of 850 is acquired from the probability lottery table, so 13,000−850 = 12,150 is subtracted. Results are obtained.

  Next, the CPU 31 determines whether or not the internal winning combination is won (S55). Specifically, the subtraction result obtained in the process of S54 is determined, and it is determined whether or not the subtraction result is negative. When this determination is YES, the process proceeds to S59, and when this determination is NO, the process proceeds to S56.

  In S56, 1 is added to the winning number. Subsequently, it is determined whether or not the number of lotteries is satisfied (S57). Specifically, in the lottery count determination table (FIG. 8), it is determined whether or not the winning number matches the lottery count predetermined for each gaming state. When this determination is YES, the process moves to S58, and when it is NO, the process moves to S54.

  By repeating the processing of S54 to S57, it is determined that the subtraction result of S54 is negative for the first time and the determination of S55 is YES and the processing proceeds to S59, or that the winning number matches the number of lotteries in the determination of S57. Until the process moves to S58, a process of adding 1 to the winning number (S56) is executed. This winning number is a numerical value that ultimately identifies the internal winning combination.

  In S <b> 58, the CPU 31 executes a process of setting 0 to the winning number counter stored in the RAM 33. Note that the winning number is 0, that is, the internal winning combination is lost.

  Next, the CPU 31 refers to the internal winning combination determination table (FIG. 11) and determines an internal winning combination based on the gaming state and the winning number (S59). For example, when the gaming state is the general gaming state and the winning number is 3, referring to the internal winning combination determination table, the watermelon is determined as the internal winning combination, and the bit string “00000100” is set in the establishment flag.

  Next, the CPU 31 determines whether BB or RB is included in the internal winning combination (S60). “Internal winning combination includes BB or RB” means that the bit of the establishment flag corresponding to each internal winning combination is 1 (ON). If this determination is YES, the process proceeds to S61, and if this determination is NO, this subroutine ends, and the process proceeds to S7 in FIG.

  In S61, the CPU 31 sets a carryover combination based on the internal winning combination. Specifically, at least one of bit 6 or bit 7 of each establishment flag is set to 1 according to the internal winning of BB or RB. When this process ends, this subroutine ends, and the process proceeds to S7 in FIG.

  Next, the details of the “stop control process” will be described with reference to FIG.

  First, the CPU 31 (FIG. 14) determines whether any of the valid stop switches 7L, 7C, 7R is turned on (S71). Here, “effective” means that the reels 3L, 3C, and 3R are variably displayed (rotated), and the corresponding reels 3L, 3C, and 3R are subject to a stop operation within a predetermined range. The stop switches 7L, 7C and 7R are permitted to be pressed. When this determination is YES, the process proceeds to S76, and when this determination is NO, the process proceeds to S72.

  In S72, the CPU 31 determines whether or not the automatic stop timer is 0. It is determined whether it is 0 with reference to the counter of the automatic stop timer stored in the RAM 33 (FIG. 14). If this determination is YES, the process proceeds to S73, and if this determination is NO, the process proceeds to S71.

  Next, the CPU 31 executes processing for setting the rightmost reel being rotated as a target for stop control (S73). That is, the rotating reels are set as the target of stop control in the priority order of the reels 3R, 3C, and 3L. For example, when the reels 3L and 3C are rotating (variable display), the reel 3C is set as a target for stop control.

  Next, the CPU 31 determines whether or not the stop process is a third stop process, that is, a third stop process (S74). When this determination is YES, the process proceeds to S75, and when it is NO, the process proceeds to S76.

  In S75, the CPU 31 executes an “automatic third stop process”. Details of the “automatic third stop process” will be described later with reference to FIG.

  In S76, the CPU 31 executes a “sliding frame number determination process”. Details of the “sliding frame number determination process” will be described later with reference to FIG.

  Next, the CPU 31 executes a reel stop command transmission process (S77). The reel stop command is transmitted from the main control circuit 71 (FIG. 14) to the sub control circuit 72 (FIG. 14 and FIG. 14) when any of the corresponding reels 3L, 3C, 3R is stopped when the stop switches 7L, 7C, 7R are pressed. This is a command transmitted to FIG.

  Next, the CPU 31 executes a process of waiting for the reels to rotate by the number of sliding frames (S78). The reels subject to stop control are rotated by the number of sliding frames determined by the number-of-sliding frame determination process in S76 (FIG. 24). The term “frame” refers to a movement amount in units of symbols (see symbols 61 to 67 and FIG. 5). One frame means the movement amount for one symbol.

  Next, the CPU 31 executes processing for requesting the reel rotation stop (S79). That is, a signal requesting to stop the rotation of the reel that is subject to stop control is transmitted. Upon receiving this request, the motor drive circuit 39 (FIG. 14) ends the excitation of any of the stepping motors 49L, 49C, 49R that is the stop control target.

  Next, the CPU 31 determines whether or not the stop process is the second stop process and after the second stop process (S80). If this determination is YES, the process proceeds to S81, and if this determination is NO, this subroutine ends, and the process proceeds to S15 in FIG. Subsequently, the CPU 31 stores the symbol combination currently stopped and displayed in the RAM 33 (FIG. 14) for predicting the display combination (S81).

  Next, the CPU 31 determines whether or not the stop process is the last reel stop process (S82). When this determination is YES, this subroutine ends, and the process proceeds to S15 in FIG. 18, and when it is NO, the process proceeds to S71.

  Next, the details of the “automatic third stop process” will be described with reference to FIG.

  First, the CPU 31 determines whether or not the target of the stop process is the reel 3L (S91). When this determination is YES, the process moves to S92, and when it is NO, the process moves to S93.

  In S92, the loss is set as the display combination determination data. The lost bit pattern “00000000” is set in one of the flags of the display combination determination data stored in the RAM 33 (FIG. 14). In the display combination determination data, “11111111” (all display combinations) is set when automatic stop is not performed.

  On the other hand, in S93, the loss and cherry are set as the display combination determination data. The lost bit pattern “00000000” and the cherry bit pattern “00000001” are set in two of the flags of the display combination determination data stored in the RAM 33.

  Next, the CPU 31 acquires a symbol position and executes a process of predicting a display combination (S94). Specifically, the code number of the symbol at a specific position (for example, at the position of the center line 8c) at the time of execution of the processing is acquired from the symbols in the symbol arrangement of the reels to be subjected to the third stop process. In addition, it is predicted whether any display combination can be displayed in the combination with the symbols that have already been stopped and displayed by the first stop process and the second stop process. Subsequently, the CPU 31 executes a process of comparing the prediction result by the process of S94 with the display combination determination data set by the process of S92 or S93 (S95).

  Next, the CPU 31 determines whether or not the display combination set in the display combination determination data can be stopped and displayed by the third stop process based on the comparison in S95 (S96). When this determination is YES, the process moves to S98, and when it is NO, the process moves to S97.

  In S97, the CPU 31 determines whether or not the processes of S94 and S95 have been executed for all symbols of the reels to be processed in the third stop process. When this determination is YES, the process moves to S98, and when it is NO, the process moves to S94.

  By repeating the processing from S94 to S97, it is possible to always display the stoppage by stopping the reels automatically.

  In S98, the CPU 31 turns on the automatic stop flag. Specifically, the automatic stop flag stored in the RAM 33 is turned on. When this process ends, this subroutine ends, and the process proceeds to S76 in FIG.

  Next, the details of the “sliding frame number determination process” will be described with reference to FIG.

  First, the CPU 31 determines whether or not the automatic stop flag is on (S101). Specifically, it is determined whether or not it is on with reference to an automatic stop flag stored in the RAM 33 (FIG. 14). When this determination is YES, the process proceeds to S103, and when this determination is NO, the process proceeds to S102.

  In S <b> 102, the CPU 31 executes a process of determining any numerical value from 0 to 4 frames as the number of sliding frames based on the selected stop table. When this process ends, this subroutine ends, and the process moves to S77 in FIG.

  On the other hand, in S103, the CPU 31 sets the number of sliding frames to zero. Subsequently, the CPU 31 executes a display check process (S104). In this display check process, it is checked whether the automatic stop flag is on and whether or not the display combination is won or established by mistake due to the automatic stop. Subsequently, as a result of the display check process in S104, it is determined whether the automatic stop flag is on and whether the display combination is erroneously won or established by the automatic stop (S105). If this determination is YES, the process proceeds to S106, and if this determination is NO, this subroutine ends, and the process proceeds to S77 in FIG. Subsequently, in S106, the CPU 31 sets the number of sliding frames to 1. By this process, when the display combination is won or established by mistake, it is slid by one frame to prevent the display combination from being won or established by mistake. When this process ends, this subroutine ends, and the process moves to S77 in FIG.

  Next, the details of the “display combination specifying process” will be described with reference to FIG.

  First, the CPU 31 (FIG. 14) acquires the head address of the symbol storage area of the RAM 33 (FIG. 14) (S111). Specifically, the RAM 33 displays the stop line along with the activated pay line 8 (valid line) of the reels 3L, 3C, and 3R that are stopped and displayed, which is stored with the type of the pay line 8 specified. The head address of the symbol storage area in which the combination of the code number of the symbol being stored is stored is acquired.

  Next, the CPU 31 determines whether or not the valid line counter is 0 (S112). It is determined whether or not the value of the valid line counter that specifies the number of validated winning lines 8 stored in the RAM 33 is zero. When this determination is YES, this subroutine ends and the process proceeds to S16 of FIG. 18, and when it is NO, the process proceeds to S113.

  In S113, the CPU 31 refers to the display combination specifying table (FIG. 7) and executes a process of specifying the display combination and the number of payouts from the combination of symbols stored at the address. The bit pattern of the specified display combination flag is stored in the bit string of the display combination flag in the RAM 33.

  Next, the CPU 31 subtracts 1 from the effective line counter (S114). 1 is subtracted from the value of the valid line counter that specifies the number of validated winning lines 8 (valid lines) stored in the RAM 33 (FIG. 14), and the next address in the symbol storage area is also acquired. When this process ends, the process moves to S112.

  By executing the processing from S112 to S114, referring to the display combination specifying table (FIG. 7), the display is sequentially displayed in units of effective lines from combinations of symbol code numbers stored in the symbol storage area for each effective line. The number of winning and medal payouts is specified.

  Next, the details of the “error check process” will be described with reference to FIG.

  First, the CPU 31 (FIG. 14) executes a comparison process between the internal winning combination and the display combination (S121). Specifically, the internal winning combination bit pattern stored in the establishment flag of the RAM 33 (FIG. 14) and the display combination bit pattern stored in the display combination flag of the RAM 33 are compared.

  Next, the CPU 31 determines whether or not the display combination is included in the internal winning combination from the comparison result of S121. Specifically, the internal winning combination bit pattern stored in the establishment flag is compared with the bit pattern stored in the display combination flag, and it is determined whether the logical product of these bit patterns does not become “00000000”. . When this determination is YES, this subroutine ends, and the process proceeds to S17 in FIG. 18, and when it is NO, the process proceeds to S123.

  In S123, the CPU 31 executes a comparison process between the display combination and the display combination determination data. Specifically, the bit pattern of the display combination stored in the RAM 33 (FIG. 14) and the bit pattern of the display combination determination data set in the process of S92 or S93 of the automatic third stop process (FIG. 23). Compare.

  Next, the CPU 31 determines whether or not the display combination is included in the display combination determination data (S124). Specifically, it is determined from the comparison result in S123 whether or not the display combination is included in the display combination determination data. Specifically, the bit pattern stored in the display combination determination data is compared with the bit pattern stored in the display combination flag, and it is determined whether or not the logical product of these bit patterns does not become “00000000”. When this determination is YES, this subroutine ends, and the process proceeds to S17 in FIG. 18, and when it is NO, the process proceeds to S125.

  In S125, the CPU 31 executes an error process. Specifically, an error occurs when the LED 101, the lamp 102 (both FIGS. 1, 14 and 15) and / or the liquid crystal display device 5 are driven to the sub control circuit 71 (FIGS. 14 and 15). To let you know. The progress of the game in the gaming machine 1 is stopped until an administrator or the like of the gaming machine 1 presses an initialization switch (not shown) of the gaming machine 1. When this process ends, this subroutine ends, and the process proceeds to S17 in FIG.

  Next, the details of the “bonus operation check process” will be described with reference to FIG.

  First, the CPU 31 (FIG. 14) determines whether the display combination is BB or RB (S131). If this determination is YES, the process proceeds to S132, and if this determination is NO, this subroutine ends, and the process proceeds to S2 in FIG.

  In S132, the CPU 31 sets a BB operating flag or an RB operating flag, a possible number of games, a possible number of winnings, and the like based on a bonus operating time table (not shown). The possible number of games is a counter stored in the RAM 33. In this process, 12 is set as an initial value only when the display combination is RB. The number of possible winnings is also a counter stored in the RAM 33. In this processing, 8 is set as an initial value only when the display combination is RB. Subsequently, the CPU 31 clears the carryover combination (S133). Specifically, all the establishment flags bit5 to bit8 are set to 0. When this process ends, this subroutine ends, and the process moves to S2 in FIG.

  Next, the details of the “bonus end check process” will be described with reference to FIG.

  First, the CPU 31 (FIG. 14) determines whether or not the RB operating flag is on (S141). It is determined whether the RB operation flag stored in the RAM 33 (FIG. 14) is ON. When this determination is YES, the process proceeds to S142, and when this determination is NO, the process proceeds to S145.

  In S142, the CPU 31 executes a process of subtracting 1 from the possible number of games, and subtracting 1 from the possible number of wins in the case of winning. The number of possible games and the number of possible winnings are a kind of counter stored in the RAM 33.

  Next, the CPU 31 determines whether at least one of the number of possible games or the number of possible winnings is 0 (S143). When this determination is YES, the process moves to S144, and when it is NO, the process moves to S145. In S144, the CPU 31 executes RB end time processing. Specifically, the designated RAM area is cleared at the end of the RB, and the liquid crystal display device 5, LED 101, and lamp 102 (all of which are shown in FIGS. And a command signal is transmitted so that the predetermined effect of the RB game state performed in FIG. In the sub-control circuit 72 that has received this command signal, the predetermined effect of the RB gaming state that has been performed by the liquid crystal display device 5, the LED 101, the lamp 102, etc. is terminated.

  Next, the CPU 31 determines whether or not the BB operating flag is on (S145). It is determined whether the BB operation flag stored in the RAM 33 is on or not. When this determination is YES, the process proceeds to S146, and when this determination is NO, this subroutine ends, and the process proceeds to S2 in FIG.

  In S146, the CPU 31 executes a medal payout number counter update process during the BB gaming state. The value of the number of medals paid out is added to the counter of the total value of the number of medals paid out after the start of the BB gaming state, which is stored in the RAM 33.

  Next, the CPU 31 executes a process of subtracting the medal payable number according to the medal payout number (S147). The BB gaming state ends with 466 or more medal payouts. From this 466, the result of subtracting the counter value of the total value of the medal payout number after the start of the BB gaming state as S146 is obtained. The payable number is set in a payable number counter stored in the RAM 33 (FIG. 14).

  Next, the CPU 31 determines whether or not the payable number is 1 or more (S148). It is determined whether or not the value of the payable number counter stored in the RAM 33 is 1 or more. When this determination is YES, this subroutine ends, and the process proceeds to S2 in FIG. 18, and when it is NO, the process proceeds to S149.

  In S149, the CPU 31 executes BB end time processing. Specifically, the designated RAM area at the end of the BB is cleared, and the sub-control circuit 72 is cleared by the liquid crystal display device 5, the LED 101, the lamp 102 (all of which are shown in FIGS. 1, 14, and 15). A command signal is transmitted so as to end the predetermined effect in the BB gaming state. In the sub-control circuit 72 that has received this command signal, the predetermined effect of the BB gaming state that has been performed by the liquid crystal display device 5, the LED 101, the lamp 102, and the like is ended. Since the BB gaming state may end in the gaming state of the RB gaming state during the BB gaming state, in this case, the process of S149 includes the process of S144. When this process ends, this subroutine ends, and the process proceeds to S2 in FIG.

  Next, with reference to FIG. 29, “periodic interrupt processing every 1.1 milliseconds” executed and executed every 1.1 milliseconds in the CPU 31 (FIG. 14) will be described.

  First, the CPU 31 executes an input port check process (S151). Specifically, a reel stop signal circuit 46, a start switch 6S, a medal sensor 22S, a BET switch 11, 12, 13, C / P that can input some signal to the main control circuit 71 (FIG. 14) or the CPU 31. It is checked whether there is any signal input from the switch 14, the reel position detection circuit 50, and the payout completion signal circuit 51 (all of which are shown in FIG. 15).

  Next, the CPU 31 executes “sampling random number update processing”. Details of this processing will be described later with reference to FIG.

  Next, the CPU 31 executes a reel control process (S153). Specifically, information indicating the reel 3R is set in the reel identifier. Subsequently, a reel 3R control process for performing rotation start control, rotation acceleration control, rotation control at a constant speed, and rotation stop control of the reel 3R is executed. Subsequently, information indicating the reel 3C is set in the reel identifier. Subsequently, a reel 3C control process for performing rotation start control, rotation acceleration control, constant speed rotation control, and rotation stop control of the reel 3C is performed. Subsequently, information indicating the reel 3L is set in the reel identifier. Subsequently, a reel 3L control process for performing rotation start control, rotation acceleration control, rotation control at a constant speed, and rotation stop control of the reel 3L is performed.

  Next, the CPU 31 executes 7SEG drive processing (S154). The drive and control processing of the 7-segment display (7SEG) constituting the information display unit 18 (FIG. 2) is executed.

  Next, the CPU 31 executes lamp and LED drive processing (S155). Driving and control processing of the LED 101 and the lamp 102 (both in FIGS. 1, 14 and 15) are executed.

  Next, the CPU 31 executes timer management processing (S156). Specifically, from variables for these timers stored in the RAM 33, such as intergame timers (timers that count 4.1 seconds from the start of rotation of the previous reels 3L, 3C, 3R), automatic stop timers, etc. A process of subtracting 1 is executed. When this process ends, this routine ends.

  Next, the “sampling random number update process” executed in S152 of FIG. 29 will be described with reference to FIG. 30 and FIG.

  The sampling random number is one random number that the sampling circuit 37 (FIG. 14) obtains at a predetermined timing from the random number that is constantly generated by the random number generator 36 (FIG. 14). The acquired one random number is stored in the storage means included in the sampling circuit 37, but is periodically executed by the CPU 31 (FIG. 14) "periodic interruption processing every 1.1 milliseconds" (FIG. It is updated at the time of processing executed at the timing according to the specific period of 29). The specific cycle is defined by the setting state of each switch of the dip switch 37a (FIG. 14), as shown in “Relationship between sampling circuit setting value, dip switch setting and setting content” (FIG. 17). is there.

  First, the CPU 31 (FIG. 14) adds 1 to the interrupt counter stored in the RAM 33 (FIG. 14) (S201). The interrupt counter is a counter that counts up the number of times the process has been executed from a certain point in time when “periodic interrupt process every 1.1 milliseconds” (FIG. 29) is executed.

  Next, the CPU 31 refers to the setting status of the dip switch 37a (FIG. 14) and determines whether or not the setting value is set to 0 (S202). When this determination is YES, the process moves to S216, and when it is NO, the process moves to S203.

  In S203, the CPU 31 refers to the setting status of the dip switch 37a and determines whether or not the setting value is setting 1. When this determination is YES, the process moves to S204, and when it is NO, the process moves to S205.

  In S204, it is determined whether or not the value of the interrupt counter stored in the RAM 33 (FIG. 14) is 2. If this determination is YES, the process proceeds to S216, and if this determination is NO, this subroutine ends, and the process proceeds to S153 in FIG.

  In S205, the CPU 31 refers to the setting status of the dip switch 37a and determines whether or not the setting value is setting 2. When this determination is YES, the process moves to S206, and when it is NO, the process moves to S207.

  In S206, it is determined whether or not the value of the interrupt counter stored in the RAM 33 (FIG. 14) is 4. If this determination is YES, the process proceeds to S216, and if this determination is NO, this subroutine ends, and the process proceeds to S153 in FIG.

  In S207, the CPU 31 refers to the setting status of the dip switch 37a and determines whether or not the setting value is setting 3. When this determination is YES, the process moves to S208, and when it is NO, the process moves to S209.

  In S208, it is determined whether or not the value of the interrupt counter stored in the RAM 33 (FIG. 14) is 8. If this determination is YES, the process proceeds to S216, and if this determination is NO, this subroutine ends, and the process proceeds to S153 in FIG.

  In S209, the CPU 31 refers to the setting status of the dip switch 37a and determines whether or not the setting value is setting 4. When this determination is YES, the process moves to S210, and when it is NO, the process moves to S211 in FIG.

  In S210, it is determined whether the value of the interrupt counter stored in the RAM 33 (FIG. 14) is 16. If this determination is YES, the process proceeds to S216, and if this determination is NO, this subroutine ends, and the process proceeds to S153 in FIG.

  In S <b> 211 of FIG. 31, the CPU 31 refers to the setting status of the dip switch 37 a and determines whether or not the setting value is setting 5. When this determination is YES, the process proceeds to S212, and when this determination is NO, the process proceeds to S213.

  In S212, it is determined whether or not the value of the interrupt counter stored in the RAM 33 (FIG. 14) is 32. When this determination is YES, the process proceeds to S216 in FIG. 30, and when this determination is NO, this subroutine ends, and the process proceeds to S153 in FIG.

  In S213, the CPU 31 refers to the setting state of the dip switch 37a and determines whether or not the setting value is setting 6. When this determination is YES, the process moves to S214, and when it is NO, the process moves to S215.

  In S214, it is determined whether or not the value of the interrupt counter stored in the RAM 33 (FIG. 14) is 64. When this determination is YES, the process proceeds to S216 in FIG. 30, and when this determination is NO, this subroutine ends, and the process proceeds to S153 in FIG.

  In S215, it is determined whether or not the value of the interrupt counter stored in the RAM 33 (FIG. 14) is 128. In this case, since the set value of the dip switch 37a is always set to 7, the set value is not determined. When the determination of whether or not the value of the interrupt counter is 128 is YES, the process proceeds to S216 in FIG. 30. When the determination is NO, this subroutine ends, and the process proceeds to S153 in FIG.

  Returning to FIG. 30, in S216, the CPU 31 controls the sampling circuit 37 to update the sampling random number. That is, the sampling circuit 37 samples and acquires one random number from the random numbers continuously generated by the random number generator 36 (FIG. 36), and stores it in a predetermined storage means.

  Next, the CPU 31 executes processing for clearing the interrupt counter (S217). When this process ends, this subroutine ends, and the process proceeds to S153 in FIG.

  In the above embodiment, a new sampling method and sampling configuration of a so-called hard random number in which the sampling circuit 37 (FIG. 14) samples the random number generated by the random number generator 36 (FIG. 14) has been described. That is, the random number sampling cycle is arbitrarily changed according to the setting contents set and held in the DIP switch 37a (FIG. 14), and the random number is sampled and the sampling random number is updated based on the changed specific cycle. It is going to be done. However, the present invention is not limited to hard random numbers, and can be applied to so-called soft random numbers acquired by software control. In this case, the dip switch 37a can be omitted. Instead, the setting value is written in the initial value file in advance, and a random number sampling program stored in a predetermined ROM according to the written setting value is used. This is realized by executing 31 sampling random number update processing. Therefore, the present invention can be used as a random number sampling method in the sub-control circuit 72 (FIGS. 14 and 15) of a pachislot machine, a slot game machine, a pachinko game machine, and other various amusement devices.

  RB of the above embodiment is a 1st type special accessory, and BB is an accessory continuous operation apparatus which operates this 1st type special accessory continuously. In the embodiment, as shown in FIG. 7, medals are not paid out in the game in which BB and RB are established. However, the present invention is not limited to this, and a predetermined number (for example, 15) of medals may be paid out to the player in the game in which these BB and RB are established.

  As mentioned above, although embodiment of this invention was illustrated, it is not restricted to this.

  Each means, which is a constituent requirement of the gaming machine 1 shown in the above embodiment, can be appropriately changed in design so as to meet the spirit of the present invention. Also, in the various tables employed in the gaming machine 1 of the embodiment, the type and name of information to be determined, the set lottery value, winning probability, and other numerical values are arbitrarily changed without departing from the spirit of the present invention. be able to. For example, the type of the internal winning combination and the lottery probability thereof, the type of the winning combination for stoppage and the determination probability thereof are not limited to those adopted in the gaming machine 1 of the embodiment, and can be arbitrarily changed. In addition, the design and the like drawn on the outer periphery of the reels 3L, 3C, and 3R can be appropriately changed. Furthermore, the effects described in the embodiments of the present invention are merely a list of the most preferable effects resulting from the present invention, and the effects of the present invention are limited to those described in the embodiments of the present invention. It is not something.

  The present invention can be applied to other gaming machines such as pachinko gaming machines as well as the gaming machine 1 as in the above embodiment. Furthermore, the game can be executed by applying the present invention to a game program in which the operation on the gaming machine 1 is executed in a pseudo manner for a home game machine. In that case, a CD-ROM, FD (flexible disk), or any other recording medium can be used as a recording medium for recording the game program.

The perspective view of game machine 1 of an embodiment. The front view of the substantially vertical surface comprised by the panel display part 2a and the liquid crystal display device 5 of the gaming machine 1 of the embodiment. The perspective view which shows schematic structure of the liquid crystal display device 5 of the game machine 1 of embodiment. FIG. 3 is a partial development view of the configuration of the liquid crystal display device 5 of the gaming machine 1 according to the embodiment. The figure which shows the example of the symbol arranged on reel 3L, 3C, 3R of embodiment. The figure which shows the example of the transition conditions of each game state of an embodiment, completion | finish conditions, and a transfer destination game state. The figure which shows the example of the display combination, symbol combination, and payout for every BET of embodiment. The figure which shows the example of the lottery frequency determination table of embodiment. The figure which shows the example of the probability lottery table for every gaming state of embodiment. The figure which shows the example of a structure of the bit string of the establishment flag of embodiment. The figure which shows the example of the internal winning combination determination table for every gaming state of embodiment. The figure which shows the example of the stop table group selected corresponding to the game state and internal winning combination of embodiment. The figure which shows the example of the stop table of embodiment. The block diagram which shows the structure of the electric circuit of the gaming machine 1 of the embodiment. The block diagram which shows the structure of the sub control circuit 72 of the gaming machine 1 of the embodiment. The top view of the dip switch 37a of the gaming machine 1 of the embodiment. The figure which shows the example of the relationship between the setting value of a sampling circuit, the setting of a dip switch, and the setting content of the game machine 1 of embodiment. The main flowchart of the reset interruption process by CPU31 of the main control circuit 71 of embodiment. 5 is a flowchart of medal insertion and start check processing according to the embodiment. The flowchart of the game state process of embodiment. The flowchart of the probability lottery process of embodiment. The flowchart of the stop control process of embodiment. The flowchart of the automatic 3rd stop process of embodiment. The flowchart of the sliding frame number determination process of embodiment. The flowchart of the display combination specific process of embodiment. The flowchart of the error check process of embodiment. The flowchart of the bonus operation | movement check process of embodiment. The flowchart of the bonus completion | finish check process of embodiment. The flowchart of the periodic interruption process of every 1.1 milliseconds of CPU31 of embodiment. The flowchart of the sampling random number update process of embodiment. The flowchart following FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Game machine 5 Liquid crystal display device 5a Display screen 6 Start lever 6S Start switch 7L, 7C, 7R Stop switch 21L, 21R Speaker 32, 83 ROM
33 RAM
36 Random number generator 37 Random number sampling circuit 37a DIP switch 71 Main control circuit 72 Sub control circuit 81 Sub control circuit microcomputer 84 Work RAM
86 Image control IC
87 Control RAM
88 Image ROM
89 Video RAM
91 Sound / lamp control microcomputer 101 LED
102 lamp

Claims (1)

Display means for variably displaying and stopping a plurality of symbols;
A winning combination determination probability management means for managing the determination probability of each winning combination;
Random number generating means for generating a random number at a predetermined period;
Random number acquisition means for acquiring one random number from random numbers generated by the random number generation means at a specific period;
A winning combination determining means for determining the winning combination based on the one random number acquired by the random number acquiring means and the determination probability managed by the winning combination determination probability managing means;
The gaming machine characterized in that the random number acquisition means includes a specific period setting means for setting the specific period, and acquires the one random number at a specific period set in the specific period setting means.

Images