JP2006310684A - Drive circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To rapidly and effectively prevent an overcurrent with a comparatively simple circuit. <P>SOLUTION: A drive circuit 101 for applying a predetermined driving current to a device 21 has a current source 1 for supplying a driving current Iop to the device 21; a variable resistance switch P1 connected between the current source 1 and the device 21; switch control circuits 7, 5 and 3 for monitoring the current of a connection line 15a between the variable resistance switch P1 and the current source 1, controlling ON and OFF of the variable resistance switch P1 in response to a monitoring current, and making a time of transition for the variable resistance switch P1 from an OFF state to an ON state longer than a time for transition from the ON state to the OFF state in the control. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a drive circuit for supplying a predetermined drive current to a device.

FIG. 6 shows a connection diagram of a drive circuit and a laser at the time of inspection of a semiconductor laser that is a representative of current drive devices.
The contact probe 22a is in contact with the anode A of the semiconductor laser 21 which is a DUT (Device Under Test), and the contact probe 22b is in contact with the cathode K.
The drive circuit 51 is a circuit that is connected to the contact probes 22a and 22b, passes a predetermined current through the semiconductor laser 21, and cuts off the current when the contact is defective.
In FIG. 6, the housing for holding the contact probe is not shown.

The drive circuit 51 has various forms. FIG. 6 shows a typical example.
The drive circuit 51 in the illustrated example includes a reference power supply 52 (reference voltage Vref) that determines an output current, a reference resistor 53 (resistance value Rset), a differential amplifier circuit 54, and a transistor 57.
The transistor 57 is connected between the supply line 55 of the power supply voltage Vcc and the contact probe 22a. The reference power supply 52 is connected between the non-inverting input “+” of the differential amplifier circuit 54 and the ground voltage, and the reference resistor 53 is connected between the inverting input “−” of the differential amplifier circuit 54 and the ground voltage. ing. The differential amplifier circuit 54 is connected to the supply line 55 of the power supply voltage Vcc and the supply line 56 of the power supply voltage Vee, operates by these voltages, and its output is connected to the gate of the transistor 57. A connection point between the reference resistor 53 and the differential amplifier circuit 54 is connected to the contact probe 22b.

Here, the voltage between the anode A and the cathode K of the semiconductor laser 21 is set to “V”.
Assuming that the differential gain of the differential amplifier circuit 54 and the DC amplification factor Hfe of the NPN transistor 57 are infinite, the drive current Iop of the semiconductor laser 21 is expressed by the following equation (1).

[Equation 1]
Iop = Vref / Rset (1)

When inspecting the semiconductor laser 21, the contact probes 22 a and 22 b are brought into contact with the electrodes of the semiconductor laser 21, and the drive current Iop from the drive circuit 51 is supplied to the semiconductor laser 21. As a result, the semiconductor laser 21 emits light.
A predetermined inspection is performed on the semiconductor laser 21 in this state while performing aging or the like.

  By the way, when the semiconductor laser 21 and the drive circuit 51 are connected, the contact probes 22a and / or 22b may be separated from the terminal of the semiconductor laser 21 for some reason, and a non-conducting state (contact failure) may occur.

FIG. 7 shows an equivalent circuit obtained by simplifying FIG.
In FIG. 7, the driving circuit 51 shown in FIG. The power source of the current source 1 is supplied from the supply line 55 of the power source voltage Vcc. Further, the contact probes 22a and 22b shown in FIG. 6 are replaced with a switch S22 in FIG.
A capacitor Cstray is connected between the current drive lines from the current source 1 to the switch S22. The capacitance Cstray represents the sum total of stray capacitance existing in the current drive line, capacitance (not shown) intentionally inserted for surge current removal and the like.

The drive current Iop supplied to the semiconductor laser 21 in the state where the switch S22 is turned on is cut off from the supply path when the switch S22 is turned off (contact failure occurs).
Then, the current Iop flowing through the semiconductor laser 21 becomes 0 [mA], but since the drive circuit is a constant current source, it operates so as to flow a constant current through an infinite resistance. For this reason, the voltage V of the line from the current source 1 to the switch S22 rises rapidly, and in the worst case, it rises to near the power supply voltage (power supply voltage Vcc) which is the maximum voltage that the current source 1 can output.

FIG. 8 shows an equivalent circuit at the moment when the output of the drive circuit rises to near the power supply voltage (power supply voltage Vcc).
At this time, the capacitor Cstray is charged until the node voltage V on the switch side becomes close to the power supply voltage Vcc.
Thereafter, when the switch S22 contacts the terminal of the semiconductor laser 21 again and becomes conductive, a voltage equal to or higher than the rated drive voltage is applied to the semiconductor laser 21 immediately after the switch S22 is turned on. For this reason, an overcurrent (inrush current or surge current) Isurge flows instantaneously in the semiconductor laser 21.

For example, the power source voltage Vcc is 15 [V], the output resistance R10 of the current source 1 is about 1 [MΩ], and the semiconductor laser 21 is a voltage source corresponding to the equivalent series resistance Rd and the operating voltage Vop for convenience. 30 [Ω] and 4.5 [V].
In this case, the overcurrent Isurge flowing to the semiconductor laser 21 at the moment when the switch S22 is closed can be calculated by the following equation (2).

[Equation 2]
Isurge = (15-4.5) [V] / 30 [Ω]
= 350 [mA] (2)

FIG. 9 shows the output voltage V of the current source 1 and the current (drive current Iop, overcurrent Isurge) flowing through the semiconductor laser 21 when the contact probe changes from the conductive state to the nonconductive state and further changes to the conductive state. The time change of is shown.
From this figure, it can be seen that an overcurrent Isurge that is several times larger than the drive current Iop flows at the moment when the contact probe changes from the non-conductive state to the conductive state.
As a result, the semiconductor laser 21 generates a light output exceeding the rating, and the semiconductor laser 21 is deteriorated. Further, depending on the magnitude of the overcurrent Isurge, the semiconductor laser 21 may be thermally destroyed at once.

  This transient current (overcurrent Isurge) is due to the capacitance Cstray shown in FIG. This is because the output resistance R10 of the current source 1 is as large as 1 [MΩ], for example, so that a transient current does not flow from the current source 1 at the moment when the contact probe is turned on.

FIG. 10 shows an equivalent circuit example of a drive circuit to which a surge elimination circuit is added.
In the surge elimination circuit 61 of the illustrated example, the output resistance R10 when the current source 1 outputs the drive current Iop is about 5 [Ω], and the floating capacitor C10 existing between the drive current supply lines is set to 100. It is assumed that [μF] and a capacitor C11 having a capacitance value of about 100 [μF] is connected in parallel with the floating capacitor C10 for surge removal.
The addition of the capacitor C11 for removing the surge is effective for removing the surge while the drive current Iop is normally supplied to the semiconductor laser 21. However, when the contact probes 22a and / or 22b become non-conductive, the charge to be charged further increases by the capacity of the capacitor C11. For this reason, a large overcurrent flows to the semiconductor laser 21 at the moment when the contact probes 22a and / or 22b are brought into the conductive state again.

  The above problems are not limited to conduction / non-conduction of the contact probe, but also occur when the contact resistance changes greatly.

  In order to prevent such deterioration of the semiconductor laser, a laser driving circuit provided with a protection circuit has been proposed (for example, see Patent Document 1).

FIG. 11 shows a drive circuit described in Patent Document 1.
The drive circuit shown in FIG. 11 includes a comparator 23, a detection potential setting power supply 28, a holding circuit 24, provided between the contact probes 22 a and 22 b that contact the terminals of the semiconductor laser 21 and the output circuit 26. A control circuit 25, a comparator 29, and an NPN transistor 27 are included.

The comparator 23 detects non-conduction between the semiconductor laser 21 and the contact probes 22a and 22b when the voltage v between the contact probes 22a and 22b exceeds a set voltage determined by the power supply 28 for setting the detection potential. .
When the voltage v exceeds the set voltage, a signal based on the detection result from the comparator 23 is transmitted to the input of the comparator 29 via the holding circuit 24. As a result, the transistor 27 is turned off (transitioned to non-conduction) by the signal output from the comparator 29, and the current supply to the contact probe 22a is stopped. At this time, since the holding circuit 24 holds the detection result from the comparator 23, a signal for turning off the transistor 27 is continuously output to the transistor 27 via the comparator 29. Therefore, the transistor 27 maintains the off state, and the voltage v between the contact probes 22a and 22b decreases during this time.

For this reason, even if the contact probes 22 a and 22 b are connected to the terminal of the semiconductor laser 21 again, no excessive current flows through the semiconductor laser 21. Therefore, the optical output of the semiconductor laser 21 does not exceed the rating, and the semiconductor laser 21 can be prevented from deteriorating.
JP 2001-102679 A

In the drive circuit described in Patent Document 1, when the comparator 23 detects non-conduction of the contact probes 22a and / or 22b and cuts off the current to the semiconductor laser 21, the current drive line of the semiconductor laser 21 is Open. According to the description in Patent Document 1, “the transistor 27 is kept off for the holding time of the holding circuit 24, and the voltage v between the contact probes 22a and 22b decreases during this time”.
However, since the current driving force is applied from the output circuit 26, the voltage v rises when the transistor 27 is turned on next time. That is, if the holding time ends and the transistor 27 is turned on while the output circuit 26 is operating, an overcurrent flows instantaneously to the semiconductor laser 21.
Therefore, in the drive circuit described in Patent Document 1, it is necessary to restart the output circuit 26 once. For this reason, the inspection throughput is lowered by the operation of turning off the power of the output circuit 26 or starting up again after resetting.
On the other hand, when the output circuit 26 is not restarted, the output circuit 26 has a function for avoiding an overcurrent, for example, by stopping the current supply from the output circuit 26 and discharging the charge of the line to the transistor 27. This increases the circuit scale and costs.

In the driving circuit described in Patent Document 1, when a capacitance such as a stray capacitance between wirings from the contact probes 22a and 22b to the output circuit 26 is large, or a large-capacity capacitor is intentionally inserted to remove a surge current. In this case, when the semiconductor laser 21 and the contact probes 22a and 22b are not conducting, the voltage between them does not rise immediately, and the voltage rise speed varies depending on the value of the stray capacitance and the drive current.
For example, when the inter-wiring capacitance C including the stray capacitance is 100 [μF], the charge charged in the capacitance C is Q, and the drive current Iop of the output circuit 26 is 40 [mA], Q = C * V = Iop * From t, the rising slope V / t is
V / t = Iop / C = 40 [mA] / 100 [μF] = 0.4 [V] / 1 [mS]
Thus, the voltage between the contact probes 22a and 22b slowly rises with a slope of about 0.4 [V] at 1 [mS].

For example, when the operating voltage between devices at a DUT drive current 40 [mA] is 4 [V] and the set voltage value of the comparison voltage power supply 28 of the comparator 23 is 6 [V],
6 [V] -4 [V] = 2 [V]
From 2 [V] / (0.4 [V] / 1 [mS]) = 5 [mS],
It takes about 5 [mS] to cut off the current to the semiconductor laser 21 from the time of non-conduction to the conduction state.

  Therefore, the current path is restored before the current is interrupted (changes from non-conduction to conduction), and current exceeding the rating flows in the semiconductor laser 21 due to the electric charge charged in the capacitor until that time, and thermal destruction does not occur. However, it is conceivable that the characteristics are deteriorated.

  Further, the operating voltage of the semiconductor laser 21 has a large process variation even in the same type. For example, in the case of a blue-violet semiconductor laser having an optical output power of 3 [mW] class and a wavelength of 405 [nm], the operating voltage is 3.5 [V] -5. It will be about .5 [V]. Therefore, the set voltage value of the comparison voltage power supply 28 of the comparator 23 cannot be lowered so much.

  The problem to be solved by the present invention is to provide a drive circuit that can quickly and effectively prevent an overcurrent with a relatively simple circuit.

A drive circuit according to the present invention is a drive circuit for supplying a predetermined drive current to a device, a current source supplying a drive current to the device, and a variable resistor connected between the current source and the device The current of the connection line between the switch and the variable resistance switch and the current source is monitored, and the variable resistance switch is controlled to be turned on / off according to the monitor current. And a switch control circuit that makes the transition time from off to on longer than the transition time to turn on.
Preferably, the switch control circuit includes a conversion unit that converts a current of the connection line into a voltage, a comparison unit that compares a voltage output from the conversion unit with a reference voltage, an output of the comparison unit, and the variable resistor It is connected to the control node of the switch, and when the output of the comparison unit transits from low level to high level, and when it transits from low level to high level, the time constant of level change is made different, A waveform shaping unit that transmits the level change to the control node of the variable resistance switch.

In the present invention, a bypass resistor is preferably connected in parallel with the variable resistance switch.
In this case, more preferably, when the switch control circuit detects that a current flows through the bypass resistor when the variable resistance switch is turned off, the voltage of the predetermined node in the switch control circuit is changed to the variable control switch. A reset unit that forcibly shifts the resistance switch to a reset voltage that controls the switch from off to on;

On the other hand, in the present invention, the switch control circuit turns off the variable resistance switch according to the monitor current, and then converts the monitor current into a voltage after converting the monitor current according to a change in the monitor current. It is also possible to forcibly shift the reset voltage from OFF to ON.
It is also possible to measure and reset the voltage after converting the monitor current using an external tester or the like. Therefore, in the present invention, preferably, the switch control circuit includes an external output terminal for a voltage obtained by converting the monitor current.

According to this configuration, the switch control circuit monitors the current in the connection line between the current source and the variable resistance switch. The variable resistance switch may be low active or high active. For example, it is assumed that the switch is turned on when the control node is at a low level, and the switch is turned off at a high level. The switch control circuit detects that the monitor current becomes zero, and turns off the variable resistance switch when the contact to the device becomes non-conductive.
The switch control circuit can quickly transmit the potential change of the voltage after converting the monitor current at this time. For this reason, the variable resistance switch is instantaneously turned off.

  When a bypass resistor is provided in parallel with the variable resistance switch, when the contact to the device is turned on again, a current smaller than the drive current of the device flows through the current drive line. The switch control circuit detects this current quickly. Then, the switch control circuit forcibly shifts the voltage of a predetermined node inside to the reset voltage. This change in voltage level is opposite to that when the variable resistance switch is turned off. In this case, the switch control unit (for example, the waveform shaping unit) turns on the variable resistance switch from OFF, but the level change is performed relatively slowly (expanded in time). Therefore, current gradually flows to the device.

  According to the present invention, there is an advantage that it is possible to provide a drive circuit that can quickly and effectively prevent an overcurrent with a relatively simple circuit.

The present invention is used for optical recording information equipment such as CD-ROM (Compact Disc-Read Only Memory), CD-R (Compact Disc-Recordable), MO (Magneto-Optic disk) and DVD (Digital Versatile Disc). The present invention relates to a protection circuit for a current drive device typified by a semiconductor laser, and an inspection apparatus, assembly apparatus, and aging apparatus for a device including the protection circuit.
Embodiments of the present invention will be described below with reference to the drawings.

[First Embodiment]
FIG. 1 is a block diagram showing a configuration of a drive circuit to which a semiconductor laser is connected in the present embodiment.

A semiconductor laser drive circuit 101 shown in FIG. 1 is connected to current drive lines 23a and 23b of a handler 103 on which the semiconductor laser is mounted.
A semiconductor laser 21 as a DUT is set in the handler 103, its anode A is connected to the current drive line 23a via the contact probe 22a, and its cathode K is connected to the current drive line 23b via the contact probe 22b. .
The current drive line 23b is connected to a reference voltage (ground voltage in this example) via a reference voltage supply line 15b. For this reason, the semiconductor laser 21 as the DUT is a cathode common.
The drawing shows only the outline of the part related to the present invention, and the housing of the socket for fixing the test head and the contact probes 22a and 22b constituting the measurement (inspection) apparatus is not shown.

The drive circuit 101 includes a current source 1, a protection circuit 102, and a reset unit 6.
The protection circuit 102 monitors a current flowing through the drive current line (supply line Vcc) 15a of the current source 1, and controls a variable resistance switch (described later) in the protection circuit 102 in accordance with the monitor current. It is.
The reset unit 6 measures the voltage obtained by converting the monitor current, and forcibly shifts the voltage to the reset voltage according to the measurement result. Alternatively, the reset unit 6 may have a configuration in which the voltage obtained by converting the monitor current is compared with a predetermined reference and the reset is automatically performed according to the result. Further, in place of the reset unit 6, an external connection pad that outputs a voltage obtained by converting the monitor current to the outside is provided, and the voltage obtained by converting the monitor current is measured by an external tester or the like, and the reset is performed according to the result. Good.

  The current source 1 includes an arbitrary current source circuit that drives the semiconductor laser 21 that is a DUT with a predetermined current. The drive current from the current source 1 is supplied to the protection circuit 102 via the drive current line 15a.

The protection circuit 102 includes a surge removing unit 24, a voltage clamping unit 25, an I / V conversion unit 7 that converts a current (I) into a voltage (V), and a comparison unit that compares the output of the I / V conversion unit 7 with a reference voltage. 5. A waveform shaping unit 3 and a variable resistance unit 4 are provided.
The surge removing unit 24 and the voltage clamping unit 25 are connected between the drive current line 15a and the reference voltage supply line 15b, respectively. The I / V converter 7 is inserted in the middle of the drive current line 15a, that is, between the node NDa and the node NDb. The variable resistance unit 4 is connected between the node NDb of the drive current line 15a and the current drive line 23a. The comparison unit 5 is connected to a node NDc to which the voltage converted by the I / V conversion unit 7 is output. The node NDc is connected to the reset unit 6 through the reset line 8. The waveform shaping unit 3 is connected to the node NDb of the drive current line 15 a and the reference voltage supply line 15 b, and its input is connected to the output of the comparison unit 5. The output of the waveform shaping unit 3 is connected to the control input of the variable resistor unit 4.

The I / V conversion unit 7 detects a current flowing through the drive current line 15a, converts it into a voltage (hereinafter referred to as a detection voltage), and outputs it to the node NDc.
The comparison unit 5 compares the detection voltage or the reset voltage supplied from the reset unit 6 with a predetermined reference voltage Vref, and changes the output to low level or high level according to the result.

The waveform shaping unit 3 is a circuit for shaping the output of the comparison unit 5. The input of the waveform shaping unit 3 is supplied from the comparison unit 5 and may change from a low level to a high level, or may change from a high level to a low level.
The waveform shaping unit 3 varies the transition time of the level change in the two cases. This is called “waveform shaping”. More specifically, the transition time of the level change is made sufficiently longer when the variable resistance portion 4 changes from high resistance to low resistance than when the variable resistance portion 4 changes from low resistance to high resistance. For this reason, the variable resistance unit 4 operates slowly when transitioning from a high resistance to a low resistance.

FIG. 2 shows an example of a circuit embodying FIG.
In this circuit example, the surge removing unit 24 is composed of a capacitor C1, and the voltage clamping unit 25 is composed of a Zener diode D1.

The I / V converter 7 includes a detection resistor R2 connected between the node NDa and the node NDb of the drive current line 15a, and a differential amplifier 71 that amplifies the potential difference between both ends of the detection resistor R2 with a predetermined amplification factor. And a resistor R1 connected to the output of the differential amplifier 71.
The differential amplifier 71 is connected to the supply line of the power supply voltage Vdd and the supply line 15b of the reference voltage, and operates by receiving power supply from these lines. The non-inverting input terminal “+” of the differential amplifier 71 is connected to the node NDa side of the detection resistor R2, and the inverting input terminal “−” is connected to the node NDb side of the detection resistor R2.
The output of the differential amplifier 71 is connected to the node NDc through the resistor R1.

The differential amplifier 71 amplifies the voltage generated by the detection resistor R2 with a predetermined amplification factor, and outputs a voltage Vo based on a reference voltage (here, ground voltage).
For example, the amplification factor is 10, the value of the detection resistor R2 is 1 [Ω], the current flowing through the detection resistor R2 is 10 [mA], the currents flowing through the two inputs of the differential amplifier 71 are both 0 [μA], and the differential amplifier Assuming that the output offset of 71 is 0 [mV], the voltage Vo1 generated at the output is obtained by the following equation (3).

[Equation 3]
Vo1 = 1 [Ω] * 10 [mA] * 10
＝ 100 [mV]… (3)

This voltage Vo is output from the node NDc to the comparison unit 5 and the reset line 8 through the resistor R1.
A reset unit 6 is connected to the reset line 8. The reset unit 6 of this example includes a voltmeter 9 connected between the reset line 8 and the ground voltage, a switch S10 connected between the reset line 8 and the ground voltage, and a reset voltage generating means 10. Is provided.
The voltmeter 9 measures the voltage converted by the I / V conversion unit 7 and controls the switch S10 according to the measured value. When the switch S10 is turned on, the reset voltage from the reset voltage generating means 10 is output to the node NDc via the reset line 8.

  The resistor R <b> 1 is a resistor that increases the output impedance of the differential amplifier 71 to some extent and reliably transmits the reset signal from the reset line 8 to the input of the comparison unit 5. If this is not necessary, the resistor R1 can be omitted.

  The comparison unit 5 includes a differential amplifier 52 that is connected to the supply line of the power supply voltage Vdd and the supply line 15b of the reference voltage, and operates by receiving power supply from these lines. The inverting input “−” of the differential amplifier 52 is connected to the node NDc, and a voltage source 51 that generates the reference voltage Vref is connected between the non-inverting input “+” and the reference voltage supply line 15 b. .

The output configuration of the comparison unit 5 is an open collector (or may be an open drain). More specifically, an output transistor Tr1 having the output of the differential amplifier 52 as a control node is an output stage of the comparison unit 5. The output transistor Tr1 of this example is formed of an NPN bipolar transistor, and has a collector connected to the reference voltage supply line 15b, a base connected to the output of the differential amplifier 52, and a collector connected to the output node NDd of the comparator 5. Yes.
The output node NDd of the comparison unit 5 is connected to the control node of the variable resistance unit 4 via the waveform shaping unit 3.

  The variable resistance unit 4 is a P-channel enhancement type MOSFET (hereinafter referred to as a variable resistance switch transistor) P1 as a variable resistance switch, and a current limiting current connected to the source S and drain D of the variable resistance switch transistor P1. And a bypass resistor R5. The gate G of the variable resistance switch transistor P <b> 1 is connected to the output of the waveform shaping unit 3. For this reason, the resistance of the entire variable resistance unit 4 changes according to the potential difference (gate-source voltage Vgs) between the gate G and the source S of the variable resistance switch transistor P1 controlled by the waveform shaping unit 3.

The waveform shaping unit 3 includes a diode D2, resistors R3 and R4, and a capacitor C2. The waveform shaping unit 3 is a load of the output of the comparison unit 5, shapes the output voltage of the waveform shaping unit 3, and controls the variable resistance unit 4 by the voltage after the waveform shaping.
The waveform shaping unit 3 has two roles, one of which is to adjust and transmit the open collector output of the comparison unit 5 to the variable resistance unit 4 with an optimum voltage. When the output transistor Tr1 of the comparison unit 5 is on, the gate voltage Vg applied to the gate G of the variable resistance switch transistor P1 of the variable resistance unit 4 is set to a low (GND) level. When the output transistor Tr1 is off, the gate voltage Vg is set to a high level (a voltage level similar to that of the node NDb).
Another role of the waveform shaping unit 3 is to make the rising slope (inclination) of the gate potential Vg applied to the gate G of the variable resistance switch transistor P1 fast (steep) and to set the rising slope slow (slowly). That is.

In order to shift the gate voltage Vg from the high level to the low level, it is necessary to forcibly apply the reset voltage from the reset line 8.
For this purpose, a reset unit 6 is provided. The reset unit 6 detects a voltage change by the voltmeter 9 when a certain level of current starts to flow in the drive current line 15a and the output of the I / V conversion unit 7 becomes high level. More specifically, when the semiconductor laser 21 is in steady operation, a relatively large drive current flows through the drive current line 15a, but this current is temporarily interrupted by disconnection of the contact, and then the contact is connected. In this case, a current smaller than the drive current starts to flow through the bypass resistor R5. The voltmeter 9 measures an output change of the I / V conversion unit 7 according to the current.
Then, the switch S10 is turned on, the reset voltage from the reset voltage generating means 10 is output to the comparison unit 5, the output transistor Tr1 is turned on, and the input voltage of the waveform shaping unit 3 is dropped to the low (GND) level.
When the voltage of the output node NDd of the comparison unit 5 is lowered to the GND level, the change in the voltage level is slowly performed with a time constant defined by the resistor R4 and the capacitor C2 in the waveform shaping unit 3 and the like. It is transmitted to the control node (gate G). For this reason, the resistance of the variable resistance unit 4 slowly changes from a high resistance to a low resistance.

  FIG. 2 shows each part of the drive circuit shown in FIG. 1 with a specific circuit. However, the configuration of each part is an example, and any form other than the example shown in the figure can be used as long as it achieves the same purpose. Can be arbitrarily selected. For example, the voltage clamp unit 25 (FIG. 1) can be realized by connecting a plurality of diodes in cascade instead of the Zener diode D1.

  Next, an outline of the operation of the semiconductor laser drive circuit configured as described above will be described step by step with reference to FIGS.

First, circuit constants of each part will be described.
The threshold current of the semiconductor laser 21 is about 30 [mA], the driving current Iop is about 40 [mA], and the operating voltage Vop at that time is about 4.5 [V]. The clamp voltage value Vclp of the Zener diode D1 is set to a voltage sufficiently higher than the operating voltage Vop so as not to affect the operation of the semiconductor laser 21. Here, since the operating voltage of the semiconductor laser 21 is about 4.5 [V], the clamp voltage value Vclp is set to 7 [V], for example.

  The detection resistor R2 of the I / V conversion unit 7 is set to a value that does not affect the operation of the drive circuit, for example, 1 [Ω], and the amplification factor of the differential amplifier 71 is set to 10, for example. When the drive current Iop of the semiconductor laser 21 is 40 [mA], the output voltage Vo2 of the I / V conversion unit 7 is obtained by the following equation (4).

[Equation 4]
Vo2 = 1 [oΩ] * 40 [mA] * 10
= 400 [mV] (4)

  A variable resistance switch transistor P1 having a threshold voltage Vth of about 1.5 [V] is used. Further, when the source voltage (gate-source voltage) Vgs based on the gate voltage is larger than 4.5 [V], the variable resistance switch transistor P1 is turned on, and the on-resistance is about 1 [Ω]. The following.

  The value of the bypass resistor R5 is a predetermined value when a voltage value obtained by subtracting the operating voltage Vop of the semiconductor laser 21 from the clamp voltage Vclp is applied to the resistor when the variable resistance switch transistor P1 of the variable resistor unit 4 is off. Set so that current flows. Here, the predetermined current is preferably a value smaller than the driving current Iop of the semiconductor laser 21. For example, when the clamp voltage Vclp is 7 [V] and the operating voltage Vop is 4.5 [V], it is about 10 [mA]. And In this case, the value of the bypass resistor R5 is given by the following equation (5).

[Equation 5]
R5 = (7 [V] -4.5 [V]) / 10 [mA]
＝ 250 [Ω]… (5)

  When the drive current Iop (= 40 [mA]) is flowing through the semiconductor laser 21, the reference voltage Vref of the voltage source 51 supplied to the non-inverting input “+” of the differential amplifier 52 in the comparison unit 5 is The voltage Vo2 (formula (4)) detected and converted by the I / V converter 7 and the contact is disconnected and reconnected to a predetermined value, for example, 10 [mA] via the bypass resistor R5. A current flows, and this is set according to the magnitude of the voltage Vo1 (formula (3)) detected and converted by the I / V converter 7. The reference voltage Vref can be set to an arbitrary value that is larger than the voltage Vo1 (= 100 [mV]) and smaller than the voltage Vo2 (= 400 [mV]), with a margin from these upper and lower limits. desirable. Here, the reference voltage Vref is set to 200 [mV], and depending on whether or not the voltage of the node NDc (and the reset line 8), which is the output of the I / V conversion unit 7, is higher than 200 [mV], the comparison unit. 5 is determined whether the output node NDd is at high level or low level.

  Next, an outline of the operation of the semiconductor laser drive circuit in which the circuit constants are set in this way will be described step by step with reference to FIGS.

<Step 1>
A predetermined drive current Iop (here, about 80 [mA]) flows from the current source 1 to the semiconductor laser 21. At this time, the clamp voltage value Vclp is sufficiently higher than the operating voltage of the semiconductor laser 21 (here, about 4.5 [V]), and the voltage clamp unit is not operating (not in the voltage clamp state).
At this time, the output voltage of the I / V converter 7 (the voltage at the node NDc) is about 400 [mV].

Here, as described above, the voltage of the voltage source 51 is 200 [mV], which is lower than the output voltage (about 400 [mV]) of the I / V conversion unit 7, so that the output transistor Tr1 of the comparison unit 5 is The output voltage of the open collector (the voltage of the output node NDd of the comparison unit 5) becomes low level. The control voltage transmitted to the variable resistance unit 4 through the waveform shaping unit 3 is also at a low level (almost GND) level. This control voltage is applied to the gate G of the variable resistance switch transistor P1. Therefore, the gate-source voltage Vgs of the variable resistance switch transistor P1 is about 4.5 [V], which is sufficiently larger than the threshold voltage Vth (= 1.5 [V]). The transistor P1 is turned on. As a result, the input / output of the variable resistor unit 4 is almost in a short-circuit state, and its resistance is about 1 [Ω] or less.
Therefore, almost all of the drive current Iop from the current source 1 flows to the semiconductor laser 21 when the current flowing through the waveform shaping unit 3 is ignored.

<Step 2>
Here, it is assumed that contact failure occurs accidentally for some reason, the contact probes 22a and / or 22b are separated from the terminals of the semiconductor laser 21, and the power supply to the semiconductor laser 21 is cut off.
At this time, the current source 1 tries to continue supplying current. Initially, this current does not flow through the path of the I / V conversion unit 7, the variable resistance unit 4, and the semiconductor laser 21, but flows through the surge removing capacitor C1.
Then, the voltage at the output node NDc of the I / V conversion unit 7 is instantaneously 0 [V] because no current flows through the detection resistor R2, and the output transistor Tr1 of the comparison unit 5 is turned off. Therefore, a current is supplied to the output node NDd of the comparison unit 5 through the resistor R3 in the waveform shaping unit 3, and the voltage becomes high level.

This high level voltage reaches the gate G of the variable resistance switch transistor P1 in a short time through the diode D2 in the waveform shaping section 3, and the gate voltage Vg becomes high level. At this time, the gate voltage Vg is lower than the voltage of the node NDb of the drive current line 15a by a forward voltage (= about 0.7 [V]) of the diode D2. For this reason, the gate-source voltage Vgs of the variable resistance switch transistor P1 is about 0.7 [V]. Since this voltage is smaller than the absolute value of the threshold voltage Vth (= about 1.5 [V]), the variable resistance switch transistor P1 is turned off.
As a result, the impedance between the source and drain of the variable resistance switch transistor P1, which has been about the on-resistance Ron, becomes almost infinite. Therefore, the resistance value between the input and output of the variable resistor unit 4 is determined by the value of the bypass resistor R5 (= 250 [Ω]).

  In the above state, the voltage of the output node NDc of the I / V conversion unit 7 is measured by the voltmeter 9 via the reset line 8 to make the current drive line non-conductive for some reason on the inspection device from the outside. It can be confirmed that

  As described above, since the drive current Iop flowing to the semiconductor laser 21 is limited by the bypass resistor R5 of the variable resistance unit 4 from the moment when the contact failure occurs and the current stops flowing to the I / V conversion unit 7, the overcurrent ( The semiconductor laser 21 is prevented from being deteriorated due to the inrush current / surge current.

  As described above, when the current drive line becomes non-conductive, the current drive current from the current source 1 flows into the surge removing capacitor C1, but when it is charged, the line load capacitance and the like are charged. Therefore, the voltage between the drive current line 15a and the reference voltage supply line 15b further increases, and eventually reaches the clamp voltage of the Zener diode D1. Thereafter, a current (zener current) flows through the Zener diode D1, and the voltage of the drive current line 15a becomes constant at the clamp voltage Vclp.

As described above, when the current drive line becomes non-conductive and immediately becomes conductive, the output voltage of the I / V converter 7 remains below about 100 [mV], and the output of the comparator 5 is Hold low level. Since the current of the drive current line 15a is limited by the bypass resistor R5, most of the current flows to the surge removing capacitor C1.
After that, when the voltage between the current drive line 15a and the reference voltage supply line 15b reaches the clamp voltage Vclp of the Zener diode D1, as in the non-conduction state, a Zener current flows through the Zener diode D1. .

<Step 3>
Next, it is assumed that the contact probes 22a and 22b and the terminal of the semiconductor laser 21 become conductive again.
At this time, the variable resistance switch transistor P1 remains off, and a current smaller than the drive current value Iop flows through the semiconductor laser 21 via the bypass resistor R5. This is because the bypass resistor R5 has a resistance value (for example, 250 [Ω]) sufficiently larger than the ON resistance (about 1 [Ω]) of the variable resistance switch transistor P1.
Specifically, a voltage difference between the clamp voltage Vclp (= 7 [V]) and the drive voltage Vop (= 4.5 [V]) of the semiconductor laser 21 is applied to the semiconductor laser 21 as a resistor R5 (= 250 [Ω]. ]), And a small current (about 10 [mA]) flows. When this current is detected by the I / V conversion unit 7 and converted into a voltage, the voltage value becomes about 100 [mV] from the equation (3).
This voltage is measured by the voltmeter 9 through the reset line 8, whereby it can be confirmed that the contact is in contact again and is in a conductive state.
<Step 4>
If the conduction state can be confirmed in step 3 above, the current drive line of the semiconductor laser 21 has been restored, so the reset state is set and the normal operation state in step 1 is restored.

To set the reset state, by turning on the switch S10, a reset voltage is output to the output node NDc of the I / V converter 7 via the reset line 8 (or a reset pulse is output using an external tester or the like). input).
The reset voltage takes a value that can change the output of the comparator 5 to a low level. Since the reference voltage Vref of the voltage source 51 is about 200 [mV], a voltage value exceeding that, for example, a reset voltage of about 300 [mV] is desirable.
Since the means for setting the reset state may be that the output node NDd of the comparison unit 5 is set to the low level, the voltage of the voltage source 51 is changed instead of providing the switch S10 and the voltage source 9 shown in FIG. Also good.

Once in the reset state, the diode D2 of the waveform shaping unit 3 is reverse-biased and does not turn on, so the gate voltage Vg of the variable resistance switch transistor P1 is gradually increased to a high level with the time constant between the resistor R4 and the gate capacitor C1. Slowly changes from low to low. In accordance with this, the resistance between the source S and the drain D of the variable resistance switch transistor P1 gradually decreases from infinity. This is because the resistance between the source S and drain D of the PMOS transistor (variable resistance switch transistor P1) is proportional to the inverse of the voltage obtained by subtracting the threshold voltage Vth from the gate-source voltage Vgs. The resistance between the source S and the drain D of the variable resistance switch transistor P1 finally becomes an on-resistance (about 1 [Ω]).
As a result, most of the current flowing through the Zener diode D1 flows into the semiconductor laser 21, and the voltage clamp unit is turned off (the voltage clamp state is released).

With the above operation, 10 [mA] flows to the semiconductor laser 21 when conducting, and then the drive current to the semiconductor laser 21 gradually increases by the start of reset, and the charge accumulated in the current drive line 15a is slowly discharged. The same current as that of the current source 1 flows through the semiconductor laser 21.
As a result, when the contact is connected and the energization of the semiconductor laser 21 changes from non-conduction to conduction, the semiconductor laser 21 enters the state of step 1 without overcurrent flowing.

  According to the present embodiment, the semiconductor laser 21 can be protected by avoiding an overcurrent (inrush current) that occurs during conduction from non-conduction that cannot be predicted by the operations of Step 1 to Step 4 described above.

  In addition, when the confirmation at the time of a conduction | electrical_connection state from the non-conduction of a contact is unnecessary, bypass resistance R5 in the variable resistance part 4 is omissible. In this case, the current flowing through the semiconductor laser 21 during non-conduction is not limited but cut off.

  The drive circuit is useful when incorporated in a measurement system for a current drive device such as a semiconductor laser. In that case, the current source and / or the reset function can be provided in a system portion other than the drive circuit such as a tester.

FIG. 3 shows a system configuration when the tester is provided with a current source and reset function.
In FIG. 3, a current source 1A and a reset unit 6A are provided in a tester 120 for a semiconductor laser (or IC). The tester 120 controls the inspection procedure of the semiconductor laser by a microcomputer (not shown).
The drive circuit according to this embodiment is mounted on a device interface board in a test head (not shown) that connects the handler 103 in which the DUT (semiconductor laser 21) is set and the tester 120 to each other. In FIG. 3, the protection circuit 102A portion of the drive circuit is shown.

Compared with the protection circuit 102 shown in FIG. 1, the protection circuit 102 </ b> A omits the voltage source that generates the reference voltage Vref in the comparison unit 5, and the reference voltage line is connected to the non-inverting input “+” of the differential amplifier 52. 81 is connected.
The reference voltage line 81 is connected to a voltage source 51A capable of changing the voltage between the reference voltage and the reset voltage in the reset unit 6A in the tester 120.
The voltage monitor line 82 is taken out from the node NDc in the protection circuit 102A, and is connected to the voltmeter 9a in the reset unit 6A in the tester 120.
In addition, a current source 1A that supplies a drive current to the current drive line 15a is also provided in the tester 120.
Other configurations in the protection circuit 102A are the same as those in FIG. 1, and can be realized by the specific circuit shown in FIG.

The basic operation of the measurement system shown in FIG. 3 is the same as that in FIGS. 1 and 2, and a description thereof is omitted here.
If this measurement system is used, in addition to the driving and protection of the semiconductor laser 21, the occurrence of contact non-conduction is detected, and the degree (number of times) is used for maintenance and maintenance (for example, contact probe replacement time, etc.) ).

1 to 3, the reset function can be omitted.
FIG. 4 shows an example of a drive circuit when the reset function is omitted.
In this drive circuit, the reset unit 6 (or 6A) is not connected to the output node NDc of the I / V conversion unit 7. Further, the resistor R1 between the node NDc and the differential amplifier 71 is also omitted.

The reference voltage Vref of the voltage source 51 is set in advance slightly lower than the output voltage of the I / V conversion unit 7 generated when the contact is in a non-conductive state. For example, the reference voltage Vref is set to about 50 [mV].
The operational change in this example is that it is not automatically restored by an external control circuit, but is automatically restored according to the output voltage of the I / V converter 7. Therefore, in FIG. 4, it is not necessary to reset, so that the reset line 8, the voltage measuring voltmeter 9 and the reset voltage generating means 10 shown in FIG. 2 are unnecessary.

  The drive circuit shown in FIG. 4 does not require a control circuit, so the circuit scale does not increase. Therefore, the drive circuit is effective, for example, when a protection device is incorporated in a burn-in board or the like.

[Second Embodiment]
FIG. 5 is a drive circuit diagram according to the second embodiment.
The change from the first embodiment is that the DUT (semiconductor laser 21) is the common anode, and the drive current is sinked from the cathode K and used. Accordingly, in the circuit, the connection relationship of the circuit elements is symmetric with respect to the power supply voltage Vcc and the power supply voltage Vee as compared with FIG. 1 of the first embodiment.
The change in the circuit diagram is that the power source of the current source 1 is supplied from the power source voltage Vee. The detection resistor R2 of the I / V converter 7 is connected to the current drive line 15d, and the capacitor C1 and the Zener diode D1 are connected between the reference voltage supply line 15c and the current drive line 15d. Differential amplifiers 71 and 52 are connected to power supply voltages Vcc and Vee to receive power supply. In the differential amplifiers 71 and 52, connection to other configurations of the inverting input and the non-inverting input is opposite to that in the case of FIG.
The output transistor Tr1 is not provided in the comparison unit 5. Instead, in the waveform shaping unit 3, the NMOS transistor P11 is connected between the reference voltage supply line 15c and the node NDd. Further, the diode D2 in the waveform shaping unit 3 is connected in reverse as compared with FIG.
In addition, the variable resistance switch transistor P33 in the variable resistance unit 4 is composed of an enhancement type NMOS transistor.

In such a configuration, the voltage generated in the detection resistor R2 of the I / V converter 7 is amplified by the differential amplifier 71 with a predetermined amplification factor, and a voltage based on the ground voltage is output.
This voltage is output to the comparison unit 5 via the resistor R1, and is compared with the reference voltage Vref of the voltage source 51 in the differential amplifier 52. The output of the differential amplifier 52 is substantially at the lowest potential (power supply voltage Vss) at the low level, and almost at the GND level at the high level. The NMOS transistor P11 is controlled by the output voltage of the differential amplifier 52, and a high level or a low level appears at the node NDd.
The voltage appearing at the node NDd is waveform-shaped by the waveform shaping unit 3 and output to the gate G of the variable resistance switch transistor P33 of the variable resistance unit 4.

When the output of the comparison unit 5 is at a low level, the NMOS transistor P11 is turned on, and the control voltage (gate voltage Vg) of the variable resistance unit 4 is set to a high level substantially in the vicinity of GND. At this time, the N-channel variable resistance switch transistor P33 is turned on, the variable resistance section 4 is almost short-circuited, and the resistance value between the input and output becomes an extremely low value defined by the on resistance Ron.
On the other hand, when the output of the comparison unit 5 is at a high level, the NMOS transistor P11 is turned off, and the control voltage (gate voltage Vg) of the variable resistance unit 4 is set to the same low level as the node NDb of the current drive line 15d. . At this time, the N-channel variable resistance switch transistor P33 is turned off, the variable resistance section 4 is substantially short-circuited, and the resistance value between the input and output is determined as the resistance value of the bypass resistor R5.

In the first embodiment, a PMOS transistor (variable resistance switch transistor P1) is used as a variable resistance switch. However, in the second embodiment, an NMOS transistor (variable resistance switch transistor P33) is used. Contrary to the first embodiment, the rising slope of the control voltage of the variable resistance unit 4 is set to be slow (gradual) and the falling slope is set to be fast (steep).
Other details of the operation are the same as those in the first embodiment, and are therefore omitted.

According to the embodiment of the present invention, the following benefits can be obtained.
First, overcurrent (inrush current / surge current) generated when the current drive line is turned from non-conductive to current-driven devices typified by a semiconductor laser or the like is prevented to prevent deterioration. be able to.

Second, it is not necessary to turn off and restart the drive circuit, and the inspection throughput can be increased. A configuration for automatically detecting restart is unnecessary, and the circuit scale is not increased correspondingly, and can be realized at low cost.
In particular, when the current drive line becomes non-conductive, the current to the current drive device remains limited and then reset, by gradually passing the drive current to the DUT by the waveform shaping section and variable resistance section. Since no overcurrent (inrush current / surge current) occurs, it is not necessary to turn off the output circuit once, and the inspection throughput does not decrease.
For this reason, this drive circuit is easy to use by incorporating it in a current drive device measurement system such as a semiconductor laser or a burn-in board.

Thirdly, since the current flowing through the DUT (semiconductor laser 21) is detected by monitoring that the current drive line is changed from the conductive state to the non-conductive state, the drive current flowing to the DUT is detected from the moment when the current drive line is turned off. Even when there is a large-capacity capacitor in the drive line, overcurrent (inrush current / surge current) can be prevented and its deterioration can be prevented.
This makes it possible to install a large-capacity capacitor in the current drive line for removing a surge generated when the power is turned on / off.

When it is detected that the current drive line has become non-conductive and then reset from the outside, the number of resets is related to the frequency of contact non-conduction (the number of times within a certain period). The frequency of occurrence of contact non-conduction can be used for maintenance as a guideline for, for example, replacement timing of the contact probe.
Whether it is reset by this external control circuit or automatically reset can be changed by changing the value of the reference voltage Vref, and the selection is easy.

  Furthermore, it is possible to cope with both anode common and cathode common current drive devices by changing the circuit configuration.

It is a block diagram which shows the structure of the drive circuit of 1st Embodiment. It is a circuit diagram which shows the specific example of FIG. It is a drive circuit figure of the 1st modification. It is a drive circuit figure of the 2nd modification. It is a drive circuit figure in a 2nd embodiment. It is a figure which shows the example of a drive circuit at the time of the test | inspection of a semiconductor laser. FIG. 7 is an equivalent circuit diagram in which FIG. 6 is simplified. FIG. 7 is another equivalent circuit diagram of FIG. 6. It is a graph which shows the time change of an output voltage and an electric current. It is an equivalent circuit diagram of a drive circuit to which a surge elimination circuit is added. It is a figure which shows the drive circuit described in patent document 1. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Current source, 3 ... Waveform shaping part, 4 ... Variable resistance part, 5 ... Comparison part, 6,6A ... Reset part, 8 ... Reset line, 9, 9a ... Voltmeter, 10 ... Reset voltage generation means, 15a, 15d, 23a, 23b ... current drive line, 15b ... supply line for power supply voltage Vee, 15c ... reference voltage supply line, 21 ... semiconductor laser (DUT), 22a, 22b ... contact probe, 51 ... voltage source, 52, 71 DESCRIPTION OF SYMBOLS ... Differential amplifier, 101 ... Drive circuit, 102, 102A ... Protection circuit, 103 ... Handler, 120 ... Tester, D1, D2 ... Zener diode, D3 ... Diode, P3 ... Variable resistance switch transistor, R2 ... Detection resistor, 5 ... Bypass resistance

Claims (8)

A drive circuit for supplying a predetermined drive current to the device,
A current source for supplying a driving current to the device;
A variable resistance switch connected between the current source and the device;
Transition time for monitoring the current of the connection line between the variable resistance switch and the current source, controlling on / off of the variable resistance switch according to the monitor current, and switching the variable resistance switch from on to off in the control More, a switch control circuit that lengthens the transition time from OFF to ON,
A driving circuit having: The switch control circuit includes:
A converter that converts the current of the connection line into a voltage;
A comparator that compares a voltage output from the converter with a reference voltage;
It is connected between the output of the comparison unit and the control node of the variable resistance switch, and when the output of the comparison unit transits from a low level to a high level, and when the output transits from a low level to a high level, A waveform shaping unit that changes the time constant of the change and transmits the level change to the control node of the variable resistance switch;
The drive circuit according to claim 1, comprising: A clamping portion for clamping the voltage of the connection line at a constant voltage;
The drive circuit according to claim 1, further comprising: The waveform shaping unit
A diode connected between the output of the comparator and the control node of the variable resistance switch;
A resistor and a capacitor for extending a voltage level change in a direction in which the diode is reverse-biased with a predetermined time constant and transmitting the change to a control node of the variable resistance switch;
The drive circuit according to claim 2, comprising: The drive circuit according to claim 1, wherein a bypass resistor is connected in parallel with the variable resistance switch. When the switch control circuit detects that a current flows through the bypass resistor when the variable resistance switch is off, the switch control circuit switches the voltage of the predetermined node in the switch control circuit from off to on. The drive circuit according to claim 5, further comprising a reset unit that forcibly shifts to a reset voltage to be controlled. The switch control circuit can turn off the variable resistance switch in accordance with the monitor current, and then turn on the voltage after converting the monitor current in response to fluctuations in the monitor current from the variable resistance switch off. The drive circuit according to claim 1, further comprising a reset unit that forcibly shifts to a different reset voltage. The drive circuit according to claim 1, wherein the switch control circuit includes an external output terminal of a voltage after the monitor current is converted.

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