JP2006270923A - Power amplifier and polar modulating system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power amplifier and polar modulation system that ensure maximum efficiency in outputting signals at multiple power levels. <P>SOLUTION: This power amplifier 100 is designed for use by communication devices that enable communication in multiple transmission modes of different power levels and comprises an input terminal 1 for signal input, a post-stage amplifier 2 that amplifies the signal input to the input terminal 1 to a signal at the first power level and a post-stage amplifier 3 that amplifies the signal input to the terminal 1 to the signal at the second power level different from the first power level. When either of the post-stage amplifiers 2 or 3 is turned on, the other amplifier is turned off. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a power amplifier and a polar modulation system, and more particularly to a power amplifier used in communication equipment that communicates in a plurality of transmission modes having different power levels.

  In a wireless communication system, there is a need for a wireless communication device that supports different modulation formats. For example, a mobile phone or the like that supports TDMA and CDMA operation modes.

  Different modulation formats have different power levels used. Therefore, a power amplifier of a wireless communication device needs to efficiently amplify a signal having a power level corresponding to each modulation format. As a power amplifier corresponding to a different modulation format, a method of changing the output impedance of the power amplifier is known (see, for example, JP-A-2001-251202).

FIG. 12 is a block diagram showing the configuration of the power amplifier described in Patent Document 1. In FIG.
The power amplifier shown in FIG. 12 includes a power source and bias control unit 24, a linear power amplifier 25, a microprocessor 26, a modulation format switch 27, a control unit 28, and a load 29.

With this configuration, the impedance viewed from the output of the linear power amplifier 25 is switched by switching the modulation format switch 27 in accordance with a system (transmission method) such as CDMA (Code Division Multiple Access), TDMA (Time Division Multiple Access), etc. The efficiency and / or linearity of the power amplifier 25 can be increased.
JP 2001-251202 A

  The conventional power amplifier is configured to switch the impedance viewed from the output of the power amplifier using a switch according to the system. Therefore, when the desired output power differs depending on the system, the same amplification unit is used in all the systems to obtain the desired output power, so that there is a problem that it is difficult to obtain the maximum efficiency according to the system.

  For example, a case where power amplification is performed and a signal having a high power level and a signal having a low power level are output will be described. In this case, the linear power amplifier 25 is configured to have an ability to cope with amplification of a signal having a large power level in order to output a signal of two powers. When outputting a signal with a high power level, the efficiency of the linear power amplifier 25 can be optimized by selecting an impedance comparable to the output impedance of the linear power amplifier 25 by the modulation format switch 27. On the other hand, when a signal with a low power level is output, the efficiency can be increased by increasing the impedance by the modulation format switch 27. However, since the capability of the linear power amplifier 25 is optimized when the output power is large, optimal efficiency cannot be obtained when the output power is small. That is, the conventional power amplifier has a problem that it is difficult to extract the maximum efficiency according to the system.

  In order to solve the above-described problems, an object of the present invention is to provide a power amplifier and a polar modulation system that can extract the maximum efficiency when outputting signals of a plurality of power levels.

  In order to achieve the above object, a power amplifier according to the present invention is a power amplifier used in a communication device that communicates in a plurality of transmission modes having different power levels, the input terminal receiving a signal, and the input terminal And amplifying the signal input to the input terminal to a signal having a second power level different from the first power level. Second amplifying means, and when one of the first amplifying means and the second amplifying means is turned on, the other is turned off. Here, the transmission mode means a signal format used for transmission / reception. For example, different transmission modes mean different transmission modes (for example, CDMA and TDMA), and different signal power levels used for transmission and reception in the same transmission mode.

  According to this configuration, the power amplifier according to the present invention can switch the amplifying means to be used according to the power level of the output signal. Therefore, the power amplifier according to the present invention can draw out the maximum efficiency when outputting signals of a plurality of power levels by optimizing the power level of the signal output from each amplification means.

  The first amplifying means and the second amplifying means operate in a non-linear amplification operation, and the first amplifying means and the second amplifying means are controlled by controlling the power supply voltage to be applied. A power level signal may be output.

  According to this configuration, the power amplifier according to the present invention can be designed without considering linearity at the design stage. That is, the power amplifier can be easily designed.

  Further, at least one of the first amplifying means and the second amplifying means may be constituted by a plurality of stages of amplifying means.

  According to this configuration, at least one of the first amplification unit and the second amplification unit can increase the maximum value of the output power. In addition, the variable range of output power can be widened.

  The power amplifier further includes a first output terminal that outputs the signal amplified by the first amplification means, and a second output terminal that outputs the signal amplified by the second amplification means. May be provided.

  According to this configuration, signals output from the first amplifying unit and the second amplifying unit can be output to different output terminals.

  The power amplifier may further include an output terminal that outputs a signal amplified by the first amplification unit and the second amplification unit.

  According to this configuration, the signal amplified by the first amplifying unit and the second amplifying unit is output to one output terminal.

  The power amplifier further includes a first switch connected between the output of the second amplification means and the output terminal, and the output of the first amplification means is connected to the output terminal. The first switch may be turned off when the first amplifying means is on, and the first switch may be turned on when the second amplifying means is on.

  According to this configuration, when the first amplifying unit is used, the influence of the output load of the second amplifying unit can be reduced. Further, when the first amplifying means is used, it is possible to prevent the signal amplified by the first amplifying means from flowing from the output of the second amplifying means to the input of the first amplifying means. Further, since the output of the first amplifying means is connected to the output terminal without passing through the switch, the passage loss can be reduced as compared with the output path of the second amplifying means.

  The power amplifier further includes a first switch connected between the output of the first amplifying unit and the output of the second amplifying unit and the output terminal, and the first switch Any one of the output of the first amplifying means and the output of the second amplifying means may be connected to the output terminal.

  According to this configuration, when the first amplifying unit is used, the influence of the output load of the second amplifying unit can be reduced. Further, when the second amplifying means is used, the influence of the output load of the first amplifying means can be reduced.

  The power amplifier may further include a second switch connected between the input terminal and at least one of the input of the first amplifying unit and the input of the second amplifying unit. .

  According to this configuration, when one of the first amplifying unit and the second amplifying unit is used, the influence of the other input load can be reduced.

  The power amplifier further includes an output terminal that outputs a signal amplified by the first amplification unit or the second amplification unit, an impedance of the input terminal, and an input impedance of the first amplification unit. First input matching means for impedance matching, second input matching means for impedance matching between the impedance of the input terminal and the input impedance of the second amplifying means, and the output of the first amplifying means First output matching means for performing impedance matching between the impedance and the impedance of the output terminal; and second output matching means for performing impedance matching between the output impedance of the second amplification means and the impedance of the output terminal. You may prepare.

  According to this configuration, the power amplifier according to the present invention can perform impedance matching between the input and output of the first amplifying unit and the second amplifying unit. Thus, transmission efficiency can be optimized.

  The input impedance of the first amplifying means may be different from the input impedance of the second amplifying means, and the output impedance of the first amplifying means may be different from the output impedance of the second amplifying means. .

  According to this configuration, the first amplifying unit and the second amplifying unit can amplify signals having different power levels with maximum efficiency.

  Further, the first amplifying means and the second amplifying means are constituted by bipolar transistors or field effect transistors, and the first amplifying means and the second amplifying means are the base voltage of the bipolar transistor or ON and OFF may be controlled by the gate voltage of the field effect transistor.

  According to this configuration, the first amplifying unit and the second amplifying unit can be switched ON / OFF by controlling the base voltage of the bipolar transistor or the gate voltage of the field effect transistor.

  The first amplifying unit and the second amplifying unit may each include a control terminal for a base voltage of the bipolar transistor or a gate voltage of the field effect transistor.

  According to this configuration, ON / OFF of the first amplifying means and the second amplifying means can be switched by controlling the voltage applied to the control terminal provided in the first amplifying means and the second amplifying means. it can.

  The power amplifier may further include a third amplifying unit formed between the input terminal and the inputs of the first amplifying unit and the second amplifying unit.

  According to this configuration, the power amplifier according to the present invention includes the third amplifying means before the first amplifying means and the second amplifying means, so that the maximum value of the output power can be increased. In addition, the variable range of output power can be widened. Furthermore, the circuit scale can be reduced by using the third amplifying means in common.

  Further, the first power amplifier and the second power amplifier may amplify signals used for the same transmission method.

  According to this configuration, the power amplifier according to the present invention can bring out the maximum efficiency when outputting signals having different power levels that are used in the same transmission method.

  The power amplifier includes the first amplifying unit and the second amplifying unit, and includes a plurality of amplifying units that amplify the signals input to the input terminals into signals having different power levels. When one of the amplification means is turned on, the other amplification means may be turned off.

  According to this configuration, by optimizing the signal level of the signal output from each amplifying unit, the maximum efficiency can be obtained when a signal having a plurality of power levels is output.

  The polar modulation system according to the present invention includes an RFIC that separates and outputs phase information and amplitude information from an IQ signal, a power supply circuit that outputs a voltage corresponding to the amplitude information, and the phase information is the input terminal. And the power amplifier to which a voltage output from the power supply circuit is input as a power supply voltage.

  According to this configuration, the amplification means to be used can be switched according to the power level of the output signal. Therefore, the polar modulation system according to the present invention can optimize the signal level of the signal output from each amplifying means, and can extract the maximum efficiency when outputting a signal having a plurality of signal levels.

  The control method according to the present invention is a method for controlling a power amplifier used in a communication device that communicates with a plurality of signals having different power levels, and amplifies the same signal into signals having different power levels. Turn on one of these.

  Thereby, the control method of the power amplifier according to the present invention can switch the amplification means to be used according to the power level of the output signal. Therefore, the power amplifier control method according to the present invention can optimize the power level of the signal output from each amplifying unit, and thereby draw the maximum efficiency when outputting signals of a plurality of power levels.

  Thus, the present invention can be realized not only as such a power amplifier, but also as a power amplifier control method using characteristic means included in the power amplifier as a step.

  The present invention can provide a power amplifier and a polar modulation system that can extract the maximum efficiency when outputting signals of a plurality of power levels.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

(Embodiment 1)
A power amplifier according to Embodiment 1 of the present invention will be described with reference to FIGS. The power amplifier according to the first embodiment can bring out the maximum efficiency in each system by providing a plurality of amplifiers optimized for each system.

  FIG. 1 is a block diagram of a power amplifier according to Embodiment 1 of the present invention, and FIG. 2 is a circuit diagram showing elements constituting each block of FIG. As shown in FIG. 1, the power amplifier 100 includes an input terminal 1, rear stage amplification units 2 and 3, and output terminals 4 and 5. The power amplifier 100 amplifies the signal input to the input terminal 1 and outputs it to the output terminal 4 or the output terminal 5. A signal having an arbitrary frequency is input to the input terminal 1 and its output is branched into two. One of the branches is connected to the input of the post-stage amplification unit 2, and the other is connected to the input of the post-stage amplification unit 3. The output of the post-stage amplifier 2 is connected to the output terminal 4, and the output of the post-stage amplifier 3 is connected to the output terminal 5. Further, it is assumed that a high power level signal is output to the output terminal 4 and a low power level signal is output to the output terminal 5.

  The post-amplifier 2 amplifies the signal input to the input terminal 1 to a high power level signal. The post-amplifier 2 is optimized for amplifying a high-power signal, and is switched on / off according to the signal at the Vref1 terminal.

  The post-amplifier 3 amplifies the signal input to the input terminal 1 to a signal having a low power level different from the power level of the signal output from the post-amplifier 2. The post-amplifier 3 is optimized for amplification of a low-power signal, and is switched on / off according to the signal at the Vref2 terminal. Further, when one of the rear amplification unit 2 and the rear amplification unit 3 is turned on, the other is turned off.

  When a high power signal is input to the input terminal 1, the rear amplification unit 2 is turned on and the rear amplification unit 3 is turned off. Therefore, when a high power signal is input to the input terminal 1, the post-amplifier 2 amplifies the signal input to the input terminal 1 and outputs the amplified signal to the output terminal 4.

  When a low power signal is input to the input terminal 1, the rear amplification unit 2 is turned off and the rear amplification unit 3 is turned on. Therefore, when a low power signal is input to the input terminal 1, the post-amplifier 3 amplifies the signal input to the input terminal 1 and outputs the amplified signal to the output terminal 5.

For example, an antenna is connected to the output terminal 4 and the output terminal 5.
FIG. 2 shows a specific circuit diagram of the block diagram of FIG. In FIG. 2, the output of the input terminal 1 is branched into two, and one is connected to the base of the transistor Tr <b> 1 via the matching circuit 6. Hereinafter, high-frequency bipolar transistors are used for all transistors. Although the transistor is a bipolar transistor, a field effect transistor may be used.

  The matching circuit 6 includes a capacitor C1, a capacitor C2, an inductor L1, and a capacitor C3. The matching circuit 6 performs impedance matching between the impedance of a circuit or wiring connected to the input terminal 1 and the input impedance of the post-stage amplifier 2. For example, if a wiring with an impedance of 50Ω is connected to the input terminal 1 and the input impedance of the post-stage amplifier 2 is 3Ω, the matching circuit 6 performs impedance conversion from an impedance of 50Ω to 3Ω.

  The post-stage amplifying unit 2 includes a transistor Tr1, a resistor R1, a capacitor C4, and an inductor L2. In the transistor Tr1, an emitter is grounded, a voltage Vref1 corresponding to a system mode signal from the outside is applied to the base as a bias voltage via a resistor R1, a voltage Vcc is bypassed by a capacitor C4 to a collector, and a load inductor A voltage is applied through L2. The post-amplifier 2 is controlled to be turned on and off by the base voltage of the transistor Tr1. That is, the post-amplifier 2 is turned on when a voltage for turning on the transistor Tr1 is applied to Vref1, and turned off when 0V is applied to Vref1 or grounded to GND. The post-amplifier 2 amplifies the impedance-matched signal by the matching circuit 6 and outputs the amplified signal to the matching circuit 8 in the ON state (a state in which the voltage for turning on the transistor Tr1 is applied to Vref1).

  The matching circuit 8 includes a capacitor C5, a capacitor C6, an inductor L3, and a capacitor C7. The matching circuit 8 performs impedance matching between the output impedance of the post-amplifier 2 and the impedance of a circuit or wiring connected to the output terminal 4 (for example, an antenna). For example, if the output impedance of the post-amplifier 2 is 3Ω and the impedance of the antenna connected to the output terminal 4 is 50Ω, the matching circuit 8 performs impedance conversion from impedance 3Ω to 50Ω.

  The other branched output of the input terminal 1 is connected to the base of the transistor Tr2 via the matching circuit 7.

  The matching circuit 7 includes a capacitor C8, a capacitor C9, an inductor L4, and a capacitor C10. The matching circuit 7 performs impedance matching between the impedance of a circuit or wiring connected to the input terminal 1 and the input impedance of the post-amplifier 3. Since the rear amplification unit 2 and the rear amplification unit 3 are optimized for signals having different power levels, the input impedances are different. For example, if a wiring with an impedance of 50Ω is connected to the input terminal 1 and the input impedance of the post-amplifier 3 is 7Ω, the matching circuit 7 performs impedance conversion from impedance 50Ω to 7Ω.

  The post-amplification unit 3 includes a transistor Tr2, a resistor R2, a capacitor C11, and an inductor L5. In the transistor Tr2, an emitter is grounded, a voltage Vref2 corresponding to a system mode signal is externally applied to the base as a bias voltage via a resistor R2, a voltage Vcc is bypassed by a capacitor C11 to a collector, and a load inductor A voltage is applied via L5. The rear amplification unit 3 is controlled to be turned on and off by the base voltage of the transistor Tr2. That is, the post-amplifier 3 is turned on when a voltage for turning on the transistor Tr2 is applied to Vref2, and turned off when 0V is applied to Vref2 or grounded to GND. The post-amplifier 3 amplifies the impedance-matched signal by the matching circuit 7 and outputs the amplified signal to the matching circuit 9 in the ON state (a state in which the voltage for turning on the transistor Tr2 is applied to Vref2).

  The matching circuit 9 includes a capacitor C12, a capacitor C13, an inductor L6, and a capacitor C14. The matching circuit 9 performs impedance matching between the output impedance of the post-amplifier 3 and the impedance of a circuit or wiring connected to the output terminal 5 (for example, an antenna). Since the rear amplification unit 2 and the rear amplification unit 3 are optimized for signals of different power levels, the output impedances are different. For example, assuming that the output impedance of the post-stage amplifier 3 is 7Ω and the impedance of the antenna connected to the output terminal 5 is 50Ω, the matching circuit 9 performs impedance conversion from impedance 7Ω to 50Ω.

Next, the operation of the power amplifier 100 according to the present embodiment configured as described above will be described.
For example, assuming that two systems are handled, one is GSM (Global System for Mobile Communications) using a high power signal, and one is WCDMA (Wideband Code Division Multiple Access) using a low power signal. First, when amplifying a GSM signal, a voltage at which the transistor Tr1 is turned on is applied from the Vref1 in the rear stage amplification unit 2, and 0 V is applied from the Vref2 to the rear stage amplification unit 3, or Vref2 is grounded to GND, and the transistor Tr2 is turned off. Leave it in a state. Since the transistor Tr1 is in the ON state, the GSM input signal input from the input terminal 1 is input to the matching circuit 6 and impedance-matched, and the output is input to the post-amplifier 2 and input to the post-amplifier 2 The amplified signal is amplified, and its output is input to the matching circuit 8 for impedance matching and output to the output terminal 4. The transistor Tr1 performs a non-linear amplification operation, and can output a signal having a desired power level by controlling the power supply voltage Vcc applied to the collector.

  When amplifying a WCDMA signal, a voltage at which the transistor Tr2 is turned on is applied from the Vref2 in the rear amplification unit 3, and 0 V is applied from the Vref1 to the rear amplification unit 2 or the Vref2 is grounded to the GND, and the transistor Tr1 is turned off Keep it. Since the transistor Tr2 is in the ON state, the WCDMA input signal input from the input terminal 1 is input to the matching circuit 7 and impedance-matched, and the output is input to the post-amplifier 3 and input to the post-amplifier 3 The amplified signal is amplified, and its output is input to the matching circuit 9 for impedance matching and output to the output terminal 5. The transistor Tr2 performs a non-linear amplification operation, and can output a signal having a desired power level by controlling the power supply voltage Vcc applied to the collector.

  Therefore, the power amplifier 100 according to the present embodiment can bring out the maximum efficiency of each system by switching the amplification unit according to the system.

  Although the power amplifier according to the embodiment of the present invention has been described above, the present invention is not limited to this embodiment.

3 and 4 are diagrams showing modifications of the power amplifier 100 according to the first embodiment.
In the above embodiment, the output branch of the input terminal 1 has two branches, but the number of branches is three as in the power amplifier 101 shown in FIG. May be connected to the output terminals 4, 5, and 12, and by adding the post-stage amplifying units by the number of branches, it can be used for three or more n systems. That is, a plurality of subsequent amplification units that amplify signals having different power levels from the signal input to the input terminal 1 may be provided. In this case, when one of the plurality of subsequent amplification units is turned on, the other subsequent amplification units are turned off.

  In the above embodiment, the amplification unit of the subsequent amplification unit is one stage. However, the maximum output power can be increased by adding two stages or more n like the power amplifier 101 shown in FIG. In addition, the variable range of output power can be widened. Furthermore, in the power amplifier 101 shown in FIG. 3, the rear amplification units 2, 3, and 11 are configured in two stages, but each may have a different number of stages. For example, the rear amplification units 2 and 3 may be configured in two stages, and the rear amplification unit 11 may be one stage.

  Further, in the above embodiment, the input of the rear amplification units 2 and 3 is connected to the input terminal 1, but a front amplification unit may be formed between the input terminal 1 and the input of the rear amplification unit. By adding the pre-amplifier unit 10 between the input terminal and the branch as in the power amplifier 101 shown in FIG. 3, the maximum output power can be increased without increasing the number of stages of each post-amplifier unit. The variable range of output power can be widened. Further, since the pre-amplifier 10 is commonly used when outputting a signal of any power level, the circuit scale can be reduced.

  The pre-amplifier 10, the post-amplifier 2, the post-amplifier 3, and the post-amplifier 11 of the power amplifier 101 shown in FIG. 3 each include control terminals (Vref1 to Vref4) for the base voltage of the transistor Tr1. When the power amplifier 101 is used, a voltage at which the pre-amplifier 10 is always in an operating state is applied to Vref4, and a voltage at which the post-amplifier 2, 3, or 11 is in an operating state at any one of Vref1, Vref2, and Vref3 By applying, a desired path can be brought into an operating state.

  Moreover, in said embodiment, although the amplification part used according to a some system is changed, it is not restricted to this. The present invention can also be used when output power differs in the same system (transmission method). For example, in a wireless communication system such as a cellular phone, the power level of a signal to be transmitted is changed when the distance from the base station is different (the power level is increased when the distance from the base station is far, and the distance from the base station is changed). It can also be used when the power level is reduced when the power is close.

  Further, as shown in FIG. 4, a plurality of power amplifiers 101 shown in FIG. 3 may be provided. For example, the power amplifier 101a is used for amplifying a GSM signal, the power amplifier 101b is used for amplifying a WCDMA signal, and different powers are used in the subsequent amplification units 2a, 3a, 11a, 2b, 3b, and 11b of each power amplifier. Can be amplified to a level signal. When the power amplifier 101a is used, the power amplifier 101b can be turned off by applying 0V to Vref1b to Vref4b or grounding to GND. When the power amplifier 101b is used, the power amplifier 101a can be turned off by applying 0V to Vref1a to Vref4a or grounding to GND. Note that ON / OFF of the subsequent-stage amplifier in each of the power amplifiers 101a and 101b is the same as that of the power amplifier 101 shown in FIG.

(Embodiment 2)
A power amplifier according to Embodiment 2 of the present invention will be described with reference to FIG. The power amplifier according to Embodiment 2 includes a switch between the outputs of a plurality of amplifying units, so that even if there is only one output terminal, it is not affected by other amplifying units.

  FIG. 5 is a block diagram of the power amplifier according to Embodiment 2 of the present invention, in which there is one output terminal, and the output of one subsequent stage amplification unit is directly connected to the output terminal. The difference from FIG. 1 is that the output of the post-amplifier is connected to the output terminal via a switch. Since the operation of the circuit is the same as that of the power amplifier in the first embodiment, the same reference numerals are used and the description thereof is omitted.

  As shown in FIG. 5, a signal of an arbitrary frequency is input to the input terminal 1, and the output is branched into two, and is connected to a subsequent amplification unit 2 and a subsequent amplification unit 3 that amplify the branched signal. The output of the post-amplifier 2 is connected to the output terminal 4. The switch 13 is connected between the output of the rear amplification unit 3 and the output terminal 4. For example, the switch 13 is a semiconductor switch using a PIN diode, a bipolar transistor, a field effect transistor, or a HEMT (High Electron Mobility Transistor).

Next, the operation of the embodiment configured as described above will be described.
For example, assuming that two systems are handled, one is GSM using a high-power signal, and one is WCDMA using a signal having a lower power than GSM. First, when amplifying a GSM signal, the rear amplification unit 2 is turned on, the rear amplification unit 3 is turned off, and the switch 13 is turned off. The GSM input signal input from the input terminal 1 is input to the post-stage amplifier 2 and amplified because the post-stage amplifier 2 is in the ON state, and the output is output to the output terminal 4.

  When amplifying a WCDMA signal, the rear amplification unit 2 is turned off, the rear amplification unit 3 is turned on, and the switch 13 is turned on. The WCDMA input signal input from the input terminal 1 is input to the post-stage amplifier 3 and amplified because the post-stage amplifier 3 is in the ON state, and the output is output to the output terminal 4 via the switch 13. The It should be noted that at least the post-stage amplifying unit 2 and the post-stage amplifying unit 3 perform a non-linear amplification operation, and a desired output power can be obtained by controlling the applied power supply voltage.

  Therefore, by providing the switch 13 at the output of the rear amplification unit 3, the influence of the output load of the rear amplification unit 3 on the output load of the rear amplification unit 2 when the rear amplification unit 2 is ON can be reduced. Further, it is possible to prevent the high power signal amplified by the post-stage amplifier 2 from returning from the output side of the post-stage amplifier 3 to the input side. Further, since the post-amplifier 2 and the output terminal 4 are directly connected without a switch, the passage loss is smaller than the path of the post-amplifier 3. Therefore, it is desirable to set which of the rear amplification unit 2 and the rear amplification unit 3 is used according to the characteristics of the system to be used. That is, by passing a switch in the path of the post-amplifier 3 that amplifies the low-power signal without using a switch in the path of the post-amplifier 2 that amplifies the high-power signal, It is possible to prevent the amplified high power signal from returning from the output side of the post-stage amplifier 3 to the input side. Further, since the high-power signal path does not go through a switch, the passage loss can be reduced.

FIG. 6 is a block diagram showing a configuration of a modified example of the power amplifier according to the second embodiment.
Although the SPST switch is used as the switch 13 in the above embodiment, an SPDT switch may be used as shown by the switch 14 in FIG. The switch 14 is connected between the output of the rear amplification unit 2 and the output of the rear amplification unit 3 and the output terminal 4. The switch 14 connects either the output of the rear amplification unit 2 or the output of the rear amplification unit 3 to the output terminal 4. When the rear amplification unit 2 is ON, the switch 14 connects the output of the rear amplification unit 2 and the output terminal 4. When the rear amplification unit 3 is ON, the switch 14 outputs and outputs the rear amplification unit 3. Connect to terminal 4. By using the SPDT switch, it is possible to reduce the mutual interference of the output loads of the respective rear amplification units when the respective rear amplification units are turned on.

  In the above embodiment, the number of branches of the output of the input terminal 1 is two. However, by adding the number of branches and adding the subsequent amplification units by the number of branches, three or more n branches Can be used for individual systems.

  In the above-described embodiment, the amplification unit of the subsequent amplification unit is one stage. However, the maximum output power can be increased by adding two or more n amplification units, and the output power can be varied. Can be widened.

  In the above embodiment, the output of the input terminal 1 is branched after the output. However, as shown in FIG. 3, by adding a pre-stage amplifier 10 between the input terminal 1 and the branch, The maximum output power can be increased without increasing the number of stages, and the variable width of the output power can be widened.

(Embodiment 3)
A power amplifier according to Embodiment 3 of the present invention will be described with reference to FIG. The power amplifier according to the third embodiment can be prevented from being affected by the input impedance of other amplifying units by providing a switch between the inputs of a plurality of amplifying units.

  FIG. 7 is a block diagram of the power amplifier according to the third embodiment of the present invention. The difference from the power amplifier according to the first embodiment is that the output of the input terminal is branched using a switch. Since the operation of the circuit is the same as that of the power amplifier in the first embodiment, the description thereof is omitted by attaching the same reference numerals.

  As shown in FIG. 7, a signal having an arbitrary frequency is input to the input terminal 1, and the output is branched into two. One of the branches is connected to the input of the post-amplifier 2. The switch 15 is connected between the other end of the branch and the input of the post-amplifier 3. The output of the post-stage amplifier 2 is connected to the output terminal 4, and the output of the post-stage amplifier 3 is connected to the output terminal 5. For example, the switch 15 is a semiconductor switch using a PIN diode, a bipolar transistor, a field effect transistor, a HEMT (High Electron Mobility Transistor), or the like.

Next, the operation of the embodiment configured as described above will be described.
For example, two systems are treated as GSM using a high-power signal, and one is WCDMA using a signal lower in power than GSM. First, when a GSM signal is amplified, the rear amplification unit 2 is turned on, the rear amplification unit 3 is turned off, and the switch 15 is turned off. The GSM input signal input from the input terminal 1 is input to the subsequent amplifier section 2 and amplified because the subsequent amplifier section 2 is ON and the switch 15 is OFF, and the output is output to the output terminal 4. .

  When amplifying a WCDMA signal, the rear amplification unit 2 is turned off, the rear amplification unit 3 is turned on, and the switch 15 is turned on. The WCDMA input signal input from the input terminal 1 is input to the subsequent amplifier 3, amplified, and output to the output terminal 5 because the subsequent amplifier 3 is ON and the switch 15 is ON. It should be noted that at least the post-stage amplifying unit 2 and the post-stage amplifying unit 3 perform a non-linear amplification operation, and a desired output power can be obtained by controlling the applied power supply voltage.

  Therefore, by branching the output of the input terminal 1 by providing the switch 15, it is possible to reduce the influence of the input load of the rear amplification unit 3 on the input load of the rear amplification unit 2 when the rear amplification unit 2 is ON. In addition, since the input of the input terminal 1 and the input of the post-stage amplifying unit 2 are directly connected, the passage loss is small compared to the path of the post-stage amplifying unit 3. Therefore, it is desirable to set which of the rear amplification unit 2 and the rear amplification unit 3 is used according to the characteristics of the system to be used. In other words, the switch 15 is not provided in the input path of the post-amplifier unit 2 that amplifies the low-power signal, but the switch 15 is provided in the input path of the post-amplifier unit 3 that amplifies the high-power signal having a large influence. When a signal is amplified, it is possible to reduce the influence of the load on the post-amplifier 3. Further, since the input path of the high power signal does not go through the switch, the passage loss can be reduced.

  Although the SPST switch is used as the switch 15 in the above embodiment, an SPDT switch can also be used. When the SPDT switch is used, when the rear amplification unit 2 is turned on, the input terminal 1 and the input of the rear amplification unit 2 are connected by the SPDT switch. When the post-stage amplifier 3 is turned on, the input terminal 1 and the input of the post-stage amplifier 3 are connected by the SPDT switch. By using the SPDT switch, it is possible to reduce the mutual interference of the input loads of the respective rear amplification units when the respective rear amplification units are turned on.

  FIG. 8 is a block diagram showing a configuration of a modified example of power amplifier 104 in the third embodiment.

  In the above embodiment, there are two output terminals. However, as shown in FIG. 8, a switch 16 is added to the configuration shown in FIG. 7, and the outputs of the two subsequent amplification units 2 and 3 are connected by the switch 16. The output terminal can be made one. Furthermore, although the switch 16 in FIG. 8 uses an SPST switch, an SPDT switch may be used.

  In the above embodiment, the number of branches of the output of the input terminal 1 is two. However, by adding the number of branches and adding the subsequent amplification units by the number of branches, three or more n branches Can be used for individual systems.

  In the above-described embodiment, the amplification unit of the subsequent amplification unit is one stage. However, the maximum output power can be increased by adding two or more n amplification units, and the output power can be varied. Can be widened.

  In the above embodiment, the output of the input terminal is branched after the output. However, as shown in FIG. 3, by adding a pre-amplifier between the input terminal and the branch, each post-amplifier has an amplifying part. The maximum output power can be increased without increasing the number of stages, and the variable width of the output power can be widened.

(Embodiment 4)
In the fourth embodiment of the present invention, a polar modulation system including the power amplifier in the first, second, or third embodiment will be described with reference to FIG.

  FIG. 9 is a block diagram of a polar modulation system according to Embodiment 4 of the present invention. A polar modulation system 200 shown in FIG. 9 includes a radio frequency integrated circuit (RFIC) 18, a power supply circuit 19, and a power amplifier 100.

  The RFIC 18 separates and outputs amplitude information and phase information from the IQ signal. The RFIC 18 includes an IQ modulator 21, an amplitude / phase converter 22, and a voltage controlled oscillator 23.

  FIG. 10 is a diagram illustrating the modulation of the IQ signal in the IQ modulator 21. As shown in FIG. 10, the IQ modulator 21 performs IQ modulation on the digital data 30 and outputs it as an analog signal.

  FIG. 11 is a diagram illustrating amplitude / phase conversion. The amplitude / phase converter 22 converts the IQ signal output from the IQ modulator 21 into an amplitude 31 and a phase 32 shown in FIG.

  The voltage controlled oscillator 23 outputs a signal having a predetermined frequency and phase based on the phase information (analog voltage) output from the amplitude / phase converter 22.

The power supply circuit 19 outputs a voltage corresponding to the amplitude information output from the amplitude / phase converter 22.
The power amplifier 100 is the power amplifier 100 shown in FIGS. 1 and 2 described in the first embodiment. The power amplifier 100 may be the power amplifier described in the second or third embodiment. In the power amplifier 100, a signal including phase information output from the voltage controlled oscillator 23 is input to the input terminal 1, and a voltage corresponding to the amplitude information output from the power supply circuit 19 is input to the VCC terminal. In addition, by controlling the voltages applied to Vref1 and Vref2, it is possible to switch the amplification unit used by the power amplifier 100 and realize the optimum efficiency with respect to the output power. Since the operation and effect of power amplifier 100 are the same as those in the first embodiment, a description thereof will be omitted.

  Further, when designing a power amplifier according to the system, it is necessary to match three elements of power, efficiency, and linearity (distortion) according to the system. Since power amplifier 100 according to the present embodiment performs a non-linear amplification operation, in a polar modulation system, it is not necessary to perform integration for an element of linearity (distortion). That is, by using the power amplifier 100 for a polar modulation system, a polar modulation system corresponding to a plurality of systems can be easily designed.

  The present invention can be applied to a power amplifier and a polar modulation system, and in particular, can be applied to a power amplifier used in a wireless communication device such as a mobile phone that communicates in a plurality of transmission modes having different power levels.

It is a block diagram of the power amplifier in Embodiment 1 of this invention. It is a circuit diagram of the power amplifier in Embodiment 1 of the present invention. It is a block diagram which shows the other example of the power amplifier in Embodiment 1 of this invention. It is a block diagram which shows the other example of the power amplifier in Embodiment 1 of this invention. It is a block diagram of the power amplifier in Embodiment 2 of this invention. It is a block diagram which shows the other example of the power amplifier in Embodiment 2 of this invention. It is a block diagram of the power amplifier in Embodiment 3 of this invention. It is a block diagram which shows the other example of the power amplifier in Embodiment 3 of this invention. 1 is a block diagram of a polar modulation system including a power amplifier of the present invention. It is a figure which shows IQ signal in a polar modulation system. It is a figure which shows the amplitude / phase conversion of IQ signal. It is a block diagram of the conventional power amplifier.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Input terminal 2, 3, 11 Subsequent amplification means 4, 5, 12 Output terminal 6, 7, 8, 9 Matching circuit 10 Preamplification means 13, 14, 15, 16 Switch 18 RFIC
DESCRIPTION OF SYMBOLS 19 Power supply circuit 20 Power amplifier 21 IQ modulator 22 Amplitude / phase converter 23 Voltage control oscillator 30 Digital data 31 Amplitude 32 Phase 100, 101, 102, 103, 104, 105, 101a, 101b Power amplifier 200 Polar modulation system C1 C14 Capacitor L1-L6 Inductor R1, R2 Resistance

Claims (17)

A power amplifier used in a communication device that communicates in a plurality of transmission modes having different power levels,
An input terminal to which a signal is input;
First amplifying means for amplifying a signal input to the input terminal to a signal of a first power level;
Second amplifying means for amplifying a signal input to the input terminal into a signal having a second power level different from the first power level;
A power amplifier, wherein when one of the first amplifying means and the second amplifying means is turned on, the other is turned off. The first amplifying unit and the second amplifying unit perform a non-linear amplification operation,
2. The power amplifier according to claim 1, wherein the first amplifying unit and the second amplifying unit output a signal having a desired power level by controlling an applied power supply voltage. 3. 3. The power amplifier according to claim 1, wherein at least one of the first amplification unit and the second amplification unit includes a plurality of stages of amplification units. The power amplifier further includes:
A first output terminal for outputting a signal amplified by the first amplifying means;
The power amplifier according to claim 1, further comprising: a second output terminal that outputs a signal amplified by the second amplifying unit. The power amplifier further includes:
The power amplifier according to any one of claims 1 to 3, further comprising an output terminal that outputs a signal amplified by the first amplification unit and the second amplification unit. The power amplifier further includes:
A first switch connected between the output of the second amplification means and the output terminal;
The output of the first amplification means is connected to the output terminal,
When the first amplification means is ON, the first switch is OFF,
The power amplifier according to claim 5, wherein the first switch is turned on when the second amplification unit is turned on. The power amplifier further includes:
A first switch connected between the output of the first amplifying means and the output of the second amplifying means and the output terminal;
6. The power amplifier according to claim 5, wherein the output terminal is connected to one of the output of the first amplifying unit and the output of the second amplifying unit by the first switch. . The power amplifier further includes:
8. A second switch connected between the input terminal and at least one of the input of the first amplification means and the input of the second amplification means. The power amplifier according to claim 1. The power amplifier further includes:
An output terminal for outputting a signal amplified by the first amplifying means or the second amplifying means;
First input matching means for performing impedance matching between the impedance of the input terminal and the input impedance of the first amplification means;
Second input matching means for performing impedance matching between the impedance of the input terminal and the input impedance of the second amplification means;
First output matching means for performing impedance matching between the output impedance of the first amplification means and the impedance of the output terminal;
The power amplifier according to any one of claims 1 to 3, further comprising second output matching means for performing impedance matching between an output impedance of the second amplification means and an impedance of the output terminal. . The input impedance of the first amplifying means is different from the input impedance of the second amplifying means,
The power amplifier according to claim 9, wherein an output impedance of the first amplifying unit is different from an output impedance of the second amplifying unit. The first amplifying means and the second amplifying means are constituted by bipolar transistors or field effect transistors,
The first and second amplifying means are controlled to be turned on and off by a base voltage of the bipolar transistor or a gate voltage of a field effect transistor. The power amplifier according to claim 1. The power amplifier according to claim 11, wherein each of the first amplifying unit and the second amplifying unit includes a control terminal for a base voltage of the bipolar transistor or a gate voltage of the field effect transistor. The power amplifier further includes:
The third amplifying unit formed between the input terminal and the input of the first amplifying unit and the second amplifying unit is provided. 13. Power amplifier. The power amplifier according to any one of claims 1 to 13, wherein the first power amplifier and the second power amplifier amplify a signal used for the same transmission method. The power amplifier is
A plurality of amplifying means including the first amplifying means and the second amplifying means, and amplifying the signals input to the input terminals into signals having different power levels;
The power amplifier according to claim 1, wherein when one of the plurality of amplifying means is turned on, the other amplifying means is turned off. An RFIC that separates and outputs phase information and amplitude information from the IQ signal;
A power supply circuit that outputs a voltage according to the amplitude information;
A polar modulation comprising: the power amplifier according to claim 1, wherein the phase information is input to the input terminal, and a voltage output from the power supply circuit is input as a power supply voltage. system. A method of controlling a power amplifier used in a communication device that communicates in a plurality of transmission modes having different power levels,
A control method comprising turning on one of two amplifying means for amplifying the same signal to a signal having a different power level.

Images