JP2006210564A - Bipolar transistor manufacturing method and bipolar transistor using the same - Google Patents

Abstract

Disclosed is a method of manufacturing a bipolar transistor having a withstand voltage and a high power with improved DC current gain characteristics.
A base electrode pattern (9a) and an emitter electrode pattern (10a) are formed above the base region (3) and the emitter region (4), respectively. As a forming method, Al as an electrode material is formed by sputtering, and an Al film is formed by lithography and dry etching. Next, heat treatment is performed in an atmosphere of water or oxygen as an oxidant to form a base electrode 9b and an emitter electrode 10b whose surfaces are oxidized.
[Selection] Figure 8

Description

  The present invention relates to a bipolar transistor having a high power and a high current gain, and a manufacturing method.

  In the bipolar transistor, a sintering process is performed to improve the ohmic characteristics of the silicon substrate, the base, and the emitter electrode.

  Hereinafter, a method for sintering a base electrode and an emitter electrode disclosed in Patent Document 1 will be described with reference to FIG.

First, an N-type layer 102 is epitaxially grown on an N ⁺ -type Si substrate 101 serving as a collector, and a P-type emitter region 103 and a base region 104 are diffused therein, and an N-type emitter region 105 is formed in the region 104. To provide a planar coupling for each.

  Next, a passivation film 106 is deposited on the entire surface, windows are opened on the regions 103 to 105, and an emitter electrode 107 is formed in the region 103 and a base electrode 108 is formed in the region 105 using Al.

Thereafter, in order to improve the ohmic characteristics between Al and the semiconductor, a heat treatment at about 430 ° C. is performed. At this time, it is performed in an H ₂ and N ₂ mixed atmosphere in which the flow rate ratio of H ₂ gas is 40 to 80%.
JP-A-55-58536

  In order to improve the DC current gain characteristics of a bipolar transistor, it is common to make the base region thin and make the impurity concentration distribution in the emitter / base region steep.

  However, a high breakdown voltage / high power bipolar transistor has technical difficulties in reducing the thickness of the base region and steepening the impurity concentration distribution in the emitter / base region.

  In view of the above, an object of the present invention is to improve the characteristics of a direct current amplification factor in a bipolar transistor.

  In order to solve the above problems, a bipolar transistor manufacturing method of the present invention includes a step of forming a metal film on a silicon substrate on which an oxide film is formed, a step of forming a metal wiring by patterning the metal film, And a step of performing a heat treatment on the semiconductor substrate on which the oxide film and the metal wiring are formed, wherein the heat treatment is performed in an oxidizing agent atmosphere.

  In the bipolar transistor manufacturing method of the present invention, the oxidizing agent is more preferably oxygen, water, or both.

  In the bipolar transistor manufacturing method of the present invention, the heat treatment is more preferably a sintering process between a silicon substrate and a metal wiring.

  In the method for manufacturing a bipolar transistor of the present invention, the step of forming the metal film is more preferably a sputtering process.

  In the bipolar transistor manufactured by the method for manufacturing a bipolar transistor according to the present invention, the metal wiring is more preferably Al whose surface is oxidized.

  In the method for manufacturing a bipolar transistor of the present invention, the surface charge density of the silicon oxide film can be reduced together with the improvement of ohmic characteristics between the collector and emitter electrodes and the region.

  Hereinafter, bipolar transistors according to embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a structural sectional view of a vertical npn bipolar transistor according to an embodiment of the present invention.

  As shown in FIG. 1, a collector region 2 is formed on an n-type silicon substrate 1, and a base region 3 and an emitter region 4 are formed thereon. The base region 3 and the base electrode 9b, and the emitter region 4 and the emitter electrode 10b are joined to each other through part of the silicon oxide film 5 that is a protective film.

  The collector electrode 11 is joined to the collector region 2 from the back surface of the substrate 1, and the base electrode 9b and the emitter electrode 10b are made of Al, and the Al surface is covered with aluminum oxide.

  Then, a mesa groove 6 is provided around the element for separation, and a glass film 8 is formed on the mesa groove 6 as a surface protective film for suppressing side wall leakage.

  Next, a bipolar transistor manufacturing method according to an embodiment of the present invention will be described with reference to FIGS.

First, as shown in FIG. 2, a thermal diffusion process is performed on an n-type silicon substrate 1 having a specific resistance of 60 Ωcm and a thickness of 385 μm in order to introduce phosphorus from the surface of the silicon substrate 1, a diffusion depth of 250 μm, and a surface concentration of about 2 A collector region 2 of × 10 ²⁰ cm ⁻³ is formed.

Further, thermal diffusion treatment is performed to introduce boron and aluminum, thereby forming a base region 3 having a diffusion depth of 250 μm and a surface concentration of about 2 × 10 ²⁰ cm ⁻³ . At this time, an oxide film may be formed on the surface of the substrate 1 as a protective film for thermal diffusion.

Next, as shown in FIG. 3, a thermal diffusion process is performed to selectively introduce phosphorus from the surface of the substrate 1, thereby forming an emitter region 4 in the base region 3. The emitter region has a diffusion depth of 16 μm and a surface concentration of 4 × 10 ¹⁹ cm ⁻³ . At this time, an oxide film may be formed on the surface of the substrate 1 as a protective film for thermal diffusion.

  Further, a silicon oxide film 5 is formed on the upper surfaces of the base region 3 and the emitter region 4 by a thermal oxidation process. The silicon oxide film 5 may be used as it is without being newly formed when a silicon oxide film is formed as a protective film at the time of thermal diffusion in the previous step.

  Next, as shown in FIG. 4, a part of a region for forming a base and an emitter electrode, which will be described later, and a silicon oxide film 5 in a region for forming a mesa groove are removed by wet etching.

  Further, a wet etching process is performed on the silicon substrate 1 to form a mesa groove 6 for element isolation. The mesa groove 6 has a depth of 135 μm and a width of 320 μm.

  As the wet etching conditions, the substrate 1 is immersed in hydrofluoric acid: nitric acid: acetic acid = 3: 6: 2 (volume ratio) whose temperature is controlled several times as an etchant for 10 to 30 seconds. Further, the horizontal swing was performed with a constant swing width with respect to the substrate 1 during the immersion.

  Next, as shown in FIG. 5, a coating film 7 made of glass powder (64 wt%) and a photosensitive substance (36 wt%) is formed only on the surface of the mesa groove 6. The method is a lithography process used as a coating material composed of glass powder (64% by weight), a photosensitive substance (36% by weight) and a solvent.

  Next, as shown in FIG. 6, heat treatment is performed at about 900 ° C. for about 10 to 30 minutes. By this treatment, the glass powder contained in the coating film 7 reacts with silicon to form a glass film 8 on the surface of the mesa groove 6.

  Next, as shown in FIG. 7, a base electrode pattern 9a and an emitter electrode pattern 10a are formed on the base region 3 and the emitter region 4, respectively. As a forming method, an Al film is formed by sputtering Al as an electrode material, and an electrode pattern is formed by lithography and dry etching.

  Next, as shown in FIG. 8, heat treatment is performed in an atmosphere of water and oxygen as an oxidant to form a base electrode 9b and an emitter electrode 10b whose surfaces are oxidized. The water supply method includes a bubbling method and a pyrogenic method.

  Finally, as shown in FIG. 9, a collector electrode 11 made of Al is formed in the collector region 2 on the surface of the silicon substrate 1 by a sputtering process.

  Through the above steps, the bipolar transistor according to the embodiment of the present invention is formed.

  In the manufacturing method of the bipolar transistor according to the present embodiment, the silicon oxide film 5 is brought into contact with the plasma discharge by the sputtering process and the dry etching process when forming the base electrode 9b and the emitter electrode 10b in the process of FIG.

For this reason, the surface charge density of the silicon oxide film 5 increases. Specifically, after the step of FIG. 7, the value of the surface charge density of the silicon oxide film 5 was 5.3 × 10 ¹¹ cm ⁻² .

However, when the process shown in FIG. 8 is performed, the value of the surface charge density of the silicon oxide film 5 is 4.7 × 10 ¹¹ cm ⁻² .

  Therefore, when the step of FIG. 8 is performed as a subsequent step of FIG. 7, the surface charge density of the silicon oxide film 5 can be reduced together with the improvement of ohmic characteristics between the collector and emitter electrodes and the region.

  Next, the transistor characteristics of the embodiment of the present invention and the prior art will be described with reference to FIG. In FIG. 10, the vertical axis represents the direct current amplification factor, and the horizontal axis represents the collector current.

  From the figure, it can be seen that the embodiment of the present invention exhibits a higher DC current gain than the prior art. In particular, in the small current region where the collector current is 0.0001 to 0.1 amperes, the conventional technique is 5.3 to 26 compared to 22 to 31 in the embodiment of the present invention. .

  The reason why the above characteristics are obtained will be described below.

  A characteristic resulting from the direct current amplification factor is the surface charge density of the silicon oxide film 5.

  However, the surface charge density described in the present embodiment refers to the trap charge in the silicon oxide film 5, the movable charge, the fixed charge in the vicinity of the silicon oxide film 5 and silicon interface, and the interface trap charge in the silicon oxide film 5 and silicon interface. The net charge density per unit area, which is considered to substantially influence the surface and is considered to exist on the silicon oxide film side of the silicon oxide film 5 and the silicon interface in a delta function, is shown.

  When this surface charge density is high, the recombination rate in the space charge region between the emitter and the base of carriers injected from the emitter to the base increases. For this reason, the proportion of carriers that reach the collector from the emitter decreases, and the direct current amplification factor decreases.

  The above is the reason why the direct current amplification factor is improved when the silicon oxide film 5 on the base of the bipolar transistor and the emitter junction surface is subjected to heat treatment in an atmosphere of water and oxygen as oxidants.

  In general, in order to improve the direct current gain characteristics of a bipolar transistor, the base region 3 is made thin and the impurity concentration distribution in the emitter / base region is made steep.

  However, in a high breakdown voltage / high power bipolar transistor, there is a limit in making the base region 3 thin, and there is a limit in making the impurity concentration distribution in the emitter / base region steep.

  Therefore, when the present invention is applied to a vertical bipolar transistor, a high current gain, a withstand voltage, and a large power can be realized simultaneously.

  The method for manufacturing a bipolar transistor according to the present invention can improve the direct current amplification factor, and is useful as a method for manufacturing a high-voltage / high-power vertical bipolar transistor.

Sectional drawing showing a bipolar transistor according to an embodiment of the present invention Process sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on embodiment of this invention Process sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on embodiment of this invention Process sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on embodiment of this invention Process sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on embodiment of this invention Process sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on embodiment of this invention Process sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on embodiment of this invention Process sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on embodiment of this invention Process sectional drawing which shows the manufacturing method of the bipolar transistor which concerns on embodiment of this invention Characteristic correlation diagram between collector current and DC current gain in bipolar transistors Sectional drawing which shows the manufacturing method of the bipolar transistor of a prior art

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Collector region 3 Base region 4 Emitter region 5 Silicon oxide film 6 Mesa groove 7 Coating film 8 Glass coating 9a Base electrode pattern 9b Base electrode 10a Emitter electrode pattern 10b Emitter electrode 11 Collector electrode

Claims (5)

Forming a metal film on the semiconductor substrate on which the oxide film is formed;
Forming a metal wiring by patterning the metal film;
A step of performing a heat treatment on the semiconductor substrate on which the oxide film and the metal wiring are formed.
The method for manufacturing a bipolar transistor, wherein the heat treatment is performed in an oxidant atmosphere. 2. The method for manufacturing a vertical transistor according to claim 1, wherein the oxidizing agent is oxygen, water, or both. 3. The method of manufacturing a bipolar transistor according to claim 1, wherein the heat treatment is a sintering process between the semiconductor substrate and the metal wiring. 4. The method of manufacturing a bipolar transistor according to claim 1, wherein the step of forming the metal film is a sputtering process. A bipolar transistor manufactured by the bipolar transistor manufacturing method according to claim 1,
2. The bipolar transistor according to claim 1, wherein the metal wiring is Al having an oxidized surface.

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