JP2006196595A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To maintain balance in stress in a semiconductor device in which two or more semiconductor elements are provided between both opposite metal bodies and the elements are molded by a resin. <P>SOLUTION: The semiconductor device 100 is provided with a first metal body 20 and a second metal body 30 which are oppositely provided; a first semiconductor element 10 provided between both the metal bodies 20, 30 and thermally connected to both the metal bodies 20, 30; a second semiconductor element 11 provided between both the metal bodies 20, 30 and thermally connected to both the metal bodies 20, 30; and a molding resin 70 filled between both the metal objects 20, 30, and sealing the first semiconductor element 10 and the second semiconductor element 11. In this semiconductor device 100, the first semiconductor element 10 is arranged at a position closer to the first metal body 20 and the second semiconductor element 11 is arranged at a position closer to the second metal body 30, in the center of a distance between both the metal bodies 20, 30 in a direction where both the metal bodies 20, 30 are spaced. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device in which two or more semiconductor elements are interposed between both metal bodies facing each other and these are molded with a resin.

  Conventionally, as a semiconductor device of this type, generally, a first metal body and a second metal body, which are disposed to face each other, are provided between the first metal body and the second metal body. A first semiconductor element and a second semiconductor element which are thermally connected to both metal bodies; a mold resin which is filled between the two metal bodies and seals the first semiconductor element and the second semiconductor element; There has been proposed one configured with (for example, see Patent Document 1).

  FIG. 5 is a diagram specifically showing a general cross-sectional configuration of this type of semiconductor device. The first metal body 20 and the second metal body 30 are plate members made of a heat sink material such as a metal excellent in heat dissipation, and both the metal bodies 20 and 30 are arranged to face each other.

  Between the first metal body 20 and the second metal body 30, the first semiconductor element 10 and the second semiconductor element 11 are arranged in parallel in a plane. The lower surfaces of the first semiconductor element 10 and the second semiconductor element 11 and the upper surface of the lower first metal body 20 are thermally bonded by the first conductive bonding member 51. .

  Further, the upper surfaces of the semiconductor elements 10 and 11 and the lower surface of the third metal body 40 made of a heat sink block or the like are thermally bonded by the second conductive bonding member 52. Further, the upper surface of the third metal body 40 and the lower surface of the second metal body 30 above the third metal body 40 are thermally bonded by a third conductive bonding member 53.

  A mold resin 70 is filled between the first metal body 20 and the second metal body 30, and the first semiconductor element 10 and the second semiconductor element 11, and further, the mold resin 70. 3 metal bodies 40 are sealed.

  Further, as shown in FIG. 5, a lead frame 60 is provided around the first semiconductor element 10 in the mold resin 70, and the lead frame 60 and the first frame are connected to each other via a bonding wire (not shown). 1 semiconductor element 10 is electrically connected.

  The lead frame 60 has an end portion exposed from the mold resin 70, and can electrically connect the first semiconductor element 10 and the outside.

In such a semiconductor device, on the top surfaces of the first and second semiconductor elements 10 and 11, the second conductive bonding member 52, the third metal body 30, the third conductive bonding member 53, and Heat is radiated through the second metal body 30, and heat is radiated from the first conductive joint member 51 through the first metal body 20 on the lower surfaces of the first and second semiconductor elements 10 and 11. It is the composition that is called.
JP 2004-6967 A

  According to the study by the present inventors, it has been found that the following problems occur in the semiconductor device as shown in FIG.

  As shown in FIG. 5, the inventors of the present invention conventionally have a first semiconductor element 10 and a second semiconductor element 11 in a direction in which both metal bodies 20 and 30 are separated (up and down in FIG. 5). It was noted that it is arranged at a position close to the lower first metal body 20 with respect to the central portion of the distance between the metal bodies 20 and 30 in the direction (ie, the thickness direction of the semiconductor device).

  Conventionally, the first semiconductor element 10 may be composed of a plurality of semiconductor elements, and the second semiconductor element 11 may be composed of a plurality of semiconductor elements. Even in such a case, in the conventional semiconductor device, all of the plurality of semiconductor elements 10 and 11 are arranged at positions close to one metal body.

  As described above, when the plurality of semiconductor elements 10 and 11 are arranged so as to be biased toward the first metal body 20, stress concentration points are biased toward the first metal body 20. Here, the stress is, for example, a thermal stress generated due to a difference in thermal expansion coefficient between a metal body, a semiconductor, and a mold resin when a temperature cycle is applied.

  As described above, the stress concentration is biased toward one metal body between the metal bodies 20 and 30, that is, the first metal body 20 side in FIG. It falls into a malfunction as a package. Further, since the stress concentration is biased in this way, the package, that is, the semiconductor device is warped, and it becomes difficult to assemble the semiconductor device to another member.

  The present invention has been made in view of the above problems, and in a semiconductor device in which two or more semiconductor elements are interposed between opposing metal bodies and these are molded with resin, a stress balance is achieved. The purpose is to take.

  In order to achieve the above object, according to the first aspect of the present invention, the first metal body (20) and the second metal body (30) arranged to face each other, the first metal body (20), and A first semiconductor element (10) provided between the second metal bodies (30) and thermally connected to both the metal bodies (20, 30), the first metal body (20), A second semiconductor element (11) provided between the two metal bodies (30) and thermally connected to the two metal bodies (20, 30); the first metal body (20); In a semiconductor device comprising a mold resin (70) filled between the metal bodies (30) and sealing the first semiconductor element (10) and the second semiconductor element (11), both metal bodies (20 , 30) with respect to the central part of the distance between the two metal bodies (20, 30) in the direction in which they are separated from each other. 10) is arranged at a position close to the first metal body (20), and the second semiconductor element (11) is arranged at a position close to the second metal body (30). It is said.

  According to this, since the first semiconductor element (10) and the second semiconductor element (11) are arranged to be distributed to the respective metal bodies (20, 30) to the side, Concentration points of stress such as thermal stress are dispersed more than the configuration in which both the first semiconductor element and the second semiconductor element are arranged to be biased toward one metal body, for example, the first metal body side.

  Therefore, according to the present invention, in a semiconductor device in which two or more semiconductor elements (10, 11) are interposed between both opposing metal bodies (20, 30) and these are molded with a resin (70). , Stress balance can be taken.

  And, according to the present invention, since stress balance can be taken, problems such as cracks in the mold resin (70), progress of interfacial peeling of the mold resin (70), and warpage of the mold package, that is, the apparatus main body, It can be suppressed as much as possible.

  Here, as in the invention described in claim 2, in the semiconductor device described in claim 1, the first semiconductor element (10) is a conductive bonding member with respect to the first metal body (20). The second semiconductor element (11) can be directly bonded to the second metal body (30) via the conductive bonding member (53).

  Further, as in the invention described in claim 3, in the semiconductor device described in claim 1 or 2, the first semiconductor element disposed at a position close to the first metal body (20). (10) is thermally connected to the second metal body (30) via the third metal body (40), and is disposed at a position close to the second metal body (30). The second semiconductor element (11) can be characterized in that it is thermally connected to the first metal body (20) via the third metal body (40).

  According to a fourth aspect of the present invention, in the semiconductor device according to the first to third aspects, each of the first semiconductor element (10) and the second semiconductor element (11) includes a plurality of semiconductor elements. Between the two metal bodies (20, 30), one first semiconductor element (10) and one second semiconductor element (11) are repeatedly arranged adjacent to each other. It is characterized by that.

  According to this, in the case where each of the first semiconductor element (10) and the second semiconductor element (11) is composed of a plurality of semiconductor elements, a stress balance is more easily obtained, which is preferable.

  In addition, the code | symbol in the bracket | parenthesis of each said means is an example which shows a corresponding relationship with the specific means as described in embodiment mentioned later.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following drawings, parts that are the same or equivalent to each other are given the same reference numerals in the drawings for the sake of simplicity.

[Configuration]
FIG. 1 is a diagram showing a schematic cross-sectional configuration of a semiconductor device 100 according to an embodiment of the present invention.

  As shown in FIG. 1, the semiconductor device 100 roughly includes a first semiconductor element 10 and a second semiconductor element 11 on both surfaces of the semiconductor elements 10 and 11 so as to sandwich the semiconductor elements 10 and 11. A heat sink 20 and 30 as a pair of heat sinks disposed, and a mold resin 70 filled between the pair of heat sinks 20 and 30 and sealing the first semiconductor element 10 and the second semiconductor element 11 are provided. It is configured.

  Here, in the semiconductor device 100, the sealing of the mold resin 70 is performed so that the outer main surfaces 20 a and 30 a that are the heat radiation surfaces of the pair of heat sinks 20 and 30 are exposed from the mold resin 70. ing.

  Of the pair of heat sinks 20 and 30, the lower one in FIG. 1 is referred to as the lower heat sink 20, and the upper one is referred to as the upper heat sink 30. In the semiconductor device 100 shown in FIG. 1, the lower heat sink 20 is configured as the first metal body 20, and the upper heat sink 30 is configured as the second metal body 30.

  In the semiconductor device 100 shown in FIG. 1, the semiconductor elements 10 and 11 are connected to the lower heat sink 20 via the heat sink block 40 as the third metal body 40 and the conductive bonding members 51, 52, and 53. And the upper heat sink 30.

  In the example shown in FIG. 1, the first semiconductor element 10 and the second semiconductor element 20 are arranged in parallel in a plane. Here, in FIG. 1, the first semiconductor element 10 is located on the left side, and the second semiconductor element 20 is located on the right side.

  As described above, in this example, each of the first semiconductor element 10 and the second semiconductor element 11 is provided in total, two in total, but in the semiconductor device 100 of the present embodiment, the pair of heat sinks 20, The first semiconductor element 10 sandwiched between 30 may be composed of a plurality of semiconductor elements, and the second semiconductor element 11 may be composed of a plurality of semiconductor elements.

  That is, in the semiconductor device 100 according to the present embodiment, two or more semiconductor elements 10 and 11 are sandwiched between the lower heat sink 20 and the upper heat sink 30 that are arranged to face each other.

  In the present embodiment, as shown in FIG. 1, both heat sinks in the direction in which the lower and upper heat sinks 20 and 30 are separated (the vertical direction in FIG. 1, ie, the thickness direction of the semiconductor device 100). The first semiconductor element 10 on the left side is disposed at a position near the lower heat sink 20 and the second semiconductor element 11 on the right side is near the upper heat sink 30 with respect to the central portion of the interval of 20 and 30. Placed in position.

  In the case where the first semiconductor element 10 and the second semiconductor element 11 are each composed of a plurality of semiconductor elements, in the present embodiment, a plurality of semiconductor elements arranged at positions close to the lower heat sink 20. However, a plurality of semiconductor elements which are configured as the first semiconductor element 10 and are arranged at positions close to the upper heat sink 30 are configured as the second semiconductor element 11.

  In addition, when the first semiconductor element 10 and the second semiconductor element 11 are each composed of a plurality of semiconductor elements, a single first semiconductor is interposed between the lower and upper heat sinks 20 and 30. It is preferable that the element 10 and one second semiconductor element 11 are repeatedly arranged adjacent to each other.

  Specifically, this is as follows. For example, in FIG. 1, it is assumed that four semiconductor elements are arranged in parallel between the lower and upper heat sinks 20 and 30 from the left side to the right side.

  At this time, the two on the left are the first semiconductor elements 10 biased toward the lower heat sink 20 as the first metal body, and the two on the right are on the upper heat sink 30 side as the second metal body. The second semiconductor element 11 may be biased.

  However, as a preferable form, from the left side to the right side in FIG. 1, the first semiconductor element 10 biased toward the lower heat sink 20, the second semiconductor element 11 biased toward the upper heat sink 30, and the lower heat sink 20 side. It is desirable to arrange four semiconductor elements, such as the biased first semiconductor element 10 and the second semiconductor element 11 biased toward the upper heat sink 30 side.

  As described above, the semiconductor device 100 of this embodiment has a unique configuration for the first semiconductor element 10 and the second semiconductor element 11.

  As shown in FIG. 1, in such an arrangement configuration of the semiconductor elements, specifically, the first conductive element is provided between the lower surface of the first semiconductor element 10 and the upper surface of the lower heat sink 20. Bonded by the bonding member 51.

  Further, the upper surface of the first semiconductor element 10 and the lower surface of the heat sink block 40 are bonded by a second conductive bonding member 52. Further, the upper surface of the heat sink block 40 and the lower surface of the upper heat sink 30 are bonded by a third conductive bonding member 53.

  On the other hand, as shown in FIG. 1, the upper surface of the second semiconductor element 11 and the lower surface of the upper heat sink 30 are bonded by a third conductive bonding member 53. Further, the lower surface of the second semiconductor element 11 and the upper surface of the heat sink block 40 are bonded by the second conductive bonding member 52, and further, the lower surface of the heat sink block 40 and the upper surface of the lower heat sink 20 are connected. The space is bonded by the first conductive bonding member 51.

  As described above, the first semiconductor element 10 is directly bonded to the lower heat sink 20 via the conductive bonding member 51, and the second semiconductor element 11 is bonded to the upper heat sink 30. It is directly joined via.

  The first semiconductor element 10 disposed at a position close to the lower heat sink 20 is thermally connected to the upper heat sink 30 via a heat sink block 40 as a third metal body. The second semiconductor element 11 arranged at a position close to 30 is thermally connected to the lower heat sink 20 via a heat sink block 40 as a third metal body.

  Here, as the first, second, and third conductive bonding members 51, 52, and 53, solder, a conductive adhesive, or the like can be employed. As a specific example, in the present semiconductor device 100, for example, Sn (tin) solder can be used as the first, second, and third conductive bonding members 51, 52, 53.

  Thus, in the configuration described above, heat is radiated on the upper surface of the first semiconductor element 10 via the second conductive bonding member 52, the heat sink block 40, the third conductive bonding member 53, and the upper heat sink 30. On the lower surface of the first semiconductor element 10, heat is radiated from the first conductive bonding member 51 through the lower heat sink 20.

  On the other hand, heat is radiated from the third conductive bonding member 53 via the upper heat sink 30 on the upper surface of the second semiconductor element 11, and the second conductive bonding member 52 on the lower surface of the second semiconductor element 11. The heat sink block 40, the first conductive bonding member 51, and the lower heat sink 20 are configured to dissipate heat.

  Thus, the lower heat sink 20 as the first metal body and the upper heat sink 30 as the second metal body of the present embodiment are thermally connected to the first and second semiconductor elements 10 and 11. As a result, it is configured as a heat radiating plate that transfers heat from each of the semiconductor elements 10 and 11 to radiate heat.

  And in the lower heat sink 20, the lower surface in FIG. 1 is comprised as the thermal radiation surface 20a, and in the upper heat sink 30, the upper surface in FIG. 1 is comprised as the thermal radiation surface 30a. As shown in FIG. 1, the heat radiating surfaces 20 a and 30 a are exposed from the mold resin 70.

  The heat sink surfaces 20a and 30a of these heat sinks 20 and 30 are the widest surfaces, ie, plate surfaces, of the heat sinks 20 and 30 as plate-like heat sinks, and are disposed to face each other with the semiconductor elements 10 and 11 therebetween. These are the main surfaces 20a, 30a on the outer sides of the pair of heat sinks 20, 30 respectively.

  Here, the first semiconductor element 10 and the second semiconductor element 11 are not particularly limited, and an element manufactured by using a normal semiconductor manufacturing technique using a silicon semiconductor substrate or the like is employed. be able to.

  Specifically, the first semiconductor element 10 that can be used as a semiconductor element in the present embodiment can be composed of a power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) or a thyristor.

  Similarly, the second semiconductor element 11 that can be used as a semiconductor element in the present embodiment can be made of, for example, an FWD (free wheel diode). Specifically, the shape of the first and second semiconductor elements 10 and 11 can be, for example, a rectangular thin plate.

  Here, the surfaces of the first and second semiconductor elements 10 and 11 (upper surfaces in FIG. 1) are element formation surfaces on which elements such as transistors are formed. The back surface (the lower surface in FIG. 1) is configured as a non-formed surface on which no such element is formed.

  In addition, electrodes (not shown) are formed on the front and back surfaces of the first and second semiconductor elements 10 and 11 of the present embodiment. This electrode is made of, for example, aluminum, and is electrically connected to each conductive bonding member 51, 52, 53 on each surface.

  As described above, in the present embodiment, the front-side electrode and the back-side electrode of the first and second semiconductor elements 10 and 11 are connected to the lower heat sink 20 and the upper heat sink 30 by the conductive bonding member 51. To 53 and the heat sink block 40 are electrically connected.

  Here, the lower heat sink 20, the upper heat sink 30, and the heat sink block 40 are made of, for example, a metal having good thermal conductivity and electrical conductivity, such as a copper alloy or an aluminum alloy. Further, as the heat sink block 40, a general iron alloy may be used.

  In addition, the heat sink block 40 is provided corresponding to each of the semiconductor elements 10 and 11. For example, the heat sink block 40 has a size that is slightly smaller than the semiconductor elements 10 and 11. A rectangular plate having a thickness can be employed.

  The heat sink block 40 is interposed between the semiconductor elements 10 and 11 and the heat sinks 20 and 30, thereby connecting the semiconductor elements 10 and 11 and the heat sinks 20 and 30 thermally and electrically. At the same time, it serves as a spacer for defining the positions of the first and second semiconductor elements 10 and 11 described above.

  Thus, in this embodiment, the lower heat sink 20 and the upper heat sink 30 are each configured as a metal body that serves as both an electrode and a heat radiator, and has a function of performing heat radiation from the semiconductor elements 10 and 11 in the semiconductor device 100. And also functions as electrodes of the semiconductor elements 10 and 11.

  Further, as shown in FIG. 1, a lead frame 60 is provided around the first semiconductor element 10 in the mold resin 70. The lead frame 60 is made of a conductive material such as copper or 42 alloy.

  As shown in FIG. 1, a plurality of lead frames 60 are provided in this example, and terminals that are electrically connected to signal electrodes (for example, gate electrodes) provided on the main surface of the first semiconductor element 10. And the reference terminal.

  Although not shown, each lead frame 60 is connected and electrically connected to the first semiconductor element 10 by a bonding wire made of gold, aluminum or the like inside the mold resin 70.

  Here, the connection portion of the lead frame 60 with the bonding wire is sealed as an inner lead inside the mold resin 70, and the lead frame 60 is a portion protruding outside the mold resin 70, that is, an outer lead. And electrical connection is possible.

  Thus, in the semiconductor device 100 of this embodiment, the semiconductor elements 10 and 11 are electrically connected to the outside via the bonding wires, the lead frame 60, and the heat sinks 20 and 30, and exchange of signals is performed. It is possible.

  Furthermore, in the semiconductor device 100 of the present embodiment, almost the entire device 100 is molded and sealed with the molding resin 70. The device 100 is sealed by the mold resin 70 except for the heat dissipation surfaces 20a and 30a so that the heat dissipation surfaces 20a and 30a of the lower and upper heat sinks 20 and 30 are exposed from the mold resin 70. ing.

  Specifically, as shown in FIG. 1, a mold resin 70 is filled and sealed in the gap between the pair of heat sinks 20 and 30 and the peripheral portions of the semiconductor elements 10 and 11 and the heat sink block 40.

  For this mold resin 70, for example, a normal mold material such as an epoxy resin can be employed. Further, the sealing of the heat sinks 20 and 30 with the mold resin 70 can be easily performed by a transfer molding method using a mold or potting.

[Manufacturing method]
Next, a method for manufacturing the semiconductor device 100 having the above configuration will be described.

  First, on the upper surface of the lower heat sink 20, the first semiconductor element 10 and the heat sink block 40 thereon, and the lower heat sink block 40 of the second semiconductor element 11 and the second semiconductor element 20 thereon. The process of soldering is performed.

  In this case, between the lower heat sink 20 and the first semiconductor element 10 thereon, between the first semiconductor element 10 and the heat sink block 40 thereon, the lower heat sink 20 and the second semiconductor element 11 side. These are laminated between the second heat sink block 40 and the second semiconductor element 11 and the heat sink block 40 on the second semiconductor element 11 via, for example, a solder foil made of Sn-based solder.

  Thereafter, the solder foil is melted and then cured by heating to a temperature equal to or higher than the melting point of the solder by a heating device (reflow device).

  Subsequently, a step of wire bonding the first semiconductor element 10 and the lead frame 60 is performed. Thus, the first semiconductor element 10 and the lead frame 60 are connected and electrically connected by the bonding wire.

  Next, a process of soldering the upper heat sink 30 on the heat sink block 40 and the second semiconductor element 11 on the first semiconductor element 10 side is executed. Also in this case, the upper heat sink 30 is placed on these via a solder foil, and the solder foil is melted by a heating device and then cured.

  Thus, if each molten solder foil hardens | cures, the hardened solder will be comprised as the 1st conductive joining member 51, the 2nd conductive joining member 52, and the 3rd conductive joining member 53. Become.

  And, through these conductive bonding members 51 to 53, bonding and electrical / thermal connection between the lower heat sink 20, the first and second semiconductor elements 10, 11, each heat sink block 40, and the upper heat sink 30 are performed. Can be realized.

  Even when a conductive adhesive is used as the first, second, and third conductive bonding members 51, 52, 53, the solder is replaced with a conductive adhesive in the above process, and the conductive adhesive By applying and curing, bonding and electrical / thermal connection between the lower heat sink 20, the first and second semiconductor elements 10, 11, each heat sink block 40, and the upper heat sink 30 can be realized.

  Thereafter, a step of filling the gap between the lower heat sink 20 and the upper heat sink 30 and the outer peripheral portion with the mold resin 70 by a transfer molding method is performed. As a result, as shown in FIG. 1, the mold resin 70 is filled and sealed in the gap between the lower heat sink 20 and the upper heat sink 30, the outer peripheral portion, and the like. Thus, the semiconductor device 100 is completed.

[Effects]
By the way, according to the present embodiment, the lower heat sink 20 as the first metal body and the upper heat sink 30 as the second metal body, which are arranged to face each other, and between the lower and upper heat sinks 20 and 30 are arranged. The first semiconductor element 10 provided in the heat sink 20 and 30 and thermally connected to the heat sinks 20 and 30 and the heat sinks 20 and 30 provided between the lower and upper heat sinks 20 and 30 are thermally connected. In a semiconductor device comprising the second semiconductor element 11 and a mold resin 70 filled between the lower and upper heat sinks 20 and 30 and sealing the first semiconductor element 10 and the second semiconductor element 11. With respect to the central portion of the distance between the heat sinks 20 and 30 in the direction in which the lower and upper heat sinks 20 and 30 are separated from each other, The semiconductor device 10 is arranged at a position close to the lower heat sink 20, and the second semiconductor element 11 is arranged at a position close to the upper heat sink 30. .

  According to this, since the first semiconductor element 10 and the second semiconductor element 11 are distributed to the respective heat sinks 20 and 30 to the side, the first semiconductor element and the second semiconductor element 10 and the second semiconductor element 11 are provided as in the related art. The stress concentration points such as thermal stress are more dispersed than the configuration in which both of the semiconductor elements are arranged to be biased toward one metal body.

  Therefore, according to the present embodiment, in the semiconductor device 100 in which two or more semiconductor elements 10 and 11 are interposed between the opposing heat sinks 20 and 30, and these are molded with the resin 70, a stress balance is achieved. Can be taken.

  In addition, according to the semiconductor device 100 of the present embodiment, since a stress balance is achieved, problems such as cracks in the mold resin 70, progress of interfacial peeling of the mold resin 70, and warpage of the mold package, that is, the device body, are caused. It can be suppressed as much as possible.

  Here, in the semiconductor device 100 of the present embodiment, the first semiconductor element 10 is directly bonded to the lower heat sink 20 as the first metal body via the conductive bonding member 51, One of the features of the semiconductor element 11 is that it is directly bonded to the upper heat sink 30 as the second metal body via the conductive bonding member 53.

  In the semiconductor device 100 of the present embodiment, the first semiconductor element 10 disposed at a position close to the lower heat sink 20 is connected to the upper heat sink 30 via the heat sink block 40 as a third metal body. The second semiconductor element 11 that is thermally connected and disposed at a position close to the upper heat sink 30 is also thermally connected to the lower heat sink 20 via the heat sink block 40. One.

  Further, in the semiconductor device of the present embodiment, as described above, as a preferred mode, when the first semiconductor element 10 and the second semiconductor element 11 are each composed of a plurality of semiconductor elements, both the heat sinks 20 and 30 In the meantime, one first semiconductor element 10 and one second semiconductor element 11 may be repeatedly arranged adjacent to each other. This is also one of the features of this embodiment.

  Accordingly, when the first semiconductor element 10 and the second semiconductor element 11 are each composed of a plurality of semiconductor elements, it is preferable because a stress balance can be more easily obtained.

  Here, a specific stress balance effect by the semiconductor device 100 of the present embodiment is shown in comparison with the conventional semiconductor device shown in FIG.

  Here, regarding the semiconductor device 100 of this embodiment and the conventional semiconductor device, the shear stress at the interface between the mold resin 70 and the first metal body 20, the mold resin 70 and the second metal body 30, for each part of the device. FEM (finite element method) analysis was conducted to investigate the shear stress at the interface between the two.

  FIG. 2 is a diagram showing the axial direction of the investigation of the shear stress at the mold resin / metal interface. In the present embodiment and the conventional semiconductor device, the direction (that is, the arrangement of the semiconductor elements 10 and 11) is perpendicular to the direction in which the first and second metal bodies 20 and 30 are separated (that is, the thickness direction of the semiconductor device). Direction) is the x-axis direction.

  In FIG. 2, the left end portion in the x-axis direction in the present embodiment and the conventional semiconductor device is set to the coordinate 0, and the shear stress in each portion moving away from the right side in the x-axis direction from here is investigated.

  FIG. 3 is a diagram showing a result of investigating the shear stress of a semiconductor device having a conventional structure, and FIG. 4 is a diagram showing a result of investigating the shear stress of the semiconductor device 100 of the present embodiment.

  3 and 4, the horizontal axis indicates the distance (unit: mm) in the x-axis direction shown in FIG. 2, and the vertical axis indicates the shear stress (in the mold resin / metal body interface). Unit: MPa).

  Also, in FIG. 3 of the related art, the white square plot is the result for the interface of the first metal body 20, and the black square plot is the result for the interface of the second metal body 30, and in FIG. The plot is the result for the interface of the first metal body 20, and the black circle plot is the result for the interface of the second metal body 30.

  From comparison between FIG. 3 and FIG. 4, in the semiconductor device having the conventional structure, a larger stress is applied to the first metal body 20 side than the semiconductor device 100 of the present embodiment, but the semiconductor device 100 of the present embodiment. It can be seen that the stress is uniformly applied to both the metal bodies 20 and 30 as compared with the conventional one.

  From the results shown in FIGS. 3 and 4, the stress in the stress concentration portion, that is, the portion where the stress is rapidly increased, is suppressed to be smaller in the semiconductor device 100 of the present embodiment than in the conventional device. .

  Thus, according to the present embodiment, the stress concentration can be dispersed and a stress balance can be achieved, and the stress can be suppressed to a relatively small value. Therefore, resin cracks, progress of interfacial peeling, package warpage, and the like can be prevented as much as possible.

(Other embodiments)
In addition, the shape of the heat sinks 20 and 30 as the metal bodies is not limited to the above-described substantially plate shape, and other than that, the shape may be appropriately changed in design.

  The semiconductor elements 10 and 11 are not limited to power semiconductor elements such as the above-described IGBT (insulated gate bipolar transistor) and thyristor, FWD (free wheel diode), and the like.

  1 employs a configuration in which the semiconductor element 10 and the lead frame 60 are connected by a bonding wire or the like as an electrical extraction configuration of the first semiconductor element 10. Besides, other configurations used in the field of semiconductor devices may be adopted. Of course, as the electrical extraction configuration of the second semiconductor element 11, various configurations used in the field of semiconductor devices may be adopted as appropriate.

  Further, in the above embodiment, the positional relationship between the first semiconductor element 10 and the second semiconductor element 11 described above is realized by interposing the heat sink block 40, but without using the heat sink block 40, The positional relationship may be realized.

  For example, in FIG. 1, the heat sink block 40 is omitted, and instead, the upper heat sink 30 is formed with a protruding portion projecting to the first semiconductor element 10 below it, and the lower heat sink 20 is A convex portion protruding from the second semiconductor element 11 may be formed, and each convex portion may be bonded to the opposing semiconductor elements 10 and 11 via a conductive bonding member.

  In the example shown in FIG. 1, the first semiconductor element 10 is close to the lower heat sink 20, and the second semiconductor element 11 is close to the upper heat sink 30. Is configured as the first metal body 20, and the upper heat sink 30 is configured as the second metal body 30.

  In contrast, for example, in the same positional relationship as that of the heat sinks 20 and 30 shown in FIG. 1, the first semiconductor is opposite to the positional relationship of the semiconductor elements 10 and 11 shown in FIG. The element 10 may be located at the upper heat sink 30, and the second semiconductor element 11 may be located at the lower heat sink 30.

  In this case, the upper heat sink 30 is configured as a first metal body, and the lower heat sink 20 is configured as a second metal body. That is, the 1st and 2nd attached | subjected to the metal body and semiconductor element said by this invention have a meaning as one side and the other.

  In short, the present invention includes a first metal body and a second metal body that are disposed to face each other, and a first semiconductor element that is provided between the two metal bodies and is thermally connected to both the metal bodies. A second semiconductor element provided between the two metal bodies and thermally connected to the two metal bodies, and filled between the two metal bodies to seal the first semiconductor element and the second semiconductor element. In a semiconductor device comprising a mold resin to be operated, the first semiconductor element is disposed at a position close to the first metal body with respect to the central portion of the interval between the two metal bodies in the direction in which both metal bodies are separated from each other. In addition, the second semiconductor element has a main part that is arranged at a position close to the second metal body. And about other details, a design change is possible suitably.

1 is a schematic cross-sectional view of a semiconductor device according to an embodiment of the present invention. It is a figure which shows the axial direction of the investigation of the shear stress of a mold resin / metal body interface. It is a figure which shows the result of having investigated the shear stress of the mold resin / metal body interface about the semiconductor device of the conventional structure. It is a figure which shows the result of having investigated the shear stress of the mold resin / metal body interface about the semiconductor device of the said embodiment. It is a schematic sectional drawing of the conventional common semiconductor device.

Explanation of symbols

10 ... 1st semiconductor element, 11 ... 2nd semiconductor element,
20 ... Lower heat sink as a first metal body,
30 ... Upper heat sink as a second metal body,
40 ... a heat sink block as a third metal body,
51, 53: conductive bonding member, 70: mold resin.

Claims (4)

A first metal body (20) and a second metal body (30) arranged opposite to each other;
A first semiconductor element (10) provided between the first metal body (20) and the second metal body (30) and thermally connected to both the metal bodies (20, 30); ,
A second semiconductor element (11) provided between the first metal body (20) and the second metal body (30) and thermally connected to both the metal bodies (20, 30); ,
Mold resin filling between the first metal body (20) and the second metal body (30) and sealing the first semiconductor element (10) and the second semiconductor element (11). (70) In a semiconductor device comprising:
The first semiconductor element (10) is formed of the first metal with respect to the central portion of the distance between the metal bodies (20, 30) in the direction in which the metal bodies (20, 30) are separated from each other. A semiconductor device, wherein the second semiconductor element (11) is disposed at a position close to the body (20), and the second semiconductor element (11) is disposed at a position close to the second metal body (30). The first semiconductor element (10) is directly bonded to the first metal body (20) via a conductive bonding member (51), and the second semiconductor element (11) is The semiconductor device according to claim 1, wherein the semiconductor device is directly bonded to the second metal body (30) via a conductive bonding member (53). The first semiconductor element (10) arranged at a position close to the first metal body (20) is connected to the second metal body (30) via a third metal body (40). Thermally connected,
The second semiconductor element (11) arranged at a position close to the second metal body (30) is connected to the first metal body (20) via a third metal body (40). The semiconductor device according to claim 1, wherein the semiconductor device is thermally connected. The first semiconductor element (10) and the second semiconductor element (11) are each composed of a plurality of semiconductor elements,
Between the two metal bodies (20, 30), one of the first semiconductor elements (10) and one of the second semiconductor elements (11) are repeatedly arranged adjacent to each other. The semiconductor device according to claim 1, wherein:

Images